OR’ing functionality, Inrush protection & hot swap capability
Integral EMI filter designed for the ATCA board to meet CISPR
Class B with minimal external filtering
Protection: Reverse polarity, under voltage, input transient
over voltage/current and temperature
I
2
C digital interface options
Isolated A/B Feed Loss /Open Fuse Alarm
High efficiency : 98%
-40 to 85ºC ambient temperature operation
Industry Standard Quarter brick size: 58.4 mm x 36.8 mm x
13.7 mm (2.3 in x 1.45 in x 0.54 in)
MTBF : 2,308,563 hours per TELCORDIA
ISO** 9001 & ISO 14001 certified manufacturing facilities
Compliant to RoHS II EU “Directive 2011/65/EU”
UL* 60950-1, 2nd Ed. Recognized, CSA† C22.2 No. 60950 1-07
Certified, and VDE‡ (EN60950-1, 2nd Ed.) Licensed
Meets the voltage and current requirements for ETSI 300-
132-2 and complies with and licensed for Basic insulation
rating per EN60950-1
2250 Vdc Isolation tested in compliance with IEEE 802.3
¤
PoE
standards
ISO**9001 and ISO 14001 certified manufacturing facilities
Applications
ATCA Front Board / Blade
Central Office Telecom equipment
High availability server and storage applications
Options
Choice of short pin lengths
I
2
C Digital Interface
Description
The PIM400 series of Power Input Modules are designed to greatly simplify the task of implementing dual redundant, hot swap –
48Vdc power distribution with EMI filtering on an ATCA or other telecom boards. The PIM400 with optional I2C digital interface
capability, when used with a variety of GE’s series of Bus converters (BarracudaTM Series) /POLs (DLynxTM Series) provides for a
quick, simple and elegant power solution to a wide variety of demanding & intelligent power system architectures.
* UL is a registered trademark of Underwriters Laboratories, Inc.
†
CSA is a registered trademark of Canadian Standards Association.
‡
VDE is a trademark of Verband Deutscher Elektrotechniker e.V.
** ISO is a registered trademark of the International Organization of Standards
¤ IEEE and 802 are registered trademarks of the Institute of Electrical and Electronics Engineers, Incorporated.
Additionally: Transient Input Undervoltage,
Overvoltage and Impulse per ANSI T1.315-2001(R2006)
All
Reverse Polarity Protection
+75V
Vdc
Holdup Capacitor Voltage
Voltage (with respect to -48V_OUT)
All
V_HLDP
100
Vdc
Capacitance
All
C_HLDP
3300
F
Temperature
Normal Operating Ambient Temperature
(See Thermal Considerations section)
All
TA -40 85 oC
Storage Temperature
All
T
stg
-55 125 oC
Isolation Voltage
Input to MGMT_PWR Output Voltage & Alarm
All 2250
Vdc
Input to SHELF_GND Voltage
All 2250
Vdc
Input to LOGIC_GND Voltage
All 2250
Vdc
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings
only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations
sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability.
CAUTION: This power module is not internally fused. Both A & B feeds and their corresponding returns must be
individually fused.
To preserve maximum flexibility, internal fusing is not included. However, to achieve maximum safety and system protection, the
safety agencies require a fast-acting fuse with a maximum rating of 20 Amps and Voltage Rating >/= 75Vdc for the –48AF, -48BF
VRTN_AF & VRTN_BF feeds. Consult Fusing and fault protection Section of PICMG 3.0 ATCA specifications for additional information.
Based on the information provided in this data sheet on inrush current and maximum dc input current, the same type of fuse with a
lower rating can be used. Refer to the fuse manufacturer’s data sheet for further information.
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. See
Feature Descriptions for additional information.
The PIM400X module is designed to support the Advanced
Telecommunications Computing Architecture (ATCA) power
entry distribution requirements for the Front Board / Blade per
the PICMG 3.0 specifications.
The PICMG 3.0 specification defines the Mechanical, Shelf
Management Interface, Power Distribution, Thermal, Data I/O
and Regulatory requirements for the next generation of
modular telecom architecture platform for use in Central Office
telecom environments.
Input Pin Connections
The ATCA board is specified to accept up to a maximum of
400W of input power via dual, redundant -48Vdc Feeds
through the Zone 1 (Power and Management) connector,
designated P10.
The power connector provides board to backplane
engagement via pins of varying lengths. Please consult the
PICMG 3.0 specifications for details.
The following are the design considerations of the input pin
connections of the PIM400X to the ATCA power connector.
Output Pin Connections (Standard Module: PIM400Z)
The output pin connections of the PIM400X to the system board
are described below:
Additional Output Pin Connections (Modules with
optional I2C Digital Interface: Option - K)
The following additional output pins of the PIM400KZ available
for I2C Digital Interface to the IMP/System Controller are
defined below:
* Pre-charge resistors
The first pins to mate in the ATCA power connector are the
EARLY_A, EARLY_B, the two grounds (LOGIC_GND, SHELF_GND)
and the two returns (VRTN_A, VRTN_B); followed by staggered
connections of -48V_A and -48V_B power Feeds. The last pins
to engage are the two short pins, ENABLE_A & ENABLE_B. The
ATCA backplane connects the ENABLE_A to VRTN_A, ENABLE_B
to VRTN_B, EARLY_A to -48V_A and EARLY_B to -48V_B.
EARLY_A & EARLY_B Connections: During hot insertion of the
ATCA board, the Inrush Control circuit limits the surge current
to the C_FLTR capacitor. However, due to the presence of a
small amount of internal EMI filter capacitance (located before
the Inrush Control circuit), it is recommended that Precharge
resistors, R1 & R2 (100 Ohms, with appropriate surge capability)
be connected as shown in the Typical Application circuit.
Inrush Current Control / Hot Plug Functionality
The module provides inrush current control / hot plug
capability. The peak value of the inrush current and the
duration complies with the PICMG 3.0’s Inrush Transient
specifications. The specifications shall be met with the external
C_HLDP and C_FLTR capacitances as specified in the previous
sections.
The unique design of the module where the large energy
storage capacitors are segregated from the input filter
capacitors allows the module to meet the stringent PICMG’s
inrush transient specifications with minimal energy storage
capacitors.
Design Considerations
-48V Main Output Bus:
(Signal Names: -48V_OUT & VRTN_OUT)
This is the main -48V output bus that provides the payload
power to the downstream (one or more) DC/DC converters. The
Figure 14. Typical Class B EMC signature of PIM400F
as tested with GE’s bus converter, QBVW033A0B1
module.
PIM400X module does not regulate or provide isolation from
the input -48V A/B feeds.
The main functionality of the module is to provide -48V A/B
Feeds OR’ing, inrush protection for hot swap capability and EMI
filtering to attenuate the noise generated by the downstream
DC/DC converters.
The -48V_OUT pin connects to the Vin(-) pin and the
VRTN_OUT pin connects to the Vin(+) pin of the DC/DC
converter(s).
The -48V_OUT bus may require a fuse depending on
the power and fusing requirements of the DC/DC
converter.
Input filtering of the DC/DC converter is provided by
C_FLTR close to the input pins of the DC/DC
converter(s); additional high frequency decoupling
ceramic capacitors (0.01 to 0.1μF are recommended
for improved EMI performance.
The maximum C_FLTR capacitance across all the
downstream DC/DC converters should not exceed
270μF.
The minimum C_FLTR capacitance (80μF)
recommendation is based on meeting the EMI
requirements.
Holdup Capacitor Output Voltage (V_HLDP)
This output provides the user settable high voltage to charge
the C_HLDP capacitor(s) to allow the ATCA board to meet the
5ms, 0Volts transient requirements.
The V_HLDP pin connects to the +ve terminals of the
C_HLDP capacitors while the –ve terminals of the
C_HLDP connects to the -48V_OUT bus.
The C_HLDP capacitance is dependent on the system
power and the holdup time requirements based on
the following formula
Where T
drawn from the holdup capacitors (=input power of the
downstream DC/DC bus converter + Management Power),
V_HLDP is the trimmed holdup capacitor voltage and VUV is the
undervoltage lockout threshold of either the downstream bus
or the Management Power DC/DC converter (higher of the two).
is the desired holdup time, PHU is the holdup power
HU
Holdup Capacitor Trim Voltage (TRM_HLDP)
capacitance to less than -60Vdc and less than 20 joules within
one second of disconnection from the backplane.
Management Power (+3V3, +5V0)
Two isolated secondary output voltages (+3V3 & +5V0) are
provided for ATCA Front Board’s IPM/System Controller (3.3V)
and for the Blue LED’s (5.0V) power requirements. Both the
outputs are referenced to LOGIC_GND.
The management power is available even when the
input voltage is down to –36Vdc.
No additional output capacitors are required, but a
22μF tantalum/ceramic and a 0.01 to 0.1μF ceramic
capacitors are highly recommended to contain the
switching ripple and noise.
Input Fault Alarm Signal (ALARM)
Both the input feeds, -48V_AF & -48_BF are monitored via the 48V_ALARM signal. In the event of a loss of power from either
feeds (-48V_A or -48V_B) or the opening of their respective
fuses, the -48V_ALARM shall change its logical state indicating
a fault. During normal operation, the signal is Low. During fault
condition, the alarm signal shall assume a HI state when the
ALARM pin is pulled up to an external pull voltage (maximum
5.0V) via an external pullup resistor (R
internally referenced to the LOGIC_GND. A 3.3K pull up resistor
to 3.3V Management Power should suffice.
EMI Filtering
The module incorporates an EMI filter that is designed for the
ATCA board to help meet the conducted emissions
requirements of CISPR 22 Class B when used in conjunction
with GE’s DC/DC bus converters recommended for ATCA
applications.
The following Figure 14 depicts the Class B EMI performance of
PIM400F when tested with GE’s bus converter, QBVW033A0B1
with both modules mounted on the PIM400 Evaluation Board
together with additional high frequency EMI capacitors (Fig 15).
). The ALARM output is
Pullup
The resistor R_TRIM sets the external holdup capacitor voltage
to the desired setting. The output voltage is adjustable from 50
to 90V. The resistor, R_TRIM is selected by the following
equation:
High Voltage Discharge Mechanism:
Per the PICMG 3.0 specifications, the PIM400 provides an
internal discharge mechanism to discharge the holdup/bulk
Figure 15. PIM400 & QBVW033A0 Bus Converter Test
setup schematic
- 48V OUTPUT CURRENT (A)
AMBIENT TEMEPERATURE, TA (oC)
3.3V OUTPUT CURRENT, I
O
(A)
AMBIENT TEMEPERATURE, TA (oC)
AIRFLOW
For Safety and noise considerations, copper traces must not be
routed directly under the power module (PWB top layer). C_EMI
capacitors must make direct connections (preferably without
vias) to the bus converter (DC/DC) module pins with as much
copper width as possible. In case vias are necessary, allow for
multiple connections to the inner plane with vias placed outside
the footprint of the module. For additional layout guide-lines,
refer to GE’s FLT012A0Z Input Filter Module data sheet.
Safety Considerations
For safety-agency approval of the system in which the power
module is used, the power module must be installed in
compliance with the spacing and separation requirements of
the end-use safety agency standard, i.e. UL* 60950-1, 2nd Ed.
Recognized, CSA† C22.2 No. 60950-1-07 Certified, and VDE‡
(EN60950-1, 2nd Ed.) Licensed
The power input to these units is to be provided with a
maximum of fast acting 20A fuses with a voltage rating of at
least 75Vdc.
Refer to “Thermal Consideration” section for additional safety
considerations.
Thermal Considerations
The power modules operate in a variety of thermal
environments; however, sufficient cooling should be provided
to help ensure reliable operation.
Considerations include ambient temperature, airflow, module
power dissipation, and the need for increased reliability. A
reduction in the operating temperature of the module will result
in an increase in reliability. The thermal data presented here is
based on physical measurements taken in a wind tunnel.
The thermal reference point, T
shown in Figure 16. For reliable operation this temperature
should not exceed 130oC.
used in the specifications is
ref,
Figure 16. T
Temperature Measurement Location.
ref
Heat Transfer via Convection
Increased airflow over the module enhances the heat
transfer via convection. Derating curves showing the
maximum output current that can be delivered by
each module versus local ambient temperature (TA)
for natural convection and up to 2 m/s (400 lfm) forced airflow
are shown in Figures 17 & 18.
Please refer to the Application Note “Thermal Characterization
Process For Open-Frame Board-Mounted Power Modules” for a
detailed discussion of thermal aspects including maximum
device temperatures.
Figure 17. -48V Output Current Derating for the Module;
Airflow in the Transverse Direction from Pin7 to Pin1; Vin
=48V & 3.3V @ 1.5A.
Figure 18. 3.3V Output Current Derating for the Module;
Airflow in the Transverse Direction from Pin7 to Pin1; Vin
=48V & -48V Output current = 4A.
The power modules are low profile in order to be used in fine
pitch system card architectures. As such, component
clearance between the bottom of the power module and the
mounting board is limited. Avoid placing copper areas on the
outer layer directly underneath the power module. Also avoid
placing via interconnects underneath the power module.
Particular attention should be paid to the clearance area as
noted in the Bottom View of the Mechanical Outline drawing.
For additional layout guidelines, refer to FLT012A0Z Data Sheet.
Process Considerations
Through-Hole Lead-Free Soldering Information
The RoHS-compliant, Z version, through-hole products use the
SAC (Sn/Ag/Cu) Pb-free solder and RoHS-compliant
components. The module is designed to be processed through
single or dual wave soldering machines. The pins have a RoHScompliant, pure tin finish that is compatible with both Pb and
Pb-free wave soldering processes. A maximum preheat rate of
3C/s is suggested. The wave preheat process should be such
that the temperature of the power module board is kept below
210C. For Pb solder, the recommended pot temperature is
260C, while the Pb-free solder pot is 270C max.
Reflow Lead-Free Soldering Information
The RoHS-compliant through-hole products can be processed
with paste-through-hole Pb or Pb-free reflow process.
Max. sustain temperature :
245C (J-STD-020C Table 4-2: Packaging Thickness>=2.5mm /
Volume > 2000mm3),
Peak temperature over 245C is not suggested due to the
potential reliability risk of components under continuous hightemperature.
Min. sustain duration above 217C : 90 seconds
Min. sustain duration above 180C : 150 seconds
Max. heat up rate: 3C/sec
Max. cool down rate: 4C/sec
In compliance with JEDEC J-STD-020C spec for 2 times reflow
requirement.
Pb-free Reflow Profile
Storage and Handling
The recommended storage environment and handling
procedures for moisture-sensitive surface mount packages is
detailed in J-STD-033 Rev. A (Handling,
Packing, Shipping and Use of Moisture/Reflow Sensitive Surface
Mount Devices). Moisture barrier bags (MBB) with desiccant are
required for MSL ratings of 2 or greater. These sealed
packages should not be broken until time of use. Once the
original package is broken, the floor life of the product at
conditions of 30°C and 60% relative humidity varies according
to the MSL rating (see J-STD-033A). The shelf life for dry packed
SMT packages will be a minimum of 12 months from the bag
seal date, when stored at the following conditions: < 40° C, <
90% relative humidity.
Figure 19. Recommended linear reflow profile using
Sn/Ag/Cu solder.
Post Solder Cleaning and Drying Considerations
Post solder cleaning is usually the final circuit-board assembly
process prior to electrical board testing. The result of
inadequate cleaning and drying can affect both the reliability of
a power module and the testability of the finished circuit-board
assembly. For guidance on appropriate soldering, cleaning and
drying procedures, refer to Lineage Power Board Mounted Power Modules: Soldering and Cleaning Application Note
(AP01-056EPS).
For additional information, please contact your Sales
representative for more details.
BMP module will comply with J-STD-020 Rev. C
(Moisture/Reflow Sensitivity Classification for
Nonhermetic Solid State Surface Mount Devices) for both Pbfree solder profiles and MSL classification
procedures. BMP will comply with JEDEC J-STD-020C
specification for 3 times reflow requirement. The suggested Pbfree solder paste is Sn/Ag/Cu (SAC). The recommended linear
reflow profile using Sn/Ag/Cu solder is shown in Figure 19.
Full featured modules are available with I2C Digital Interface
(Option -K).
Modules with I2C capability monitor up to five analog
parameters and six status bits identified below in Tables 1and 2
respectively.
Modules with I2C Option Features:
Table 1: Internal register memory map
Address Structure:
7 bit Address + R/W bit
Four bits are fixed (0101), three bits (xyz) are variable, and the
least-significant bit is the read/write bit.
Table 3: Address structure
Address Selection:
The three bits (xyz) of the address are set with a single external
resistor from the ADD (pin10) to LOGIC_GND (pin 13). The 8
possible addresses are shown in Table 4 with the respective
resistance values.
Table 2: Digital signals
Note: Bit 0=LSB, Bit 7=MSB
I2C Command Structure:
The I2C is a 2-wire interface supporting multiple devices and
masters on a single bus. The connected devices can only pull
the bus wires low and they never drive the bus high. The bus
wires should be externally connected to a positive supply
voltage via a pull-up resistor. When the bus is idle, both DAT
and CLK are high.
Each device on the I2C bus is recognized by a unique address
stored in that device. Devices can be classified as masters or
slaves when performing data transfers. A master is a device
which initiates a data transfer on the bus and generates clock
signals to permit that transfer. At the same time, any device
addressed is considered slave. The PIM400 always acts as a
slave.
In PIM400 module, I2C interface is used for reporting critical
parameters like input voltage, output current, holdup capacitor
voltage and temperature data. The read protocol is shown in
the Fig 20 below.
Dimensions are in millimeters and (inches).
Tolerances: x.x mm 0.5 mm (x.xx in. 0.02 in.) [unless otherwise indicated]
x.xx mm 0.25 mm (x.xxx in 0.010 in.)
Dimensions are in millimeters and (inches).
Tolerances: x.x mm 0.5 mm (x.xx in. 0.02 in.) [unless otherwise indicated]
x.xx mm 0.25 mm (x.xxx in 0.010 in.)
NOTES:
1. FOR 0.030” X 0.025” RECTANGULAR PIN, USE 0.050” PLATED THROUGH HOLE
* Pins 10, 11 & 12 are present only on modules with I2C digital interface option (-K).
The modules are supplied as standard in the plastic trays shown in Figure below.
Tray Specification
Material Antistatic coated PVC
Max surface resistivity 1012/sq
Color Clear
Capacity 12 power modules
Min order quantity 24 pcs (1 box of 2 full trays + 1 empty top tray)
Each tray contains a total of 12 power modules. The trays are self-stacking and each shipping box for the modules
will contain 2 full trays plus 1 empty hold down tray giving a total number of 24 power modules.