GE Industrial Solutions Austin Superlynx II SIP User Manual

Data Sheet October 2, 2009

Austin Superlynx

2.4Vdc – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A Output Current

TM

II SIP Non-isolated Power Modules:

RoHS Compliant

EZ-SEQUENCE

Applications

 Distributed power architectures

 Intermediate bus voltage applications

 Telecommunications equipment

 Servers and storage applications

 Networking equipment

TM

Features

 Compliant to RoHS EU Directive 2002/95/EC (-Z

versions)

 Compliant to ROHS EU Directive 2002/95/EC with

lead solder exemption (non-Z versions)

 Flexible output voltage sequencing EZ-SEQUENCE

 Delivers up to 16A of output current

 High efficiency – 95% at 3.3V full load (V

 Small size and low profile:

50.8 mm x 12.7 mm x 8.1 mm

(2.0 in x 0.5 in x 0.32 in)

 Low output ripple and noise

 Constant switching frequency (300KHz)

 High Reliability:

Calculated MTBF > 11.12 M hours at 25

 Programmable Output voltage programmable

 Line Regulation: 0.3% (typical)

 Load Regulation: 0.4% (typical)

 Temperature Regulation: 0.4% (typical)

 Remote On/Off

 Remote Sense

 Output overcurrent protection (non-latching)

 Overtemperature protection

 Wide operating temperature range (-40°C to 85°C)

 UL* 60950-1Recognized, CSA

03 Certified, and VDE Licensed

 ISO** 9001 and ISO 14001 certified manufacturing

facilities

‡

†

0805:2001-12 (EN60950-1)

C22.2 No. 60950-1-

= 5.0V)

IN

o

C Full-load

Description

Austin SuperLynxTM II SIP power modules are non-isolated dc-dc converters that can deliver up to 16A of output current with full load efficiency of 95% at 3.3V output. These modules provide a precisely regulated output voltage programmable via external resistor from 0.75Vdc to 3.3Vdc over a wide range of input voltage (V Austin SuperLynx types of output voltage sequencing when powering multiple modules on board. Their open-frame construction and small footprint enable designers to develop cost- and space-efficient solutions. In addition to sequencing, standard features include remote On/Off, remote sense, programmable output voltage, over current and over temperature protection.

* UL is a re gistered trademark of Underwriters Laboratories, Inc.

†

CSA is a reg istered trademark of Canadian Standards Associ ation.

‡

VDE is a t rademark of Verband Deutscher Elektrotechniker e.V.

** ISO is a registered trademark of the International Orga nization of Standards

TM

II has a sequencing feature, EZ-SEQUENCETM that enable designers to implement various

Document No: DS04-020 ver. 1.22

PDF name: superlynx_II_sip_ds.pdf

= 2.4 – 5.5Vdc).

IN

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability.

Parameter Device Symbol Min Max Unit

Input Voltage All V

Continuous

Sequencing Voltage All V

Operating Ambient Temperature All T

IN

SEQ

A

-0.3 5.8 Vdc

-0.3 V

iN, Max

Vdc

-40 85 °C

(see Thermal Considerations section)

Storage Temperature All T

stg

-55 125 °C

Electrical Specifications

Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions.

Parameter Device Symbol Min Typ Max Unit

Operating Input Voltage V

Maximum Input Current All I

(VIN= V

IN, min

to V

IN, max

, IO=I

O, max VO,set

= 3.3Vdc)

Input No Load Current V

≤ V

– 0.5V VIN 2.4

O,set

IN

IN,max

= 0.75 Vdc I

O,set

IN,No load

⎯

5.5 Vdc

16.0 Adc

25 mA

(VIN = 5.0Vdc, IO = 0, module enabled) V

Input Stand-by Current All I

= 3.3Vdc I

O,set

40 mA

IN,No load

1.5 mA

IN,stand-by

(VIN = 5.0Vdc, module disabled)

Inrush Transient All I2t 0.1 A2s

Input Reflected Ripple Current, peak-to-peak (5Hz to 20MHz, 1μH source impedance; V V

= I

IN, max, IO

; See Test configuration section)

Omax

IN, min

to

All 100 mAp-p

Input Ripple Rejection (120Hz) All 30 dB

CAUTION: This power module is not internally fused. An input line fuse must always be used.

This power module can be used in a wide variety of applications, ranging from simple standalone operation to being part of a complex power architecture. To preserve maximum flexibility, internal fusing is not included, however, to achieve maximum safety and system protection, always use an input line fuse. The safety agencies require a 20A, fast-acting, glass type fuse rated for 32V (see Safety Considerations section). Based on the information provided in this data sheet on inrush energy and maximum dc input current, the same type of fuse with a lower rating can be used. Refer to the fuse manufacturer’s data sheet for further information.

LINEAGE POWER 2

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Electrical Specifications (continued)

Parameter Device Symbol Min Typ Max Unit

Output Voltage Set-point All V

(VIN=

IN, min

, IO=I

, TA=25°C)

O, max

Output Voltage All V

(Over all operating input voltage, resistive load, and temperature conditions until end of life)

Adjustment Range All V

Selected by an external resistor

O, set

O

Output Regulation

Line (VIN=V

Load (IO=I

Temperature (T

IN, min

O, min

to V

to I

ref=TA, min

) All

IN, max

) All

O, max

to T

) All ⎯ 0.4 % V

A, max

Output Ripple and Noise on nominal output

(VIN=V

IN, nom

and IO=I

O, min

to I

O, max

Cout = 1μF ceramic//10μFtantalum capacitors)

RMS (5Hz to 20MHz bandwidth) All

Peak-to-Peak (5Hz to 20MHz bandwidth) All

External Capacitance

ESR ≥ 1 mΩ All C

ESR ≥ 10 mΩ All C

Output Current All I

Output Current Limit Inception (Hiccup Mode ) All I

Output Short-Circuit Current All I

(VO≤250mV) ( Hiccup Mode )

Efficiency V

VIN= V

IO=I

, TA=25°C V

IN, nom

= V

O, max , VO

V

O,set

V

= 0.75Vdc η 82.0 %

O,set

= 1.2Vdc η 87.0 %

O, set

= 1.5Vdc η 89.0 %

O,set

= 1.8Vdc η 90.0 %

O,set

= 2.5Vdc η 92.5 %

O,set

= 3.3Vdc η 95.0 %

O,set

Switching Frequency All f

O, max

o

O, lim

O, s/c

sw

Dynamic Load Response

(dIo/dt=2.5A/μs; VIN = V

IN, nom

; TA=25°C)

Load Change from Io= 50% to 100% of Io,max; 1μF ceramic// 10 μF tantalum

All V

pk

Peak Deviation

Settling Time (Vo<10% peak deviation)

(dIo/dt=2.5A/μs; VIN = V

IN, nom

; TA=25°C)

Load Change from Io= 100% to 50%of Io,max: 1μF ceramic// 10 μF tantalum

All t

All V

s

pk

Peak Deviation

Settling Time (Vo<10% peak deviation)

All t

s

–2.0

–3%

⎯

+2.0 % V

+3% % V

0.7525 3.63 Vdc

⎯

0.3 % V

0.4 % V

8 15 mV

25 50 mV

⎯ ⎯

0

⎯

180

3.5

1000 μF

5000 μF

16 Adc

⎯

300

25

300

25

⎯

⎯ μs

⎯

⎯ μs

pk-pk

% I

Adc

kHz

mV

O, set

rms

o

LINEAGE POWER 3

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output

TM

II SIPNon-isolated Power Modules:

Electrical Specifications (continued)

Parameter Device Symbol Min Typ Max Unit

Dynamic Load Response

(dIo/dt=2.5A/μs; V VIN = V

Load Change from Io= 50% to 100% of Io,max; Co = 2x150 μF polymer capacitors

Peak Deviation

Settling Time (Vo<10% peak deviation)

(dIo/dt=2.5A/μs; VIN = V

Load Change from Io= 100% to 50%of Io,max: Co = 2x150 μF polymer capacitors

Peak Deviation

Settling Time (Vo<10% peak deviation)

IN, nom

; TA=25°C)

All V

All t

All V

All t

pk

s

pk

s

⎯

150

100

150

100

⎯

⎯ μs

⎯

⎯ μs

mV

General Specifications

Parameter Min Typ Max Unit

Calculated MTBF (IO=I

Telecordia SR-332 Issue 1: Method 1 Case 3

Weight

, TA=25°C) 11,112,600 Hours

O, max

⎯

5.6 (0.2)

⎯

g (oz.)

LINEAGE POWER 4

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Feature Specifications

Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. See Feature Descriptions for additional information.

Parameter Device Symbol Min Typ Max Unit

On/Off Signal interface

Device code with Suffix “4” – Positive logic

(On/Off is open collector/drain logic input; Signal referenced to GND - See feature description

Input High Voltage (Module ON) All VIH ― ― V

Input High Current All IIH ― ― 10 μA

Input Low Voltage (Module OFF) All VIL -0.2 ― 0.3 V

Input Low Current All IIL ― 0.2 1 mA

Device Code with no suffix – Negative Logic

(On/OFF pin is open collector/drain logic input with

external pull-up resistor; signal referenced to GND)

Input High Voltage (Module OFF) All VIH 1.5 ― V

Input High Current All IIH 0.2 1 mA

Input Low Voltage (Module ON) All VIL -0.2 ― 0.3 Vdc

Input low Current All IIL ― 10 μA

Turn-On Delay and Rise Times

(IO=I

Case 1: On/Off input is set to Logic Low (Module

O, max , VIN

= V

= 25 oC, )

IN, nom, TA

All Tdelay 3.9 msec ON) and then input power is applied (delay from instant at which V

Case 2: Input power is applied for at least one second

=V

IN

until Vo=10% of Vo,set)

IN, min

All Tdelay 3.9 msec and then the On/Off input is set to logic Low (delay from

instant at which Von/Off=0.3V until Vo=10% of Vo, set)

Output voltage Rise time (time for Vo to rise from 10% of V

o,set to 90% of Vo, set)

All Trise

Output voltage overshoot – Startup ―

IO= I

; VIN = V

O, max

Sequencing Delay time

Delay from V

IN, min

to V

, TA = 25 oC

IN, max

to application of voltage on SEQ pin All TsEQ-delay 10 msec

IN, min

Tracking Accuracy (Power-Up: 2V/ms) All |VSEQ –Vo | 100 200 mV

(Power-Down: 1V/ms) All |VSEQ –Vo | 200 400 mV

(V

IN, min

to V

IN, max

; I

to I

O, min

VSEQ < Vo)

O, max

Remote Sense Range All ― ― 0.5 V

Overtemperature Protection

(See Thermal Consideration section)

Input Undervoltage Lockout

Turn-on Threshold All

Turn-off Threshold All

All T

ref

V

IN, max

Vdc

IN,max

― 4.2 8.5 msec

1

% V

O, set

⎯

125

⎯

°C

⎯

2.2

2.0

⎯

V

LINEAGE POWER 5

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Characteristic Curves

The following figures provide typical characteristics for the Austin SuperLynx

90

87

84

81

78

75

EFFICIENCY, η (%)

72

0481216

VIN = 3.0V

VIN = 5.0V

VIN = 5.5V

OUTPUT CURRENT, IO (A)

Figure 1. Converter Efficiency versus Output Current (Vout = 0.75Vdc).

93

90

87

84

81

78

75

EFFICIENCY, η (%)

72

VIN = 3.0V

VIN = 5.0V

VIN = 5.5V

0 4 8 12 16

OUTPUT CURRENT, IO (A)

Figure 2. Converter Efficiency versus Output Current (Vout = 1.2Vdc).

94

91

88

85

82

79

76

73

EFFICIENCY, η (%)

70

0481216

VIN = 3.0V

VIN = 5.0V

VIN = 5.5V

OUTPUT CURRENT, IO (A)

Figure 3. Converter Efficiency versus Output Current (Vout = 1.5Vdc).

Figure 4. Converter Efficiency versus Output Current (Vout = 1.8Vdc).

Figure 5. Converter Efficiency versus Output Current (Vout = 2.5Vdc).

Figure 6. Converter Efficiency versus Output Current (Vout = 3.3Vdc).

96

93

90

87

84

81

78

75

EFFICIENCY, η (%)

72

0481216

10 0

97

94

91

88

85

82

79

76

EFFICIENCY, η (%)

73

0481216

10 0

97

94

91

88

85

82

79

EFFICIENCY, η (%)

76

0 4 8 12 16

TM

II SIP modules at 25ºC.

OUTPUT CURRENT, IO (A)

VIN = 3.0V

VIN = 5.0V

VIN = 5.5V

VIN = 3.0V

VIN = 5.0V

VIN = 5.5V

VIN = 4.5V

VIN = 5.0V

VIN = 5.5V

LINEAGE POWER 6

Data Sheet

(V)

October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Characteristic Curves (continued)

The following figures provide typical characteristics for the Austin SuperLynx

18

16

14

(A)

IN

12

10

8

6

4

2

INPUT CURRENT, I

0

0.51.52.53.54.55.5

INPUT VOLTAGE, V

Figure 7. Input voltage vs. Input Current

(Vout = 2.5Vdc).

Io =0A

Io =8A

Io =16A

(V) (200mV/div)

O

(A) (5A/div) V

O

OUTPUT CURRENT, OUTPUT VOLTAGE

IN

I

Figure 10. Transient Response to Dynamic Load Change from 50% to 100% of full load (Vo = 3.3Vdc).

TM

II SIP modules at 25ºC.

TIME, t (5 μs/div)

(V) (20mV/div)

O

V

OUTPUT VOLTAGE

TIME, t (2μs/div)

Figure 8. Typical Output Ripple and Noise

(Vin = 5.0V dc, Vo = 0.75 Vdc, Io=16A).

(V) (20mV/div)

O

OUTPUT VOLTAGE

V

TIME, t (2μs/div)

Figure 9. Typical Output Ripple and Noise

(Vin = 5.0V dc, Vo = 3.3 Vdc, Io=16A).

(V) (200mV/div)

O

(A) (5A/div) V

O

OUTPUT CURRENT, OUTPUT VOLTAGE

I

TIME, t (5 μs/div)

Figure 11. Transient Response to Dynamic Load Change from 100% to 50% of full load (Vo = 3.3 Vdc).

(V) (200mV/div)

O

(A) (5A/div) V

O

OUTPUT CURRENT, OUTPUT VOLTAGE

I

TIME, t (10μs/div)

Figure 12. Transient Response to Dynamic Load Change from 50% to 100% of full load (Vo = 5.0 Vdc, Cext = 2x150 μF Polymer Capacitors).

LINEAGE POWER 7

Data Sheet

μ

October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Characteristic Curves (continued)

The following figures provide typical characteristics for the Austin SuperLynx

(V) (2V/div)

(V) (200mV/div)

O

(A) (5A/div) V

O

OUTPUT CURRENT, OUTPUTVOLTAGE

I

TIME, t (10μs/div)

Figure 13. Transient Response to Dynamic Load Change from 100% of 50% full load (Vo = 5.0 Vdc, Cext = 2x150

F Polymer Capacitors).

NN

V) (1V/div) V

O

V

OUTPUT VOLTAGE INPUT VOLTAGE

Figure 16. Typical Start-Up with application of Vin

(Vin = 5.0Vdc, Vo = 3.3Vdc, Io = 16A).

TM

II SIP modules at 25ºC.

TIME, t (2 ms/div)

(V) (2V/div)

On/off

V) (1V/div) V

O

V

OUTPUT VOLTAGE On/Off VOLTAGE

TIME, t (2 ms/div)

Figure 14. Typical Start-Up Using Remote On/Off (Vin = 5.0Vdc, Vo = 3.3Vdc, Io = 16.0A).

(V) (2V/div)

On/off

V) (1V/div) V

O

OUTPUT VOLTAGE On/Off VOLTAGE

V

F

igure 15. Typical Start-Up Using Remote On/Off with

TIME, t (2 ms/div)

Low-ESR external capacitors (Vin = 5.5Vdc, Vo =

3.3Vdc, Io = 16.0A, Co = 1050μF).

(V) (2V/div)

On/off

V) (1V/div) V

O

V

OUTPUT VOLTAGE On/Off VOLTAGE

TIME, t (2 ms/div)

Figure 17 Typical Start-Up Using Remote On/Off with Prebias (Vin = 3.3Vdc, Vo = 1.8Vdc, Io = 1.0A, Vbias =1.0Vdc).

(A) (10A/div)

O

OUTPUT CURRENT,

I

TIME, t (10ms/div)

Figure 18. Output short circuit Current (Vin = 5.0Vdc, Vo = 0.75Vdc).

LINEAGE POWER 8

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Characteristic Curves (continued)

The following figures provide thermal derating curves for the Austin SuperLynx

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

OUTPUT CURRENT, Io (A)

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, TA OC

Figure 19. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 5.0, Vo=3.3Vdc).

OUTPUT CURRENT, Io (A)

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, TA OC

Figure 20. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 5.0Vdc, Vo=0.75 Vdc).

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

OUTPUT CURRENT, Io (A)

20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE, TA OC

Figure 21. Derating Output Current versus Local Ambient Temperature and Airflow

(Vin = 3.3Vdc,

Vo=2.5 Vdc).

Figure 22. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 3.3dc, Vo=0.75 Vdc).

18

16

14

12

10

NC

8

100 LFM

6

200 LFM

4

300 LFM

2

400 LFM

0

OUTPUT CURRENT, Io (A)

20 30 40 50 60 70 80 90

TM

II SIP modules.

AMBIENT TEMPERATURE, TA OC

LINEAGE POWER 9

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Test Configurations

TO OSCILLOSCOPE

L

TEST

1μH

CS 1000μF

BATTERY

NOTE: Measure input reflected ripple current with a simulated

Electrolytic

E.S.R.<0.1Ω

@ 20°C 100kHz

source induct ance (L possible battery impedance. Measure current as shown above.

) of 1μH. Capacit or CS offsets

TEST

Figure 23. Input Reflected Ripple Current Test Setup.

COPPER STRIP

V

(+)

O

1uF .

COM

NOTE: All voltage measurements to be taken at the module

terminals, as shown above. If sockets are used then Kelvin connections are required at the module terminals to avoid measurement errors due to socket contact resistance.

10uF

SCOPE

GROUND PLANE

Figure 24. Output Ripple and Noise Test Setup.

R

contact

distribution

R

contact

distribution

NOTE: All volt age meas urements to be taken at th e module

terminals , as shown above. If socket s are us ed then Kelvin conn ections are requir ed at the modu le termi nals to avoid measur ement err ors due to soc ket contact resistance.

VIN(+)

V

IN

COM

Figure 25. Output Voltage and Efficiency Test Setup.

. I

V

O

Efficiency

=

η

VIN. I

O

IN

V

COM

2x100μF

Tantalum

O

CURRENT PROBE

CIN

RESISTIVE LOAD

R

V

O

R

x 100 %

VIN(+)

COM

contactRdistribution

R

contactRdistribution

LOAD

Design Considerations

Input Filtering

The Austin SuperLynxTM SIP module should be connected to a low-impedance source. A highly inductive source can affect the stability of the module. An input capacitance must be placed directly adjacent to the input pin of the module, to minimize input ripple voltage and ensure module stability.

To minimize input voltage ripple, low-ESR polymer and ceramic capacitors are recommended at the input of the module. Figure 26 shows the input ripple voltage (mVpp) for various outputs with 1x150 µF polymer capacitors (Panasonic p/n: EEFUE0J151R, Sanyo p/n: 6TPE150M) in parallel with 1 x 47 µF ceramic capacitor (Panasonic p/n: ECJ-5YB0J476M, Taiyo- Yuden p/n: CEJMK432BJ476MMT) at full load. Figure 27 shows the input ripple with 2x150 µF polymer capacitors in parallel with 2 x 47 µF ceramic capacitor at full load.

300

250

200

150

100

50

0

Input Ripple Voltage (mVp-p)

0.511.522.533.5

Output Voltage (Vdc)

Figure 26. Input ripple voltage for various output with 1x150 µF polymer and 1x47 µF ceramic capacitors at the input (full load).

200 180 160

140 120 100

80 60

40 20

0

Input Ripple Voltage (mVp-p)

0.51 1.52 2.5 3 3.5

Output Voltage (Vdc)

Figure 27. Input ripple voltage for various output with 2x150 µF polymer and 2x47 µF ceramic capacitors at the input (full load).

3.3Vin

5Vin

3.3Vin

5Vin

LINEAGE POWER 10

Data Sheet October 2, 2009

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

Austin Superlynx

Design Considerations (continued)

Output Filtering

The Austin SuperLynx output ripple voltage and will meet the maximum output ripple specification with 1 µF ceramic and 10 µF tantalum capacitors at the output of the module. However, additional output filtering may be required by the system designer for a number of reasons. First, there may be a need to further reduce the output ripple and noise of the module. Second, the dynamic response characteristics may need to be customized to a particular load step change.

To reduce the output ripple and improve the dynamic response to a step load change, additional capacitance at the output can be used. Low ESR polymer and ceramic capacitors are recommended to improve the dynamic response of the module. For stable operation of the module, limit the capacitance to less than the maximum output capacitance as specified in the electrical specification table.

TM

II SIP module is designed for low

TM

II SIP Non-isolated Power Modules:

Safety Considerations

For safety agency approval the power module must be installed in compliance with the spacing and separation requirements of the end-use safety agency standards, i.e., UL 60950-1, CSA C22.2 No. 60950-1-03, and VDE 0850:2001-12 (EN60950-1) Licensed.

For the converter output to be considered meeting the requirements of safety extra-low voltage (SELV), the input must meet SELV requirements. The power module has extra-low voltage (ELV) outputs when all inputs are ELV.

The input to these units is to be provided with a fastacting fuse with a maximum rating of 20A in the positive

input lead

.

LINEAGE POWER 11

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Feature Description

Remote On/Off

Austin SuperLynxTM II SIP power modules feature an On/Off pin for remote On/Off operation. Two On/Off logic options are available in the Austin SuperLynx modules. Positive Logic On/Off signal, device code suffix “4”, turns the module ON during a logic High on the On/Off pin and turns the module OFF during a logic Low. Negative logic On/Off signal, no device code suffix, turns the module OFF during logic High and turns the module ON during logic Low.

For positive logic modules, the circuit configuration for using the On/Off pin is shown in Figure 28. The On/Off pin is an open collector/drain logic input signal (Von/Off) that is referenced to ground. During a logic-high (On/Off pin is pulled high internal to the module) when the transistor Q1 is in the Off state, the power module is ON. Maximum allowable leakage current of the transistor when Von/off = V

is 10µA. Applying a logic-low

IN,max

when the transistor Q1 is turned-On, the power module is OFF. During this state VOn/Off must be less than 0.3V. When not using positive logic On/off pin, leave the pin unconnected or tie to V

VIN+

ON/OFF

+

V

GND

ON/OFF

Q1

_

I

ON/OFF

IN.

R2

R1

Q2

R3

R4

Figure 28. Remote On/Off Implementation.

For negative logic On/Off devices, the circuit configuration is shown is Figure 29. The On/Off pin is pulled high with an external pull-up resistor (typical Rpullup = 68k, +/- 5%). When transistor Q1 is in the Off state, logic High is applied to the On/Off pin and the power module is Off. The minimum On/off voltage for logic High on the On/Off pin is 1.5Vdc. To turn the module ON, logic Low is applied to the On/Off pin by turning ON Q1. When not using the negative logic On/Off, leave the pin unconnected or tie to GND.

TM

II series

MODULE

PWM Enable

Q3 CSS

VIN+

ON/OFF

GND

R

pull-up

I

ON/OFF

V

ON/OFF

Q1

+

_

MODULE

PWM Enable

R1

Q2 CSS

R2

Figure 29. Circuit configuration for using negative logic On/OFF

Overcurrent Protection

To provide protection in a fault (output overload) condition, the unit is equipped with internal current-limiting circuitry and can endure current limiting continuously. At the point of current-limit inception, the unit enters hiccup mode. The unit operates normally once the output current is brought back into its specified range. The typical average output current during hiccup is 3.5A.

Input Undervoltage Lockout

At input voltages below the input undervoltage lockout limit, module operation is disabled. The module will begin to operate at an input voltage above the undervoltage lockout turn-on threshold.

Overtemperature Protection

To provide over temperature protection in a fault condition, the unit relies upon the thermal protection feature of the controller IC. The unit will shutdown if the thermal reference point T the thermal shutdown is not intended as a guarantee that the unit will survive temperatures beyond its rating. The module will automatically restart after it cools down.

, exceeds 125oC (typical), but

ref

LINEAGE POWER 12

Data Sheet October 2, 2009

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

Austin Superlynx

Feature Descriptions (continued)

Output Voltage Programming

The output voltage of the Austin SuperLynxTM II SIP can be programmed to any voltage from 0.75 Vdc to 3.3 Vdc by connecting a single resistor (shown as Rtrim in Figure

30) between the TRIM and GND pins of the module. Without an external resistor between TRIM pin and the ground, the output voltage of the module is 0.7525 Vdc. To calculate the value of the resistor Rtrim for a particular output voltage Vo, use the following equation:

21070

Rtrim

⎢

−

7525.0

Vo

⎣

⎡

= 5110

For example, to program the output voltage of the Austin SuperLynx follows:

TM

module to 1.8 Vdc, Rtrim is calculated is

21070

⎡

= 5110

Rtrim

⎢

−

7525.08.1

⎣

V

(+)

O

TRIM

V

(+)

IN

ON/OFF

GND

Figure 30. Circuit configuration for programming output voltage using an external resistor.

Table 1 provides Rtrim values required for some common output voltages

Table 1

V

(V)

O, set

0.7525 Open

1.2 41.973

1.5 23.077

1.8 15.004

2.5 6.947

3.3 3.160

Rtrim (KΩ)

−

Ω= kRtrim 004.15

Vout

R

trim

⎤

Ω

⎥ ⎦

⎤ ⎥

⎦

LOAD

TM

II SIP Non-isolated Power Modules:

By using a 1% tolerance trim resistor, set point tolerance of ±2% is achieved as specified in the electrical specification. The POL Programming Tool, available at

www.lineagepower.com under the Design Tools section,

helps determine the required external trim resistor needed for a specific output voltage.

The amount of power delivered by the module is defined as the voltage at the output terminals multiplied by the output current. When using the trim feature, the output voltage of the module can be increased, which at the same output current would increase the power output of the module. Care should be taken to ensure that the maximum output power of the module remains at or below the maximum rated power (P

max

= V

o,set

x I

o,max

).

Voltage Margining

Output voltage margining can be implemented in the Austin SuperLynx R

, from the Trim pin to the ground pin for

margin-up

margining-up the output voltage and by connecting a resistor, R for margining-down. Figure 31 shows the circuit configuration for output voltage margining. The POL Programming Tool, available at www.lineagepower.com under the Design Tools section, also calculates the values of R voltage and % margin. Please consult your local Lineage Power technical representative for additional details.

Figure 31. Circuit Configuration for margining Output voltage.

TM

margin-down

Austin Lynx or Lynx II Series

, from the Trim pin to the Output pin

and R

margin-up

II modules by connecting a resistor,

margin-down

Vo

Trim

GND

for a specific output

Rmargin-down

Q2

Rmargin-up

Rtrim

Q1

LINEAGE POWER 13

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Feature Descriptions (continued)

Voltage Sequencing

Austin SuperLynxTM II series of modules include a sequencing feature, EZ-SEQUENCE that enables users to implement various types of output voltage sequencing in their applications. This is accomplished via an additional sequencing pin. When not using the sequencing feature, either tie the SEQ pin to V it unconnected.

When an analog voltage is applied to the SEQ pin, the output voltage tracks this voltage until the output reaches the set-point voltage. The SEQ voltage must be set higher than the set-point voltage of the module. The output voltage follows the voltage on the SEQ pin on a one-to-one volt basis. By connecting multiple modules together, customers can get multiple modules to track their output voltages to the voltage applied on the SEQ pin.

For proper voltage sequencing, first, input voltage is applied to the module. The On/Off pin of the module is left unconnected (or tied to GND for negative logic modules or tied to V

IN for positive logic modules) so that

the module is ON by default. After applying input voltage to the module, a minimum of 10msec delay is required before applying voltage on the SEQ pin. During this time, potential of 50mV (± 10 mV) is maintained on the SEQ pin. After 10msec delay, an analog voltage is applied to the SEQ pin and the output voltage of the module will track this voltage on a one-to-one volt bases until output reaches the set-point voltage. To initiate simultaneous shutdown of the modules, the SEQ pin voltage is lowered in a controlled manner. Output voltage of the modules tracks the voltages below their set-point voltages on a one-to-one basis. A valid input voltage must be maintained until the tracking and output voltages reach ground potential.

When using the EZ-SEQUENCE

TM

feature to control start-up of the module, pre-bias immunity feature during start-up is disabled. The pre-bias immunity feature of the module relies on the module being in the diode-mode during start-up. When using the EZ-SEQUENCE feature, modules goes through an internal set-up time of 10msec, and will be in synchronous rectification mode when voltage at the SEQ pin is applied. This will result in sinking current in the module if pre-bias voltage is present at the output of the module. When pre-bias immunity during start-up is required, the EZ-SEQUENCE must be disabled. For additional guidelines on using EZSEQUENCE

TM

feature of Austin SuperLynxTM II, contact the Lineage Power technical representative for preliminary application note on output voltage sequencing using Austin Lynx II series.

IN or leave

TM

feature

Remote Sense

The Austin SuperLynxTM SIP power modules have a Remote Sense feature to minimize the effects of distribution losses by regulating the voltage at the Remote Sense pin (See Figure 32). The voltage between the Sense pin and Vo pin must not exceed 0.5V.

The amount of power delivered by the module is defined as the output voltage multiplied by the output current (Vo x Io). When using Remote Sense, the output voltage of the module can increase, which if the same output is maintained, increases the power output by the module. Make sure that the maximum output power of the module remains at or below the maximum rated power. When the Remote Sense feature is not being used, connect the Remote Sense pin to the output pin.

R

contact

distribution

R

distribution

R

contact

VIN(+)

COM

V

Sense

COM

Figure 32. Remote sense circuit configuration

R

O

contact Rdistribution

R

LOAD

R

contact Rdistribution

LINEAGE POWER 14

Data Sheet

A

W

October 2, 2009

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

Austin Superlynx

Thermal Considerations

Power modules operate in a variety of thermal environments; however, sufficient cooling should always be provided to help ensure reliable operation.

Considerations include ambient temperature, airflow, module power dissipation, and the need for increased reliability. A reduction in the operating temperature of the module will result in an increase in reliability. The thermal data presented here is based on physical measurements taken in a wind tunnel. The test set-up is shown in Figure

34. Note that the airflow is parallel to the long axis of the module as shown in figure 33. The derating data applies to airflow in either direction of the module’s long axis.

Airflow

Top View

Figure 33. T

The thermal reference point, T specifications is shown in Figure 33. For reliable operation this temperature should not exceed 115

The output power of the module should not exceed the rated power of the module (Vo,set x Io,max).

Please refer to the Application Note “Thermal Characterization Process For Open-Frame BoardMounted Power Modules” for a detailed discussion of thermal aspects including maximum device temperatures.

Temperature measurement location.

ref

used in the

ref

Tref

o

C.

TM

II SIP Non-isolated Power Modules:

25.4_

ind Tu nn e l

PWBs

x

5.97_

(0.235)

ir

flow

(1.0)

Po w e r M o d u l e

76.2_

(3.0)

Probe Location for measuring airflow and ambient temperature

Figure 34. Thermal Test Set-up.

Heat Transfer via Convection

Increased airflow over the module enhances the heat transfer via convection. Thermal derating curves showing the maximum output current that can be delivered at different local ambient temperatures (T conditions ranging from natural convection and up to 2m/s (400 ft./min) are shown in the Characteristics Curves section.

) for airflow

A

LINEAGE POWER 15

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Post solder Cleaning and Drying Considerations

Post solder cleaning is usually the final circuit-board assembly process prior to electrical board testing. The result of inadequate cleaning and drying can affect both the reliability of a power module and the testability of the finished circuit-board assembly. For guidance on appropriate soldering, cleaning and drying procedures, refer to Board Mounted Power Modules: Soldering and Cleaning Application Note.

Through-Hole Lead-Free Soldering Information

The RoHS-compliant through-hole products use the SAC (Sn/Ag/Cu) Pb-free solder and RoHS-compliant components. They are designed to be processed through single or dual wave soldering machines. The pins have an RoHS-compliant finish that is compatible with both Pb and Pb-free wave soldering processes. A maximum preheat rate of 3°C/s is suggested. The wave preheat process should be such that the temperature of the power module board is kept below 210°C. For Pb solder, the recommended pot temperature is 260°C, while the Pb-free solder pot is 270°C max. Not all RoHScompliant through-hole products can be processed with paste-through-hole Pb or Pb-free reflow process. If additional information is needed, please consult with your Lineage Power technical representative for more details.

LINEAGE POWER 16

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Mechanical Outline

Dimensions are in millimeters and (inches).

Tolerances: x.x mm ± 0.5 mm (x.xx in. ± 0.02 in.) [unless otherwise indicated]

x.xx mm ± 0.25 mm (x.xxx in ± 0.010 in.)

Top View

Side View

Back View

PIN FUNCTION

1 Vo

2 Vo

3 Sense+

4 Vo

5 GND

6 GND

7 VIN

8 VIN

B SEQ

9 Trim

10 On/Off

LINEAGE POWER 17

Data Sheet October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Recommended Pad Layout

Dimensions are in millimeters and (inches).

Tolerances: x.x mm ± 0.5 mm ( x.xx in. ± 0.02 in.) [unless otherwise indicated]

x.xx mm ± 0.25 mm ( x.xxx in ± 0.010 in.)

PIN FUNCTION

1 Vo

2 Vo

3 Sense+

4 Vo

5 GND

6 GND

7 VIN

8 VIN

B SEQ

9 Trim

10 On/Off

Module Layout – Back view

LINEAGE POWER 18

Data Sheet

a

©

October 2, 2009

Austin Superlynx

2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current

TM

II SIP Non-isolated Power Modules:

Ordering Information

Please contact your Lineage Power Sales Representative for pricing, availability and optional features.

Table 2. Device Codes

Product codes Input Voltage Output Voltage

ATH016A0X3 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A

ATH016A0X3Z 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A

ATH016A0X43 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A

ATH016A0X43Z 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A

-Z refers to RoHS-compliant versions.

Output

Current

Efficiency

3.3V @ 16A

95.0% SIP

95.0%

Connector

Type

SIP

Comcodes

108989117

CC109104758

108989125

CC109104766

Asia-Pacific Headquarters

Tel: + 65 6593 7211

World Wide Headquarters Lineage Power Corporation

601 Shil oh Roa d, Plano, TX 75074, USA +1-800-526-7 819 (Outsi de U.S.A.: +1-972-244-9428)

www.lineagepower.com e-mail: techs upport1@lineagepower.com

Linea ge Power res erves th e right to make change s to the prod uct(s) or infor mation c ontained herein without not ice. No l iability is assumed as a result o f their use o r

pplication . No righ ts under any patent accompany the sal e of any s uch produc t(s) or informati on.

Linea ge Power D C-DC pro ducts are p rotected unde r v ariou s patents. Infor mation on these pa tents is av ailable at www. lineagepo wer.com/patents.

2009 Line age Power Corporation, (Plan o, Texas) All Inte rn ational Rights Reserved.

Europe, Middle-East and Africa Headquarters

Tel: + 49 898 780 672 80

India Headquarters Tel: + 91 80 2841163 3

LINEAGE POWER 19

Document No: DS04-020 ver. 1.22

PDF name: superlynx_II_sip_ds.pdf