Fairchild Semiconductor MM74C907N Datasheet
October 1987
Revised January 1999
MM74C906 • MM74C907 Hex Open Drain N-Channel Buffers • Hex Open Drain P-Channel Buffers
© 1999 Fairchild Semiconductor Corporation DS005911.prf www.fairchildsemi.com
MM74C906 • MM74C907
Hex Open Drain N-Channel Buffers •
Hex Open Drain P-Channel Buffers
General Description
The MM74C906 and MM74C907 buffers employ monolithic
CMOS technology in achieving open drain outputs. The
MM74C906 consists of six inverters driving six N-ch annel
devices; and the MM74C907 consists of six inverters dr iving six P-channel devices. The open drain feature of these
buffers makes level shifting or wire AND and wire OR functions by just the addition of pull-up or pull-down re sistors.
All inputs are protected from static discharge by diode
clamps to V
CC
and to ground.
Features
■ Wide supply voltage range: 3V to 15V
■ Guaranteed noise margin: 1V
■ High noise immunity: 0.45 V
CC
(typ.)
■ High current sourcing and sinking open drain outputs
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to t he ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Top View
Logic Diagrams
MM74C906
MM74C907
Order Number Package Number Package Description
MM74C906M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C906N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C907N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
www.fairchildsemi.com 2
MM74C906 • MM74C907
Absolute Maximum Ratings(Note 1)
Note 1: “Absolute Maxi mum Ratings” are those valu es beyond which the
safety of the device cannot be guaranteed. Ex ce pt for “Operating Temperature Range” they are not mean t to imply that the devices sho uld be operated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device op eration.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Voltage at Any Input Pin −0.3V to VCC +0.3V
Voltage at Any Output Pin
Operating Temperature Range
MM74C906/MM74C907 −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Power Dissipation
Dual-In-Line 700 mW
Small Outline 500 mW
Operating V
CC
Range 3V to 15V
Absolute Maximum V
CC
18V
Lead Temperature (T
L
)
(Soldering, 10 seconds) 260°C
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
Logical “1” Input Voltage VCC = 5V 3.5 V
VCC = 10V 8.0 V
V
IN(0)
Logical “0” Input Voltage VCC = 5V 1.5 V
VCC = 10V 2 V
I
IN(1)
Logical “1” Input Current VCC = 15V, VIN = 15V 0.005 1 µA
I
IN(0)
Logical “0” Input Current VCC = 15V, VIN = 0V −1.0 −0.005 µA
I
CC
Supply Current VCC = 15V, Output Open 0.05 15 µA
Output Leakage
MM74C906 VCC = 4.75V, VIN = VCC − 1.5V 0.005 5 µA
VCC = 4.75V, V
OUT
= 18V
MM74C907 VCC = 4.75V, VIN = 1V + 0.1 V
CC
0.005 5 µA
VCC = 4.75V, V
OUT
= VCC −18V
CMOS/LPTTL INTERFA CE
V
IN(1)
Logical “1” Input Voltage VCC = 4.75V VCC − 1.5V V
V
IN(0)
Logical “0” Input Voltage VCC = 4.75V 0.8 V
OUTPUT DRIVE CURRENT
MM74C906 VCC = 4.75V, VIN = 1V +0.1 V
CC
VCC = 4.75V, V
OUT
= 0.5V 2.1 8.0 mA
VCC = 4.75V, V
OUT
= 1.0V 4.2 12.0 mA
MM74C907 VCC = 4.75V, VIN = VCC −1.5V
VCC = 4.75V, V
OUT
= VCC − 0.5V −1.05 −1.5 mA
VCC = 4.75V, V
OUT
= VCC − 1V −2.1 −3.0 mA
MM74C906 VCC = 10V, VIN = 2V
VCC = 10V, V
OUT
= 0.5V 4.2 −20 mA
VCC = 10V, V
OUT
= 1V 8.4 −30 mA
MM74C907 VCC = 10V, VIN = 8V
VCC = 10V, V
OUT
= 9.5V −2.1 −4.0 mA
VCC = 10V, V
OUT
= 9V −4.2 −8.0 mA
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