Fairchild Semiconductor MM74C76N, MM74C76M, MM74C76MX Datasheet
October 1987
Revised January 1999
MM74C73 • MM74C76 Dual J-K Flip-Flops with Clear and Preset
© 1999 Fairchild Semiconductor Corporation DS005884.prf www.fairchildsemi.com
MM74C73 • MM74C76
Dual J-K Flip-Flops with Clear and Preset
General Description
The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circu i ts co nstructed with N- and P-channe l enhancement transistors.
Each flip-flop has inde pendent J, K, c lock and clear inputs
and Q and Q outputs. The MM74 C 76 fli p flops a l so incl u de
preset inputs a nd are supplied in 16 pin packages. This
flip-flop is edge sensitive to the clock input and change
state on the negative going transiti on of the clock pulse.
Clear or preset is inde pendent of the clock and is accomplished by a low level on the respective input.
Features
■ Supply voltage range: 3V to 15V
■ Tenth power TTL compatible: Drive 2 LPTTL loads
■ High noise immunity: 0.45 V
CC
(typ.)
■ Low power: 50 nW (typ.)
■ Medium speed operation: 10 MHz (typ.)
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm systems
• Industrial electronics
• Remote metering
• Computers
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the or dering code.
Connection Diagrams
MM74C73
Note: A logic “0” on clear set s Q to logic “0”.
Top View
MM74C76
Note: A logic “0” on clear sets Q to a logic “0”.
Note: A logic “0” on preset sets Q t o a logic “1”.
Top V iew
Order Number Package Number Package Description
MM74C73N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C76M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74C76N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
www.fairchildsemi.com 2
MM74C73 • MM74C76
Truth Tables
tn = bit time before clock puls e
t
n+1
= bit time after clock pulse
Note 1: No change in output from previous state
Logic Diagrams
MM74C73
MM74C76
Transmission Gate
t
n
t
n+1
JKQ
00Q
n
010
101
11Q
n
Preset Clear Q
n
Q
n
00 00
01 10
10 01
11Qn
(Note 1)
Q
n
(Note 1)
3 www.fairchildsemi.com
MM74C73 • MM74C76
Absolute Maximum Ratings(Note 2)
Note 2: “Absolute Maximum Rat ings” are tho se values beyond which the
safety of the device cannot be guaranteed. E x c ept for “ Operating Temperature Range” they are not mea nt to imply that the devices sh ould be operated at these limits. The table of Electrical Characteristics provides
conditions for actual device o peration.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Voltage at Any Pin −0.3V to VCC + 0.3V
Operating Temperature Range −40°C to +85°C
Storage Temperature −65°C to +150°C
Power Dissipati on
Dual-In-Line 700 mW
Small Outline 500 mW
Lead Temperature
(Soldering , 10 seconds) 260°C
Operating V
CC
Range +3V to 15V
V
CC
(Max) 18V
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
Logical “1” Input Voltage VCC = 5V 3.5 V
VCC = 10V 8 V
V
IN(0)
Logical “0” Input Voltage VCC = 5V 1.5 V
VCC = 10V 2 V
V
OUT(1)
Logical “1” Output Voltage VCC = 5V 4.5 V
VCC = 10V 9 V
V
OUT(0)
Logical “0” Output Voltage VCC = 5V 0.5 V
VCC = 10V 1 V
I
IN(1)
Logical “1” Input Current VCC = 15V 1 µA
I
IN(0)
Logical “0” Input Current VCC = 15V −1 µA
I
CC
Supply Current VCC = 15V 0.050 60 µA
LOW POWER TTL TO CMOS INTERFACE
V
IN(1)
Logical “1” Input Voltage VCC = 4.75V VCC − 1.5 V
V
IN(0)
Logical “0” Input Voltage VCC = 4.75V 0.8 V
V
OUT(1)
Logical “1” Output Voltage VCC = 4.75V, IO = −360 µA2.4 V
V
OUT(0)
Logical “0” Output Voltage VCC = 4.75V, IO = 360 µA0.4V
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
I
SOURCE
Output Source Current VCC = 5V, V
IN(0)
= 0V −1.75 mA
TA = 25°C, V
OUT
= 0V
I
SOURCE
Output Source Current VCC = 10V, V
IN(0)
= 0V −8mA
TA = 25°C, V
OUT
= 0V
I
SINK
Output Sink Current VCC = 5V, V
IN(1)
= 5V 1.75 mA
TA = 25°C, V
OUT
= V
CC
I
SINK
Output Sink Current VCC = 10V, V
IN(1)
= 10V 8 mA
TA = 25°C, V
OUT
= V
CC
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