Fairchild Semiconductor KA7524BD Datasheet
KA7524B
Power Factor Correction Controller
www.fairchildsemi.com
Features
• Internal self-starting
• Micro power start up mode
• Included under voltage lockout circuit
• Internal 1% reference
• High output current : Peak 500mA
Internal Block Diagram
Descripiton
The KA7524B provides the necessary features to implement
the Electroni c BALL A ST cont r o l and S.M . P.S application
for designing on active power factor correction circuit.
8-DIP
1
8-SOP
1
©2000 Fairchild Semiconductor International
Rev. 5.0
KA7524B
Connection Diagram
KA7524/KA7524D (8 DIP, 8 SOP)
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply Voltage V
Peak Driver Output Current I
Detect Clamping Diode Current I
Output Clamping Diode Current I
Operating Ambient Temperature T
Storage Temperature T
CC
O(P)
DET
O(C.D)
OPR
STG
20 V
500 mA
10 mA
10 mA
-25 ~ + 100 -
-65 ~ + 150 -
2
KA7524B
Electrical Characteristics
Parameter Symbol Conditions Min. Typ. Max. Unit
UNDER VOLTAGE LOCKOUT SECTION
Start Threshold Voltage V
UV Lockout Hysteresis V
Supply Zener Voltage V
TH(ST)
THS
Z
SUPPLY CURRENT SECTION
Start-Up Supply Current I
Operating Supply Current I
Dynamic Operating Current I
START
CC
CC(D)
VCCV
VCC = 12V, No Load - 6 12 mA
VCC = 12V, f = 50KHz,
C
= 1000PF
GS
REFERENCE SECTION(NOTE1)
Reference Voltage V
Line regulation V
Load Regulation V
REF
REF
REF
Temperature Stability ST
T
KA7524B/BD 2.475 2.5 2.525 V
12VVCC16V - 0.1 10 mV
0I
REF
ERROR AMPLIFIER SECTION
Input Offset Voltage V
Input Bias Current I
Large Signal Open Loop Gain G
IO
BIAS
V
Power Supply Rejection Ratio PSRR - 60 86 - dB
I
Output Current
Output Voltage Range V
SOURCE
I
SINK
O(P)
Unity Gain Bandwidth UBW - - 1.0 - MHz
Phase Margin MPH - - 57 - -
- 9.2 10 10.8 V
- 1.8 2.0 2.2 V
--17-V
TH
- 0.25 0.5 mA
-1020mA
2mA - 0.1 10 mV
--20-mV
--15-15mV
- -1 -0.1 1 uA
- 60 100 - dB
-2--mA
----2mA
-1.2-4V
3
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