Fairchild Semiconductor HCPL-0701, HCPL-0700 Datasheet

Lead Coplanarity : 0.004 (0.10) MAX

0.202 (5.13)

Pin 1

0.019 (0.48)

0.182 (4.63)

0.021 (0.53)

0.011 (0.28)

0.050 (1.27) TYP

0.244 (6.19)

0.224 (5.69)

0.143 (3.63)

0.123 (3.13)

0.008 (0.20)

0.003 (0.08)

0.010 (0.25)

0.006 (0.16)

SEATI

NG PLANE

0.164 (4.16)

0.144 (3.66)

LOW INPUT CURRENT

HIGH GAIN SPLIT

DARLINGTON OPTOCOUPLERS

HCPL-0700 HCPL-0701

DESCRIPTION

The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector housed in a compact 8-pin small outline package.

The split darlington conﬁguration separating the input photodiode and the ﬁrst stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.

The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high fan-out TTL requirements.

FEATURES

•Low current - 0.5 mA

• Superior CTR-2000%

• Superior CMR-10 kV/µs

• CTR guaranteed 0-70°C

• *BSI, CSA and UL approval

APPLICATIONS

• Digital logic ground isolation

•Telephone ring detector

• EIA-RS-232C line receiver

• High common mode noise line receiver

• µP bus isolation

• Current loop receiver

1

N/C

+

2

V

F

_

3

4 5

N/C

HCPL-0700 / HCPL-0701

PACKAGE DIMENSIONS

V

8

CC

V

7

B

V

6

O

GND

NOTE

All dimensions are in inches (millimeters)

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/ ∆

LOW INPUT CURRENT

HIGH GAIN SPLIT

DARLINGTON OPTOCOUPLERS

HCPL-0700 HCPL-0701

(T

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Value Units

Storage Temperature T

Operating Temperature T

Reﬂow Temperature Proﬁle (Refer to ﬁg. 11)

EMITTER

DC/Average Forward Input Current I

Peak Forward Input Current (50% duty cycle, 1 ms P.W.) I

Peak Transient Input Current - ( ≤ 1 µs P.W., 300 pps) I

Reverse Input Voltage V

Input Power Dissipation P

DETECTOR

Average Output Current (Pin 6) I

Emitter-Base Reverse Voltage V

Supply Voltage, Output Voltage

Output power dissipation P

= 25°C unless otherwise speciﬁed)

A

STG

OPR

(avg) 20 mA

F

(pk) 40 mA

F

(trans) 1.0 A

F

R

D

(avg) 60 mA

O

EBR

HCPL-0700

HCPL-0701 -0.5 to 18

V

,

V

CC

O

D

-55 to +125 °C

-55 to +85 °C

0.5 V

-0.5 to 7

100 mW

5V

35 mW

V

*Samples submitted for certiﬁcation - Approval pending

(T

ELECTRICAL CHARACTERISTICS

= 0 to 70°C Unless otherwise speciﬁed)

A

INDIVIDUAL COMPONENT CHARACTERISTICS

Parameter Test Conditions Symbol Device Min Typ** Max Unit

EMITTER

Input Reverse Breakdown Voltage (T

=25°C, I

A

Temperature coefﬁcient of forward voltage (I

= 0 mA, V

DETECTOR

Logic high output current

Logic low supply

Logic high supply

(I

F

(I

= 0 mA, V

F

(I

= 1.6 mA, V

F

(I

= 0 mA, V

F

(T

=25°C)

A

= 1.6 mA) 1.75

F

= 10 µA) BV

R

= 1.6 mA) ( ∆ V

F

= V

O

= 18 V)

CC

= V

O

= 7 V) HCPL-0700 0.01 250

CC

= Open)

O

(V

= 18 V) HCPL-0701

CC

= Open)

O

(V

= 18 V) HCPL-0701

CC

V

F

R

T

) All -1.8 mV/°C

F

A

I

OH

I

CCL

I

CCH

All

All 5.0 20

HCPL-0701 0.01 100

HCPL-0700

1.0 1.27 1.7

0.05 10 µA

µA

0.4 1.5 mA

VInput Forward Voltage (I

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LOW INPUT CURRENT

HIGH GAIN SPLIT

DARLINGTON OPTOCOUPLERS

HCPL-0700 HCPL-0701

≤

TRANSFER CHARACTERISTICS

(T

= 0 to 70°C Unless otherwise speciﬁed)

A

Parameter Test Conditions Symbol Device Min Typ** Max Unit

COUPLED

Current transfer ratio (Notes 1,2)

Logic low output voltage output voltage

ISOLATION CHARACTERISTICS

(I

= 0.5 mA, V

F

(I

= 1.6 mA, V

F

(I

= 1.6 mA, V

F

= 0.5 mA, I

(I

F

(I

= 1.6 mA, I

F

(I

= 5 mA, I

F

= 12 mA, I

(I

F

(I

= 1.6 mA, I

F

= 0.4 V, V

O

= 0.4 V, V

O

= 0.4 V, V

O

= 2 mA, V

O

= 8 mA, V

O

= 15 mA, V

O

= 24 mA, V

O

= 4.8 mA, V

O

(T

= 0 to 70°C Unless otherwise speciﬁed)

A

= 4.5V)

CC

= 4.5V) HCPL-0701 500 1300 2600

CC

= 4.5V) HCPL-0700 300 1300 2600

CC

= 4.5V)

CC

= 4.5V) 0.10 0.4

CC

= 4.5V) 0.13 0.4

CC

= 4.5V) 0.20 0.4

CC

= 4.5V) HCPL-0700 0.08 0.4

CC

CTR

V

HCPL-0701 400 2000 5000

HCPL-0701

OL

%

0.05 0.4

V

Characteristics Test Conditions Symbol Min Typ** Max Unit

(Relative humidity = 45%) Input-output insulation leakage current

(T

= 25°C, t = 5 s)

A

(V

= 3000 VDC)

I-O

I

I-O

1.0 µA

(Note 4)

(R

50%, T

Withstand insulation test voltage

H

(Note 4, 5) ( t = 1 min.)

Resistance (input to output) (Note 4) (V

= 25°C)

A

= 500 VDC) R

I-O

V

ISO

I-O

2500 V

12

10

RMS

Ω

** All typicals at T

= 25°C

A

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LOW INPUT CURRENT

HIGH GAIN SPLIT

DARLINGTON OPTOCOUPLERS

HCPL-0700 HCPL-0701

SWITCHING CHARACTERISTICS

Parameter Test Conditions Symbol Device Min Typ** Max Unit

(T

= 0 to 70°C unless otherwise speciﬁed., VCC = 5 V)

A

30

25

15

10

90

10

50

2

µs

1

µs

7

Propagation delay time to logic low (Note 2) (Fig. 13)

Propagation delay time to logic high (Note 2) (Fig. 13)

Common mode transient immunity at

(R

= 4.7 kΩ, IF = 0.5 mA)

L

= 270 Ω, IF = 12 mA)

(R

L

= 2.2 kΩ, IF = 1.6 mA)

(R

L

= 4.7 kΩ, IF = 0.5 mA)

(R

L

= 4.7 kΩ, IF = 0.5 mA) TA = 25°C 60

(R

L

= 270 Ω, IF = 12 mA)

(R

L

= 2.2 kΩ, IF = 1.6 mA)

(R

L

= 0 mA, |VCM| = 10 V

(I

T

= 25°C (RL = 2.2 kΩ) (Note 3) (Fig. 14)

A

F

T

= 25°C

A

T

= 25°C

A

T

= 25°C

A

T

= 25°C

A

= 25°C 35

T

A

P-P

HCPL-0701 4

T

HCPL-0701 0.2

PHL

HCPL-0700 1.5

HCPL-0701 12

T

HCPL-0701 1.3

PLH

HCPL-0700 7

HCPL-0700

)

|CM

|

H

HCPL-0701

1,000 10,000 V/µs

logic high

Common mode transient immunity at logic low

(I

= 1.6 mA, |VCM| = 10 V

F

T

= 25°C (Note 3) (Fig. 14)

A

, RL = 2.2

P-P

kΩ)

|CM

|

L

HCPL-0700

HCPL-0701

1,000 10,000 V/µs

NOTES

1. Current Transfer Ratio is deﬁned as a ratio of output collector current, I

, to the forward LED input current, I

O

, times 100%.

F

2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.

3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV common mode pulse signal, V transient immunity in logic low level is the maximum tolerable (negative) dV pulse signal, V

, to assure that the output will remain in a logic low state (i.e., V

CM

, to assure that the output will remain in a logic high state (i.e., V

CM

/dt on the trailing edge of the common mode

CM

<0.8 V).

O

/dt on the leading edge of the

CM

>2.0 V). Common mode

O

4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.

5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.

** All typicals at TA = 25°C

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8/18/03