Fairchild Semiconductor DM74LS259WM, DM74LS259N, DM74LS259MX, DM74LS259M, DM74LS259CW Datasheet

© 2000 Fairchild Semiconductor Corporation DS006418 www.fairchildsemi.com

August 1986
Revised March 2000

DM74LS259 8-Bit Addressable Latches

DM74LS259
8-Bit Addressable Latches

General Description

These 8-bit addressable latche s are designed for general
purpose storage applications in digital systems. Specific
uses include working registers, serial-holding registers,
and active-high de coders or de mult iplexers. Th ey are mul­tifunctional devices capable of storing single-line data in
eight addressable latch es, and being a 1-of-8 decoder or
demultiplexer with active-high outputs.

Four distinct modes of ope ration are select able b y contr ol­ling the clear and enable inputs as enumerated in the func­tion table. In the addre ssab le-l a tch mod e, d ata at the dat a­in terminal is written into the addressed latch. The
addressed latch will follow the data input with all unad­dressed latches remaining in th eir previous states. In the
memory mode, all latches rem ain in their previous states
and are unaffected by the data o r addre ss inputs. To elimi­nate the possibility of entering erroneous data in the
latches, the enable should be held HIGH (inactive) while
the address lines are changing. In the 1-of-8 decoding or
demultiplexing mode, the addressed o utput will follow the
level of the D input with all other o utputs LO W. In the clear
mode, all outputs are LO W and un affected by the addr ess
and data inputs.

Features

■ 8-Bit parallel-out stora ge register pe rforms ser ial-to-par­allel conversion with storage

■ Asynchronous parallel clear

■ Active high decoder

■ Enable/disable input simplifies expansion

■ Direct replacement for Fairchild DM9334

■ Expandable for N-bit applic atio ns

■ Four distinct functional modes

■ Typical propagation delay times:

Enable-to-output 18 ns
Data-to-output 16 ns
Address-to-output 21 ns
Clear-to-output 17 ns

■ Fan-out
I

OL

(sink current) 8 mA

I

OH

(source current) −0.4 mA

■ Typical I

CC

22 mA

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Order Number Package Number Package Description

DM74LS259M M16A 16-Lead Small Outlin e Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS259WM M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS259N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

www.fairchildsemi.com 2

DM74LS259

Connection Diagram Function Table

Latch Selection Table

H = HIGH Level
L = LOW Level
D = the Level of the Data Input
Q

i0

= the Level of Qi (i = 0, 1,…7, as A ppropriate) before the Indicated

Steady-State Input Conditions Were Est ablished.

Inputs Output of Each

Addressed Other Function

Clear E

Latch Output

HL D Q

i0

Addressable Latch

HH Q

i0

Qi0Memory
L L D L 8-Line Demultiplexer
L H L L Clear

Select Inputs Latch

C B A Addressed

LLL 0
LLH 1
LHL 2

LHH 3
HLL 4
HLH 5
HHL 6
HHH 7