Fairchild Semiconductor 74ACT818SPC, 74ACT818CW Datasheet
© 2000 Fairchild Semiconductor Corporation DS009801 www.fairchildsemi.com
July 1988
Revised September 2000
74ACT818 8-Bit Diagnostic Register
74ACT818
8-Bit Diagnostic Register
General Description
The ACT818 is a high-speed, general-purpose pipeline
register with an on-bo ar d dia gno sti c re giste r fo r performing
serial diagnostics and/or writable control store loading.
The D-to-Y path pr ovides an 8-b it parallel data path pipeline register for normal system operation. The diagnostic
register can load parallel data to or fro m the pipel ine register and can output data through the D input por t (as in
WCS loading).
The 8-bit diagnostic register has multiplexer inputs that
select parallel inp uts from the Y-port or adjacent bi ts i n the
diagnostic register to operate as a right -shift-only regist er.
This register can then participate in a serial loop throughout
the system where normal da ta, a ddr ess, statu s and cont rol
registers are replaced with ACT818 diagnostic pipeline registers. The loop can be used to scan in a complete test routine starting point (Data, Address, etc.). Then after a
specified number of machine cycles it scans out the results
to be inspected for the expect ed resu lts. WC S load ing c an
be accomplished usin g the same t echniqu e. An i nstruct ion
word can be serially shifted into the shadow register and
written into the WCS RAM by enabling the D output.
Features
■ On-line and off-line system diagnostics
■ Swaps the contents of diagnostic register and output
register
■ Diagnostic register and diagnostic testing
■ Cascadable for wide control word s as use d in mi crop ro-
gramming
■ Edge-triggered D registers
■ Outputs source/sink 24 mA
■ ACT818 has TTL-compatible inputs
■ ACT818 is functionally- and pin-compatible to AMD
Am29818 and MMI 74S818
Applications
• Register for microprogram control store
• Status register
• Data register
• Instruction register
• Interrupt mask register
• Pipeline register
• General purpose register
• Parallel-serial/serial-parallel converter
Ordering Code:
Logic Symbol Connection Diagram
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Order Package Package Description
74ACT818SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
74ACT818
Pin Descriptions Functional Description
Data transfers into the diagnostic register occur on the
LOW-to-HIGH transition of DCLK. Mode and SDI determine what data source will be loaded. The pipeline register
is loaded on the LOW-to-HIGH tr ansition of PCLK. Mode
selects whether the d ata source is the data input or the
diagnostic register output. Because of the independence of
the clock inputs, data can be shifted in the diagnostic register via DCLK and loaded i nto t he pipel ine re giste r from the
data input via PCLK simultaneously, as long as no setup or
hold times are violated. This simultaneous operation is
legal.
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clo c k Transi ti on
Diagnostic Register Block Diagram
Pin Names Description
D
0–D7
Data Inputs
SDI Serial Data Input
DCLK Diagnostics Clock
MODE Control Input
PCLK Pipeline Register Clock
OEY
Output Enable Input
SDO Serial Data Output
Y
0–Y7
Data Outputs
Inputs Outputs
Operation
SDI MODE DCLK PCLK SDO Diagnostic Reg. Pipeline Reg.
XL
XS7 SI<SI − 1, NA Serial Shift; D7–D0 Disabled
SO
<SD
I
XLX
S7 NA PI<DI Normal Load Pipeline Register
LH
XL SI<YI NA Load Diagnostic Register from Y;
DI Disabled
XHX
SDI NA PI<SI Load Pipeline Register from
Diagnostic Register
HH
X H Hold NA Hold Diagnostic Register; DI
Enabled
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