Fairchild Semiconductor 74ABT16952CSSC, 74ABT16952CMTDX, 74ABT16952CMTD Datasheet
November 1993
Revised January 1999
74ABT16952
16-Bit Registered Transceiver with 3-STATE Outputs
74ABT16952 16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ABT16952 is a 16-bi t registere d transceiver. Two 8-bit
back to back registers store data fl owing in both direct ions
between two bidirectional buses. Separate clock, clock
enable and 3-STATE output enable signals are provided for
each register. The output pins are guaranteed to source 32
mA and to sink 64 mA.
Features
■ Separate clock, clock enable and 3-STATE output
enable provided for each register
■ A and B output sink capability of 64 mA source capability
of 32 mA
■ Guaranteed latchup protection
■ High impedance glitch free bus loading during entire
power up and power down cycle
■ Nondestructive hot insertion capability
Ordering Code:
Order Number Package Number Package Description
74ABT16952CSSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ABT16952CMTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the letter suffix “X” to t he ordering code.
Pin Descriptions
Pin Names Description
A
0–A15
B
0–B15
CPAB
CEA
OEAB
, CPBA
n
, CEB
n
n
, OEBA
Data Register A Inputs/
B-Register 3-STATE Outputs
Data Register B Inputs/
A-Register 3-STATE Outputs
Clock Pulse Inputs
n
Clock Enable
n
Output Enable Inputs
n
Connection Diagram
Pin Assignment for SSOP
Output Control
Internal QOutput Function
OE
H X Z Disable Outputs
L L L Enable Outputs
LH H
Register Function Table
(Applies to A or B Register)
H = HIGH Voltage Level Z = HIGH Impedance
L = LOW Voltage Level
X = Immaterial NC = No Change
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Inputs Internal
Q
X X H NC Hold Data
L
H
L L Load Data
L H
= LOW-to-HIGH Transition
FunctionDCPCE
Block Diagram
74ABT16952
n for either byte 1 or byte 2
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Absolute Maximum Ratings(Note 1)
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C
Junction Temperature under Bias −55°C to +150°C
Pin Potential to
V
CC
Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disable or Power-Off State −0.5V to +5.5V
in the HIGH State −0.5V to V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
DC Latchup Source Current −500 mA
Over Voltage Latchup (I/O) 10V
Recommended Operating
Conditions
Free Air Ambient Temperature −40°C to +85°C
Supply Voltage +4.5V to +5.5V
Minimum Input Edge Rate (∆V/∆t)
Data Input 50 mV/ns
Enable Input 20 mV/ns
Clock Input 100 mV/ns
CC
Note 1: Absolute maximum ratin gs are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
(mA)
under these condit ions is not implied.
Note 2: Either voltage limit or current limi t is s uf f ic ient to protect inputs.
DC Electrical Characteristics
Symbol Parameter Min Typ Max Units
V
V
V
V
V
V
I
IH
I
BVI
I
BVIT
I
IL
IIH + I
IIL + I
I
OS
I
CEX
I
ZZ
I
CCH
I
CCL
I
CCZ
I
CCT
I
CCD
Note 3: For 8-bit toggling, I
Note 4: Guaranteed, but not tested.
Input HIGH Voltage 2.0 V Recognized HIGH Signal
IH
Input LOW Voltage 0.8 V Recognized LOW Signal
IL
Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA (Non I/O Pins)
CD
Output HIGH Voltage 2.5 IOH = −3 mA (An, Bn)
OH
Output LOW Voltage 0.55 IOL = 64 mA (An, Bn)
OL
Input Leakage Test 4.75 V 0.0 IID = 1.9 µA (Non-I/O Pins)
ID
Input HIGH Current 1 µA MaxVIN = 2.7V (Non-I/O Pins) (Note 4)
Input HIGH Current 7 µA MaxVIN = 7.0V (Non-I/O Pins)
Breakdown Test
Input HIGH Current 100 µA MaxVIN = 5.5V (An, Bn)
Breakdown Test (I/O)
Input LOW Current −1 µA MaxVIN = 0.5V (Non-I/O Pins) (Note 4)
Output Leakage Current 10 µA 0V–5.5V V
OZH
Output Leakage Current −10 µA 0V–5.5VV
OZL
Output Short-Circuit Current −100 −275 mA Max V
Output HIGH Leakage Current 50 µA MaxV
Bus Drainage Test 100 µA 0.0V V
Power Supply Current 1.0 mA Max All Outputs HIGH
Power Supply Current 60 mA Max All Outputs LOW
Power Supply Current 1.0 mA Max Outputs 3-STATE;
Additional ICC/Input 2.5 mA Max VI = VCC − 2.1V; All Others
Dynamic I
(Note 4)
CC
CCD
<1.4 mA/MHz.
No Load Outputs Open
2.0 IOH = −32 mA (An, Bn)
1V
−1V
0.18 mA/MHz Max
V
CC
All Other Pins Grounded
= VCC (Non-I/O Pins)
IN
= 0.0V (Non-I/O Pins)
IN
= 2.7V (An, Bn);
OUT
OEA or OEB = 2.0V
= 0.5V (An, Bn);
OUT
OEA or OEB = 2.0V
= 0V (An, Bn)
OUT
= VCC (An, Bn)
OUT
= 5.5V (An, Bn);
OUT
All Others GND
All Others GND
at VCC or GND
OEA or OEB = GND,
Non-I/O = GND or V
One Bit toggling, 50% duty cycle
(Note 3)
74ABT16952
Conditions
CC
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