Dell PowerEdge T630 User Manual

Page 1
Item
Non-
Quantity
Reference Designator
Size
Planer
Volatile
Non­Volatile
Non­Volatile
Up to 12
Up to 32GB per
Trusted Platform Module (TPM)
Non­Volatile
1 or 2
Various
Statement of Volatility – Dell PowerEdge T630
The Dell PowerEdge T630 contain both volatile and non-volatile (NV) components. Volatile components lose their data immediately upon removal of power from the component. Non-volatile components continue to retain their data even after the power has been removed from the component. Components chosen as user-definable configuration options (those not soldered to the motherboard) are not included in the Statement of Volatility. Configuration option information (pertinent to options such as microprocessors, remote access controllers, and storage controllers) is available by component separ at ely. The following NV components are present in the PowerEdge T630 servers.
Volatile or Volatile
PCH Internal CMOS RAM
BIOS Password
BIOS SPI Flash
iDRAC SPI Flash
BMC EMMC
Non­Volatile
Non-
Non­Volatile
Non­Volatile
Non­Volatile
1 U_PCH 256 Bytes
1 U_PCH 16 bytes
1 U_SPI_BIOS1 8 MB
1 U_IDRAC_SPI1 4 MB
1 U_EMMC1 4 GB
CPU Vcore Regulators
Vmem Regulators
System CPLD RAM Volatile 1 U_CPLD1 1 KB
System Memory Volatile
Internal USB Key
CPU Volatile
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02 - 2013
Non­Volatile
2 PAU1, PDU1 512 Bytes
2 PBU1, PCU1, PEU1, PFU1 512 Bytes
per CPU
Up to 1 N/A
1 U_TPM1 128 Bytes
DIMM1 ~ DIMM24
CPU1 / CPU2
DIMM
Varies (not factory installed)
Page 2
Item
Non-
Quantity
Reference Designator
Size
1
1
64 kbyte + registers
Non­Volatile
1
8Mb
Non­Volatile
1
512Kb
16x2.5" EXP/Backplane
NVSRAM memory
Non­Volatile
1
U_EXP_NVSRAM
1 Mb
Flash memory
Non­Volatile
1
U_EXP_FLASH
32 Mb
Expander FRU image
Non­Volatile
1
U_EXP_FRU
512 Bytes
BP FRU image
Non­Volatile
1
U_BP_FRU
256 Bytes
16x2.5" EXP/Backplane
NVSRAM memory
Non­Volatile
1
U_EXP_NVSRAM
1 Mb
Flash memory
Non­Volatile
1
U_EXP_FLASH
32 Mb
Expander FRU image
Non­Volatile
1
U_EXP_FRU
512 Bytes
BP FRU image
Non­Volatile
1
U_BP_FRU
256 Bytes
8x3.5" Backplane
SEP internal flash
Non-
1
U_SEP
Flash:32KB+4KB
18x3.5" Exp/Backplane
NVSRAM memory
Non­Volatile
1
U_EXP_NVSRAM
1 Mb
Flash memory
Non­Volatile
1
U_EXP_FLASH
32 Mb
BP FRU image
Non­Volatile
1
U_EXP_FRU
256 Bytes
Expander FRU image
Non­Volatile
1
U_BP_FRU
512 Bytes
4x PCIe SSD Backplane
SEP internal flash
Non­Volatile
1
U_SEP
Flash:32KB+4KB EEPROM: 1KB
H730, H830 PERCs
NVSRAM
Non-volatile
1
U1033
128KB
FRU
Non-volatile
1
U1019
256B
1-Wire EEPROM
Non-volatile
1
U1004
128B
SPD
Non-volatile
1
U22
256B
Volatile or Volatile
iDRAC DDR Volatile
iDRAC Volatile
LOM EEPROM
LOM FLASH
(Upstream)
(Downstream)
U_IDRAC_MEM1 256MByte
U_IDRAC1
U1
U3
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Volatile
EEPROM: 1KB
Page 3
Item
Non-
Quantity
Reference Designator
Size
SBR
Non-volatile
1
U1020
8KB
Flash
Non-volatile
1
U1031
16MB
ONFI Backup Flash
Non-volatile
1
U1059
4GB
SDRAM
Volatile
5
U1043-U1047
512MB/1GB
H330 PERC
NVSRAM
Non-volatile
1
U1033
128KB
FRU
Non-volatile
1
U1019
256B
1-Wire EEPROM
Non-volatile
1
U1004
128B
SBR
Non-volatile
1
U1020
8KB
Flash
Non-volatile
1
U3
16MB
PCIe SSD Extension Card
Switch Configuration EEPROM
Non-
1
U2
256B
IDSDM
SPI Flash
Non­Volatile
1
U2
8Mb
MCU
Non-
1
U6
512KB
Front Panel
SPI Flash
Non-
1
U_SPI_FLASH
32Mb
Volatile or Volatile
Volatile
Volatile
Volatile
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Page 4
Item
Type (e.g. Flash PROM,
Can user programs or operating system
Planer
Trusted Platform Module (TPM)
16x2.5" EXP/Backplane (Upstream)
NVSRAM memory
Flash
No
EEPROM)
PCH Internal CMOS RAM Battery-backed CMOS RAM No
BIOS Password Battery-backed CMOS RAM Yes
BIOS SPI Flash SPI Flash No
write data to it during normal operation?
iDRAC SPI Flash SPI Flash No
BMC EMMC eMMC NAND Flash No
CPU Vcore Regulators ROM No
Vmem Regulators ROM No
System CPLD RAM RAM No
System Memory DRAM Yes
Internal USB Key Flash Yes
EEPROM Yes
CPU Cache + registers Yes
iDRAC DDR DRAM No
iDRAC Cache + registers No
LOM EEPROM EEPROM Yes
LOM FLASH Flash Yes
Dell - Internal Use - Confidential
Page 5
Item
Type (e.g. Flash PROM,
Can user programs or operating system
Flash memory
Flash
No
Expander FRU image
I2C EEPROM
No
BP FRU image
I2C EEPROM
No
16x2.5" EXP/Backplane
NVSRAM memory
Flash
No
Flash memory
Flash
No
Expander FRU image
I2C EEPROM
No
BP FRU image
I2C EEPROM
No
8x3.5" Backplane
SEP internal flash
Integrated Flash+EEPROM
No
18x3.5" Exp/Backplane
NVSRAM memory
Flash
No
Flash memory
Flash
No
BP FRU image
I2C EEPROM
No
Expander FRU image
I2C EEPROM
No
4x PCIe SSD Backplane
SEP internal flash
Integrated Flash+EEPROM
No
H730, H830 PERCs
NVSRAM
NVSRAM
No
FRU
FRU
No
1-Wire EEPROM
1-Wire EEPROM
No
SPD
SPD
No
SBR
SBR
No
Flash
Flash
No
ONFI Backup Flash
ONFI Backup Flash
No
SDRAM
SDRAM
No
H330 PERC
NVSRAM
NVSRAM
No
FRU
FRU
No
1-Wire EEPROM
1-Wire EEPROM
No
(Downstream)
EEPROM)
write data to it during normal operation?
Dell - Internal Use - Confidential
Page 6
Item
Type (e.g. Flash PROM,
Can user programs or operating system
SBR
SBR
No
Flash
Flash
No
PCIe SSD Extension Card
Switch Configuration EEPROM
SPI Flash EEPROM
No (requires specialized SW)
IDSDM
SPI Flash
SPI Flash
No
MCU
Embedded Flash
FW can be updated via iDRAC which
Front Panel
SPI Flash
SPI Flash
No
Item
Purpose? (e.g. boot code)
How is data input to this memory?
Planer
iDRAC Uboot (bootloader),
Secure boot code,
EEPROM)
write data to it during normal operation?
runs on Linux
PCH Internal CMOS RAM
BIOS Password
BIOS SPI Flash
iDRAC SPI Flash
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Real-time clock and BIOS configuration settings
Password to change BIOS settings
Boot code, system configuration information, UEFI environment, Flash descriptor, ME
server management persistent store (i.e. IDRAC MAC Address, iDRAC boot variables), lifecycle log cache, virtual planar FRU and EPPID, rac log, system event log, JobStore, iDRAC
BIOS
Keyboard
SPI interface via iDRAC
SPI interface via iDRAC
Page 7
Item
Purpose? (e.g. boot code)
How is data input to this memory?
USB interface via PCH. Accessed via
Trusted Platform Module (TPM)
Various
16x2.5" EXP/Backplane (Upstream)
NVSRAM memory
FW config data
Common Flash memory Interface (CFI)
Flash memory
Firmware
Common Flash memory Interface (CFI)
Expander FRU image
FRU
I2C interface via iDRAC
BP FRU image
FRU
I2C interface via iDRAC
16x2.5" EXP/Backplane
NVSRAM memory
FW config data
Common Flash memory Interface (CFI)
Flash memory
Firmware
Common Flash memory Interface (CFI)
Expander FRU image
FRU
I2C interface via iDRAC
BP FRU image
FRU
I2C interface via iDRAC
8x3.5" Backplane
SEP internal flash
Firmware + FRU
I2C interface via iDRAC
18x3.5" Exp/Backplane
NVSRAM memory
FW config data
Common Flash memory Interface (CFI)
Flash memory
Firmware
Common Flash memory Interface (CFI)
BP FRU image
FRU
I2C interface via iDRAC
Expander FRU image
FRU
I2C interface via iDRAC
4x PCIe SSD Backplane
SEP internal flash
Firmware + FRU
I2C interface via iDRAC
H730, H830 PERCs
NVSRAM
Configuration data
ROC writes configuration data to
Operational iDRAC FW,
BMC EMMC
CPU Vcore Regulators Operational parameters
Vmem Regulators Operational parameters
System CPLD RAM Not utilized Not utilized
System Memory System OS RAM System OS
Lifecycle Controller (LC) USC partition, LC service diags, LC OS drivers, USC firmware
NAND Flash interface via iDRAC
Internal USB Key General purpose USB key drive
Storage of encryption keys Using TPM Enabled operating systems
CPU Processor cache + registers
iDRAC DDR iDRAC local memory iDRAC Firmware
iDRAC Processor cache + registers iDRAC Firmware
LOM EEPROM Onboard LOM FW
LOM FLASH Onboard LOM FW
(Downstream)
system OS
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NVSRAM
Page 8
Item
Purpose? (e.g. boot code)
How is data input to this memory?
FRU
Card manufacturing
Programmed at ICT during production.
1-Wire EEPROM
Holds default controller
ROC writes data to this memory
SPD
Memory configuration data
Pre-programmed before assembly
SBR
Bootloader
Pre-programmed before assembly
Flash
Card firmware
Pre-programmed before assembly. Can
ONFI Backup Flash
Holds cache data during power
FPGA backs up DDR data to this device in
SDRAM
Cache for HDD I/O
ROC writes to this memory - using it as
H330 PERC
NVSRAM
Configuration data
ROC writes configuration data to
FRU
Card manufacturing
Programmed at ICT during production
1-Wire EEPROM
Holds default controller
ROC writes data to this memory
SBR
Bootloader
Pre-programmed before assembly
Flash
Card firmware
Pre-programmed before assembly. Can
PCIe SSD Extension Card
Switch Configuration EEPROM
Configuration for PLX PCIe
The EEPROM image is pre-loaded at
IDSDM
SPI Flash
Exclusively used by the controller
SPI interface via iDRAC
MCU
Firmware
USB3.0 interface via PCH
Front Panel
SPI Flash
For field maintenance. Have
system information.
SPI interface via iDRAC
information
properties/settings
be updated using Dell/LSI tools
loss
information
properties/settings
switch, setting registers
case of a power failure
cache for data IO to HDDs
NVSRAM
be updated using Dell/LSI tools
factory before assembly. Once assembled on the card, data can be entered via PLX Device Editor or PLX EEP DOS based tool.
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License, Service Tag and
Page 9
Item
How is this memory write protected?
How is the memory cleared?
Planer
1) Set NVRAM_CLR jumper to
setup menu.
Place shunt on
2 and 4.
Not completely user
Lifecycle Controller interface
Not completely user
Lifecycle Controller interface
Trusted Platform Module (TPM)
Various
PCH Internal CMOS RAM N/A – BIOS only control
clear BIOS configuration settings at boot and reboot system; 2) AC power off system, remove coin cell battery for 30 seconds, replace battery and power back on; 3) restore default configuration in F2 system
BIOS Password N/A
BIOS SPI Flash Software write protected
Embedded iDRAC subsystem firmware
iDRAC SPI Flash
BMC EMMC Embedded FW write protected
CPU Vcore Regulators NA Not user clearable
Vmem Regulators NA Not user clearable
System CPLD RAM Not accessible Not accessible
System Memory OS Control
actively controls sub area based write protection as needed.
J_PSWD_NVRAM jumper pins
Not possible with any utilities or applications and system is not functional if corrupted/removed.
clearable; however, user data, lifecycle log and archive, SEL, fw image repository can be cleared via Delete Configuration and Retire System, accessible in
clearable; however, user data, lifecycle log and archive, SEL, fw image repository can be cleared via Delete Configuration and Retire System, accessible in
Reboot or power down system
Internal USB Key No write protect Can be cleared in system OS
CPU
iDRAC DDR NA Power off
iDRAC NA Power off
LOM EEPROM NA Not user clearable
LOM FLASH NA Not user clearable
Dell - Internal Use - Confidential
SW write protected F2 Setup option
Power off
Page 10
Item
How is this memory write protected?
How is the memory cleared?
16x2.5" EXP/Backplane
NVSRAM memory
Hardware strapping
Not user clearable
Flash memory
Hardware strapping
Not user clearable
Expander FRU image
Hardware strapping
Not user clearable
BP FRU image
Hardware strapping
Not user clearable
16x2.5" EXP/Backplane
NVSRAM memory
Hardware strapping
Not user clearable
Flash memory
Hardware strapping
Not user clearable
Expander FRU image
Hardware strapping
Not user clearable
BP FRU image
Hardware strapping
Not user clearable
8x3.5" Backplane
SEP internal flash
Program write protect bit
Not user clearable
18x3.5" Exp/Backplane
NVSRAM memory
Hardware strapping
Not user clearable
Flash memory
Hardware strapping
Not user clearable
BP FRU image
Hardware strapping
Not user clearable
Expander FRU image
Hardware strapping
Not user clearable
4x PCIe SSD Backplane
SEP internal flash
Program write protect bit
Not user clearable
H730, H830 PERCs
NVSRAM
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
FRU
Not WP
Cannot be cleared with
customer
1-Wire EEPROM
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
SPD
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
SBR
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
Flash
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
ONFI Backup Flash
Not WP. Not visible to Host Processor
Flash can be cleared by
Discard Preserved Cache.
(Upstream)
(Downstream)
existing tools available to the
existing tools available to the
existing tools available to the
existing tools available to the
existing tools available to the
existing tools available to the
powering up the card and allowing the controller to flush the contents to VDs. If the VDs are no longer available, cache can be cleared by going into controller bios and selecting
Dell - Internal Use - Confidential
Page 11
Item
How is this memory write protected?
How is the memory cleared?
SDRAM
Not WP. Not visible to Host Processor
Cache can be cleared by
H330 PERC
NVSRAM
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
FRU
Not WP
Cannot be cleared with
customer
1-Wire EEPROM
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
SBR
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
Flash
Not WP. Not visible to Host Processor
Cannot be cleared with
customer
PCIe SSD Extension Card
Switch Configuration EEPROM
Device can be write protected via
System is not functional as
IDSDM
SPI Flash
Hardware strapping
Not user clearable
MCU
N/A
Not user clearable
Front Panel
SPI Flash
Hardware strapping
Not user clearable
powering off the card
existing tools available to the
existing tools available to the
existing tools available to the
existing tools available to the
existing tools available to the
hardware pin. Alternatively, device contents can be write protected via WPEN bit in status register.
NOTE:
For any inform ation that y ou may nee d, direct yo ur questions to your Dell M arketing c ontact.
______________
© 2014 Dell Inc.
Trademarks used in this text: Dell™, the DELL logo, and PowerEdge™ are trademarks of Dell Inc.
intended if corrupted/removed.
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