How it Works
Dell
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Inspiron N411Z
Schematic
48 pgs1.09 Mb0
Schematic
5 pgs137.54 Kb0

Dell Inspiron N411Z Schematic

1
PCB STACK UP
2
Label
Label
3
4
5
6
7
8
8L
LAYER 1 : TOP
A A
LAYER 2 : GND
LAYER 3 : IN1
LAYER 4 : SVCC
UMA
R05-HR MB PCB (rev B)R05-HR MB PCB (rev B)
DDRIII-SODIMM0
H=4.0mm
PAGE 17
Label
Label
DDRIII 1333 MT/s
LAYER 5 : IN2
LAYER 6 : IN3
LAYER 7 : GND
DDRIII-SODIMM1
H=4.0mm
PAGE 18
DDRIII 1333 MT/s
LAYER 8 : BOT
B B
SATA -HDD
PAGE 27
SATA -ODD
PAGE 27
C C
Keyboard Conn.
PAGE 32
Touch Pad
PAGE 32
SATA0 600MB /S
SATA1 300MB /S
KBC ITE 8518
PAGE 30
R05 UMA BLOCK DIAGRAM
FAN & THERMAL
SMSC1422
PAGE 20
PAGE 23
AR8152
PAGE 29
25MHz
PG 34
USB2.0
PAGE 16
USB2.0
USB3.0 Controller
USB3.0 Ports x2
RJ45 CONN
PAGE 25
PAGE 26
PAGE 29
CardReader SD/MS/MMC
IO Board
LPC
Sandy Bridge 35W
FDI LINK
2.7GT /s
Series 6 Chipset
25 mm X 25 mm
CPU
BGA 1023 SV
PAGE 4~8
Mobile Intel
PCH
HM67
Couger Point
FCBGA 989
PAGE 9~15
DMI LINK
5GT /s
SINGLE CHANNEL LVDS
HDMI Bus
DISPLAY PORT C
Camera
USB2.0
WLAN/BT
PCI-E
LAN/RJ45
Atheros
IHDA
+VCHGR
PAGE 38
+3.3V_ALW/+5V_ALW
PAGE 39
+1.5V_SUS/+0.75V_DDR_VTT
PAGE 40
+VCCSA_CORE
PAGE 41
+1.05V_PCH/+1.8V_RUN
PAGE 42
+VCC_CORE/+VCC_GFX_CORE
PAGE 43
LCD CONN
PAGE 20
HDMI CONN
PAGE 21
Mini DP CONN
PAGE 19
IO Board
PAGE 36
SPI
PWM FAN
PAGE 34
SPI ROM
PAGE 31
SPI ROM
32Mbit4Mbit
PAGE 31
25MHz
32.768KHz
Audio Codec
CX20671
PAGE 28
D D
Speaker
PAGE 28
1
2
3
4
5
Audio Combo Jack
X1
IO Board
PAGE 28
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
6
Wednesday, June 22, 2011
7
PROJECT :
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
R05
R05
R05
1 51
1 51
1 51
8
1
2
3
4
5
6
7
8
power
A A
State
S0 S1
B B
S3
S4/S5 AC S4/S5
DC Only
AC/DC No Exist
C C
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
1
2
3
4
5
6
Wednesday, June 22, 2011
7
PROJECT :
Power Rails
Power Rails
Power Rails
R05
R05
R05
2 51
2 51
2 51
8
5
D D
C C
4
3
2
1
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
5
4
3
2
Wednesday, June 22, 2011
PROJECT :
CLOCK GEN (9LRS3197)
CLOCK GEN (9LRS3197)
CLOCK GEN (9LRS3197)
1
R05
R05
R05
3 51
3 51
3 51
5
4
3
2
1
DP & PEG Compensation
Sandy Bridge Processor (DMI,PEG,FDI)
U12A
U12A
D D
C C
eDP_ICOMPO 12mil eDP_COMPIO 4mil
B B
FDI_FSYNC0(9) FDI_FSYNC1(9)
FDI_INT(9) FDI_LSYNC0(9)
FDI_LSYNC1(9)
DMI_TXN0(9) DMI_TXN1(9) DMI_TXN2(9) DMI_TXN3(9)
DMI_TXP0(9) DMI_TXP1(9) DMI_TXP2(9) DMI_TXP3(9)
DMI_RXN0(9) DMI_RXN1(9) DMI_RXN2(9) DMI_RXN3(9)
DMI_RXP0(9) DMI_RXP1(9) DMI_RXP2(9) DMI_RXP3(9)
FDI_TXN0(9) FDI_TXN1(9) FDI_TXN2(9) FDI_TXN3(9) FDI_TXN4(9) FDI_TXN5(9) FDI_TXN6(9) FDI_TXN7(9)
FDI_TXP0(9) FDI_TXP1(9) FDI_TXP2(9) FDI_TXP3(9) FDI_TXP4(9) FDI_TXP5(9) FDI_TXP6(9) FDI_TXP7(9)
EDP_COMP INT_EDP_HPD
Programing Disable eDP interface(BIOS)
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
P10
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
P11
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
W11
FDI0_TX#[1]
W1
FDI0_TX#[2]
AA6
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
AC9
FDI1_TX#[3]
U6
FDI0_TX[0]
W10
FDI0_TX[1]
W3
FDI0_TX[2]
AA7
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
AA3
FDI1_TX[2]
AC8
FDI1_TX[3]
AA11
FDI0_FSYNC
AC12
FDI1_FSYNC
U11
FDI_INT
AA10
FDI0_LSYNC
AG8
FDI1_LSYNC
AF3
eDP_COMPIO
AD2
eDP_ICOMPO
AG11
eDP_HPD
AG4
eDP_AUX#
AF4
eDP_AUX
AC3
eDP_TX#[0]
AC4
eDP_TX#[1]
AE11
eDP_TX#[2]
AE7
eDP_TX#[3]
AC1
eDP_TX[0]
AA4
eDP_TX[1]
AE10
eDP_TX[2]
AE6
eDP_TX[3]
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
DMI Intel(R) FDI DP
DMI Intel(R) FDI DP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]
G3 G1 G4
H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7
K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6
G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4
F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4
PEG_COMP
PEG_ICOMPO 12mil PEG_ICOMPI, PEG_RCOMPO 4mil,
+1.05V_CPU
0121 +1.05V_PCH change to +1.5V_CPU
R230 24.9/F_4R230 24.9/F_4
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
+1.05V_CPU
R200 24.9/F_4R200 24.9/F_4
PEG_ICOMPI and RCOMPO signals should be routed within 500 mils typical impedance = 43 mohms
PEG_ICOMPO signals should be routed within 500 mils typical impedance = 14.5 mohms
EDP_COMP
0121 +1.05V_PCH change to +1.5V_CPU
PEG_COMP
eDP Hot-plug (Disable)
+1.05V_CPU
CAD Note: Place PU resistor within 2 inches of CPU
HPD PU/PD resistor values based on CRB and different to DG
0121 +1.05V_PCH change to +1.5V_CPU
R229
R229 *10K_4_NC
*10K_4_NC
INT_EDP_HPD
+1.5V_SUS
02/25 Add 1K ohm #PGU 0.71 440484
A A
DDR3_DRAMRST#(17,18) CPU_DRAMRST# (5)
DDR_HVREF_RST_PCH(13)
5
4
R43 1K_4R43 1K_4
DDR3_DRAMRST#_R
+3.3V_SUS
3
R44 1K_4R44 1K_4
10k -> 1k ohm (CRB,Dell)
R42
R42 1K_4
1K_4
R50 *0_4_NCR50 *0_4_NC
2N7002W -7-F
2N7002W -7-F
3 1
Q9
Q9
2
C161
C161
0.047U/10V/X7R_4
0.047U/10V/X7R_4
R32
R32
4.99K/F_4
4.99K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
2
Wednesday, June 22, 2011
PROJECT :
Sandy Bridge 1/5
Sandy Bridge 1/5
Sandy Bridge 1/5
1
R05
R05
R05
4 51
4 51
4 51
5
4
3
2
1
Sandy Bridge Processor (CLK,MISC,JTAG)
U12B
D D
SNB_IVB# N.A at SNB EDS #27637 0.7v1
1 2
2
2
H_SNB_IVB#
TP_CATERR#
H_PECI_R
PM_SYNC_R
H_PWRGOOD_R
SM_DRAMPWROK
CPU_PLTRST#
R228
R228 750_4
750_4
H_SNB_IVB#(12)
PECI_EC(30)
H_PECI(14)
IMVP7_PROCHOT#(30,38,43)
R24 43_4R24 43_4
R194 *43_4_NCR194 *43_4_NC
R192 56_4R192 56_4
Reserve C1069 100P for PROCHOT#
PM_THRMTRIP#(14)
Over 130 degree C will
H_PM_SYNC(9)
H_PWRGOOD(14)
drive low
PLTRST#(12,23,29,30)
R222 1.5K 1%R222 1.5K 1%
C C
T1T1
H_PROCHOT#
C374 *100P/50V/X7R_4_NCC374 *100P/50V/X7R_4_NC
SJ31 *SJ0402SJ31 *SJ0402
112
T38T38
SJ30 *SJ0402SJ30 *SJ0402
112
R207 10K_4R207 10K_4
T58T58
T45T45
U12B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWROK
D44
RESET#
J3
BCLK
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
DPLL_REF_CLK
DPLL_REF_CLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
BCLK#
BCLK_ITP
BCLK_ITP#
PRDY#
PREQ#
TCK TMS
TRST#
TDO
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
H2
CLK_DP_P_R
AG3
CLK_DP_N_R
AG1
N59 N58
AT30
SM_RCOMP_0
BF44
SM_RCOMP_1
BE43
SM_RCOMP_2
BG43
N53 N55
L56 L55 J58
M60
TDI
L59
K58
G58 E55 E59 G55 G59 H60 J59 J61
T42T42 T43T43
R231 1K_4R231 1K_4
R238 1K_4R238 1K_4
T54T54 T52T52
R248 140/F_4R248 140/F_4 R247 25.5/F_4R247 25.5/F_4 R246 200/F_4R246 200/F_4
XDP_PREQ# XDP_TCLK
XDP_TMS XDP_TRST#
XDP_TDI XDP_TDO
CLK_CPU_BCLKP (13) CLK_CPU_BCLKN (13)
R233 *0_4_NCR233 *0_4_NC R236 *0_4_NCR236 *0_4_NC
CPU_DRAMRST# (4)
T9T9 T13T13
T12T12 T5T5 T50T50
T51T51 T49T49
XDP_DBRST# (9)
T41T41 T3T3 T2T2 T6T6 T46T46 T47T47 T8T8 T48T48
CLK_DP_P (13) CLK_DP_N (13)
+1.05V_CPU
0121 +1.05V_PCH change to +1.5V_CPU
H_PROCHOT# IMVP7_PROCHOT#
XDP_TMS XDP_TDI XDP_TDO XDP_PREQ#
XDP_TCLK XDP_TRST#
0121 +1.05V_PCH change to +1.5V_CPU
R206 *68_4_NCR206 *68_4_NC R193 62_4R193 62_4
R214 *51_4_NCR214 *51_4_NC R226 *51_4_NCR226 *51_4_NC R223 *51_4_NCR223 *51_4_NC R221 *51_4_NCR221 *51_4_NC
R220 *51_4_NCR220 *51_4_NC R224 *51_4_NCR224 *51_4_NC
+1.05V_CPU
IC,SNB_2CBGA,1P0
Pin2 Pin4
HL L H
SM_DRAMPWROKSM_DRAMPWROK_R
IC,SNB_2CBGA,1P0
L L L H
+1.5V_CPU
DRAM_PWRGD
SYS_PWROK
SM_DRAMPWROK
Boot S3
3
S3 RSM
100 ns after +1.5V_CPU reaches 80%
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
2
Wednesday, June 22, 2011
PROJECT :
Sandy Bridge 2/5
Sandy Bridge 2/5
Sandy Bridge 2/5
1
R05
R05
R05
5 51
5 51
5 51
B B
Change OD part same with PDC
Copy from PDC
PM_DRAM_PWRGD(9)
A A
SYS_PWROK(9)
USE SYS_PWROK only for further test without change part
+3.3V_SUS
5
R251
R251 200_4
200_4
2 1
U15
U15
74AHC1G09GW
74AHC1G09GW
3 5
C406
C406
0.1U/10V/X7R_4
0.1U/10V/X7R_4
4
+1.5V_CPU
R252
R252 200/F_4
200/F_4 R249 130/F_4R249 130/F_4
Pin1
L L
H H
4
5
4
3
2
1
Sandy Bridge Processor (DDR3)
U12C
U12C
M_A_DQ[63:0](17)
D D
C C
B B
M_A_BS#0(17) M_A_BS#1(17) M_A_BS#2(17)
M_A_CAS#(17) M_A_RAS#(17) M_A_WE#(17)
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
AG6
AP11
AJ10
AR11
AP6 AU6 AV9 AR6
AP8 AT13 AU13
BC7
BB7 BA13 BB11
BA7
BA9
BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43
AW48
BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56
BD37 BF36 BA28
BE39 BD39 AT41
AJ6 AL6 AJ8
AL8 AL7
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
AU36
SA_CLK[0] SA_CKE[0]
SA_CLK[1] SA_CKE[1]
SA_CS#[0] SA_CS#[1]
SA_ODT[0] SA_ODT[1]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AV36 AY26
AT40 AU40 BB26
BB40 BC41
AY40 BA41
AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55
AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54
BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26
M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
SA_CLK#[0]
SA_CLK#[1]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
M_A_CLKP0 (17) M_A_CLKN0 (17) M_A_CKE0 (17)
M_A_CLKP1 (17) M_A_CLKN1 (17) M_A_CKE1 (17)
M_A_CS#0 (17) M_A_CS#1 (17)
M_A_ODT0 (17) M_A_ODT1 (17)
M_A_DQSN[7:0] (17)
M_A_DQSP[7:0] (17)
M_A_A[15:0] (17)
M_B_DQ[63:0](18)
M_B_BS#0(18) M_B_BS#1(18) M_B_BS#2(18)
M_B_CAS#(18) M_B_RAS#(18) M_B_WE#(18)
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AL4
AL1 AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9
BD13 BF12
BF8
BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54
BA58 AW59 AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58 AG58 AG59 AM60
AL59 AF61 AH60
BG39 BD42 AT22
AV43 BF40 BD45
U12D
U12D
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
BA34
SB_CLK[0] SB_CKE[0]
SB_CLK[1] SB_CKE[1]
SB_CS#[0] SB_CS#[1]
SB_ODT[0] SB_ODT[1]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
AY34 AR22
BA36 BB36 BF27
BE41 BE47
AT43 BG47
AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59
AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61
BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22
M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
SB_CLK#[0]
SB_CLK#[1]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
M_B_CLKP0 (18) M_B_CLKN0 (18) M_B_CKE0 (18)
M_B_CLKP1 (18) M_B_CLKN1 (18) M_B_CKE1 (18)
M_B_CS#0 (18) M_B_CS#1 (18)
M_B_ODT0 (18) M_B_ODT1 (18)
M_B_DQSN[7:0] (18)
M_B_DQSP[7:0] (18)
M_B_A[15:0] (18)
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
A A
5
4
3
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
2
Wednesday, June 22, 2011
PROJECT :
Sandy Bridge 3/5
Sandy Bridge 3/5
Sandy Bridge 3/5
1
R05
R05
R05
6 51
6 51
6 51
5
Sandy Bridge Processor (POWER)
U12F
U12F
CPU Core Power
+VCC_CORE
D D
C C
B B
A A
Layout note: need routing together and ALERT need between CLK and DATA
SNB:55A
C380 22U/6.3V_8C380 22U/6.3V_8 C377 22U/6.3V_8C377 22U/6.3V_8 C373 22U/6.3V_8C373 22U/6.3V_8 C376 22U/6.3V_8C376 22U/6.3V_8 C379 22U/6.3V_8C379 22U/6.3V_8 C378 22U/6.3V_8C378 22U/6.3V_8 C367 22U/6.3V_8C367 22U/6.3V_8 C375 22U/6.3V_8C375 22U/6.3V_8 C368 22U/6.3V_8C368 22U/6.3V_8 C41 22U/6.3V_8C41 22U/6.3V_8 C372 22U/6.3V_8C372 22U/6.3V_8 C78 22U/6.3V_8C78 22U/6.3V_8 C371 22U/6.3V_8C371 22U/6.3V_8 C42 22U/6.3V_8C42 22U/6.3V_8 C369 22U/6.3V_8C369 22U/6.3V_8 C57 22U/6.3V_8C57 22U/6.3V_8
C73 1U/6.3V/X5R_4C73 1U/6.3V/X5R_4 C16 1U/6.3V/X5R_4C16 1U/6.3V/X5R_4 C19 1U/6.3V/X5R_4C19 1U/6.3V/X5R_4
C370 1U/6.3V/X5R_4C370 1U/6.3V/X5R_4 C39 1U/6.3V/X5R_4C39 1U/6.3V/X5R_4 C66 1U/6.3V/X5R_4C66 1U/6.3V/X5R_4 C23 1U/6.3V/X5R_4C23 1U/6.3V/X5R_4 C74 1U/6.3V/X5R_4C74 1U/6.3V/X5R_4 C48 1U/6.3V/X5R_4C48 1U/6.3V/X5R_4 C45 1U/6.3V/X5R_4C45 1U/6.3V/X5R_4 C12 1U/6.3V/X5R_4C12 1U/6.3V/X5R_4 C11 1U/6.3V/X5R_4C11 1U/6.3V/X5R_4 C10 1U/6.3V/X5R_4C10 1U/6.3V/X5R_4 C18 1U/6.3V/X5R_4C18 1U/6.3V/X5R_4 C24 1U/6.3V/X5R_4C24 1U/6.3V/X5R_4
Follow PDDG_0.9
SVID CLK
H_CPU_SVIDCLK
5
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
5/16 0ohm to short jump 5/16 0ohm to short jump 5/16 0ohm to short jump
SJ191 *SJ0402SJ191 *SJ0402
112
CORE SUPPLY
CORE SUPPLY
PEG AND DDRSENSE LINES SVID QUIET RAILS
PEG AND DDRSENSE LINES SVID QUIET RAILS
POWER
POWER
VCCIO_SENSE
VSS_SENSE_VCCIO
2
VR_SVID_CLK (43)
4
3
330uF locate power side
8.5A 22A
AF46
VCCIO[1]
AG48
VCCIO[3]
AG50
VCCIO[4] VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]
VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24] VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29]
VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1] VCCPQE[2]
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE VSS_SENSE
AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN48
AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15
W16 W17
BC22
AM25 AN22
A44 B43 C44
F43 G43
AN16 AN17
C52 10U/6.3V/X5R_6C52 10U/6.3V/X5R_6 C105 10U/6.3V/X5R_6C105 10U/6.3V/X5R_6 C106 10U/6.3V/X5R_6C106 10U/6.3V/X5R_6 C51 10U/6.3V/X5R_6C51 10U/6.3V/X5R_6 C121 10U/6.3V/X5R_6C121 10U/6.3V/X5R_6 C53 10U/6.3V/X5R_6C53 10U/6.3V/X5R_6 C54 10U/6.3V/X5R_6C54 10U/6.3V/X5R_6 C104 10U/6.3V/X5R_6C104 10U/6.3V/X5R_6 C122 10U/6.3V/X5R_6C122 10U/6.3V/X5R_6 C55 10U/6.3V/X5R_6C55 10U/6.3V/X5R_6
C92 1U/6.3V/X5R_4C92 1U/6.3V/X5R_4 C70 1U/6.3V/X5R_4C70 1U/6.3V/X5R_4 C85 1U/6.3V/X5R_4C85 1U/6.3V/X5R_4 C83 1U/6.3V/X5R_4C83 1U/6.3V/X5R_4 C112 1U/6.3V/X5R_4C112 1U/6.3V/X5R_4 C103 1U/6.3V/X5R_4C103 1U/6.3V/X5R_4 C71 1U/6.3V/X5R_4C71 1U/6.3V/X5R_4 C80 1U/6.3V/X5R_4C80 1U/6.3V/X5R_4 C88 1U/6.3V/X5R_4C88 1U/6.3V/X5R_4 C50 1U/6.3V/X5R_4C50 1U/6.3V/X5R_4
C123 1U/6.3V/X5R_4C123 1U/6.3V/X5R_4 C93 1U/6.3V/X5R_4C93 1U/6.3V/X5R_4
C101 1U/6.3V/X5R_4C101 1U/6.3V/X5R_4 C91 1U/6.3V/X5R_4C91 1U/6.3V/X5R_4 C109 1U/6.3V/X5R_4C109 1U/6.3V/X5R_4C15 1U/6.3V/X5R_4C15 1U/6.3V/X5R_4 C82 1U/6.3V/X5R_4C82 1U/6.3V/X5R_4 C98 1U/6.3V/X5R_4C98 1U/6.3V/X5R_4 C89 1U/6.3V/X5R_4C89 1U/6.3V/X5R_4 C111 1U/6.3V/X5R_4C111 1U/6.3V/X5R_4 C87 1U/6.3V/X5R_4C87 1U/6.3V/X5R_4 C69 1U/6.3V/X5R_4C69 1U/6.3V/X5R_4 C86 1U/6.3V/X5R_4C86 1U/6.3V/X5R_4
R35 *0_NCR35 *0_NC
1 2
5/16 0ohm to short jump
SJ190 *SJ0402SJ190 *SJ0402
H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT
R188 *100/F_4_NCR188 *100/F_4_NC
R189 *100/F_4_NCR189 *100/F_4_NC
R29 *10/F_4_NCR29 *10/F_4_NC
R27 *10/F_4_NCR27 *10/F_4_NC
2
112
C113 1U/6.3V_4C113 1U/6.3V_4
R33 *10K_4_NCR33 *10K_4_NC
1 2
+VCC_CORE
+1.05V_CPU
54.9 ohm has no 5%
+1.05V_CPU +1.05V_CPU
SVID DATA SVID ALERT
Place resistor R204 close to CPU Place resistor R190 close to CPU
R204
R204 130_4
130_4
H_CPU_SVIDDAT VR_SVID_ALERT#_RH_CPU_SVIDALRT#
4
2
112
SJ192 *SJ0402SJ192 *SJ0402
+1.05V_CPU +VCC_GFX_CORE
VCC_AXG_SENSE(43)
VSS_AXG_SENSE(43)
+3.3V_RUN
H_VTTVID1 (42)
+1.05V_CPU
+VCCSA_CORE
R23710 R23710 R23510 R23510
Add PR183, PR184 for power sol ution 1/13
VCCSENSE (43) VSSSENSE (43)
VCCIO_SENSE (42) VSSIO_SENSE (42)
VR_SVID_DATA (43)
C99 *22U/6.3V_8_NCC99 *22U/6.3V_8_NC C72 *22U/6.3V_8_NCC72 *22U/6.3V_8_NC C61 *22U/6.3V_8_NCC61 *22U/6.3V_8_NC C63 *22U/6.3V_8_NCC63 *22U/6.3V_8_NC C37 *22U/6.3V_8_NCC37 *22U/6.3V_8_NC C38 22U/6.3V_8C38 22U/6.3V_8 C62 *22U/6.3V_8_NCC62 *22U/6.3V_8_NC C100 *22U/6.3V_8_NCC100 *22U/6.3V_8_NC C28 22U/6.3V_8C28 22U/6.3V_8 C26 *22U/6.3V_8_NCC26 *22U/6.3V_8_NC C27 *22U/6.3V_8_NCC27 *22U/6.3V_8_NC C30 22U/6.3V_8C30 22U/6.3V_8 C29 22U/6.3V_8C29 22U/6.3V_8 C60 22U/6.3V_8C60 22U/6.3V_8 C59 *22U/6.3V_8_NCC59 *22U/6.3V_8_NC C76 22U/6.3V_8C76 22U/6.3V_8 C64 10U/6.3V/X5R_6C64 10U/6.3V/X5R_6 C120 10U/6.3V/X5R_6C120 10U/6.3V/X5R_6 C117 *10U/6.3V/X5R_6_NCC117 *10U/6.3V/X5R_6_NC C56 10U/6.3V/X5R_6C56 10U/6.3V/X5R_6 C118 10U/6.3V/X5R_6C118 10U/6.3V/X5R_6 C119 10U/6.3V/X5R_6C119 10U/6.3V/X5R_6
C40 1U/6.3V/X5R_4C40 1U/6.3V/X5R_4 C116 1U/6.3V/X5R_4C116 1U/6.3V/X5R_4 C115 1U/6.3V/X5R_4C115 1U/6.3V/X5R_4 C68 1U/6.3V/X5R_4C68 1U/6.3V/X5R_4 C75 1U/6.3V/X5R_4C75 1U/6.3V/X5R_4 C46 1U/6.3V/X5R_4C46 1U/6.3V/X5R_4
01/28 R186 R187 NC Add PR182 PR 181 to 10 ohm
+VCC_GFX_CORE
R22710 R22710
+1.8V_RUN
3A
C404 1U/6.3V/X5R_4C404 1U/6.3V/X5R_4 C405 1U/6.3V/X5R_4C405 1U/6.3V/X5R_4
SNB:6A
C47 10U/6.3V/X5R_6C47 10U/6.3V/X5R_6 C49 10U/6.3V/X5R_6C49 10U/6.3V/X5R_6 C67 10U/6.3V/X5R_6C67 10U/6.3V/X5R_6 C36 10U/6.3V/X5R_6C36 10U/6.3V/X5R_6 C31 10U/6.3V/X5R_6C31 10U/6.3V/X5R_6
C34 1U/6.3V/X5R_4C34 1U/6.3V/X5R_4 C35 1U/6.3V/X5R_4C35 1U/6.3V/X5R_4 C33 1U/6.3V/X5R_4C33 1U/6.3V/X5R_4 C25 1U/6.3V/X5R_4C25 1U/6.3V/X5R_4 C44 1U/6.3V/X5R_4C44 1U/6.3V/X5R_4
R203 43_4R203 43_4
3
2
Sandy Bridge Processor (GRAPHIC POWER)
T40T40
R186 *10/F_4_NCR186 *10/F_4_NC
R187 *10/F_4_NCR187 *10/F_4_NCR22510 R22510
T39T39
VCCSA_VID0 VCCSA_VID1
U12G
U12G
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0 R208 *1K_4_NCR208 *1K_4_NC
R195 1K_4R195 1K_4 R209 *1K_4_NCR209 *1K_4_NC R196 1K_4R196 1K_4
+1.5V_SUS +1.5V_CPU
R190
R190 75_4
75_4
GRAPHICS
GRAPHICS
LINES
LINES
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
C148 0.1U/16V/Y5V_4C148 0.1U/16V/Y5V_4 C149 0.1U/16V/Y5V_4C149 0.1U/16V/Y5V_4 C147 0.1U/16V/Y5V_4C147 0.1U/16V/Y5V_4 C150 0.1U/16V/Y5V_4C150 0.1U/16V/Y5V_4
2
112
SJ193 *SJ0402SJ193 *SJ0402
2
POWER
POWER
SENSE
SENSE
SENSE LINES
SENSE LINES
VR_SVID_ALERT# (43)
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
QUIET RAILS
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
VCCSA_VID[0] VCCSA_VID[1]
CAD Note: +VDDR_REF_CPU should have 10 mil trace width
AY43
SM_VREF
AJ28
VDDQ[1]
AJ33
VDDQ[2]
AJ36
VDDQ[3]
AJ40
VDDQ[4]
AL30
VDDQ[5]
AL34
VDDQ[6]
AL38
VDDQ[7]
AL42
VDDQ[8]
AM33
VDDQ[9]
AM36
VDDQ[10]
AM40
VDDQ[11]
AN30
VDDQ[12]
AN34
VDDQ[13]
AN38
VDDQ[14]
AR26
VDDQ[15]
AR28
VDDQ[16]
AR30
VDDQ[17]
AR32
VDDQ[18]
AR34
VDDQ[19]
AR36
VDDQ[20]
AR40
VDDQ[21]
AV41
VDDQ[22]
AW26
VDDQ[23]
BA40
VDDQ[24]
BB28
VDDQ[25]
BG33
VDDQ[26]
PS_S3CNTRL_S(9)
AM28
VCCDQ[1]
AN26
VCCDQ[2]
R31 *51_4_NCR31 *51_4_NC
BC43
R30 *51_4_NCR30 *51_4_NC
BA43
R201 100/F_4R201 100/F_4
U10
SNB_IVB# N.A at SNB EDS #27637 0.7v1
D48 D49
+1.05V_CPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+VDDR_REF_CPU
SNB:4A
C146 10U/6.3V/X5R_6C146 10U/6.3V/X5R_6 C139 10U/6.3V/X5R_6C139 10U/6.3V/X5R_6 C140 10U/6.3V/X5R_6C140 10U/6.3V/X5R_6 C142 10U/6.3V/X5R_6C142 10U/6.3V/X5R_6 C141 10U/6.3V/X5R_6C141 10U/6.3V/X5R_6 C144 10U/6.3V/X5R_6C144 10U/6.3V/X5R_6 C143 10U/6.3V/X5R_6C143 10U/6.3V/X5R_6 C145 10U/6.3V/X5R_6C145 10U/6.3V/X5R_6
C128 1U/6.3V/X5R_4C128 1U/6.3V/X5R_4 C108 1U/6.3V/X5R_4C108 1U/6.3V/X5R_4 C129 1U/6.3V/X5R_4C129 1U/6.3V/X5R_4 C127 1U/6.3V/X5R_4C127 1U/6.3V/X5R_4 C96 1U/6.3V/X5R_4C96 1U/6.3V/X5R_4 C110 1U/6.3V/X5R_4C110 1U/6.3V/X5R_4 C95 1U/6.3V/X5R_4C95 1U/6.3V/X5R_4 C94 1U/6.3V/X5R_4C94 1U/6.3V/X5R_4 C126 1U/6.3V/X5R_4C126 1U/6.3V/X5R_4 C107 1U/6.3V/X5R_4C107 1U/6.3V/X5R_4 C90 1U/6.3V/X5R_4C90 1U/6.3V/X5R_4
Add C1084 to 1U
+1.5V_SUS +1.5V_CPU
5A
Q12
Q12 FDMS7670
FDMS7670
9 8 7 6 5
4
C131
C131
*4700P/25V/X7R_4_NC
*4700P/25V/X7R_4_NC
C130 1U/6.3V_4C130 1U/6.3V_4
VCCSA_VID0 VCCSA_VID1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Sandy Bridge 4/5
Sandy Bridge 4/5
Sandy Bridge 4/5
Wednesday, June 22, 2011
Wednesday, June 22, 2011
Wednesday, June 22, 2011
1
+VDDR_REF_CPU
+1.5V_CPU
3 2 1
PT
+1.5V_CPU
4/26 Intel
+1.5V_CPU
+VCCSA_CORE
VCCSA_SENSE (41)
VCCSA_VID0 (41) VCCSA_VID1 (41)
If +1.5V_CPU will be implemented, have to change the two divided resistor as 100-ohm 1%
+VDDR_REF_CPU
R39
R39
1K/F_4
1K/F_4
1
R05
R05
R05
7 51
7 51
7 51
+1.5V_CPU
R38
R38
1K/F_4
1K/F_4
C158
C158
0.1U/10V/X7R_4
0.1U/10V/X7R_4
2A
2A
2A
5
4
3
2
1
Sandy Bridge Processor (GND)
U12H
U12H
A13
VSS[1]
D D
C C
B B
A A
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
VSS
VSS
5
VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]
AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13
U12I
U12I
BG17
VSS[181]
BG21
VSS[182]
BG24
VSS[183]
BG28
VSS[184]
BG37
VSS[185]
BG41
VSS[186]
BG45
VSS[187]
BG49
VSS[188]
BG53
VSS[189]
BG9
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
VSS[204]
D50
VSS[205]
D54
VSS[206]
D58
VSS[207]
D6
VSS[208]
E25
VSS[209]
E29
VSS[210]
E3
VSS[211]
E35
VSS[212]
E40
VSS[213]
F13
VSS[214]
F15
VSS[215]
F19
VSS[216]
F29
VSS[217]
F35
VSS[218]
F40
VSS[219]
F55
VSS[220]
G48
VSS[221]
G51
VSS[222]
G6
VSS[223]
G61
VSS[224]
H10
VSS[225]
H14
VSS[226]
H17
VSS[227]
H21
VSS[228]
H4
VSS[229]
H53
VSS[230]
H58
VSS[231]
J1
VSS[232]
J49
VSS[233]
J55
VSS[234]
K11
VSS[235]
K21
VSS[236]
K51
VSS[237]
K8
VSS[238]
L16
VSS[239]
L20
VSS[240]
L22
VSS[241]
L26
VSS[242]
L30
VSS[243]
L34
VSS[244]
L38
VSS[245]
L43
VSS[246]
L48
VSS[247]
L61
VSS[248]
M11
VSS[249]
M15
VSS[250]
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
VSS
VSS
Processor Strapping
CFG2 (PCI-E Static x16 Lane Reversal)
CFG3 (PCI-E Static x4 Lane Reversal)
CFG4 (DP Presence Strap)
4
M4
VSS[251]
M58
VSS[252]
M6
VSS[253]
N1
VSS[254]
N17
VSS[255]
N21
VSS[256]
N25
VSS[257]
N28
VSS[258]
N33
VSS[259]
N36
VSS[260]
N40
VSS[261]
N43
VSS[262]
N47
VSS[263]
N48
VSS[264]
N51
VSS[265]
N52
VSS[266]
N56
VSS[267]
N61
VSS[268]
P14
VSS[269]
P16
VSS[270]
P18
VSS[271]
P21
VSS[272]
P58
VSS[273]
P59
VSS[274]
P9
VSS[275]
R17
VSS[276]
R20
VSS[277]
R4
VSS[278]
R46
VSS[279]
T1
VSS[280]
T47
VSS[281]
T50
VSS[282]
T51
VSS[283]
T52
VSS[284]
T53
VSS[285]
T55
VSS[286]
T56
VSS[287]
U13
VSS[288]
U8
VSS[289]
V20
VSS[290]
V61
VSS[291]
W13
VSS[292]
W15
VSS[293]
W18
VSS[294]
W21
VSS[295]
W46
VSS[296]
W8
VSS[297]
Y4
VSS[298]
Y47
VSS[299]
Y58
VSS[300]
Y59
VSS[301]
A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61
VSS_NCTF_10
NCTF
NCTF
VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Normal Operation Lane Reversed
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
3
Enable; An ext DP device is connected to eDP
Sandy Bridge Processor (RESERVED, CFG)
U12E
U12E
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IC,SNB_2CBGA,1P0
IC,SNB_2CBGA,1P0
RESERVED
RESERVED
DC_TEST_A4 DC_TEST_C4 DC_TEST_D3
DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61
DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58
DC_TEST_BG4 DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1 DC_TEST_BD1
CFG5 CFG6
CFG2 CFG3 CFG4CFG4 CFG5 CFG6
T4T4 T10T10
T7T7 T11T11
R15 *1K/F_4_NCR15 *1K/F_4_NC R199 *1K/F_4_NCR199 *1K/F_4_NC
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG2
R198 *1K/F_4_NCR198 *1K/F_4_NC
CFG3
R197 *1K/F_4_NCR197 *1K/F_4_NC
CFG4
R16 *1K/F_4_NCR16 *1K/F_4_NC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
2
Wednesday, June 22, 2011
PROJECT :
Sandy Bridge 5/5
Sandy Bridge 5/5
Sandy Bridge 5/5
1
RSVD28 RSVD29
RSVD30 RSVD31 RSVD32 RSVD33
RSVD34 RSVD35 RSVD36 RSVD37 RSVD38
RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44
RSVD45
R05
R05
R05
8 51
8 51
8 51
BE7 BG7
N42 L42 L45 L47
M13 M14 U14 W14 P13
AT49 K24
AH2 AG13 AM14 AM15
N50
A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1
5
DMI_RXN0(4) DMI_RXN1(4) DMI_RXN2(4) DMI_RXN3(4)
D D
C C
XDP_DBRST#(5)
SYS_PWROK
PM_DRAM_PWRGD(5)
RSMRST#(30)
ME_SUS_PWR_ACK(30)
SIO_PWRBTN#(30,33)
AC_PRESENT(30)
B B
SJ39 *SJ0402SJ39 *SJ0402
EC_PWROK(30)
HWPG(30,35)
C510
C510
DMI_RXP0(4) DMI_RXP1(4) DMI_RXP2(4) DMI_RXP3(4)
DMI_TXN0(4) DMI_TXN1(4) DMI_TXN2(4) DMI_TXN3(4)
DMI_TXP0(4) DMI_TXP1(4) DMI_TXP2(4) DMI_TXP3(4)
+1.05V_PCH
112
1 2
R289 49.9/F_4R289 49.9/F_4 R285 750/F_4R285 750/F_4
2
SJ40 *SJ0402SJ40 *SJ0402
112
5/16 change 0ohm to short jump
SJ194
SJ194 *100P/50V/NPO_4_NC
*100P/50V/NPO_4_NC
T14T14
W/O support
2
112
DMI_COMP
DMI2RBIAS
ME_SUS_PWR_ACK
XDP_DBRST#
SYS_PWROK_R
PWROK_R
APWROK_R
2
*SJ0402
*SJ0402
RSMRST#
ME_SUS_PWR_ACK
AC_PRESENT
PM_BATLOW#
PM_RI#
4
3
Cougar Point (DMI,FDI,PM)
U17C
U17C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
H20
E10
A10
CougarPoint_R1P0
CougarPoint_R1P0
DSW
PWRBTN#
ACPRESENT / GPIO31
BATLOW# / GPIO72
RI#
+3V_S5
+3V_S5
+3V_S5
DSW
+3V_S5
+3V_S5
DMI
FDI
DMI
FDI
+3V
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
+3V_S5
SLP_LAN# / GPIO29
FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
DSWVRMEN
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
AW16 AV12 BC10 AV14 BB10
DSWVRMEN
A18
RSMRST#_R
E22
PCIE_WAKE#
B9
CLKRUN#
N3
G8
SUSCLK
N14
D10
SLP_S4#
H4
F4
G10
W/O support iAMT
G16
W/O support Deep Sx
AP14
SIO_SLP_LAN#
K14
FDI_TXN0 (4) FDI_TXN1 (4) FDI_TXN2 (4) FDI_TXN3 (4) FDI_TXN4 (4) FDI_TXN5 (4) FDI_TXN6 (4) FDI_TXN7 (4)
FDI_TXP0 (4) FDI_TXP1 (4) FDI_TXP2 (4) FDI_TXP3 (4) FDI_TXP4 (4) FDI_TXP5 (4) FDI_TXP6 (4) FDI_TXP7 (4)
FDI_INT (4) FDI_FSYNC0 (4) FDI_FSYNC1 (4) FDI_LSYNC0 (4) FDI_LSYNC1 (4)
02/20 Pre-ES1 can Stuff R8292 for timing
SJ41 *SJ0402SJ41 *SJ0402
T23T23
2
112
PCIE_WAKE# (29)
CLKRUN# (30)
refer UM9
T20T20
SIO_SLP_S5# (30,40)
T17T17
W/O support
SIO_SLP_S3# (30,40)
H_PM_SYNC (5)
T19T19
W/O support iAMT
RSMRST#
2
1
PCH Pull-high/low(CLG)
+3.3V_SUS
RN4
PM_BATLOW# PCIE_WAKE# PM_RI# SIO_SLP_LAN#
ME_SUS_PWR_ACK AC_PRESENT
CLKRUN# XDP_DBRST#
RSMRST# SYS_PWROK_R
Pull-up to VccRTC (Intel,Tinna) Even no support Deep Sx?(Intel,Yes)
DSWVRMEN
On Die DSW VR Enable High = Enable (Default) Low = Disable
RN4
1 3 5 7
10K
10K
RP5
RP5
1 3
10K
10K
R262 10K_4R262 10K_4
5/13
R264 10K_4R264 10K_4 R272 *1K_4_NCR272 *1K_4_NC R97 10K_4R97 10K_4 R58 100K_4R58 100K_4
+RTC_CELL
R96
R96
330K_4
330K_4
R284
R284
*330K_4_NC
*330K_4_NC
2 4 6 8
2 4
+3.3V_RUN
S3 Power reduce S3 Power reduce
A A
SIO_SLP_S3#
2
R54
R54 *10K_4_NC
*10K_4_NC
+5V_ALW
12
PS_S3CNTRL
31
R52
R52 10K_4
10K_4
Q14
Q14 2N7002W -7-F
2N7002W -7-F
5
PS_S3CNTRL (17)
PS_S3CNTRL
Q13
Q13
2N7002W -7-F
2N7002W -7-F
2
4
+15V_ALW
31
Copy From GM6
R51
R51 100K_4
100K_4
C186
C186 *0.01U/25V/X7R_4_NC
*0.01U/25V/X7R_4_NC
PS_S3CNTRL_S (7)
System PWR_OK(CLG)
SYS_PWROK(5)
3
SYS_PWROK
U16
U16
4
TC7SH08FU
TC7SH08FU
+3.3V_SUS
3 5
C413
C413 *0.1U/10V/X7R_4_NC
*0.1U/10V/X7R_4_NC
2
EC_PWROK
1
R258
R258 100K_4
100K_4
2
IMVP_PWRGD (30,34,43)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
PROJECT :
Cougar Point 1/7
Cougar Point 1/7
Cougar Point 1/7
1
R05
R05
R05
9 51
9 51
9 51
5
4
3
2
1
Cougar Point (LVDS,DDI)
U17D
U17D
PANEL_BKEN(30)
ENVDD(20)
LCD_PW M(20)
D D
LCD_DDCCLK(20) LCD_DDCDAT(20)
+3.3V_RUN
T29T29
R118 2.37K/F_4R118 2.37K/F_4
T28T28
T35T35
INT_TXLCLKOUTN(20) INT_TXLCLKOUTP(20)
INT_TXLOUTN0(20) INT_TXLOUTN1(20) INT_TXLOUTN2(20)
INT_TXLOUTP0(20) INT_TXLOUTP1(20) INT_TXLOUTP2(20)
Deleete NET
C C
INT_TXUCLKOUTN,INT_TXUCLKOUTP INT_TXOUTN0,INT_TXOUTP0 INT_TXOUTN1,INT_TXOUTP1 INT_TXOUTN2,INT_TXOUTP2 LVDS channel B
1.ADD CRT Function by Ryan 20100916
2.Delete CRT Function for DXF modify
Leverage UM7
B B
1.ADD CRT Function by Ryan 20100916
2.Delete CRT Function for DXF modify
LCD_DDCCLK LCD_DDCDAT
RP19 2.2KX2RP19 2.2KX2
1 3
LVDS_IBG LVDS_VBG
T69T69 T68T68 T64T64
T30T30 T36T36
T70T70 T67T67
DAC_IREF
R119
R119 1K_4
1K_4
1.Change R118 type Ryan 20100919
2.Change R118 back to normal type
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47 T45
P39
AF37 AF36
AE48 AE47
AK39 AK40
AN48 AM47 AK47
AJ48
AN47 AM49 AK49
AJ47
AF40 AF39
AH45 AH47
AF49 AF45
AH43 AH49
AF47 AF43
N48 P49 T49
T39 M40
M47 M49
T43 T42
CougarPoint_R1P0
CougarPoint_R1P0
L_DDC_DATA L_CTRL_CLK
L_CTRL_DATA LVD_IBG
LVD_VBG LVD_VREFH
LVD_VREFL
LVDSA_CLK# LVDSA_CLK
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
LVDSB_CLK# LVDSB_CLK
LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
CRT_BLUE CRT_GREEN CRT_RED
CRT_DDC_CLK CRT_DDC_DATA
CRT_HSYNC CRT_VSYNC
DAC_IREF CRT_IRTN
LVDS
LVDS
CRT
CRT
4 2
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_INTN SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN DDPB_AUXP
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN DDPC_AUXP
DDPC_HPD
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN DDPD_AUXP
DDPD_HPD
01/26 add pull high resistor
Leverage UM7
1
+5V_RUN
2
Q39
Q39
BSS138-7-F
BSS138-7-F
3
5
R450
R450 100K_4
100K_4
INT_DP_HPD_R (19)
A A
INT_DP_HPD
R454
R454 *100K_4_NC
*100K_4_NC
AP43 AP45
AM42 AM40
AP39 AP40
EXT_HDMI_SCL
P38
EXT_HDMI_SDA
M39
AT49 AT47
INT_HDMI_HPD
AT40
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
LCD_DDCDAT LCD_DDCCLK
INT_DP_SCL INT_DP_SDA
ENVDD
EXT_HDMI_TXN2_C EXT_HDMI_TXP2_C EXT_HDMI_TXN1_C EXT_HDMI_TXP1_C EXT_HDMI_TXN0_C EXT_HDMI_TXP0_C EXT_HDMI_TXCN_C EXT_HDMI_TXCP_C
INT_DP_SCL INT_DP_SDA
INT_DP_HPD
Reserve R142,R148 for 2.2K_NC Del R139,R140 for 2.2K
EXT_HDMI_HPD_Q(21)
4
EXT_HDMI_SCL (21)
EXT_HDMI_SDA (21)
C459 0.1U/10V/X7R_4C459 0.1U/10V/X7R_4 C463 0.1U/10V/X7R_4C463 0.1U/10V/X7R_4 C449 0.1U/10V/X7R_4C449 0.1U/10V/X7R_4 C455 0.1U/10V/X7R_4C455 0.1U/10V/X7R_4 C467 0.1U/10V/X7R_4C467 0.1U/10V/X7R_4 C464 0.1U/10V/X7R_4C464 0.1U/10V/X7R_4 C446 0.1U/10V/X7R_4C446 0.1U/10V/X7R_4 C447 0.1U/10V/X7R_4C447 0.1U/10V/X7R_4
INT_DP_SCL (19)
INT_DP_SDA (19)
INT_DP_AUXN_C (19) INT_DP_AUXP_C (19)
INT_DP_TXN0_C (19) INT_DP_TXP0_C (19) INT_DP_TXN1_C (19) INT_DP_TXP1_C (19) INT_DP_TXN2_C (19) INT_DP_TXP2_C (19) INT_DP_TXN3_C (19) INT_DP_TXP3_C (19)
Add DP function
RP10
RP10
2
1
4
3
2.2KX2
2.2KX2 RP20
RP20
2
1
4
3
2.2KX2
2.2KX2
R128 *100K_4_NCR128 *100K_4_NC
R113
R113
150K
150K
R109
R109
*365K/F_NC
*365K/F_NC
+3.3V_RUN
12
2
R110
R110 10K
10K
12
Q16
Q16
MMST3904-7-F
MMST3904-7-F
1 3
+3.3V_RUN
INT_HDMI_HPD
EXT_HDMI_TXN2 (21) EXT_HDMI_TXP2 (21) EXT_HDMI_TXN1 (21) EXT_HDMI_TXP1 (21) EXT_HDMI_TXN0 (21) EXT_HDMI_TXP0 (21) EXT_HDMI_TXCN (21) EXT_HDMI_TXCP (21)
Mini DP
3
Cougar Point (GND)
U17I
U17I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
CougarPoint_R1P0
CougarPoint_R1P0
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
2
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
U17H
U17H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_R1P0
CougarPoint_R1P0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
PROJECT :
Cougar Point 2/7
Cougar Point 2/7
Cougar Point 2/7
R05
R05
R05
1
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
10 51
10 51
10 51
5
4
3
2
1
Cougar Point (HDA,JTAG,SATA)
C423 18P/50V/C0G_4C423 18P/50V/C0G_4
D D
C C
B B
C420 18P/50V/C0G_4C420 18P/50V/C0G_4
change QPN to BG332768461 same with SS8 for cost down 1/21
ACZ_BITCLK_AUDIO(28)
ACZ_SDOUT_AUDIO(28)
ACZ_RST#_AUDIO(28,30)
23
+RTC_CELL
ACZ_SPKR(28)
ACZ_SDIN0(28)
PCH_MELOCK(30)
PCH_SPI_CS0#(31)
14
PCH_SPI_CLK(31)
PCH_SPI_SI(31)
PCH_SPI_SO(31)
Y1
Y1
32.768KHZ
32.768KHZ
R93 1M_4R93 1M_4
R288
R288
RTC_X1
10M_4
10M_4
RTC_X2 RTC_RST#
T21T21
SRTC_RST#
T24T24
SM_INTRUDER# PCH_INTVRMEN
T22T22
R295 33_4R295 33_4
R293 33_4R293 33_4
R294 1K_4R294 1K_4 R299 33_4R299 33_4
T59T59 T15T15 T16T16 T60T60
C414 22P/50V/NPO_4C414 22P/50V/NPO_4
2
112
SJ195 *SJ0402SJ195 *SJ0402
5/16 change 0ohm to short jump
ACZ_BITCLK_R ACZ_SYNC_R ACZ_SPKR ACZ_RST#_R
T27T27
ACZ_SDOUT
PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO
PCH_SPI_CLK_R
U17A
U17A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_R1P0
CougarPoint_R1P0
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
+3V +3V
LPC
LPC
FWH4 / LFRAME#
+3V
LDRQ1# / GPIO23
SATA 6G
SATA 6G
+3V
SATA
SATA
+3V_S5
SATA3RCOMPO
SATA0GP / GPIO21 SATA1GP / GPIO19
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP SATA0TXN SATA0TXP
SATA1RXN
SATA1RXP SATA1TXN SATA1TXP
SATA2RXN
SATA2RXP SATA2TXN SATA2TXP
SATA3RXN
SATA3RXP SATA3TXN SATA3TXP
SATA4RXN
SATA4RXP SATA4TXN SATA4TXP
SATA5RXN
SATA5RXP SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3COMPI
SATA3RBIAS
SATALED#
C38 A38 B37 C37
D36 E36
K36 V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11 Y10
AB12 AB13
AH1
P3 V14 P1
LPC_LDRQ0# LPC_LDRQ1#
IRQ_SERIRQ
SATA_COMP
SATA3_COMP
SATA3_RBIAS
Open-drain output
R261 10KR261 10K
SATA_DET0#
T26T26 T25T25
R86 37.4/F_4R86 37.4/F_4
R88 49.9/F_4R88 49.9/F_4
R267 750/F_4R267 750/F_4
+3.3V_RUN
SATA_LED# (36)
BBS_BIT0 (12)
LPC_LAD0 (23,30) LPC_LAD1 (23,30) LPC_LAD2 (23,30) LPC_LAD3 (23,30)
LPC_LFRAME# (23,30)
IRQ_SERIRQ (30)
SATA_RXN0 (27)
SATA_RXP0 (27) SATA_TXN0 (27) SATA_TXP0 (27)
SATA_RXN1 (27)
SATA_RXP1 (27) SATA_TXN1 (27) SATA_TXP1 (27)
+1.05V_PCH
Take care while using GPIO19 for Hot Plug function
SATA HDD/SSD
SATA ODD
IRQ_SERIRQ SATA_DET0#
PCH JTAG Debug (CLG)
PCH_JTAG_TMS PCH_JTAG_TDI
PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK
R60,R61,R70,R62,R274 Depop 5/18
PCH_JTAG_TDO
R275,R265 Depop 5/18
+RTC_CELL
R94 20K_4R94 20K_4 R99 20K_4R99 20K_4
RP21 10KRP21 10K
1 3
MP remove(Intel)
R60 *200_4_NCR60 *200_4_NC R61 *200_4_NCR61 *200_4_NC
R70 *100_4_NCR70 *100_4_NC
1 2
R62 *100_4_NCR62 *100_4_NC
1 2
R274 *51_4_NCR274 *51_4_NC
R275 *200_4_NCR275 *200_4_NC R265 *100_4_NCR265 *100_4_NC
1 2
C225
C225
1U/6.3V/X5R_4
1U/6.3V/X5R_4
+3.3V_RUN
2 4
+3.3V_SUS
+3.3V_SUS
RTC_RST# SRTC_RST#
C247
C247 1U/6.3V/X5R_4
1U/6.3V/X5R_4
PCH Strap Table
Pin Name Strap description
SPKR
HDA_SDO
Del 0510
A A
INTVRMEN
HDA_SYNC
No reboot mode setting PWROK
Integrated 1.05V VRM enable ALWAYS
On-Die PLL VR Volatge Select RSMRST
5
Sampled
PWROKFlash Descriptor Security
Configuration
0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode
0 = Default (weak pull-down 20K) 1 = Override
Remove SPI_MOSI from PCH strapping, HR_C/L_v0.91
Should be always pull-up
0 = Support by 1.8V (weak PD) 1 = Support by 1.5V
4
+3.3V_RUN
+3.3V_SUS
+RTC_CELL
ACZ_SYNC_AUDIO(28)
note
R76 *1K_4_NCR76 *1K_4_NC
R297 *1K_4_NCR297 *1K_4_NC
R91 330K_4R91 330K_4
R300 33_4R300 33_4
3
ACZ_SPKR
ACZ_SDOUT
PCH_INTVRMEN
R3051K_4 R3051K_4
ACZ_SYNC_R
+3.3V_SUS
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
2
Wednesday, June 22, 2011
PROJECT :
Cougar Point 3/7
Cougar Point 3/7
Cougar Point 3/7
1
R05
R05
R05
11 51
11 51
11 51
2 4 6 8
2 4 6 8
+3.3V_SUS
10
9 8 7 4
RN6
RN6
10KX8
10KX8
1 3 5 7
RN5
RN5
10K
10K
5
PCI_PIRQC# PCI_PIRQB# PCI_PIRQD# PCI_PIRQA#
PCIE_MCARD2_DET#
SATA_ODD_DA# HDD_FALL_INT1
1/31 check value R90 --> RN6
USB_OC0#
1
SIO_EXT_W AKE#
2
USB_OC3#
3
USB_OC5#
56
REQ1#
2
PIRQH#
4
REQ2#
6
REQ3#
8
HDD_FALL_INT1
KB_LED_DET(32)
T18T18
R323 22_4R323 22_4 R322 22_4R322 22_4 R290 22_4R290 22_4
0120
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
REQ1# REQ2# REQ3#
BBS_BIT1 PCIE_MCARD2_DET# PCI_GNT3#
KB_LED_DET PIRQH#
1/28 check
PCI_PME# PCI_PLTRST#
CLK_33M_LPC_R CLK_33M_KBC_R
Cougar Point-M (PCI,USB,NVRAM)
U17E
U17E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_R1P0
CougarPoint_R1P0
change RN2 footprint to "8P4R-0402-SMT" from 8P4R 1/12
PCI/USBOC# Pull-up(CLG)
+3.3V_RUN
D D
C C
B B
A A
01/27
RN2
RN2
1 3 5 7
10K
10K RN3
RN3
1 3 5 7
10K
10K
USB_OC6# USB_OC4# USB_OC1# USB_OC2#
+3.3V_RUN
pull hight to +3.3V_RUN 0120
Remove PCIE_MCARD2_DET# off-page by Ryan
01/27
Change GPIO4 to KB_LED_DET 1/12
Check with BIOS program or not? (have to be not)
HDD_FALL_INT1(27) SATA_ODD_DA#(27)
Add R1001 for CLK_33M_LPC
CLK_33M_LPC(23) CLK_33M_KBC(30) CLK_PCI_FB(13)
Check CLKOUT if Skew requirement?
+5V +5V +5V +5V
4
RSVD
RSVD
+5V +5V +5V
+3V +3V +3V
+5V +5V +5V +5V
PCI
PCI
USB
USB
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
RSVD1 RSVD2 RSVD3 RSVD4
RSVD5 RSVD6
RSVD7 RSVD8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24
RSVD25 RSVD26
RSVD27 RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AV10
AT8 AY5
BA2 AT12
BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32
ADD CardReader Function by Ryan 20100917
A32
(ADD USBP12-,USBP12+)
USB_BIAS
C33
B33
USB_OC0#
A14
USB_OC1#
K20
USB_OC2#
B17
USB_OC3#
C16
USB_OC4#
L16
USB_OC5#
A16
USB_OC6#
D14
SIO_EXT_W AKE#CLK_PCI_FB_R
C14
USBP1- (16) USBP1+ (16)
USBP4- (23) USBP4+ (23)
USBP11- (20) USBP11+ (20) USBP12- (36) USBP12+ (36)
R292 22.6/F_4R292 22.6/F_4
3
01/25 DEL Esata word
USB
WLAN
Camara CardReader
USB_OC0# (16)
SIO_EXT_W AKE# (30)
2
PLTRST#(CLG)
PCI_PLTRST#
Pin Name Strap description
GNT2# / GPIO53
GNT3# / GPIO55
GNT1# / GPIO51
GPIO19
BBS_BIT1
BBS_BIT0(11)
DF_TVS
ESI strap (Server only) PWROK
Top-Block Swap Override
R325 *1K_4_NCR325 *1K_4_NC
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
R324 *1K_4_NCR324 *1K_4_NC
R270 *1K_4_NCR270 *1K_4_NC
DMI and FDI Tx/Rx Termination Voltage
R67 2.2KR67 2.2K
1 2
R74 1K_4R74 1K_4
+3.3V_SUS
C308
C308 *0.1U/10V/X7R_4_NC
*0.1U/10V/X7R_4_NC
2 1
SJ42 *SJ0402SJ42 *SJ0402
U5
U5
3 5
*TC7SH08FU_NC
*TC7SH08FU_NC
112
4
2
Sampled
PWROK
PCI_GNT3#
PWROK
PWROK
PWROK
+1.8V_RUN
DF_TVS (14) H_SNB_IVB# (5)
1
PLTRST#
R144
R144 *100K_4_NC
*100K_4_NC
PLTRST# (5,23,29,30)
PT
Configuration
Should not be pull-down (weak pull-up 20K)
0 = "top-block swap" mode 1 = Default (weak pull-up 20K)
Defined in EDS (Intel)
Bit 1Bit 0
Boot Location
11
SPI
00
LPC
Default weak pull-up on GNT0/1# [Need external pull-down for LPC BIOS]
weak pull-down 20kohm
CheckList_1.5 p72; HR_v1.5 p476
*
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
5
4
3
2
Wednesday, June 22, 2011
PROJECT :
Cougar Point 4/7
Cougar Point 4/7
Cougar Point 4/7
1
R05
R05
R05
12 51
12 51
12 51
5
4
3
2
1
Cougar Point-M (PCI-E,SMBUS,CLK)
U17B
U17B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
D D
WLAN
USB3.0
LAN
C C
WLAN
B B
USB3.0
LAN
A A
PCIE_RXN2(23) PCIE_RXP2(23)
PCIE_TXN2(23) PCIE_TXP2(23)
PCIE_RXN4(29) PCIE_RXP4(29)
PCIE_TXN4(29) PCIE_TXP4(29)
PCIE_RXN6(29) PCIE_RXP6(29)
PCIE_TXN6(29) PCIE_TXP6(29)
CLK_PCIE_WLANN(23) CLK_PCIE_WLANP(23)
PCIE_CLK_REQ1#(23)
CLK_PCIE_USB30N(29) CLK_PCIE_USB30P(29)
PCIE_CLK_REQ4#(29)
CLK_PCIE_LANN(29) CLK_PCIE_LANP(29)
PCIE_CLK_REQ5#(29)
5
C429 0.1U/10V/X7R_4C429 0.1U/10V/X7R_4 C430 0.1U/10V/X7R_4C430 0.1U/10V/X7R_4
C434 0.1U/10V/X7R_4C434 0.1U/10V/X7R_4 C432 0.1U/10V/X7R_4C432 0.1U/10V/X7R_4
C460 0.1U/10V/X7R_4C460 0.1U/10V/X7R_4 C461 0.1U/10V/X7R_4C461 0.1U/10V/X7R_4
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN4_C PCIE_TXP4_C
PCIE_TXN6_LAN_C PCIE_TXP6_LAN_C
PCIE_CLK_REQ0#
PCIE_CLK_REQ1#
PCIE_CLK_REQ2#
PCIE_CLK_REQ3#
PCIE_CLK_REQ4#
PCIE_CLK_REQ5#
PEG_B_CLKRQ#
PCIE_CLK_REQ6#
PCIE_CLK_REQ7#
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CougarPoint_R1P0
CougarPoint_R1P0
4
+3V_S5
PCI-E*
PCI-E*
+3V_S5
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
CLOCKS
CLOCKS
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
+3V_S5 +3V_S5
+3V +3V +3V +3V
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N CLKIN_SATA_P
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKIN_DMI_N CLKIN_DMI_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
PCH_SMB_ALERT#
E12
SMBCLK
H14
SMBDATA
C9
A12
SML0CLK
C8
SML0DATA
G12
PCH_GPIO74
C13
SMB_CLK_ME1
E14
SMB_DATA_ME1
M16
M7
T11
P10
PEG_CLKREQ_GPU#
M10
AB37 AB38
AV22 AU22
AM12 AM13
CLK_DMIN
BF18 BE18
CLK_GND1
BJ30 BG30
CLK_BUF_DREFCLK
G24 E24
CLK_BUF_DREFSSCLK
AK7 AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_RCOMP
Y47
CLK_48M_CARD_L
K43
CLK_FLEX1
F47
CLK_FLEX2
H47
CLK_FLEX0 SMB_CLK_ME1
K49
3
R125 90.9/F_4R125 90.9/F_4
DDR_HVREF_RST_PCH (4)
R388 10K_4R388 10K_4
R389 10K_4R389 10K_4
R390 10K_4R390 10K_4
R391 10K_4R391 10K_4
R301 10K_4R301 10K_4
CLK_PCI_FB (12)
T63T63
R321 33_4R321 33_4 T37T37 T66T66 T65T65
CLK_CPU_BCLKN (5) CLK_CPU_BCLKP (5)
CLK_DP_N (5) CLK_DP_P (5)
C454 27P/50V/NPO_4C454 27P/50V/NPO_4
R318
R318 1M_4
1M_4
1 2
+1.05V_PCH
5/13 change value from 22 to 33 ohm
12
C394
C394 *100P/50V/NPO_4_NC
*100P/50V/NPO_4_NC
C453 33P/50V/NPO_4C453 33P/50V/NPO_4
2
Y3 25MHzY325MHz
CLK_48M_CARD (36)
SMBus/Pull-up(CLG)
DMN66D0LDW-7
DMN66D0LDW-7
SMBCLK
SMBDATA
SMB_CLK_ME1
+3.3V_SUS
SMB_DATA_ME1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3.3V_RUN
5
Q32A
Q32A
3 4
1 2
R282*0_4_NC R282*0_4_NC
Q32B
Q32B
DMN66D0LDW-7
DMN66D0LDW-7
Wednesday, June 22, 2011
Wednesday, June 22, 2011
Wednesday, June 22, 2011
6 1
1 2
R286 *0_4_NCR286 *0_4_NC
1 2
DMN66D0LDW-7
DMN66D0LDW-7
5 2
DMN66D0LDW-7
DMN66D0LDW-7
1 2
R287 *0_4_NCR287 *0_4_NC
Cougar Point 5/7
Cougar Point 5/7
Cougar Point 5/7
2
4
RP6
RP6
2.2KX2
2.2KX2
1
3
WLAN_SCLK (17,18,23,27)
2
WLAN_SDATA (17,18,23,27)
R280*0_4_NC R280*0_4_NC
34
61
Q33A
Q33A
Q33B
Q33B
SMBCLK1 (30)
SMBDAT1 (30)
CLK_REQ/Strap Pin(CLG)
PCIE_CLK_REQ0# PCIE_CLK_REQ3# PCIE_CLK_REQ4# PCIE_CLK_REQ5#
PEG_B_CLKRQ# PCIE_CLK_REQ6#
PCIE_CLK_REQ7#
PCIE_CLK_REQ1# PCIE_CLK_REQ2#
PEG_CLKREQ_GPU#
PCH_GPIO74 PCH_SMB_ALERT#
SMBCLK SMBDATA
SML0CLK SML0DATA
SMB_DATA_ME1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
RN1 10KRN1 10K
R59 10K_4R59 10K_4
1 3
RP4 10KRP4 10K
1 3
RP3 10KRP3 10K
R63 10K/J_4R63 10K/J_4
R71 *10K/J_4_NCR71 *10K/J_4_NC
R05
R05
R05
1
+3.3V_SUS
1
2
3
4
5
6
7
8
2 4
+3.3V_RUN
2 4
RP16 10KRP16 10K
1 3
RP15 2.2KX2RP15 2.2KX2
1 3
RP14 2.2KX2RP14 2.2KX2
1 3
RP17 2.2KX2RP17 2.2KX2
1 3
13 51
13 51
13 51
+3.3V_SUS
+3.3V_SUS
2 4
2 4
2 4
2 4
5
Delete NET USB_MCARD2_DET# WWAN Function by Ryan 20100917 GPIO34/STP_PCI#
S_GPIO
SIO_EXT_SMI#(30)
D D
SIO_EXT_SCI#(30)
SMIB(29)
PCIE_MCARD1_DET#(23)
Add 10k Ohom pull-up to 3.3V_RUN Add 10k Ohom pull-up to 3.3V_RUN
USB_MCARD1_DET#(23)
Remove off-page by Ryan 20100921
C C
B B
01/27
WLAN_RADIO_DIS#(23)
BT_RADIO_DIS#(23)
HDD_FALL_INT2(27)
CRIT_TEMP_REP#(30)
SIO_EXT_SMI# PCH_GPIO6 SIO_EXT_SCI# SMIB LAN_PHY_PWR_CTRL HOST_ALERT#1
PCH_GPIO16
GPIO22 PCIE_MCARD1_DET# ROUSH_PAID_TS_DET# PLL_ODVR_EN USB_MCARD2_DET# USB_MCARD1_DET# CAMERA_CBL_DET# FDI_OVRVLTG WLAN_RADIO_DIS# BT_RADIO_DIS# HDD_FALL_INT2 CRIT_TEMP_REP# GPIO57
4
Cougar Point (GPIO,VSS_NCTF,RSVD)
U17F
U17F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_R1P0
CougarPoint_R1P0
+3V_S5
+3V_S5
DSW +3V_S5
+3V
+3V_S5
+3V +3V +3V +3V
+3V
+3V
+3V
+3V_S5
+3V
+3V +3V
+3V
+3V
+3V +3V
GPIO
GPIO
+3V +3V +3V +3V
+3V_S5
NCTF
NCTF
TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71
A20GATE
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4
VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32
PECI
NC_1
3
C40 B41 C41 A40
P4 AU16 P5 AY11 AY10 T14 AY1
AH8 AK11 AH10 AK10
P37
BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49
ADD ODD Function by Ryan
PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
SIO_A20GATE
SIO_RCIN#
PCH_THRMTRIP#
MODC_EN (27)
R82 390_4R82 390_4
DF_TVS (12)
2
Pin Name Strap description
GPIO28
Delete R373 WWAN Function by Ryan
On-die PLL Voltage Regulator RSMRST#
R55 *1K_4_NCR55 *1K_4_NC
SIO_A20GATE (30)
H_PECI (5)
SIO_RCIN# (30)
H_PWRGOOD (5)
PM_THRMTRIP# (5)
Depop R281 5/18
1
Sampled
PLL_ODVR_EN
Configuration
0 = Disable 1 = Enable (Default)
GPIO Pull-up/Pull-down(CLG)
LAN_PHY_PWR_CTRL GPIO57
SIO_EXT_SMI# SIO_EXT_SCI# CRIT_TEMP_REP# SIO_A20GATE SIO_RCIN# HDD_FALL_INT2 USB_MCARD2_DET# USB_MCARD1_DET# BT_RADIO_DIS# S_GPIO PCH_GPIO16 PCIE_MCARD1_DET# WLAN_RADIO_DIS# PCH_GPIO6 PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
ROUSH_PAID_TS_DET# SMIB GPIO22
R277 10K_4R277 10K_4 R69 10K_4R69 10K_4
R315 10K_4R315 10K_4 R308 10K_4R308 10K_4 R268 10K_4R268 10K_4 R65 10K_4R65 10K_4 R75 10K_4R75 10K_4 R66 *10K_4_NCR66 *10K_4_NC R273 10K_4R273 10K_4 R278 10K_4R278 10K_4 R263 10K_4R263 10K_4 R105 10K_4R105 10K_4 R260 10K_4R260 10K_4 R68 10K_4R68 10K_4 R271 10K_4R271 10K_4 R107 10K_4R107 10K_4 R312 10K_4R312 10K_4 R311 10K_4R311 10K_4 R306 10K_4R306 10K_4
R89 10K_4R89 10K_4 R281 *10K_4_NCR281 *10K_4_NC R56 10K_4R56 10K_4
Yes
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
R64 *1K/F_4_NCR64 *1K/F_4_NC
FDI TERMINATION VOLTAGE OVERRIDE
A A
+3.3V_RUN
R73 200K_4R73 200K_4
DMI TERMINATION VOLTAGE OVERRIDE
FDI_OVRVLTG
LOW - Tx, Rx terminated to same voltage
R72 100K_4R72 100K_4
Change GPIO36 from pull-up 3.3V_RUN to pull-low for CAMERA_CBL_DET#
CAMERA_CBL_DET#
Change GPIO36 from pull-low 3.3V_RUN to pull-up 3.3V_RUN for CAMERA_CBL_DET#
Low = Tx, Rx terminated to same voltage (DC Coupling Mode) (DEFAULT)
5
Change R106 from CS42002JB14 to CS42002FB04
4
3
Reserve (PDC)
HOST_ALERT#1
Intel ME Crypto Transport Layer Security (TLS) cipher suite
Low = Disable (Default) High = Enable
MFG-TEST
R276 1K_4R276 1K_4
del 0527
2
+3.3V_SUS
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
PROJECT :
Cougar Point 6/7
Cougar Point 6/7
Cougar Point 6/7
R05
R05
R05
1
14 51
14 51
14 51
5
4
3
2
1
COUGAR POINT (POWER) Cougar Point (POWER)
VccCORE =1.14A(50mils)
+1.05V_PCH +1.05V_PCH_VCC
SJ43 *SJ1206SJ43 *SJ1206
need 1206?
D D
+1.05V_VCCIO
2
112
C229 10U/6.3V/X5R_6C229 10U/6.3V/X5R_6 C257 1U/6.3V/X5R_4C257 1U/6.3V/X5R_4
C243 1U/6.3V/X5R_4C243 1U/6.3V/X5R_4 C228 1U/6.3V/X5R_4C228 1U/6.3V/X5R_4
T61T61
Change CH6101M9905 to CH61001KA94
VccIO =2.925 A(120mils)
+1.05V_VCCIO
C C
C214 1U/6.3V/X5R_4C214 1U/6.3V/X5R_4 C273 1U/6.3V/X5R_4C273 1U/6.3V/X5R_4 C259 1U/6.3V/X5R_4C259 1U/6.3V/X5R_4 C256 1U/6.3V/X5R_4C256 1U/6.3V/X5R_4
Near to AN16, AP21, AN33
112
2
+VCCAFDI_VRM
+3V_VCC_EXP+3.3V_RUN
T62T62
SJ12 *SJ0603SJ12 *SJ0603
112
*Short Jump_150
*Short Jump_150
5
SJ33 *SJ0603SJ33 *SJ0603
C424 0.1U/10V/X7R_4C424 0.1U/10V/X7R_4
VccVRM(1.5V) =0.16 A(10mils)
+VCCAFDI_VRM
+1.05V_VCCIO
VccDMI =0.042 A(10mils)
+1.1V_VCC_DMI
B B
+1.5V_RUN
A A
U17G
U17G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_R1P0
CougarPoint_R1P0
+VCCAFDI_VRM
VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1
2
1.5V (Mobile)
+1.05V_VCCIO+1.05V_PCH
SJ21
SJ21
12
change SJ21 to Jump150 / 3720package 1/12
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
DMI
DMI
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS VSSALVDS
VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
VccADAC =1mA(8mils)
+VCCA_DAC_1_2
C295 10U/6.3V/X5R_6C295 10U/6.3V/X5R_6 C292 0.1U/10V/X7R_4C292 0.1U/10V/X7R_4 C288 0.01U/25V/X7R_4C288 0.01U/25V/X7R_4
U48
U47
VccALVDS=1mA (8mils)
AK36 AK37
VccTX_LVDS=60mA (10mils)
AM37 AM38
C293 22U/6.3V_8C293 22U/6.3V_8
AP36
C282 0.01U/25V/X7R_4C282 0.01U/25V/X7R_4 C286 0.01U/25V/X7R_4C286 0.01U/25V/X7R_4
AP37
V33
V34
+VCCAFDI_VRM
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
4
L9 180ohm/1.5AL9 180ohm/1.5A
C159:CH6221M9A03->CH6221M9A01
SJ19 *SJ0603SJ19 *SJ0603
SJ16 *SJ0402SJ16 *SJ0402
+3.3V_RUN+3V_VCC_GIO
2
112
C272 0.1U/10V/X7R_4C272 0.1U/10V/X7R_4
+VCCAFDI_VRM
+1.05V_CPU+1.1V_VCC_DMI
2
112
C237 1U/6.3V/X5R_4C237 1U/6.3V/X5R_4
L6 10uH_8L6 10uH_8
C277 1U/6.3V/X5R_4C277 1U/6.3V/X5R_4
SJ11 *SJ0805SJ11 *SJ0805
SJ32 *SJ0603SJ32 *SJ0603
2
112
C212 0.1U/10V/X7R_4C212 0.1U/10V/X7R_4
2
112
C417 1U/6.3V/X5R_4C417 1U/6.3V/X5R_4
01/26 power rail for VCCIO
+3.3V_RUN
VCCDSW3_3 tie to 3.3V_SUS, when don't support Deep SX CP_v1.0 p88
+VCCALVDS +3.3V_RUN
SJ25 *SJ0402SJ25 *SJ0402
SJ23 *SJ_0805SJ23 *SJ_0805
2
112
change SJ23 to 0805 size 1/12
+1.8V_RUN+VCC_TX_LVDS
2
112
need Indutor?
Vcc3_3 = 0.266A (15mils)
01/26 power rail for VCCIO
VccDMI = 80mA (10mils)
+1.05V_PCH+1.1V_VCC_DMI_CCI
VccCLKDMI = 20mA (8mils)
+1.8V_RUN+VCCP_NAND
VCCPNAND = 190 mA(15mils)
Intel
+3.3V_RUN+3V_VCCME_SPI
VCCSPI = 20mA(8mils)
+1.05V_PCH
+1.05V_PCH
1mA(8mils)
C145:CH6221M9A03->CH6221M9A01
L7 10uH/100mA_8L7 10uH/100mA_8
L8 10uH/100mA_8L8 10uH/100mA_8
C106:CH6221M9A03->CH6221M9A01
+3.3V_SUS
+1.05V_VCCIO
SJ13 *SJ0603SJ13 *SJ0603
SJ20 *SJ0603SJ20 *SJ0603
SJ24 *SJ0603SJ24 *SJ0603
2
112
C226 1U/6.3V/X5R_4C226 1U/6.3V/X5R_4
2
112
C268 1U/6.3V/X5R_4C268 1U/6.3V/X5R_4
2
112
C274 1U/6.3V/X5R_4C274 1U/6.3V/X5R_4
+1.05V_CPU
VCCRTC<1mA(8mils)
C291
C291 10U/6.3V/X5R_6
10U/6.3V/X5R_6
C287
C287 10U/6.3V/X5R_6
10U/6.3V/X5R_6
3
T71T71
VccDSW3_3= 3mA(8mil)
SJ14 *SJ0402SJ14 *SJ0402
C227 0.1U/10V/X7R_4C227 0.1U/10V/X7R_4
2
112
T72T72
T73T73
T74T74
VccASW =1.01A (50mils)
+1.05V_PCH
C269 22U/6.3V_8C269 22U/6.3V_8 C270 22U/6.3V_8C270 22U/6.3V_8
C252 1U/6.3V/X5R_4C252 1U/6.3V/X5R_4 C253 1U/6.3V/X5R_4C253 1U/6.3V/X5R_4 C244 1U/6.3V/X5R_4C244 1U/6.3V/X5R_4
C215 0.1U/10V/X7R_4C215 0.1U/10V/X7R_4
+VCCAFDI_VRM
80mA(10mils) 80mA(10mils)
VCCDIFFCLKN= 55mA(18mils,PDDG)
VCCSSC= 95mA(10mils)
C219 0.1U/10V/X7R_4C219 0.1U/10V/X7R_4
T75T75
SJ9 *SJ0402SJ9 *SJ0402
2
112
C188 4.7U/6.3V/X5R_6C188 4.7U/6.3V/X5R_6 C197 0.1U/10V/X7R_4C197 0.1U/10V/X7R_4 C189 *0.1U/10V/X7R_4_NCC189 *0.1U/10V/X7R_4_NC
+RTC_CELL
C231 1U/6.3V/X5R_4C231 1U/6.3V/X5R_4 C242 *0.1U/10V/X7R_4_NCC242 *0.1U/10V/X7R_4_NC C248 0.1U/10V/X7R_4C248 0.1U/10V/X7R_4
+1.05V_VCCA_A_DPL
C289
C289 1U/6.3V/X5R_4
1U/6.3V/X5R_4
+1.05V_VCCA_B_DPL
C290
C290 1U/6.3V/X5R_4
1U/6.3V/X5R_4
+VCCACLK
+VCCPDSW
PCH_VCCDSW
+3V_SUS_CLKF33
+VCCSUS1
+VCCRTCEXT
+VCCAFDI_VRM
+1.05V_VCCA_A_DPL +1.05V_VCCA_B_DPL
+VCCDIFFCLK +VCCDIFFCLKN
+V1.05V_SSCVCC
+VCCSST
+V1.05M_VCCSUS
+VTT_VCCPCPU
+3.3V_RUN
U17J
U17J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
CougarPoint_R1P0
CougarPoint_R1P0
SJ27 *SJ0402SJ27 *SJ0402
112
2
2
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
CPURTC
CPURTC
HDA
HDA
+3V_SUS_CLKF33_L
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]
VCCAPLLSATA
T23 T24 V23 V24 P24
T26
VCCIO[34]
M26
V5REF_SUS
AN23
DCPSUS[4]
AN24
P34
V5REF
N20 N22 P20 P22
AA16
VCC3_3[1]
W16
VCC3_3[8]
T34
VCC3_3[4]
AJ2
VCC3_3[2]
AF13
VCCIO[5]
AH13
VCCIO[12]
AH14
VCCIO[13]
AF14
VCCIO[6]
AK1
AF11
VCCVRM[1]
AC16
VCCIO[2]
AC17
VCCIO[3]
AD17
VCCIO[4]
T21
VCCASW[22]
V21
VCCASW[23]
T19
VCCASW[21]
P32
VCCSUSHDA
L20 10uH/100mA_8L20 10uH/100mA_8
C211 1U/6.3V/X5R_4C211 1U/6.3V/X5R_4
VCCSUS3_3 = 119mA (15mils)
+3V_VCCPUSB
+3V_VCCAUBG
+5V_PCH_VCC5REFSUS
+VCCA_USBSUS +3V_VCCPSUS
+5V_PCH_VCC5REF
+3V_VCCPSUS
+3V_VCCPCORE
+3V_VCCPCORE
C276 0.1U/10V/X7R_4C276 0.1U/10V/X7R_4
C192 0.1U/10V/X7R_4C192 0.1U/10V/X7R_4
SJ18 *SJ0603SJ18 *SJ0603 C230 0.1U/10V/X7R_4C230 0.1U/10V/X7R_4
SJ17 *SJ0603SJ17 *SJ0603 C245 0.1U/10V/X7R_4C245 0.1U/10V/X7R_4
R100 10/F_4R100 10/F_4
D8 RB500V-40D8 RB500V-40 C246 0.1U/10V/X7R_4C246 0.1U/10V/X7R_4
R106 10/F_4R106 10/F_4 D9 RB500V-40D9 RB500V-40
C275 1U/6.3V/X5R_4C275 1U/6.3V/X5R_4
SJ15 *SJ0603SJ15 *SJ0603
C232 1U/6.3V_4C232 1U/6.3V_4
SJ10 *SJ0603SJ10 *SJ0603
C221 0.1U/10V/X7R_4C221 0.1U/10V/X7R_4
C251 1U/6.3V_4C251 1U/6.3V_4
112
112
112
VCCPCORE = 28mA(10mils)
112
+3.3V_RUN
+3.3V_RUN
C197:CH5102K9B06->CH5101K9B01
+V1.1LAN_VCCAPLL
+VCCAFDI_VRM
VCCVRM= 114mA(15mils)
C481:CH6101M9905->CH61001KA94
C222 1U/6.3V/X5R_4C222 1U/6.3V/X5R_4
change +1.05V_VCCEPW to +1.05V_PCH 1/12
+1.05V_VCCIO
+1.05V_PCH
VCCSUSHDA= 10mA(8mils)
+V3.3A_1.5A_HDA_IO
SJ26 *SJ0402SJ26 *SJ0402
C260 0.1U/10V/X7R_4C260 0.1U/10V/X7R_4
+3V_SUS_CLKF33
C465
C465 10U/6.3V/X5R_6
10U/6.3V/X5R_6
112
C278
C278 1U/6.3V_4
1U/6.3V_4
C247:CH5102K9B06->CH5101K9B01
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
Date: Sheet of
Wednesday, June 22, 2011
PROJECT :
Cougar Point 7/7
Cougar Point 7/7
Cougar Point 7/7
1
+1.05V_VCCIO
2
2
+1.05V_VCCIO
VCC5REFSUS=1mA(8mil)
T76T76
V5REF= 1mA(8mil)
2
2
C278:CH5102K9B06
->CH5101K9B01
+1.05V_VCCIO
T77T77
2
R05
R05
R05
15 51
15 51
15 51
+3.3V_SUS
+5V_SUS +3.3V_SUS
+5V_RUN
+3.3V_RUN
VCCSUS3_3 = 119mA (15mils)
+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
2A
2A
2A
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