Datasheet VN800PT13TR, VN800PT, VN800S13TR, VN800S Datasheet (SGS Thomson Microelectronics)

Page 1
®
July 2002 1/21
VN800S
/ VN800P T
HIGH SIDE DRIVER
1
THERMAL SHUTDOWN
CURRENT LIMITATION
SHORTED LOAD PROTECTION
UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
PROTECTION AGAINST LOSS OF GROUND
VERY LOW STAND-BY CURRENT
REVERSE BATTERY PROTECTION (*)
DESCRIPTION
The VN800S, VN800PT are monolithic devices made by using STMicroelectronics VIPower M0-3 Technology, i ntended for dr iving any ki nd of load with one side connected to ground. Active VCC pin voltage clamp protec ts the device
against low energy spikes. Active current limitation combined with thermal shutdown and
automatic restart protect the device against overload. Device automatically turns off in case of ground pin disconnection. This device is especially suitable for industrial applications in norms conformity with IEC1131 (Programmable Controllers International Standard).
TYPE R
DS(on)
I
OUT
V
CC
VN800S VN800PT
135 m 0.7 A 36 V
ORDER CODES
PACKAGE TUBE T&R
SO-8 VN800S VN800S13TR PPAK VN800PT VN800PT13TR
SO-8 PPAK
BLOCK DIAGRAM
UNDERVOLTAGE
OVERTEMPERATURE
GND
INPUT
OUTPUT
OVERVOLTAGE
CURRENT LIMITER
LOGIC
DRIVER
Power CLAMP
STATUS
V
CC
CLAMP
DETECTION
DETECTION
DETECTION
(*) See note at page 7
V
CC
Page 2
2/21
VN800S / VN800PT
ABSOLUTE MAXIMUM RATI NG
CONNECTION DIAGRAM (TOP VIEW)
CURRENT AND VOLTAGE CONVENTIONS
Symbol Parameter
Value
Unit
SO-8 PPAK
V
CC
DC Supply Voltag e 41 V
- V
CC
Reverse DC Supply Voltage - 0.3 V
- I
GND
DC Reverse Ground Pin Current - 200 mA
I
OUT
DC Output Current Internally Limited A
- I
OUT
Reverse DC Output Current - 6 A
I
IN
DC Input Current +/- 10 mA
V
IN
Input Vol t age Range -3/+V
CC
V
V
STAT
DC Status Vol tage + V
CC
V
V
ESD
Electro static Discharge (H um an Body Model: R=1.5K; C=100p F)
- INPU T
- STATUS
- OUTPU T
- V
CC
4000 4000 5000 5000
V V V V
P
tot
Powe r Dissip at ion TC=25°C 4.2 41.7 W
E
MAX
Maximum Switching Energy (L=77.5mH; R
L
=0; V
bat
=13.5V ; T
jstart
=150ºC ; IL=1.5A)
121 mJ
E
MAX
Maximum Switching Energy (L=125mH; R
L
=0; V
bat
=13.5V; T
jstart
=150ºC; IL=1.5A)
195 mJ
T
j
Junction Operati ng Temperature Internally Limit ed °C
T
c
Case Operating Temperature - 40 to 150 °C
T
stg
Storage Temperature - 55 to 150 °C
L
max
Max Induc ti ve Load (VCC=30V; I
LOAD
=0.5A; T
amb
=100°C;
Rth
case>ambient
25°C/W)
2H
1
V
CC
V
CC
OUTPUT OUTPUT
N.C.
GND
STATUS INPUT
1
4
5
8
5 4 3 2 1
STATUS
OUTPUT
GND
INPUT
V
CC
SO-8 PPAK
INPUT
I
S
I
IN
V
IN
V
CC
STATUS
I
STAT
V
STAT
GND
V
CC
I
OUT
V
OUT
I
GND
OUTPUT
Page 3
3/21
VN800S / VN800PT
THERMAL DATA
(*) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area ( at least 35µ thick) connected to all VCC pins. (**) When mounted on FR4 printed circuit board with 0.5 cm
2
of copper area ( at least 35µ thick).
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified)
POWER
SWITCHING (VCC=24V)
INPUT PIN
Symbol Parameter
Value
Unit
SO-8 PPAK
R
thj-case
Thermal R esistanc e Junctio n-case
Max
-3°C/W
R
thj-lead
Thermal R esistanc e Junctio n-lead
Max
30 - °C/W
R
thj-amb
Thermal R esistanc e Junctio n-ambient
Max
93 (*) 78 (**) °C/W
Symbol Parameter Test Conditions Min Typ Max Unit
V
CC
Operating Supply Voltage 5.5 36 V
V
USD
Undervolt age Shut- down 3 4 5.5 V
V
OV
Overvolt age Shut-down 36 42 V
R
ON
On State Resistance
I
OUT
=0.5A; Tj=25°C
I
OUT
=0.5A
135 270
m m
I
S
Supply Current
Off State; V
CC
=24V; T
case
=25°C
On State; V
CC
=24V
On State; V
CC
=24V; T
case
=100°C
10
1.5
20
3.5
2.6
µA mA mA
I
LGND
Output Current at turn-off
V
CC=VSTAT=VIN=VGND
=24V
V
OUT
=0V
1mA
I
L(off1)
Off State Output Current VIN=V
OUT
=0V 0 50 µA
I
L(off2)
Off State Output Current VIN=V
OUT
=0V; Vcc=13V; Tj =125°C 5 µA
I
L(off3)
Off State Output Current VIN=V
OUT
=0V; Vcc=13V; Tj =25°C 3 µA
Symbol Parameter Test Conditions Min Typ Max Unit
t
d(on)
Turn-on Delay Time
RL=48from VIN rising edge to V
OUT
=2.4V
10 µs
t
d(off)
Turn-off Delay Time
RL=48from VIN falli ng edge to V
OUT
=21.6V
40 µs
dV
OUT
/
dt
(on)
Turn-on Voltage Slope
RL=48from V
OUT
=2.4V to
V
OUT
=19.2V
See
relativ e
diagram
V/µs
dV
OUT
/
dt
(off)
Turn-off Volta ge Slope
RL=48from V
OUT
=21.6V to
V
OUT
=2.4V
See
relative
diagram
V/µs
Symbol Paramete r Test Conditions Min Typ Max Unit
V
INL
Input Low Level 1.25 V
I
INL
Low Leve l Input Curr ent VIN=1.25V 1 µA
V
INH
Input High Level 3.25 V
I
INH
High Level Input Current VIN=3.25V 10 µA
V
I(hyst)
Input Hysteres is Voltag e 0.5 V
I
IN
Input Current VIN=VCC=36V 200 µA
1
Page 4
4/21
VN800S / VN800PT
2
ELECTRICAL CHARACTERISTICS (continued) STATUS PIN
PROTECTIONS
Symbol Parameter Test Conditions Min Typ Max Unit
V
STAT
Status Low Output Voltage I
STAT
=1.6 mA 0.5 V
I
LSTAT
Status Leakage Current Normal Operation; V
STAT=VCC
=36 V 10 µA
C
STAT
Status Pin Input Capacitance
Normal Operation; V
STAT
= 5V 30 pF
Symbol Parame ter Test Conditi ons Min Typ Max Unit
T
TSD
Shut-down Temperature 150 175 200 °C
T
R
Reset Temp erature 135 °C
T
hyst
Ther ma l Hy steresis 7 15 °C
T
SDL
Status Delay in Overload Condition
T
j>Tjsh
20 µs
I
lim
DC Short Circuit Current VCC=24V; R
LOAD
=10m 0.7 2 A
V
demag
Turn-off Output Clamp Voltage
I
OUT
=0.5 A; L=6mH VCC-47 VCC-52 VCC-57 V
OVERTEMP STATUS TIMING
Tj>T
jsh
V
IN
V
STAT
t
SDL
t
SDL
Page 5
5/21
VN800S / VN800PT
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10%
t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
V
IN
t
t
90%
Switching time Waveforms
TRUTH TABLE
CONDITIONS INPUT OUTPUT STATUS
Normal Operation
L
H
L
H
H H
Current Limitation
L H H
L X X
H
(T
j
< T
TSD
) H
(T
j
> T
TSD
) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X X
Overvoltage
L
H
L
L
H H
Page 6
6/21
VN800S / VN800PT
Figur e 1: Peak Short Circuit Current Test Circuit
Figur e 2: Avalanche Energy Test Circuit
10k
CONTROL
UNIT
R
IN
INPUT
GND
OUTPUT
R
L
=10m
+V
CC
GND
STATUS
10k
CONTROL
UNIT
R
IN
INPUT
GND
OUTPUT
LOAD
+V
CC
GND
STATUS
V
CC
V
CC
Page 7
7/21
VN800S / VN800PT
GND PROTECTION NETWORK AGAINST REVERSE BATTERY
Soluti on 1: Resistor in the ground line (R
GND
only). This
can be us ed with any t ype of load . The fo llow ing is an indica tion on how to di mension the
R
GND
resistor.
1) R
GND
600mV / (I
S(on)ma x
).
2) R
GND
≥ (−VCC) / (-I
GND
)
where -I
GND
is the DC re vers e grou nd pi n cu rren t an d can
be found in the absolute maximum rating section of the
device’s datasheet. Power Dissipation in R
GND
(when VCC<0: during reverse
battery situations) is: P
D
= (-VCC)2/R
GND
This resistor can be shared amongst several different HSD. Please note tha t t h e va l u e of this resis t o r sh ould be calcul ated with form ula (1) wher e I
S(on)max
becomes t he sum of the maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not common with the device ground then the R
GND
will
produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices hav e to share the sa me resisto r then the ST suggests to utiliz e Solu tio n 2 (se e below ).
Solution 2:
A diode (D
GND
) in the gro und line.
A resistor (R
GND
=1kΩ) should be inserted in parallel to
D
GND
if the devi ce will be driving an inducti ve load.
This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network wi ll produce a shift (
j
600mV) in t he input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor net work.
µC I/Os PROTECTION:
If a ground protection network is used and negative transients are present on the V
CC
line, th e con trol p ins will
be pulled negative. ST suggests to insert a resistor (R
prot
)
in lin e to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the
leakage c urrent of µC an d the current required by the HSD I/Os ( Input le vels comp atibilit y) wi th the lat ch-up li mit of µC I/Os.
-V
CCpeak/Ilatchup
R
prot
(V
OHµC-VIH-VGND
) / I
IHmax
Calculation example: For V
CCpeak
= - 100V an d I
latchup
20mA; V
OHµC
4.5V
5k R
prot
65k.
Recommended R
prot
value is 10kΩ.
APPLICATION SCHEMATIC
V
CC
INPUTn
GND
STATUSn
OUTPUTn
Volt. Reg
BUS ASIC
Control & Diagnostic I/O
5V
24VDC
V
CC
DGND
VGND
RGND
Rprot
Rprot
LOAD
R
L
Page 8
8/21
VN800S / VN800PT
STATUS
INPUT
NORMAL OPERATION
UNDERVOLTAGE
V
CC
V
USD
V
USDhyst
INPUT
OVERVOLTAGE
V
CC
VCC>V
OV
STATUS
INPUT
STATUS
undefined
Figure 3: Waveforms
LOAD VOLTAGE
V
CC<VOV
LOAD VOLTAGE
LOAD VOLTAGE
OVERTEMPERATURE
INPUT
STATUS
T
TSD
T
R
T
j
LOAD CURREN T
Page 9
9/21
VN800S / VN800PT
High Level Input Current
Status Leakage Current
Off State Output Current
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
1
2
3
4
5
6
7
8
Iih (µA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Ilst at (µA)
Vstat=Vcc=36V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
IL(off1) (µA)
Off state Vcc=36V
Vin=Vout=0V
On State Resistance Vs T
case
On State Resistance Vs V
CC
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
Ron (mOhm)
Iout=0.5A
Vcc=8V; 13V; 36V
5 10152025303540
Vcc (V)
0
50
100
150
200
250
300
350
400
Ron (mOhm)
Iout=0.5A
Tc= - 40ºC
Tc= 25ºC
Tc= 150ºC
I
LIM
Vs T
case
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
Ilim (A)
Vcc=24V
Rl=10mOhm
Page 10
10/21
VN800S / VN800PT
1
Input Hysteresis Voltage
Input Low LevelInput High Level
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil (V)
-50 -25 0 25 50 75 100 1 25 150 175
Tc (°C)
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
Overvoltage Shutdown
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
Turn-on Voltage Slope Turn-off Voltage Slope
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
200
400
600
800
1000
1200
1400
1600
dVout/dt(on) (V/ms)
Vcc=24V
Rl=48Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
dVout/dt(off) (V/ms)
Vcc=24V
Rl=48Ohm
Page 11
11/21
VN800S / VN800PT
PPAK Maximum turn off current versus load inductance
A = Single Pulse at T
Jstart
=150ºC
B= Repetitive pulse at T
Jstart
=100ºC
C= Repetitive Pulse at T
Jstart
=125ºC
Conditions: VCC=13.5V
Values are generated with RL=0 In case of repetitive pulses, T
jstart
(at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, I
L
t
Demagnetization
Demagnetization
Demagnetization
0.1
1
10
1 10 100 1000
L(mH)
I
LMAX (A)
A
B C
Page 12
12/21
VN800S / VN800PT
SO-8 Maximum turn off current versus load inductance
A = Single Pulse at T
Jstart
=150ºC
B= Repetitive pulse at T
Jstart
=100ºC
C= Repetitive Pulse at T
Jstart
=125ºC
Conditions: VCC=13.5V
Values are generated with RL=0 In case of repetitive pulses, T
jstart
(at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, I
L
t
Demagnetization
Demagnetization
Demagnetization
0.1
1
10
1 10 100 1000
L(mH)
I
LMAX (A)
A
B C
Page 13
13/21
VN800S / VN800PT
SO-8 PC Board
R
thj-amb
Vs PCB copper area in open box free air condition
SO-8 THERMAL DATA
Layout condition of Rth and Zth measurements (PCB FR 4 area= 58mm x 58mm, PCB thi ckness=2mm, Cu thickness=35µm, Copper areas: 0.14cm
2
, 2cm2).
70
75
80
85
90
95
100
105
110
00.511.522.5
PCB Cu heatsink area (cm^2)
RTHj_amb (ºC/W)
SO8 at 2 pins connected to TAB
Page 14
14/21
VN800S / VN800PT
PPAK PC Board
R
thj-amb
Vs PCB copper area in open box free air condition
PPAK THERMAL DATA
Layout condition of Rth and Zth measurements (PCB FR 4 area= 60mm x 60mm, PCB thi ckness=2mm, Cu thickness=35µm, Copper areas: 0.44cm
2
, 8cm2).
0
10
20
30
40
50
60
70
80
90
0246810
PCB Cu heatsink area (cm^2)
RTHj_amb
(ºC/W)
Page 15
15/21
VN800S / VN800PT
Thermal fitting model of a single channel HSD in SO-8
Pulse calculation formula
Thermal Parameter
Area/island (cm2)0.142
R1 (°C/W) 0.24 R2 (°C/W) 1.2 R3 ( °C/W) 4.5 R4 (°C/W) 21 R5 (°C/W) 16 R6 (°C/W) 58 28 C1 (W.s/°C) 0.00015 C2 (W.s/°C) 0.0005 C3 (W.s/°C) 7.50E-03 C4 (W.s/°C) 0.045 C5 (W.s/°C) 0.35 C6 (W.s/°C) 1.05 2
Z
THδ
RTHδ Z
THtp
1 δ()+=
where
δ tpT=
SO-8 Thermal Impedance Junction Ambient Single Pulse
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 1 0 100 1000 Time (s)
ZTH ( ° C/W )
0.5 cm
2
2 cm
2
Page 16
16/21
VN800S / VN800PT
Thermal fitting model of a single channel HSD in PPAK
Pulse calculation formula
Thermal Parameter
Area/island (cm2)0.446
R1 (°C/W) 0.04 R2 (°C/W) 0.25 R3 ( °C/W) 0.3 R4 (°C/W) 2 R5 (°C/W) 15 R6 (°C/W) 61 24 C1 (W.s/°C) 0.0008 C2 (W.s/°C) 0.007 C3 (W.s/°C) 0.02 C4 (W.s/°C) 0.3 C5 (W.s/°C) 0.45 C6 (W.s/°C) 0.8 5
Z
THδ
RTHδ Z
THtp
1 δ()+=
where
δ tpT=
PPAK Thermal Impedance Junction Ambient Single P ulse
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000 Time ( s)
ZTH (°C/W)
0.44 cm
2
6 cm
2
Page 17
17/21
VN800S / VN800PT
DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033
b 0.3 5 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ .)
D 4.8 5 0.188 0.196
E
5.8
6.2 0.228 0.244
e 1.27 0.050 e3 3.81 0.150
F 3.8 4 0.14 0.157
L 0 .4 1.27 0.015 0.05 0
M 0.6 0.023
S 8 (max.) L1 0.8 1.2 0.031 0.047
SO-8 MECHANICAL DATA
Page 18
18/21
VN800S / VN800PT
DIM. MIN. TYP MAX.
A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23
B 0.40 0.60 B2 5.20 5.40
C 0.45 0.60 C2 0.48 0.60 D1 5.1
D 6.00 6.20
E 6.40 6.60
E1 4.7
e1.27
G 4.90 5.25 G1 2.38 2.70
H 9.35 10.10
L2 0.8 1.00 L4 0.60 1.00
R0.2 V2
Packag e Weight Gr. 0.3
PPAK MECHANICAL DATA
P032T1
Page 19
19/21
VN800S / VN800PT
SO-8 TUBE SHIPMENT (no suffix)
All dimensions ar e in mm.
Base Q.ty 100 Bulk Q.ty 2000 Tube length (± 0.5) 532
A 3.2 B 6 C (± 0.1) 0.6
TAPE AND REEL SHIPMENT (suffix “1 3TR”)
All dimensions ar e in mm.
Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± 0.2) 13
F 20.2 G (+ 2 / -0) 12.4 N (min) 60 T (max) 18.4
TAPE DIMENSIONS
According to Elec tronic Industries Association (EIA) S tandard 481 rev. A , Feb 1986
All dimensions ar e in mm.
Tape width W 12 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 8 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 5.5 Compartment Depth K (max) 4.5 Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets saled with cover tape.
User direction of feed
REEL DIMENSIONS
C
B
A
Page 20
20/21
VN800S / VN800PT
PPAK TUBE SHIP MENT (no suffix)
1
All dimensions are in mm.
Base Q.ty 75 Bulk Q.ty 3000 Tube length (± 0.5) 532
A 6 B 21.3 C (± 0.1) 0.6
TAPE AND REEL SHIPMENT (suffix “1 3TR”)
All dimensions ar e in mm.
Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± 0.2) 13
F 20.2 G (+ 2 / -0) 16.4 N (min) 60 T (max) 22.4
TAPE DIMENSIONS
According to Elec tronic Industries Association (EIA) S tandard 481 rev. A , Feb 1986
All dimensions ar e in mm.
Tape width W 16 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 8 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 7.5 Compartment Depth K (max) 6.5 Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets saled with cover tape.
User direction of feed
REEL DIMENSIONS
A
C
B
Page 21
21/21
VN800S / VN800PT
Information furnished is believed to be ac c ur ate and reliab le. However, STMicroel ec tronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or oth er wise under any pa tent or patent rights of STMicroelectronics. Specifications m entioned in this publication are subject to c hange without notice. This publication supersedes an d r eplaces all information p r ev iously suppl ied. STMicroelectronics pr oducts are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STM ic r oelectronics
2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia -
Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
Loading...