Datasheet VN771 Datasheet (SGS Thomson Microelectronics)

Page 1
VN771
QUAD SMART POWER SOLID STATE RELAY
FOR COMPLETE H-BRIDGE CONFIGURATIONS
TYPE R
VN77 1 0.140 14 A 26 V
* Total resistance of one side in bridge configuration
IDEAL AS A LOW VOLTAGEBRIDGE
VERYLOW STAND-BYPOWER
DS(on)
OUT
V
CC
DISSIPATION
OVER-CURRENTPROTECTED
STATUSFLAG DIAGNOSTICSON UPPER
SIDE
OPENDRAIN DIAGNOSTICS OUTPUT
UNDER-VOLTAGEPROTECTION
SUITABLEAS QUADSWITCH
DESCRIPTION
The VN771 is a device formed by three monolithic chips housed in a standard SO-28 package: a double high side and two Power MOSFETs. The double high side are made using STMicroelectronics VIPower technology; Power MOSFETs are made by using the new advanced strip lay-out technology This device is suitable to drive a DC motor in a bridge configurationas well as to be used as a quad switch for any low voltage application. The dual high side switches have built-in thermal shut-down to protect the chip from over temperature and short circuit, status output to provide indication for open load in off and on state, overtemperature conditions and stuck-onto V
CC
. DUALHIGH-SIDESWITCH From the falling edge of the input signal, the
status output, initially low to signal a fault condition (overtemperature or open load on-state), will go back to a high state with a different delay in case of overtemperature (tpovl) and in case of open open load (
) respectively.
tpol
This feature allows to discriminate the nature of the detected fault. To protect the device against short circuit and over current condition, the thermal protection turns the integrated Power
SO-28
MOS off at a minimum junction temperature of
o
C. When this temperature returns to 125oC
140 the switch is automatically turned on again. In short circuit the protection reacts with virtually no delay, the sensor (one for each channel) being locatedinside each of the two Power MOS areas. This positioning allows the device to operate with one channel in automatic thermal cycling and the other one on a normal load. An internal function of the devices ensures the fast demagnetization of inductive loads with a typical voltage (V
demag
of -18V. This function allows to greatly reduces the power dissipationaccordingto the formula:
P
dem
=0.5L
load
(I
load
)2• [(VCC+V
demag
)/V
demag
] f
wheref = switching frequencyand V
= demagnetizationvoltage.
demag
In this device if the GND pin is disconnected,with V
not exceeding 16V, both channel will switch
CC
off. PowerMOSFETs
During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The devices can be used as a switchfrom DC to very high frequency.
)
October 1998
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VN771
BLOCK DIAGRAM
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Page 3
CONNECTION DIAGRAM
VN771
PIN FUNCTION
No NAME FUNCTI O N
1, 3, 2 5 , 28 DRAI N 3 Drain of Switch 3 ( low-sid e switc h )
2 INPUT 3 Input o f Swit ch 3 (l ow-side s wit ch)
4, 11 N.C. Not Con nected
5, 10, 19, 24 V
6 GND Ground of Swit c h es 1 and 2 (h igh - si de swit ches ) 7 IN PUT 1 Input of S witch 1 (h igh- s ide sw it ch) 8 DIAGNOSTIC Diagnostic of Switches 1 and 2 (high-side switches) 9 IN PUT 2 Input of S witch 2 (h igh- s ide sw it ch)
12, 14, 15, 1 8 DRAIN 4 Drain of Switch 4 ( low-sid e switc h )
13 INPUT 4 Input o f Swit ch 4 (l ow-side s wit ch) 16, 17 SOURCE 4 Source of Switch 4 (low-side switch) 20, 21 SOURCE 2 Source of Switch 2 (high-side swi tch ) 22, 23 SOURCE 1 Source of Switch 1 (high-side swi tch ) 26, 27 SOURCE 3 Source of Switch 3 (low-side switch)
CC
Drain of Switches 1a nd 2 ( h igh-side sw itches) and Pow er S upply V olt age
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Page 4
VN771
PROTECTION CIRCUITS
DUALHIGH SIDE SWITCH The simplest way to protect the device against a
continuous reverse battery voltage (-26V) is to insert a a smallresistor between pin 2 (GND) and ground. The suggested resistance value is about 150. In any case the maximumvoltage drop on this resistor should not overcome 0.5V.
If there is no need for the control unit to handle external analog signals referred to the power GND, the best approach is to connect the reference potential of the control unit to the device ground (see application circuit in fig. 3), which becomes the common signal GND for the whole control board avoiding shift of V V
.
stat
TRUTH TABLE (for Dual high-sideswitch only)
INP U T 1 INP UT 2 SO URC E 1 SO UR CE 2 DIAGNOSTIC
Normal O peration L
H
L
H Under - voltag e X X L L H Ther mal S h utdow n
Channel 1 Channel 2
Open Load
Channel 1
Channel 2
Out put Shorted to V
CC Channel1
Channel 2
NOTE: The low-side switches have the fault feedback which canbe detected by monitoring the voltage at the input pins. L = Logic LOW, H= Logic HIGH, X = Don’t care
HXLX L
XHXL L
H
L
X
L
H
L
X
L
L H H
L
X
L H
L X
L H
L
L
H
L
H
H
L
X
L
H H
X
L
L H H
L
X
L H
L X
L H
H
ih,Vil
H H H H
L L
L L
L L
L L
and
ABSOLUTEMAXIMUM RATING (-40oC<Tj< 150oC) HIGH SIDESWITCH
Symbol Para met e r Val u e Uni t
V
4/10
(BR)DSS
I
OUT
I
I
-V I
STAT
V
ESD
P
T
T
Drain-Sou rc e B rek d own Volt a ge 40 V Out put Current ( conti nuou s ) 14 A Reverse Output Current -14 A
R
Input Curren t ±10 m A
IN
Reverse Supply Curren t -4 V
CC
Status Current ±10 mA Electrostatic Discharge (C = 100 pF, R = 1.5 K) Power Dissipation @ Tc=25oC Int er na lly Limit e d W
tot
Junction Op er ating Temp erature -40 t o 150
j
St orage T emper at u r e -55 t o 150
stg
2000 V
o
C
o
C
Page 5
VN771
ABSOLUTEMAXIMUM RATING (continued)
LOW SIDE SWITCH
Symbol Para met e r Val u e Uni t
V
V
DGR
V
I I
I
DM(*)
dv/dt (1) Peak Diode Recovery Voltage Slope 7 V/ns
T
T
THERMALDATA
R
thj-case
R
thj-case
R
thj- amb
Drain-Sou rc e Voltage ( VGS=0) 60 V
DS
Drain-Gat e Vol t age (RGS = 20 K) Gate- Source Voltage ±20 V
GS
Drain Cur rent (con t inuous ) @ Tc=25oC36A
D
Drain Cur rent (con t inuous ) @ Tc=100oC24A
D
60 V
Drain Cur rent (pul sed) 144 A
St orage T emper at u r e -55 t o 150
stg
Oper ating Junc t ion Tempera t ure -40 t o 150 W/oC
j
Ther mal Res is t an ce Junc t io n- ca s e (High - side sw it ch) Max Ther mal Res is t an ce Junc t io n- ca s e (Low- s id e switc h) M ax Ther mal Res is t an ce Junc t io n- ambient Max
20 20 60
o
o
C/W
o
C/W
o
C/W
C
ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH
(8 <V
< 16 V; -40 Tj≤ 125oCunless otherwise specified)
CC
POWER
Symbol Parameter Test Cond ition s Min. Typ. Max. Unit
V
In(*) Nominal Current
R
I
V
DS(MAX)
R
Supply Volt a ge 6 13 26 V
CC
=85oCV
T
c
On State R es istance I
on
Supply Cur re nt Of f St at e Tj=25oCVCC=13V 35 100 µA
S
Maximum Volt a ge Drop I Out put t o G ND int er nal
i
OUT=InVCC
=13A Tj=85oCVCC=13V 1.2 2 V
OUT
Tj=25oC51020K
0.5 VCC=13V
DS(on)
=13V Tj=25oC 0.065 0.1
3.4 5.2 A
Im ped ance
SWITCHING
Symbol Parameter Test Cond ition s Min. Typ. Max. Unit
t
(^) Turn-on Delay Time Of
d(on)
Out put Current
(^) Ri se Tim e Of Output
t
r
Current
(^) Turn-o f f Delay Time O f
t
d(off)
Out put Current
(^) Fall Time Of Output
t
f
Current
=2.7
R
out
=2.7 28 110 360
R
out
=2.7 10 140 500
R
out
=2.7 28 75 360
R
out
535200µs
µs
µs
µs
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VN771
ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH (continued)
(di/dt)onTurn-on Current Slope (di/dt)
Turn-off Current Sl ope
off
=2.7 0.003 0. 1 A /
R
out
=2.7 0.005 0. 1 A /
R
out
LOGIC INPUT
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
V
Input Low Level
IL
1.5 V
Voltage
V
Input High Lev el
IH
3.5 (•)V
Voltage
V
I(hyst.)
Input Hyster esis
0.2 0.9 1.5 V
Voltage
I
V
Input Current VIN=5V Tj=25oC30100µA
IN
Input Clamp Voltage IIN=10mA
ICL
=-10mA
I
IN
56
-0.7
7V
PROTECTION AND DIAGNOSTICS
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
V
STAT
V
USD
V
SCL
T
TSD
T
SD(hyst.)
T
V
I
t
povl
t
(*) In= Nominal current according to ISO definition for high side automotive switch (see note 1) (^) See switching time waveform () The V exceed 10 mA at the input pin. note 1: The Nominal Current is the current at T note 2: I note 3: t
Status Voltage Output
I
=1.6mA 0.4 V
ST AT
Low Under Volt age Shut
3.5 4.5 6 V
Down Status Clam p Voltage I
Thermal Shut-down
ST AT
I
ST AT
=10mA =-10mA
56
-0.7
140 160 1 80
7V
Tem perature Thermal Shut-down
50
Hysteresis Reset Tem per a tu r e 125
R
Open V o lt age Level Off-State (no t e 2 ) 2.5 4 5 V
OL
Open Load Curren t
OL
On-State 0.6 0.9 1.4 A
Level Status Dela y (note 3) 5 10 µs
Status Dela y (note 3) 50 500 2500 µ s
pol
is internally clampedat6V about. Itis possible to connect this pin to an higher voltage via an external resistor calculated to not
IH
=85oC forbattery voltage of 13V which produces a voltage drop of 0.5 V
=(VCC-VOL)/R
OL(off)
: ISO definition
povltpol
OL
c
µs µs
V
V
o
C
o
C
o
C
ELECTRICAL CHARACTERISTICS FOR LOW SIDE SWITCH
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Page 7
VN771
(T
=25oC unless otherwisespecified)
case
OFF
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
V
(BRDSS)
Drain-source
=250µAVGS=0
I
D
Brekdown Voltage
=0)
V
= Max R at ing
DS
= Max R at ing , TC=125oC
V
DS
= ± 20 V
V
GS
I
DSS
I
GSS
Zero Gate Voltage Drain Curren t (V
GS
Gate-Body Leaka ge Current (V
DS
=0)
ON ()
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
V
GS(th )
R
DS(on)
I
D(on)
Gate Threshold Voltage
Static Drain-Sou rc e On Resistance
On State Drain Current (V
DS
=0)
V
DS=VGSID
=250µA
VGS=10V ID=18A 0.032 0.04
V
DS>ID(on)xRDS(on) ma x
VGS=10V
60 V
1
10
± 100 nA
12.5V
36 A
µA µA
DYNAMIC
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
g
()Forward
fs
VDS>I
D(on)xRDS(on) ma xID
= 18A 7 S
Transconductance
C
C
C
Input Capac it ance
iss
Outp ut C apac itance
oss
Revers e Transfer
rss
VDS=25V f=1MHz VGS= 0 2115
260
65
2800
350
90
Capacit an c e
SWITCHING-ON (**)
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
t
d(on)
t
r
(di/dt)
Q
Q
gs
Q
gd
Turn-on Tim e Rise T i m e
Turn-on Current Slope VDD=48V ID=36A
on
Total Gate Charge
g
Gate-Source Charge
VDD = 30 V ID=18A
=4.7Ω VGS=10V
R
G
=47Ω VGS=10V
R
G
VDD=48V ID=36A
=10V
V
GS
Gate-Drain C harge
28 85
250 A/µs
50 13 18
40
115
70 nC
SWITCHING-OFF
Symb o l P a ramete r Test Cond iti ons Min. T yp. Ma x. Un it
t
r(Voff)
t t
Off -Voltage Rise Time Fall Time
r
Cross -O ver T i m e
c
VDD=48V ID=36A
=4.7Ω VGS=10V
R
G
12 25 40
16 35 55
pF pF pF
ns ns
nC nC
ns ns ns
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Page 8
VN771
ELECTRICAL CHARACTERISTICS FOR DUAL LOW SIDE SWITCH (continued)
SOURCE-DRAINDIODE
Symb ol Param et e r Test Con d i ti ons Min. Typ . Max. Un it
I
SD
I
SDM
V
SD
t
Q
I
RRM
() Pulsed: Pulse duration = 300 µs, dutycycle 1.5 % (∗∗) Pulse width limited by Safe Operating Area.
Source-Drain C urrent
(∗∗)
Source-Drain C urrent
36
144
(pulsed)
() For war d On Vol t age ISD=36A VGS=0 1.5 V
Reverse Recover y
rr
Time Reverse Recover y
rr
=36A, di/dt=100A/µs
I
SD
=30V Tj=150oC
V
r
75
245 Charge Reverse Recover y
6.5
Current
A A
ns
nC
A
TYPICALAPPLICATION DIAGRAM
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Page 9
SO-28 MECHANICAL DATA
VN771
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.65 0.104
a1 0.10 0.30 0.004 0.012
b 0.35 0.49 0.013 0.019
b1 0.23 0.32 0.009 0.012
C 0.50 0.020
c1 45 (typ.)
D 17.7 18.1 0.697 0.713 E 10.00 10.65 0.393 0.419
e 1.27 0.050
e3 16.51 0.650
F 7.40 7.60 0.291 0.299
L 0.40 1.27 0.016 0.050
S 8 (max.)
mm inch
0016572
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VN771
Information furnished is believed to beaccurate and reliable. However, STMicroelectronics assumes noresponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject tochange without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1998 STMicroelectronics – Printed in Italy – All Rights Reserved
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