Datasheet UMA1021M-C2, UMA1021M-C1 Datasheet (Philips)

DATA SH EET

Product specification
Supersedes data of 1996 Aug 28
File under Integrated Circuits, IC17

1999 Jun 17

INTEGRATED CIRCUITS

UMA1021M

Low-voltage frequency synthesizer
for radio telephones

1999 Jun 17 2

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

FEATURES

• Low phase noise

• Low current from 3 V supply

• Fully programmable main divider

• 3-line serial interface bus

• Independent fully programmable reference divider,

driven from external crystal oscillator

• Dual charge pump outputs

• Hard and soft power-down control.

APPLICATIONS

• 900 MHz and 2 GHz mobile telephones

• Portable battery-powered radio equipment.

GENERAL DESCRIPTION

The UMA1021M BICMOS device integrates a prescaler,
programmable dividers, and a phase comparator to
implement a phase-locked loop.

The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.

The synthesizer operates at RF input frequencies up to

2.2 GHz, with a fully programmable reference divider.
All divider ratios are supplied via a 3-wire serial
programming bus.

Separate power and ground pins are provided to the
analog (charge-pump) and digital circuits. The ground
leads should be externally short-circuited to prevent large
currents flowing across the die and thus causing damage.
V

DD1

and V

DD2

must also be at the same potential (VDD).
VCC must be equal to or greater than VDD(e.g. VDD=3V
and VCC= 5 V for wider VCO control voltage range).

The phase detector has two charge-pump outputs, CP and
CPF, the latter of which is enabled directly at pin FAST.
This permits the design of adaptive loops. The charge
pump currents (phase detector gain) are fixed by an
external resistance at pin I

SET

and via the serial interface.
Only a passive loop filter is necessary; the charge pumps
function within a wide voltage compliance range to
improve the overall system performance.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DD

digital supply voltage V

DD1=VDD2

;

VCC≥ V

DD

2.7 − 5.5 V

V

CC

charge-pump supply voltage VCC≥ V

DD

2.7 − 5.5 V

I

DD+ICC

supply current − 10 − mA

I

CC(pd)+IDD(pd)

total supply current in power-down mode − 5 −µA

f

RF

RF input frequency 300 − 2200 MHz

f

xtal

crystal reference input frequency 3 − 35 MHz

f

PC

phase comparator frequency − 200 − kHz

T

amb

operating ambient temperature −30 − +85 °C

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

UMA1021M SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1

1999 Jun 17 3

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MBG366

FAST CHARGE

PUMP

CHARGE PUMP

PHASE COMPARATOR

MAIN DIVIDER

WITH

PRESCALER

REFERENCE

DIVIDER

SERIAL INTERFACE

BAND GAP

1

2

3

6

8
9

10 7 5 17

13
12

11

15

16

20

19

UMA1021M

14 4 18

FAST

CPF

CP

V

DD1

V

SS3

RFI

V

SS2

POL

PON

V

SS1

LOCK

I

SET

V

CC

GND(CP)

XTALA
XTALB

V

DD2

E
DATA
CLK

1999 Jun 17 4

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

PINNING

SYMBOL PIN DESCRIPTION

FAST 1 enable input for fast charge-pump

output CPF
CPF 2 fast charge-pump output
CP 3 normal charge-pump output
V

DD2

4 power supply 2

V

SS3

5 ground 3
RFI 6 2 GHz main divider input
V

SS2

7 ground 2
POL 8 digital input to select polarity of

power-on inputs (PON and sPON):
POL = 0 for active LOW and

POL = 1 for active HIGH
PON 9 power-on input
V

SS1

10 ground 1
CLK 11 programming bus clock input
DATA 12 programming bus data input
E 13 programming bus enable input
V

DD1

14 power supply 1
XTALB 15 complementary crystal frequency

input from TCXO; if not used should
be decoupled to ground

XTALA 16 crystal frequency input from TCXO;

if not used should be decoupled to

ground
GND(CP) 17 ground for charge-pump
V

CC

18 supply for charge-pump

I

SET

19 external resistor from this pin to

ground sets the charge-pump

currents
LOCK 20 out-of-lock detector output

Fig.2 Pin configuration.

handbook, halfpage

UMA1021M

MBG365

1
2
3
4
5
6
7
8
9

10

20
19
18
17
16
15
14
13
12
11

FAST

CPF

CP

V

DD2

V

SS3

RFI

V

SS2

POL

PON

V

SS1

LOCK
I

SET

V

CC
GND(CP)
XTALA

XTALB
V

DD1
E

DATA
CLK

FUNCTIONAL DESCRIPTION
Main divider

The main divider is clocked at pin RFI by the RF signal
which is AC-coupled from an external VCO. The divider
operates with signal levels from 50 to 225 mV (RMS), and
at frequencies from 300 MHz to 2.2 GHz. It consists of a
fully programmable bipolar prescaler followed by a CMOS
counter. Any divide ratios from 512 to 131071 inclusive
can be programmed.

Reference divider

The reference divider is clocked by the differential signal
between pins XTALA and XTALB. If only one of these
inputs is used, the other should be decoupled to ground.
The applied input signal(s) should be AC-coupled.
The circuit operates with levels from
50 up to 500 mV (RMS) and at frequencies from
3 to 35 MHz. Any divide ratios from 8 to 2047 inclusive
can be programmed.

1999 Jun 17 5

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

Phase detector

The phase detector is driven by the output edges of the
main and reference dividers. It produces current pulses at
pins CP and CPF whose amplitudes are programmed.
The pulse duration is equal to the difference in time of
arrival of the edges from the two dividers. If the main
divider edge arrives first, CP and CPF sink current. If the
reference divider edge arrives first, CP and CPF source
current.

The currents at CP and CPF are programmed via the serial
bus as multiples of a reference current set by an external
resistor connected between pin I

SET

and V

SS

(see Table 3). CP remains active except in power-down.
CPF is enabled via input pin FAST which is synchronized
with respect to the phase detector to prevent output
current pulses being interrupted. By appropriate
connection to the loop filter, dual bandwidth loops can be
designed; short time constant during frequency switching
(FAST mode) to speed-up channel changes, and low
bandwidth in the settled state to improve noise and
breakthrough levels.

Additional circuitry is included to ensure that the gain of the
phase detector remains linear even for small phase errors.

Out-of-lock detector

The out-of-lock detector is enabled (disabled) via the serial
interface by setting bit OOL HIGH (LOW). An open drain
transistor drives the output pin LOCK (pin 20). It is
recommended that the pull-up resistor from this pin to V

DD

is chosen to be of sufficient value to keep the sink current
in the LOW state to below 400 µA. When the out-of-lock
detector is enabled, LOCK is HIGH if the error at the phase
detector input is less than approximately 25 ns, otherwise
LOCK is LOW. If the out-of-lock detector is disabled,
LOCK remains HIGH.

Serial programming bus

A simple 3-line unidirectional serial bus is used to program
the circuit. The 3 lines are DATA, clock (CLK) and enable
(

E). The data sent to the device is loaded in bursts framed
byE. Programming clock edges and their appropriate data
bits are ignored untilE goes active LOW. The programmed
information is loaded into the addressed latch when E
returns HIGH.

During normal operation,

E should be kept HIGH. Only the
last 21 bits serially clocked into the device are retained
within the programming register. Additional leading bits
are ignored, and no check is made on the number of clock
pulses. The fully static CMOS design uses virtually no
current when the bus is inactive. It can always capture new
programmed data even during power-down.

When the synthesizer is powered-on, the presence of a
TCXO signal at the reference divider input and a VCO
signal at the main divider input is required for correct
programming.

Data format

The leading bits (dt16 to dt0) make up the data field, while
the trailing four bits (ad3 to ad0) are the address field.
The UMA1021M uses 4 of the 16 available addresses.
These are chosen for compatibility with other Philips
Semiconductors radio telephone ICs. The data format is
shown in Table 1. The first bit entered is dt16, the last bit
is ad0. For the divider ratios, the first bits entered (PM16
and PR10) are the most significant (MSB).

The trailing address bits are decoded on the rising edge of
E. This produces an internal load pulse to store the data in
the addressed latch. To avoid erroneous divider ratios,
the load pulse is not allowed during data reads by the
frequency dividers. This condition is guaranteed by
respecting a minimum E pulse width after data transfer.

The test register (address 0000) does not normally need to
be programmed. However if it is programmed, all bits in the
data field should be set to logic 0.

Power-down mode

The synthesizer is on when both the input signals PON
and the programmed bit sPON are active. The ‘active’ level
for these two signals is chosen at pin POL (see Table 2).
When turned on, the dividers and phase detector are
synchronized to avoid random phase errors. When turned
off, the phase detector is synchronized to avoid
interrupting charge-pump pulses. For synchronisation
functions to work correctly on power-up or power-down
(using either hardware or software programming), the
presence of TCXO and VCO signals is required to drive
the appropriate divider inputs. The UMA1021M has a very
low current consumption in the power-down mode.

1999 Jun 17 6

Philips Semiconductors Product specification

Low-voltage frequency synthesizer

for radio telephones

UMA1021M

Table 1 Bit allocation; note 1

Notes

1. X = don’t care.

2. The test register (address 0000) should not be programmed with any other values except all zeros for normal operation.

3. Bit sPON = software power-up for synthesizer (see Table 2); OOL = Out-Of-Lock (1 = enabled).

4. PM16 is the MSB of the main divider coefficient; PR10 is the MSB of the reference divider coefficient.

Table 2 Power-on programming

Table 3 Fast and normal charge pumps current ratio (note 1)

Note

1. I

SET

= ; reference current for charge pumps.

FIRST IN REGISTER BIT ALLOCATION LAST IN

DATA FIELD ADDRESS

dt16 dt15 dt14 dt13 dt12 dt11 dt10 dt9 dt8 dt7 dt6 dt5 dt4 dt3 dt2 dt1 dt0 ad3 ad2 ad1 ad0

Test bits

(2)

0000

X X X X OOL

(3)

X CR1 CR0 X X sPON

(3)

XXXXXX0001

PM16

(4)

main divider coefficient PM0 0100

X X X X X X PR10

(4)

reference divider coefficient PR0 0101

POL PON sPON SYNTHESIZER STATE COMPATIBILITY

0 0 0 on UMA1019M/UMA1019AM
0 1 X off UMA1019M/UMA1019AM
0 X 1 off UMA1019M/UMA1019AM
1 0 X off UMA1017M
1 X 0 off UMA1017M
1 1 1 on UMA1017M

CR1 CR0 I

CP

I

CPF

I

CPF:ICP

002×I

SET

8 × I

SET

4:1

012×I

SET

16 × I

SET

8:1

101×I

SET

12 × I

SET

12:1

111×I

SET

16 × I

SET

16:1

V

SET

R

SET

------------- -

1999 Jun 17 7

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices. This device meets class 2 ESD test
requirements [Human Body Model (HBM)], in accordance with

“MIL STD 883C - method 3015”

.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

digital supply voltage −0.3 +5.5 V

V

CC

charge-pump supply voltage −0.3 +5.5 V

V

CC

− V

DD

difference in voltage between VCC and V

DD

−0.3 +5.5 V

V

n

voltage at pins 6, 8, 9 and 11 to 13 −0.3 VDD+ 0.3 V
voltage at pins 1, 2, 3, 15, 16, 19 and 20 −0.3 V

CC

+ 0.3 V

∆V

GND

difference in voltage between any of GND(CP), V

SS1

, V

SS2

,

and V

SS3

(these pins should be connected together)

−0.3 +0.3 V

P

tot

total power dissipation − 150 mW

T

stg

storage temperature −55 +125 °C

T

amb

operating ambient temperature −30 +85 °C

T

j(max)

maximum junction temperature − 150 °C

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 120 K/W

1999 Jun 17 8

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

CHARACTERISTICS

All values refer to the typical measurement circuit of Fig.5; V

DD1=VDD2

= 2.7 to 5.5 V; VCC= 2.7 to 5.5 V; T

amb

=25°C;

unless otherwise specified. Characteristics for which only a typical value is given are not tested.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply; pins 4, 14 and 18

V

DD

digital supply voltage V

DD1=VDD2

; VCC≥ V

DD

2.7 − 5.5 V

V

CC

charge pump supply voltage VCC≥ V

DD

2.7 − 5.5 V

I

DD1+IDD2

synthesizer digital supply current VDD= 5.5 V − 7 9.5 mA

I

CC

charge pump supply current VCC= 5.5 V;

R

SET

= 5.6 kΩ

− 3 3.8 mA

I

CC(pd)+IDD(pd)

total supply current in
power-down mode

logic levels 0 V or V

DD

− 550µA

RF main divider input; pin 6

f

RF

RF input frequency 300 − 2200 MHz

V

RF(rms)

AC-coupled input signal level
(RMS value)

Rs=50Ω 50 − 225 mV

R

m

main divider ratio 512 − 131071

Z

i

input impedance (real part) fRF= 1 GHz − 1 − kΩ

f

RF

= 2 GHz − 60 −Ω

C

i

typical pin input capacitance fRF= 1 GHz − 1 − pF

f

RF

= 2 GHz − 1 − pF

Synthesizer reference divider input; pins 15 and 16

f

xtal

crystal reference input frequency 3 − 35 MHz

V

xtal(rms)

sinusoidal input signal level
between pins 15 and 16
(RMS value)

50 − 500 mV

R

ref

reference division ratio 8 2047

Z

i

input impedance (real part) f

xtal

= 13 MHz − 10 − kΩ

C

i

typical pin input capacitance f

xtal

= 13 MHz − 1.5 − pF

Phase detector

f

PCmax

maximum loop comparison
frequency

− 2000 − kHz

Charge pump current setting resistor input; pin 19

R

SET

external resistor connected
between pin 19 and ground

5.6 − 12 kΩ

V

SET

regulated voltage at pin 19 R

SET

= 5.6 kΩ−1.2 − V

1999 Jun 17 9

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

Charge pump outputs; pins 2 and 3; R

SET

= 5.6 kΩ

I

ocp(err)

charge pump output current error −25 − +25 %

I

match

sink-to-source current matching −±5− %

I

LIcp

charge pump off leakage current V

CP/CPF

=1⁄2V

CC

−5 ±1+5 nA

V

CP/CPF

charge pump voltage compliance 0.4 − VCC− 0.4 V

Phase noise

N

900

synthesizer’s contribution to
close-in phase noise of 900 MHz
RF signal at 1 kHz offset (GSM)

f

xtal

= 13 MHz;

V

xtal

= 0 dBm;

fPC= 200 kHz

−−88 −

dBc/Hz

N

1800

synthesizer’s contribution to
close-in phase noise of 1.8 GHz
RF signal at 1 kHz offset
(DCS1800)

f

xtal

= 13 MHz;

V

xtal

= 0 dBm;

fPC= 200 kHz

−−82 −

dBc/Hz

Interface logic input signal levels; pins 8, 9, 11, 12 and 13

V

IH

HIGH level input voltage 0.7V

DD

− VDD+ 0.3 V

V

IL

LOW level input voltage −0.3 − 0.3V

DD

V

I

bias

input bias current logic 1 or logic 0 −5 − +5 µA

C

i

input capacitance − 2 − pF

Interface logic input signal levels; pin 1

V

IH

HIGH level input voltage 0.7V

CC

− VCC+ 0.3 V

V

IL

LOW level input voltage −0.3 − 0.3V

CC

V

I

bias

input bias current logic 1 or logic 0 −5 − +5 µA

C

i

input capacitance − 2 − pF

Lock detect output signal; pin 20; open-drain output

V

OL

LOW level output voltage I

sink

< 0.4 mA −−0.4 V

t

OOL

phase error threshold for
out-of-lock detector

− 25 − ns

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1999 Jun 17 10

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

SERIAL BUS TIMING CHARACTERISTICS

V

DD=VCC

=3V; T

amb

=25°C; unless otherwise specified.

Note

1. The minimum pulse width (t

W(min)

) can be smaller than 4 µs provided all the following conditions are fulfilled:

a) Main divider input frequency .

b) Reference divider input frequency .

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

Serial programming clock; CLK

t

r

input rise time − 10 40 ns

t

f

input fall time − 10 40 ns

T

cy

clock period 100 −−ns

Enable programming;

E

t

START

delay to rising clock edge 40 −−ns

t

END

delay from last falling clock edge −20 −−ns

t

W(min)

minimum inactive pulse width 4000

(1)

−−ns

t

SU;E

enable set-up time to next clock edge 20 −−ns

Register serial input data; DATA

t

SU;DAT

input data to clock set-up time 20 −−ns

t

HD;DAT

input data to clock hold time 20 −−ns

f

RF

447

t

Wmin()

-------------------

>

f

xtal

3

t

Wmin()

-------------------

>

Fig.3 Serial bus timing diagram.

handbook, full pagewidth

MGD565

MSB LSB ADDRESS

t

START

t

SU;DAT

t

HD;DAT

T

cy

t

r

t

f

t

W(min)

t

ENDtSU;E

CLK

DATA

E

1999 Jun 17 11

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

APPLICATION INFORMATION

Fig.4 Typical application block diagram.

handbook, full pagewidth

MBG369

MAIN

DIVIDER

REFERENCE

DIVIDER

PHASE

COMPARATOR

UMA1021M

TCXO

SPLITTER VCO LPF

PLL

power

amplifier

low noise

amplifier

duplex

filter

transmit

data

transmit

mixer

to demodulation

1st mixer 2nd mixer

1999 Jun 17 12

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

Fig.5 Typical test and application diagram.

(1) Values depend on application.

handbook, full pagewidth

MBG367

UMA1021M

20
19
18
17
16
15
14
13
12
11

1
2
3
4
5
6
7
8
9
10

12 Ω

1 nF

56 Ω

18 Ω

to 1st mixer

18 Ω

1 nF

1 nF

18 Ω

(1)

(1)

(1)(1)

(1)

positive supply

control

out

RF VCO

100 nF

100 nF

12 Ω

positive supply

1 kΩ 1 kΩ 1 kΩ

3-wire bus

100 nF

1 nF

1 nF

f

osc

V

CC

GND V

cont

VTCXO

100 nF

12 Ω12 Ω

5.6 kΩ

12 Ω

positive supply

100 nF

1999 Jun 17 13

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

PACKAGE OUTLINE

UNIT A1A2A

3

b

p

cD

(1)E(1)

(1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

0.1501.4

1.2

0.32

0.20

0.20

0.13

6.6

6.4

4.5

4.3

0.65 1.0 0.2

6.6

6.2

0.65

0.45

0.48

0.18

10

0

o

o

0.13 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

0.75

0.45

SOT266-1

90-04-05
95-02-25

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

X

(A )

3

A

y

0.25

110

20

11

pin 1 index

0 2.5 5 mm

scale

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

SOT266-1

A

max.

1.5

1999 Jun 17 14

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

SOLDERING
Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• For packages with leads on four sides, the footprint must

be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Jun 17 15

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1021M

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PACKAGE

SOLDERING METHOD

WAVE REFLOW

(1)

BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ suitable suitable

LQFP, QFP, TQFP not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO not recommended

(5)

suitable

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

1999 66

Philips Semiconductors – a worldwide company

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: seeSouth America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]

Hungary: seeAustria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. [phone], Fax. [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Printed in The Netherlands 465008/04/pp16 Date of release: 1999Jun 17 Document order number: 9397 750 06106