Datasheet UMA1017M-C2, UMA1017M-C1 Datasheet (Philips)

DATA SH EET

Product specification
Supersedes data of November 1994
File under Integrated Circuits, IC03

1995 Jul 10

INTEGRATED CIRCUITS

UMA1017M

Low-voltage frequency synthesizer
for radio telephones

1995 Jul 10 2

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

FEATURES

• Low current from 3 V supply

• Fully programmable RF divider

• 3-line serial interface bus

• Independent fully programmable reference divider,

driven from external crystal oscillator

• Dual phase detector outputs to allow fast frequency
switching

• Dual power-down modes.

APPLICATIONS

• 900 MHz mobile telephones

• Portable battery-powered radio equipment.

GENERAL DESCRIPTION

The UMA1017M BICMOS device integrates prescalers,
a programmable divider, and phase comparator to
implement a phase-locked loop.

The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 5 V supplies.

The synthesizer operates at RF input frequencies up to

1.25 GHz. The synthesizer has a fully programmable
reference divider. All divider ratios are supplied via a
3-wire serial programming bus.

Separate power and ground pins are provided to the
analog and digital circuits. The ground leads should be
externally short-circuited to prevent large currents flowing
across the die and thus causing damage. Digital supplies
V

DD1

and V

DD2

must also be at the same potential. V

CC

must be equal to or greater than VDD (i.e. VDD= 3 V and
VCC= 5 V for wider tuning range).

The phase detector uses two charge pumps, one provides
normal loop feedback, while the other is only active during
fast mode to speed-up switching. All charge pump currents
(gain) are fixed by an external resistance at pin I

SET

(pin 14). Only passive loop filters are used; the
charge-pumps function within a wide voltage compliance
range to improve the overall system performance.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VCC, V

DD

supply voltage VCC≥ V

DD

2.7 − 5.5 V

I

CC+IDD

supply current − 7.7 − mA

I

CCPD

, I

DDPD

current in power-down mode per supply − 10 −µA

f

VCO

RF input frequency 50 − 1250 MHz

f

XTAL

crystal reference input frequency 3 − 40 MHz

f

PC

phase comparator frequency − 200 − kHz

T

amb

operating ambient temperature −30 − +85 °C

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

UMA1017M SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1

1995 Jul 10 3

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

BLOCK DIAGRAM

Fig.1 Block diagram.

1995 Jul 10 4

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

PINNING

SYMBOL PIN DESCRIPTION

FAST 1 control input to speed-up main

synthesizer
CPF 2 speed-up charge-pump output
CP 3 normal charge-pump output
V

DD1

4 digital power supply 1

V

DD2

5 digital power supply 2
RFI 6 1 GHz RF main divider input
DGND1 7 digital ground 1
f

XTAL

8 crystal frequency input from TCXO
PON 9 power-on input
n.c. 10 not connected
CLK 11 programming bus clock input
DATA 12 programming bus data input
E 13 programming bus enable input

(active LOW)

I

SET

14 regulator pin to set the charge-pump

currents
n.c. 15 not connected
AGND 16 analog ground
n.c. 17 not connected
V

CC

18 supply for charge-pump
DGND2 19 digital ground 2
LOCK 20 in-lock detect output; test mode

output

Fig.2 Pin configuration.

1995 Jul 10 5

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

FUNCTIONAL DESCRIPTION
General

Programmable reference and main dividers drive the
phase detector. Two charge pumps produce phase error
current pulses for integration in an external loop filter.
A hardwired power-down input PON (pin 9) ensures that
the dividers and phase comparator circuits can be
disabled.

The RFI input (pin 6) drives a pre-amplifier to provide the
clock to the first divider stage. The pre-amplifier has a high
input impedance, dominated by pin and pad capacitance.
The circuit operates with signal levels from 50 mV up to
225 mV (RMS), and at frequencies as high as 1.25 GHz.
The high frequency divider circuits use bipolar transistors,
slower bits are CMOS. Divider ratios (512 to 131071)
allow a 1 MHz phase comparison with a 500 MHz RF
input, and a 10 kHz phase comparison with a 1.25 GHz RF
input.

The reference and main divider outputs are connected to
a phase/frequency detector that controls two charge
pumps. The two pumps have a common bias-setting
current that is set by an external resistance. The ratio
between currents in fast and normal operating modes can
be programmed via the 3-wire serial bus. The low current
pump remains active except in power-down. The high
current pump is enabled via the control input FAST (pin 1).
By appropriate connection to the loop filter, dual bandwidth
loops are provided: short time constant during frequency
switching (FAST mode) to speed-up channel changes and
low bandwidth in the settled state (on-frequency) to reduce
noise and breakthrough levels.

The synthesizer speed-up charge pump (CPF) is
controlled by the FAST input in synchronization with phase
detector operation in such a way that potential
disturbances are minimized. The dead zone (caused by
finite time taken to switch the current sources on or off) is
cancelled by feedback from the normal pump output to the
phase detector thereby improving linearity.

An open drain transistor drives the output pin LOCK
(pin 20). It is recommended that the pull-up resistor from
this pin to V

DD

is chosen to be of sufficient value to keep
the sink current in the LOW state to below 400 µA. The
output will be a current pulse with the duration of the
selected phase error. By appropriate external filtering and
threshold comparison, an out-of-lock or an in-lock flag is
generated. The out-of-lock function can be disabled via the
serial bus.

Serial programming bus

A simple 3-line unidirectional serial bus is used to program
the circuit. The 3 lines are DATA, CLK and

E (enable).
The data sent to the device is loaded in bursts framed by
E. Programming clock edges and their appropriate data
bits are ignored untilE goes active LOW. The programmed
information is loaded into the addressed latch when E
returns inactive HIGH. Only the last 21 bits serially clocked
into the device are retained within the programming
register. Additional leading bits are ignored, and no check
is made on the number of clock pulses. The fully static
CMOS design uses virtually no current when the bus is
inactive. It can always capture new programmed data
even during power-down.

However when the synthesizer is powered-on, the
presence of a TCXO signal is required at pin 8 (f

XTAL

) for

correct programming.

Data format

Data is entered with the most significant bit first. The
leading bits make up the data field, while the trailing four
bits are an address field. The UMA1017M uses 4 of the 16
available addresses. These are chosen to allow direct
compatibility with the UAA2072M integrated front-end.
The data format is shown in Table 1. The first entered bit
is p1, the last bit is p21.

The trailing address bits are decoded on the inactive edge
of

E. This produces an internal load pulse to store the data
in one of the addressed latches. To ensure that data is
correctly loaded on first power-up, E should be held LOW
and only taken HIGH after having programmed an
appropriate register. To avoid erroneous divider ratios, the
pulse is not allowed during data reads by the frequency
dividers. This condition is guaranteed by respecting a
minimum E pulse width after data transfer. The
corresponding relationship between data fields and
addresses is given in Table 2.

Power-down mode

The device can be powered-down either by hardware PON
or by software sPON. The dividers are on when both PON
and sPON are at logic 1.

When the synthesizer is reactivated after power-down, the
main and reference dividers are synchronized to avoid
possibility of random phase errors on power-up.

1995 Jul 10 6

Philips Semiconductors Product specification

Low-voltage frequency synthesizer

for radio telephones

UMA1017M

Table 1 Format of programmed data

Table 2 Bit allocation (note 1)

Notes

1. FT = first; LT = last; sPON = software power-up for synthesizer (1 = ON); OOL = out-of-lock (1 = enabled).

2. The test register should not be programmed with any other values except all zeros for normal operation.

Table 3 Fast and normal charge pumps current ratio (note 1)

Note

1. I

SET

= ; bias current for charge pumps.

LAST IN PROGRAMMING REGISTER BIT USAGE FIRST IN

p21 p20 p19 p18 p17 p16 ../.. p2 p1

ADD0 ADD1 ADD2 ADD3 DATA0 DATA1 ../.. DATA15 DATA16

LATCH ADDRESS LSB DATA COEFFICIENT MSB

FT REGISTER BIT ALLOCATION LT

p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17 p18 p19 p20 p21
dt16 dt15 dt14 dt13 dt12 DATA FIELD dt4 dt3 dt2 dt1 dt0 ADDRESS

TEST BITS

(2)

0000
X X X X OOL X CR1 CR0 X X sPON X X X X X X 0 0 0 1
PM16 MAIN DIVIDER COEFFICIENT PM0 0 1 0 0
X X X X X X PR10 REFERENCE DIVIDER COEFFICIENT PR0 0 1 0 1

CR1 CR0 I

CP

I

CPF

I

CPF:ICP

00 4×I

SET

16 × I

SET

4:1

01 4×I

SET

32 × I

SET

8:1

10 2×I

SET

24 × I

SET

12:1

11 2×I

SET

32 × I

SET

16:1

V

14

R

ext

---------- -

1995 Jul 10 7

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

digital supply voltage −0.3 +5.5 V

V

CC

analog supply voltage −0.3 +5.5 V

∆V

CC−VDD

difference in voltage between VCC and V

DD

−0.3 +5.5 V

V

n

voltage at pins 1, 6, 8, 9, 11 to 14 and 20 −0.3 VDD+ 0.3 V

V

2, 3

voltage at pins 2 and 3 −0.3 VCC+ 0.3 V

∆V

GND

difference in voltage between AGND and DGND
(these pins should be connected together)

−0.3 +0.3 V

P

tot

total power dissipation − 150 mW

T

stg

storage temperature −55 +125 °C

T

amb

operating ambient temperature −30 +85 °C

T

j

maximum junction temperature − 95 °C

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 120 K/W

1995 Jul 10 8

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

CHARACTERISTICS

V

DD1=VDD2

= 2.7 to 5.5 V; VCC= 2.7 to 5.5 V; T

amb

=25°C; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply; pins 4, 5 and 18

V

DD

digital supply voltage V

DD1=VDD2

2.7 − 5.5 V

V

CC

analog supply voltage VCC≥ V

DD

2.7 − 5.5 V

I

DD

synthesizer digital supply current VDD= 5.5 V − 6.5 8.5 mA

I

CC

charge pumps and analog supply
current

VCC= 5.5 V;
R

ext

=12 kΩ

− 1.2 2.0 mA

I

CCPD

, I

DDPD

current in power-down mode per
supply

logic levels 0 or V

DD

− 12 50 µA

RF main divider input; pin 6

f

VCO

RF input frequency 2.7 V < VDD< 3.5 V 50 − 1250 MHz

2.7V<V

DD

< 5.5 V 50 − 1100 MHz

V

6(rms)

AC-coupled input signal level
(RMS value)

Rs=50Ω;

2.7V<VDD< 3.5 V;

0.5<f

VCO

< 1.25 GHz;

T

amb

= −20 to +85 °C

50 − 225 mV

R

s

=50Ω;

2.7V<VDD< 5.5 V;

0.5<f

VCO

< 1.1 GHz;

T

amb

= −30 to +85 °C

100 − 300 mV

R

s

=50Ω;

2.7V<VDD< 5.5 V;
50<f

VCO

< 500 MHz;

T

amb

= −30 to +85 °C

150 − 300 mV

Z

I

input impedance (real part) f

VCO

= 1 GHz − 1 − kΩ

C

I

typical pin input capacitance indicative, not tested − 2 − pF

R

m

main divider ratio 512 − 131071

f

PCmax

maximum phase comparator
frequency

− 2000 − kHz

f

PCmin

minimum phase comparator
frequency

− 10 − kHz

Crystal reference divider input; pin 8

f

XTAL

crystal reference input frequency 5 − 40 MHz

V

8(rms)

sinusoidal input signal level
(RMS value)

4.0V<VDD< 5.5 V 50 − 500 mV

2.7V<V

DD

< 5.5 V 50 − 250 mV

Z

I

input impedance (real part) f

XTAL

= 30 MHz − 6 − kΩ

C

I

typical pin input capacitance indicative, not tested − 2 − pF

R

r

reference divider ratio 8 − 2047

1995 Jul 10 9

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

Charge pump current setting resistor input; pin 14

R

ext

external resistor from pin 14 to
ground

12 − 60 kΩ

V

14

regulated voltage at pin 14 R

ext

=12kΩ−1.15 − V

Charge pump outputs; pins 3 and 2; R

ext

=12kΩ

I

Ocp

charge pump output current error −25 − +25 %

I

match

sink-to-source current matching Vcp in range −±5− %

I

Lcp

charge pump off leakage current Vcp=1⁄2V

CC

−5 ±1+5 nA

V

cp

charge pump voltage compliance 0.4 − VCC− 0.4 V

Interface logic input signal levels; pins 13, 12, 11 and 1

V

IH

HIGH level input voltage 0.7V

DD

− VDD+ 0.3 V

V

IL

LOW level input voltage −0.3 − 0.3V

DD

V

I

bias

input bias current logic 1 or logic 0 −5 − +5 µA

C

I

input capacitance indicative, not tested − 2 − pF

Lock detect output signal; pin 20 (open-drain output)

V

OL

LOW level output voltage I

sink

= 0.4 mA −−0.4 V

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1995 Jul 10 10

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

SERIAL BUS TIMING CHARACTERISTICS

V

DD=VCC

=3V; T

amb

=25°C unless otherwise specified.

Note

1. The minimum pulse width (t

W

) can be smaller than 4 µs provided all the following conditions are satisfied:

a) Main divider input frequency

b) Reference divider input frequency

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

Serial programming clock; CLK

t

r

input rise time − 10 40 ns

t

f

input fall time − 10 40 ns

T

cy

clock period 100 −−ns

Enable programming;

E

t

START

delay to rising clock edge 40 −−ns

t

END

delay from last falling clock edge −20 −−ns

t

W

minimum inactive pulse width 4000

(1)

−−ns

t

SU;E

enable set-up time to next clock edge 20 −−ns

Register serial input data; DATA

t

SU;DAT

input data to clock set-up time 20 −−ns

t

HD;DAT

input data to clock hold time 20 −−ns

f

VCO

256

t

W

--------- -

>

f

XTAL

3

t

W

----- -

>

Fig.3 Serial bus timing diagram.

1995 Jul 10 11

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

APPLICATION INFORMATION

Fig.4 Typical application block diagram.

1995 Jul 10 12

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

Fig.5 Typical test and application diagram.

1995 Jul 10 13

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

PACKAGE OUTLINE

UNIT A1A2A

3

b

p

cD

(1)E(1)

(1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

0.1501.4

1.2

0.32

0.20

0.20

0.13

6.6

6.4

4.5

4.3

0.65 1.0 0.2

6.6

6.2

0.65

0.45

0.48

0.18

10

0

o

o

0.13 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

0.75

0.45

SOT266-1

90-04-05
95-02-25

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

X

(A )

3

A

y

0.25

110

20

11

pin 1 index

0 2.5 5 mm

scale

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

SOT266-1

A

max.

1.5

1995 Jul 10 14

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

SOLDERING SO or SSOP
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
cases reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

(order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

SSOP
Wave soldering is not recommended for SSOP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

METHOD (SO OR SSOP)
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds at 270 to 320 °C.

1995 Jul 10 15

Philips Semiconductors Product specification

Low-voltage frequency synthesizer
for radio telephones

UMA1017M

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

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TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone]

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,

International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone] (from 10-10-1995: [phone])

SCD41 © Philips Electronics N.V. 1995

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413061/1500/02/pp16 Date of release: 1995 Jul 10
Document order number: 9397 750 00201