Datasheet UMA1021AM Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

UMA1021AM

Low-voltage frequency synthesizer
for radio telephones

Product specification
Supersedes data of 1998 Mar 03
File under Integrated Circuits, IC17

1998 Nov 19

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

FEATURES

• Low phase noise

• Low current from 3 V supply

• Fully programmable main divider

• 3-line serial interface bus

• Independent fully programmable reference divider,

driven from external crystal oscillator

• Hard and soft power-down control.

APPLICATIONS

• 900 MHz and 2 GHz mobile telephones

• Portable battery-powered radio equipment.

GENERAL DESCRIPTION

The UMA1021AM BICMOS device integrates a prescaler,
programmable dividers, and a phase comparator to
implement a phase-locked loop.

UMA1021AM

The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.

The synthesizer operates at RF input frequencies
up to 2.2 GHz with a fully programmable reference divider.
All divider ratios are supplied via a 3-wire serial
programming bus.

Separate power and ground pins are provided to the
analog (charge pump) and digital circuits. The ground
leads should be externally short-circuited to prevent large
currents flowing across the die and thus causing damage.

and V

V

DD1

VCC must be equal to or greater than VDD for wider control
range of the Voltage Controlled Oscillator (VCO),
e.g. VDD= 3 V and VCC=5V.

The charge pump current (phase detector gain) is fixed by
an external resistor at pin I
interface. Only a passive loop filter is necessary; the
charge pump functions within a wide voltage compliance
range to improve the overall system performance.

must also be at the same potential (VDD).

DD2

and controlled via the serial

SET

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DD1

V

CC

I

tot

I

tot(pd)

, V

DD2

digital supply voltage V
analog supply voltage for charge pump VCC≥ V
total supply current (IDD+ICC)V
total supply current in Power-down

DD1=VDD2=VDD

DD

CC=VDD

logic levels 0 V or V

2.7 − 5.5 V

2.7 − 5.5 V

= 5.5 V − 10 − mA

− 5 −µA

DD

mode (IDD+ICC)

f

RF

f

xtal

RF input frequency 300 − 2200 MHz
crystal reference oscillator input

3 − 35 MHz

frequency

f

ph(comp)

T

amb

phase comparator frequency − 200 − kHz
operating ambient temperature −30 − +85 °C

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME DESCRIPTION VERSION

UMA1021AM SSOP16 plastic shrink small outline package; 16 leads; body width

SOT369-1

4.4 mm

1998 Nov 19 2

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

BLOCK DIAGRAM

handbook, full pagewidth

LOCK

V

V

V

V

CP

DD2

SS3

RFI

SS2

PON

SS1

1

2

CHARGE PUMP

3

4

MAIN DIVIDER

5

6

7

8

PHASE COMPARATOR

WITH

PRESCALER

SERIAL INTERFACE

UMA1021AM

BAND GAP

REFERENCE

DIVIDER

to charge pump

16

15

14

13

12

11
10

MGL406

9

I

SET

V

CC

GND(CP)

XTAL

V

DD1

E
DATA
CLK

UMA1021AM

PINNING

SYMBOL PIN DESCRIPTION

LOCK 1 out-of-lock detector output
CP 2 charge pump output
V
V

DD2
SS3

3 digital supply voltage

4 ground 3 (0 V)
RFI 5 2 GHz main divider input
V

SS2

6 ground 2 (0 V)
PON 7 power-on input
V

SS1

8 ground 1 (0 V)
CLK 9 programming bus clock input
DATA 10 programming bus data input
E 11 programming bus enable input

(active LOW)

V

DD1

12 digital supply voltage
XTAL 13 crystal frequency input
GND(CP) 14 ground for charge pump
V

CC

15 analog supply voltage for charge

pump

I

SET

16 charge pump current setting with

external resistor from this pin to
ground

Fig.1 Block diagram.

handbook, halfpage

LOCK

1

CP

2
3

V

DD2

4

V

V

PON

V

SS3

SS2

SS1

RFI

UMA1021AM

5
6
7
8

MGL405

Fig.2 Pin configuration.

16
15
14
13
12
11
10

9

I

SET

V

CC

GND(CP)
XTAL
V

DD1

E
DATA
CLK

1998 Nov 19 3

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

FUNCTIONAL DESCRIPTION
Main divider

The main divider is clocked at pin RFI by the RF signal
which is AC-coupled from an external VCO. The divider
operates with signal levels from 50 to 225 mV (RMS) and
at frequencies from 300 MHz to 2.2 GHz. It consists of a
fully programmable bipolar prescaler followed by a CMOS
counter. The main divider allows programmable ratios
from 512 to 131071 inclusive.

Reference divider

The reference divider is clocked by the signal at pin XTAL.
The applied input signal should be AC-coupled. The circuit
operates with levels from 50 up to 500 mV (RMS) and at
frequencies from 3 to 35 MHz. Any divide ratios from
8 to 2047 inclusive can be programmed.

Phase comparator and charge pump

The phase detector is driven by the edges of the output
signals of the main and reference dividers. The detector
produces current pulses at pin CP. The pulse duration is
equal to the difference in time of arrival of the edges from
the two dividers. If the main divider edge arrives first,
pin CP sinks current. If the reference divider edge arrives
first, pin CP sources current.

The current at pin CP can be controlled via the serial
programming bus as a multiple of the reference current set
by an external pull-down resistor connected between
pin I
except in the Power-down mode.

Additional circuitry is included to ensure that the gain of the
phase detector remains linear even for small phase errors.

and ground (see Table 2). Pin CP remains active

SET

UMA1021AM

The 3 lines are DATA (data bits), CLK (clock pulses) and
E (enable signal). The data sent to the device is loaded in
bursts framed by E. Programming clock edges and their
appropriate data bits are ignored until E goes active LOW.
The programmed information is loaded into the addressed
latch when E returns HIGH. During normal operation,
E should be kept HIGH. Only the last 21 bits serially
clocked into the device are retained within the
programming register. Additional leading bits are ignored,
and no check is made on the number of clock pulses.
The fully static CMOS design uses virtually no current
when the programming bus is inactive. It can always
capture new programmed data even during power-down.

When the synthesizer is switched on, the presence of a
signal at the reference divider input is required for correct
programming.

Data format

The data format is shown in Table 1. The first bit entered
is dt16, the last bit is ad0.

The leading bits (dt16 to dt0) make up the data field.
The four trailing bits (ad3 to ad0) are the address field.

The UMA1021AM uses 4 of the 16 available addresses.
These are chosen for compatibility with other Philips
Semiconductors radio telephone ICs. The trailing address
bits are decoded on the rising edge of
internal load pulse to store the data in the addressed latch.
To avoid erroneous divider ratios, the load pulse is not
allowed during data reads by the frequency dividers. This
condition is guaranteed by respecting a minimum E pulse
width after data transfer.

For the divider ratios, the first bits entered (PM16 and
PR10) are the Most Significant Bits (MSBs).

E. This produces an

Out-of-lock detector

The out-of-lock detector is enabled or disabled via the
serial interface by setting bit OOL (dt12) HIGH or LOW
(see Table 1). An open-drain transistor drives the output
pin LOCK. It is recommended to keep the sink current in
the LOW state below 400 µA by applying a pull-up resistor
from pin LOCK to the positive supply. When the out-of-lock
detector is enabled pin LOCK is HIGH if the error at the
phase detector input is less than approximately 25 ns,
otherwise pin LOCK is LOW. If the out-of-lock detector is
disabled, pin LOCK remains HIGH.

Serial programming bus

A simple 3-line unidirectional serial bus is used to program
the circuit.

1998 Nov 19 4

The test register (address 0000) does not normally need to
be programmed. However, if it is programmed all bits in the
data field should be set to logic 0.

Power-down mode

The synthesizer is switched on when both the power-on
input (PON) and the programmed bit dt6 (sPON) are
HIGH. When switched on, the dividers and phase detector
are synchronized to avoid random phase errors. When
switched off, the phase detector is synchronized to avoid
interrupting of the charge pump pulses.

The UMA1021AM has a very low current consumption in
the Power-down mode.

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1998 Nov 19 5

Table 1 Bit allocation; note 1

FIRST IN REGISTER BIT ALLOCATION LAST IN

DATA FIELD ADDRESS

dt16 dt15 dt14 dt13 dt12 dt11 dt10 dt9 dt8 dt7 dt6 dt5 dt4 dt3 dt2 dt1 dt0 ad3 ad2 ad1 ad0

test bits; note 2 0 0 0 0

(3)

X X X X OOL

(6)

PM16

X CR1

X X X X X X PR10

(4)

CR0 X X sPON

(5)

XXXXX X 0 0 0 1

main divider coefficient PM0 0 1 0 0

(7)

reference divider coefficient PR0 0 1 0 1

Notes

1. X = don’t care.

2. The test register (address 0000) should not be programmed with any other values except all zeros for normal operation.

3. Bit OOL sets the Out-Of-Lock detector (1 = enabled).

4. Bits CR1 and CR0 set the charge pump current ratio (see Table 2).

5. Bit sPON sets the software power-up for the synthesizer (see Table 3).

6. PM16 is the MSB of the main divider coefficient.

7. PR10 is the MSB of the reference divider coefficient.

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for

radio telephones

Table 2 Charge pump current ratio; note 1

BIT CR1 BIT CR0

0010×I
0118×I
1013×I
1117×I

Note

1. Reference current for charge pump:

I

set

Table 3 Power-on programming

CHARGE PUMP

CURRENT

set
set
set
set

Notes

PIN PON

(1)

BIT sPON

(2)

L X off
X 0 off

H1on

SYNTHESIZER

STATE

1. Signal level

V

set

=

---------- ­R

set

a) L = LOW.
b) X = don’t care.

UMA1021AM

c) H = HIGH.

2. X = don’t care.

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for

UMA1021AM

radio telephones

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
V
∆V

V

∆V

P
T
T
T

DD1
CC

CC-DD

n

GND

tot
stg
amb
j(max)

, V

digital supply voltage −0.3 +5.5 V

DD2

analog supply voltage for charge pump −0.3 +5.5 V
supply voltage difference

between the analog and digital supply

−0.3 +5.5 V

voltages

voltage

at pins 5, 7, 9, 10 and 11 −0.3 V
at pins 1, 2, 13 and 16 −0.3 V

difference in voltage between any of
pins GND(CP), V

SS1

, V

SS2

and V

SS3

these pins should be
connected together

−0.3 +0.3 V

DD
CC

total power dissipation − 85 mW
storage temperature −55 +125 °C
operating ambient temperature −30 +85 °C
maximum junction temperature − 150 °C

+ 0.3 V
+ 0.3 V

HANDLING

All pins withstand the ESD class 2 test in accordance with

“EIA/JESD22-A114-A”

.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 142 K/W

1998 Nov 19 6

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for

UMA1021AM

radio telephones

CHARACTERISTICS

All values refer to the typical test and application diagram of Fig.5; V
T

=25°C; unless otherwise specified. Characteristics for which only a typical value is given are not tested.

amb

DD1=VDD2

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies; pins 3, 12 and 15

V
V

DD1
CC

, V

DD2

digital supply voltage V
analog supply voltage for charge

DD1=VDD2=VDD

VCC≥ V

DD

pump

I

DD

I

CC

I

tot(pd)

total digital supply current of
synthesizer (I

DD1+IDD2

)

analog supply current of charge
pump

total supply current in

VDD= 5.5 V − 7 9.5 mA

VCC= 5.5 V;
R

= 5.6 kΩ

set

logic levels0VorVDD− 550µA

Power-down mode (IDD+ICC)

RF main divider input; pin 5

f

RF

V

RF(rms)

RF input frequency 300 − 2200 MHz
input signal level (RMS value) AC-coupled; series

resistance Rs=50Ω

D/D

m

Z

i

C

i

main divider ratio 512 − 131071
input impedance (real part) fRF= 1 GHz − 750 −Ω

f

= 2 GHz − 130 −Ω

RF

input capacitance fRF= 1 GHz − 0.5 − pF

f

= 2 GHz − 1.5 − pF

RF

Reference divider input; pin 13

f

xtal

crystal reference oscillator input
frequency

V

xtal(rms)

sinusoidal input signal level

(RMS value)
D/D
Z

i

C

i

ref

reference divider ratio 8 2047

input impedance (real part) f

input capacitance f

=13MHz − 10 − kΩ

xtal

=13MHz − 1.3 − pF

xtal

Phase comparator

f

ph(comp)

f

loop(max)

phase comparator frequency − 200 − kHz

maximum loop comparison

frequency

= 2.7 to 5.5 V; VCC= 2.7 to 5.5 V;

2.7 − 5.5 V

2.7 − 5.5 V

− 3 3.8 mA

50 − 225 mV

3 − 35 MHz

50 − 500 mV

− 2000 − kHz

Charge pump current setting; pin 16

R

set

external resistor connected between

pin 16 and ground

V

set

regulated voltage R

= 5.6 kΩ−1.2 − V

set

1998 Nov 19 7

5.6 − 12 kΩ

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for

UMA1021AM

radio telephones

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Charge pump output; pin 2

V

o(compl)

I

o(err)

I

o(match)

I

L

Phase noise

N

900

N

1800

compliance output voltage R

output current error R

sink-to-source current matching R

leakage current R

RF synthesizer’s contribution to

close-in phase noise of 900 MHz

VCO signal inside the closed loop

bandwidth

RF synthesizer’s contribution to

close-in phase noise of 1.8 GHz

VCO signal inside the closed loop

bandwidth

= 5.6 kΩ 0.4 − VCC− 0.4 V

set

= 5.6 kΩ−25 − +25 %

set

= 5.6 kΩ−±5−%

set

= 5.6 kΩ;

set

−5 ±1+5 nA
charge pump off;
V

o(compl)

f

xtal

V

xtal

f

ph(comp)

f

xtal

V

xtal

f

ph(comp)

=1⁄2V

= 13 MHz;

= 0 dBm;

= 200 kHz

= 13 MHz;

= 0 dBm;

= 200 kHz

CC

−−88 −

−−82 −

dBc/Hz

dBc/Hz

Interface logic inputs; pins 7, 9, 10 and 11

V

IH

V

IL

I

i(bias)

C

i

HIGH-level input voltage 0.7V
LOW-level input voltage −0.3 − 0.3V
input bias current logic 1 or logic 0 −5 − +5 µA
input capacitance − 2 − pF

Out-of-lock detector output; pin 1

V
E

OL
ϕ(th)

LOW-level output voltage open-drain output −−0.3V
threshold phase error open-drain output − 25 − ns

− VDD+ 0.3 V

DD

DD

DD

V

V

1998 Nov 19 8

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for

UMA1021AM

radio telephones

SERIAL BUS TIMING CHARACTERISTICS

V

DD1=VDD2=VCC

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Serial programming clock; CLK

t

r

t

f

T

cy

Enable programming;

t

START

t

END

t

W

t

SU;E

Register serial input data; DATA

t

SU;DAT

t

HD;DAT

=3V; T

=25°C; unless otherwise specified.

amb

rise time − 10 40 ns
fall time − 10 40 ns
clock cycle time 100 −−ns

E

delay to rising clock edge 40 −−ns
delay from last falling clock edge −20 −−ns
minimum inactive pulse width note 1 4000 −−ns
enable set-up time to next clock edge 20 −−ns

input data to clock set-up time 20 −−ns
input data to clock hold time 20 −−ns

Note

1. The minimum pulse width (t

W

a) Main divider input frequency:

b) Reference divider input frequency:

handbook, full pagewidth

CLK

DATA

E

t

SU;DAT

MSB LSB ADDRESS

) can be smaller than 4000 ns when the both conditions are fulfilled:

447

>

f

--------- -

RF

t

W

3

f

>

----- -

xtal

t

W

t

HD;DAT

T

cy

t

t

f

r

t

ENDtSU;E

t

START

Fig.3 Serial bus timing diagram.

1998 Nov 19 9

MBG368

t

W

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

APPLICATION INFORMATION

handbook, full pagewidth

amplifier

power

duplex

filter

transmit

data

SPLITTER VCO LPF

transmit

mixer

TCXO

PLL

MAIN

DIVIDER

REFERENCE

DIVIDER

UMA1021AM

PHASE

COMPARATOR

AND

CHARGE PUMP

low noise

amplifier

UMA1021AM

MGL407

to demodulation

1st mixer 2nd mixer

Fig.4 Typical application block diagram.

1998 Nov 19 10

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

handbook, full pagewidth

12 Ω

100

nF

control

RF VCO

out

4.7
µF

1 nF

(1)

18 Ω

18 Ω

56 pF

to 1st mixer

positive supply

(1)

(1)(1)

(1)

18 Ω

positive supply

56 Ω

1 kΩ

12 Ω

100 nF

56 pF

LOCK

CP

V

DD2

V

SS3

RFI

V

SS2

PON

1

2

3

4

UMA1021AM

5

6

7

16

15

14

13

12

11

10

I

SET

5.6 kΩ

V

CC

100 nF

GND(CP)

XTAL

V

DD1

E

DATA

1 nF

UMA1021AM

12 Ω

12 Ω

100 nF

VTCXO

V

CC

control

f

osc

GND V

positive supply

12 Ω

100 nF

(1) Values depend on application.

V

SS1

8

CLK

9

Fig.5 Typical test and application diagram.

12 Ω 12 Ω 12 Ω

3-wire bus

MGL408

1998 Nov 19 11

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

PACKAGE OUTLINE

SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm

16

D

c

y

Z

9

E

H

E

UMA1021AM

A

X

v M

A

SOT369-1

pin 1 index

18

w M

b

b

0.32

0.20

p

p

cD

0.25

5.30

0.13

5.10

0 2.5 5 mm

scale

(1)E(1)

eHELLpQZywv θ

4.5

0.65

4.3

e

DIMENSIONS (mm are the original dimensions)

UNIT A1A2A

mm

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

A

max.

1.5

0.15

0.00

1.4

1.2

3

0.25

Q

A

2

6.6

6.2

L

0.65

0.45

(A )

L

p

A

1

detail X

0.75

1.0

0.45

3

A

θ

0.130.2 0.1

0.48

0.18

(1)

o

10

o

0

OUTLINE
VERSION

SOT369-1

IEC JEDEC EIAJ

REFERENCES

1998 Nov 19 12

EUROPEAN

PROJECTION

ISSUE DATE

94-04-20
95-02-04

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all SSOP
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

UMA1021AM

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

1998 Nov 19 13

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for

UMA1021AM

radio telephones

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1998 Nov 19 14

Philips Semiconductors Product specification

Low-voltage frequency synthesizer for
radio telephones

NOTES

UMA1021AM

1998 Nov 19 15

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Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. [phone],

Fax. [phone]
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Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

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Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
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Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: seeAustria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. [phone], Fax. [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone]

Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1998 SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 435102/750/02/pp16 Date of release: 1998 Nov 19 Document order number: 9397 750 04261