Low cost dual frequency
synthesizer for radio telephones
Product specification
Supersedes data of 1998 May 15
File under Integrated Circuits, IC17
1998 Dec 09
Page 2
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
FEATURES
• Low phase noise
• Low current from 3 V supply
• Fully programmable dividers
• 3-line serial interface bus
• Input reference buffer configurable as an oscillator with
external crystal resonator
• Wide compliance voltage charge pump outputs
• Two power-down input control pins.
APPLICATIONS
• 900 MHz and 2 GHz digital radio telephones
• Portable battery-powered radio equipment.
GENERAL DESCRIPTION
The UMA1022M BICMOS device integrates prescalers,
programmable dividers, a crystal oscillator/buffer and
phase comparators to implement two phase-locked loops.
The device is designed to operate from 3 NiCd or a single
LiIon cell in pocket phones, or from an external 3 V supply.
UMA1022M
The synthesizers operate at RF input frequencies up to
2.1 GHz and 550 MHz. All divider ratios are supplied via a
3-wire serial programming bus. The reference divider uses
a common, fully programmable part and a separate
subdivider section. In this way the comparison frequencies
are related to each other allowing optimum isolation
between charge pump pulses.
Separate power and ground pins are provided to the
analog (charge pump, prescaler) and digital (CMOS)
circuits. An independent supply for the crystal oscillator
section allows maximum frequency stability. The ground
leads should be externally short-circuited to prevent large
currents flowing across the die and thus causing damage.
and V
V
DD
V
must be equal to each other and equal to or greater
CCB
than VDD (e.g. VDD= 3 V and V
control voltage range).
The charge pump currents (phase detector gain) are fixed
by internal resistances and controlled by the serial
interface. Only passive loop filters are necessary;
the charge pumps function within a wide voltage
compliance range to improve the overall system
performance.
Suitable pin layout is chosen to minimize coupling and
interference between signals entering or leaving the chip.
must be at the same potential. V
DDX
= 5.5 V for wider VCO
CCA
CCA
and
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONS MIN.TYP.MAX.UNIT
V
V
V
I
DD
CCA
DDX
tot
, V
digital supply voltageV
analog supply voltagesV
CCB
crystal reference supply voltageV
all supply currents
DGND8digital circuits ground
E9programming bus enable input
DATA10programming bus data input
CLK11programming bus clock input
V
DD
ON
A
AGND14analog circuits ground
RF
A
V
CCA
CP
A
XOUT18inverting oscillator buffer output
V
DDX
XIN20non-inverting crystal reference input
4IF synthesizer charge pump output
5analog supply to IF synthesizer
6IF VCO main divider input
7IF power-on input; ONB= HIGH
means IF synthesizer is active
12digital circuits supply voltage
13RF power-on input; ONA= HIGH
means RF synthesizer is active
15RF VCO main divider input
16analog supply to RF synthesizer
17RF synthesizer charge pump output
19supply voltage to crystal oscillator
circuits
handbook, halfpage
1
XIN
XGND
2
3
XOUT
4
CP
B
5
V
CCB
IF
ON
DGND
DATA
B
B
E
10
UMA1022M
6
7
8
9
MGE626
Fig.2 Pin configuration.
UMA1022M
XIN
20
19
V
DDX
18
XOUT
CP
17
A
16
V
CCA
15
RF
A
AGND
14
ON
13
A
12
V
DD
CLK
11
1998 Dec 094
Page 5
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
FUNCTIONAL DESCRIPTION
Main dividers
The main dividers are clocked at pin RF
oscillator signal and at pin IFB by the IF oscillator signal.
The inputs are AC coupled through external capacitors.
Input impedances are high, dominated by parasitic
package capacitances, so matching is off-chip.
The sensitive dividers operate with signal levels from
35 to 225 mV (RMS), at frequencies up to 2.1 GHz
(RF part) and up to 550 MHz (IF part). Both include
programmable bipolar prescalers followed by CMOS
counters. The RF main divider allows programmable ratios
from 512 to 65535; the IF blocks accept values between
128 and 16383.
Crystal oscillator
A fully differential low-noise amplifier/buffer is integrated
providing outputs to drive other circuits, and to build a
crystal oscillator; only needed are an external resonance
circuit and tuning elements (temperature compensation).
A bus controlled power-down mode disables the low-noise
amplifier to reduce current if not needed.
The normal differential input pins drive a clock buffer to
provide edges to the programmable reference divider at
frequencies up to 20 MHz. The inputs are AC coupled
through external capacitors, and operate with signals
down to 35 mV (RMS) and up to 0.5 V (RMS).
Various crystal oscillator structures can be built using the
amplifier. By coupling one output back to the appropriate
input through the resonator, and decoupling the other input
to ground, the second output becomes available to deliver
the reference frequency to other circuits.
Reference dividers
A first common divider circuit produces an output
frequency for RF or IF synthesizer phase comparison,
depending on the P/A bit. It drives a second independent
divider, which delivers the reference edge to the IF or RF
synthesizer phase comparator. When P/A is logic 1, the
output of the subdivider is connected to the RF phase
comparator, whereas the output of the common divider is
connected to the IF phase detector.
by the RF
A
UMA1022M
Phase comparators
The phase detectors are driven by the output edges
selected by the main and reference dividers. Each
generates lead and lag signals to control the appropriate
charge pump. The pumps output current pulses appear at
pins CP
The current pulse duration is at least equal to the
difference in time of arrival of the edges from the two
dividers. If the main divider edge arrives first, CPA or CP
sink current. If the reference divider edge arrives first, CP
or CPB source current. For correct PLL operation the
VCOs need to have a positive frequency/voltage control
slope.
The currents at CPA and CPB are programmed via the
serial bus as multiples of an internally-set reference
current. The passage into power-down mode is
synchronized with respect to the phase detector to prevent
output current pulses being interrupted. Additional circuitry
is included to ensure that the gain of the phase
comparators remains linear even for small phase errors.
Serial programming bus
A simple 3-line unidirectional serial bus is used to program
the circuit. The 3 lines are DATA, clock (CLK) and enable
(
E). The data sent to the device is loaded in bursts framed
byE. Programming clock edges and their appropriate data
bits are ignored untilE goes active LOW. The programmed
information is loaded into the addressed latch when E
returns HIGH. During normal operation, E should be kept
HIGH. Only the last 19 bits serially clocked into the device
are retained within the programming register.
Additional leading bits are ignored, and no check is made
on the number of clock pulses. The NMOS-rich design
uses virtually no current when the bus is inactive;
power-up is initiated when enable is taken LOW, and
power-down occurs a short time after enable returns
HIGH. Bus activity is allowed when either synthesizer is
active or in power-down (ONA and ONB inputs LOW)
mode. Fully static CMOS registers retain programmed
data whatever the power-down state, as long as the supply
voltage is present.
(RF synthesizer) and CPB (IF synthesizer).
A
B
A
The phase comparators run at related frequencies with a
controlled phase difference to avoid interference when
in-lock. The common 10-bit section permits divide ratios
from 8 to 1023; the second subdivider allows phase
comparison frequency ratios between 1 and 16. Table 2
indicates how to program the corresponding bits to get the
wanted ratio.
1998 Dec 095
Page 6
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
Data format
The leading bits (dt15 to dt0) make up the data field, while
the trailing three bits (ad2 to ad0) comprise an address
field. The UMA1022M uses 4 of the 8 available addresses.
The data format is shown in Table 1. The first bit entered
is dt15, the last bit is ad0. For the divider ratios, the first
bits entered (P0 and R0) are the Least Significant Bits
(LSB). This is different from previous Philips
synthesizers.
The trailing address bits are decoded on the rising edge of
E. This produces an internal load pulse to store the data in
the addressed latch. To avoid erroneous divider ratios, the
load pulse is not allowed during data reads by the
frequency dividers. This condition is guaranteed by
respecting a minimum E pulse width after data
transfer.The test register bits should not normally be
programmed active (HIGH); normal operation requires
them set LOW. When the supply voltage is established an
internal power-up initialization pulse is generated to
preconfigure the circuit state. Production testing does not
verify that all bits are preconfigured correctly.
UMA1022M
Power-down mode
The RF and IF synthesizers are on when respectively the
input signal ON
dividers and phase detector are synchronized to avoid
random phase errors. When turnedoff, the phase detector
is synchronized to avoid interrupting charge pump pulses.
The UMA1022M has a very low current consumption in the
power-down mode.
RF synthesizer main divider coefficientP15000
XXXXXXR0
XXA0
(6)
IF synthesizer main divider coefficientA13010
(3)
XXXXP/A
(6)
reference divider coefficientR9001
(4)
REFDIV2
(5)
011
Notes
1. X = don’t care.
2. The test bits (at address 011) should not be programmed with any other value except all zeros for normal operation.
3. Bit XON = power-on of crystal oscillator low-noise amplifier; logic 1 turns on circuit block.
4. Bit P/A = 1 selects the output of the reference subdivider to the RF synthesizer and the output of the common
reference divider to the IF synthesizer.
5. The coefficient REFDIV2 (4 bits) selects the phase comparison ratio (1 to 16) between IF and RF synthesizers
(see Table 2).
6. P0 is the LSB of the RF main divider coefficient; R0 is the LSB of the reference divider coefficient; A0 is the LSB of
the IF main divider.
1998 Dec 096
Page 7
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
Table 2 Programming the coefficient REFDIV2 for reference subdivider
Table 3 RF and IF synthesizer nominal charge pump currents (gain)
CPISINGLE/DOUBLEI
00470470
01840840
101410470
112480840
(µA)I
CPA
CPB
(µA)
1998 Dec 097
Page 8
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
UMA1022M
radio telephones
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERMIN.MAX.UNIT
V
V
V
V
∆V
P
T
T
T
, V
DD
CCA
− V
C
n
GND
tot
stg
amb
j(max)
, V
DDX
CCB
D
digital and crystal reference supply voltages−0.3+5.5V
analog charge pump supply voltages−0.3+5.5V
difference in voltage between analog and digital supplies−0.3+5.5V
voltage
at pins 7, 9, 10, 11 and 13−0.3V
at pins 1, 3, and 20−0.3V
at pins 4 and 6−0.3V
at pins 15 and 17−0.3V
difference in voltage between any of DGND, AGND and
−0.3+0.3V
+ 0.3V
DD
+ 0.3V
DDX
+ 0.3V
CCB
+ 0.3V
CCA
XGND (these pins should be connected together)
total power dissipation−120mW
IC storage temperature−55+125°C
operating ambient temperature−30+85°C
maximum junction temperature−150°C
HANDLING
All pins withstand class 1 ESD test in accordance with
“EIA/JESD22-A114-A”
electrostatic discharge (ESD) sensitivity
testing Human Body Model (HBM).
THERMAL CHARACTERISTICS
SYMBOLPARAMETERCONDITIONSVALUEUNIT
R
th j-a
thermal resistance from junction to ambientin free air120K/W
1998 Dec 098
Page 9
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
UMA1022M
radio telephones
CHARACTERISTICS
All values refer to the typical measurement circuit; T
V
CCA=VCCB
≥ VDD; unless otherwise specified. Characteristics for which only a typical value is given are not tested.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supplies; pins 5, 12, 16 and 19
V
DD
, V
digital and crystal reference supply
DDX
voltages
V
CCA
I
DD
I
DDX1
I
DDX2
I
CCA
, V
charge pump supply voltagesV
CCB
synthesizer digital supply currentVDD=3V;E=1;
reference block supply currentV
crystal oscillator and buffer currentsV
RF synthesizer charge pump and
prescaler supply currents
I
CCB
IF synthesizer charge pump and
prescaler supply currents
I
tot(pd)
total supply currents
(I
CCA(pd)+IDD(pd)+ICCB(pd)+IDDX(pd)
in power-down mode
=25°C; VDD=V
amb
VDD=V
V
CCA
CCA
= V
= V
DDX
CCB
CCB
;
ONA and ONB=1
= 3 V; XON = 0−0.250.4mA
DDX
= 3 V; XON = 1−1.51.8mA
DDX
V
=3V;
CCA
ONA and ONB=1
V
=3V;
CCB
ONA and ONB=1
E=VDD; CLK and
)
DATA = 0 V or VDD;
ONA and ONB=0;
XON = 0
≥ V
≥ V
= 2.7 to 5.5 V; V
DDX
DD
DD
CCA=VCCB
= 2.7 to 5.5 V;
2.73.05.5V
2.73.05.5V
−1.52.1mA
−8.19.8mA
−4.85.7mA
−4080µA
RF main divider input; pin 15
f
RF
V
RF(rms)
RF input frequency300−2100MHz
AC-coupled input signal level (RMS
small signal differential voltage gainXON = 1; f
limiting differential output voltage
XON = 1−2−V
= 10 MHz 182022dB
xtal
swing (peak-to-peak value)
∆f/f(V
)frequency stability as a function of
DDX
V
=3V±5%; note 2 −±0.25 −ppm
DDX
supply voltage change (referenced to
initial frequency)
−VDD+ 0.3V
DD
DD
V
System specification
FTRF
IF
RF frequency and close harmonics
note 3−70−dBc
feedthrough to IF frequency
FTIF
RF
IF frequency and close harmonics
note 3−50−dBc
feedthrough to RF frequency
Notes
1. Conditions: 0.4 < V
CPA
<(V
− 0.4) and 0.4 < V
CCA
CPB
<(V
CCB
− 0.4).
2. This value is directly dependent on the external resonator quality factor. Only guaranteed for the application circuit
which is given in Fig.5.
3. Only guaranteed on the Philips application board.
1998 Dec 0911
Page 12
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
UMA1022M
radio telephones
SERIAL BUS TIMING CHARACTERISTICS
V
DD=VDDX=VCCA=VCCB
SYMBOLPARAMETERMIN.TYP.MAX.UNIT
Serial programming clock; CLK
t
r
t
f
T
cy
input rise time−1040ns
input fall time−1040ns
clock period100−−ns
Enable programming;
t
START
t
END
t
W(min)
t
SU;E
delay to rising clock edge100−−ns
delay from last falling clock edge20−−ns
minimum inactive pulse width1500
enable set-up time to next clock edge20−−ns
Register serial input data; DATA
t
SU;DAT
t
HD;DAT
input data to clock set-up time20−−ns
input data to clock hold time20−−ns
=3V; T
E
=25°C; unless otherwise specified.
amb
(1)
−−ns
Note
1. The minimum pulse width (t
W(min)
a) Main divider input frequency
b) Reference divider input frequency
handbook, full pagewidth
CLK
DATA
E
t
SU;DAT
LSBMSBADDRESS
) can be smaller than 1.5 µs when the following conditions are fulfilled:
383
>
f
----------------
RF
t
W(min)
>
---------------t
3
W(min)
T
cy
t
t
f
r
t
HD;DAT
f
xtal
t
ENDtSU;E
t
START
Fig.3 Serial bus timing diagram.
1998 Dec 0912
t
W(min)
MGE628
Page 13
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
UMA1022M
radio telephones
AC TIMING CHARACTERISTICS
V
DD=VDDX=VCCA=VCCB
SYMBOLPARAMETERMIN.TYP.MAX.UNIT
t
PUP
t
PDWN
t
START
delay for initial power-up−400−µs
time for power-down from E = 0 (ONA/ONB=0)−100−µs
time to turn-on either the RF or IF synthesizer from
ONA/ON
t
END
time to turn-off either the RF or IF synthesizer from
ONA/ON
t
SEND
handbook, full pagewidth
waiting time before sending data on the serial bus15000−−µs
VDD = V
=3V; T
B
B
CCA
= V
CCB
=25°C; unless otherwise specified.
amb
t
START
−50−µs
−70−µs
I
tot
ONA = '1'
or
ONB = '1'
t
PUP
t
END
t
PDWN
E
t
SEND
MGE631
Fig.4 AC timing characteristics.
1998 Dec 0913
Page 14
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
APPLICATION INFORMATION
handbook, full pagewidth
VCO supply
12 Ω
100 nF
analog
supply
digital
supply
crystal
clock
12 Ω
100 nF
56 pF
1 kΩ
4.7 µF
IF
VCO
(1)
(1)
(1)
18 Ω
18 Ω
18 Ω
IFRF
56 Ω
15 pF
XIN
XGND
XOUT
CP
V
CCB
IF
ON
DGND
DATA
1
2
3
B
4
5
B
6
B
7
8
E
9
10
UMA1022M
20
19
18
17
16
15
14
13
12
11
analog supply
XIN
V
DDX
XOUT
CP
A
V
CCA
RF
A
AGND
ON
A
V
DD
CLK
12 Ω
100 nF
12 Ω
100 nF
56 pF
100 nF
1 kΩ
12 Ω
15 pF
13 MHz
15 pF
analog
supply
(1)
(1)
56 Ω
digital
supply
UMA1022M
VCO supply
12 Ω
100 nF
4.7 µF
RF
VCO
(1)
18 Ω
18 Ω
18 Ω
MGE630
1 kΩ1 kΩ1 kΩ
3-wire bus
(1) Loop filter values depend on the application.
Fig.5 Typical test and application diagram.
1998 Dec 0914
Page 15
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
duplex
filter
transmit
data
transmit
mixer
SPLITTER
MAIN DIVIDER
OSCILLATOR
MAIN DIVIDER
handbook, full pagewidth
power
amplifier
RF PLL
VOLTAGE
CONTROLLED
OSCILLATOR
RF
IF
UMA1022M
REFERENCE
DIVIDER
LOW-PASS
FILTER
COMPARATOR
CHARGE PUMP
COMPARATOR
CHARGE PUMP
RF
PHASE
AND
IF
PHASE
AND
UMA1022M
crystal
clock
3-wire
bus
low noise
amplifier
band-pass
filter
first
mixer
VOLTAGE
SPLITTER
IF
filter
second
mixer
CONTROLLED
OSCILLATOR
IF PLL
to demodulation
Fig.6 Application block diagram.
LOW-PASS
FILTER
MGE629
1998 Dec 0915
Page 16
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
PACKAGE OUTLINE
SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
20
D
c
y
Z
11
E
H
UMA1022M
SOT266-1
A
X
v M
E
A
pin 1 index
110
w M
b
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
1.5
A2A
1
0.1501.4
1.2
0.25
b
3
p
0.32
0.20
UNITA
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
p
cD
0.20
6.6
0.13
6.4
02.55 mm
scale
(1)E(1)
eHELLpQZywv θ
4.5
0.651.00.2
4.3
6.6
6.2
Q
A
2
A
1
detail X
0.75
0.65
0.45
0.45
(A )
L
p
L
A
3
θ
0.130.1
0.48
0.18
(1)
o
10
o
0
OUTLINE
VERSION
SOT266-1
IEC JEDEC EIAJ
REFERENCES
1998 Dec 0916
EUROPEAN
PROJECTION
ISSUE DATE
90-04-05
95-02-25
Page 17
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
UMA1022M
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1998 Dec 0917
Page 18
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
UMA1022M
radio telephones
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, SQFPnot suitablesuitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJsuitablesuitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Dec 0918
Page 19
Philips SemiconductorsProduct specification
Low cost dual frequency synthesizer for
radio telephones
NOTES
UMA1022M
1998 Dec 0919
Page 20
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands435102/750/04/pp20 Date of release: 1998 Dec 09Document order number: 9397 750 04825
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