Datasheet UMA1016AT, UMA1016xT, UMA1016BT Datasheet (Philips)

DATA SH EET

Product specification
Supersedes data of June 1992
File under Integrated Circuits, IC03

1995 Jul 12

INTEGRATED CIRCUITS

UMA1016xT

Frequency synthesizer for
radio communication equipment

1995 Jul 12 2

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

FEATURES

• RF input frequencies to 1 GHz

• Fully programmable RF divider

• 3-wire serial bus interface

• On-chip 3 to 16 MHz crystal oscillator

• Mask programmable ÷2to÷31 reference divider ratio

• Up to 1 MHz channel spacing

• Crystal frequency buffered output

• Dual register architecture for fast Tx/Rx switching in

TDD single synthesizer systems

• Phase detector compensated for supply and
temperature variations

• Power-down mode.

APPLICATIONS

• 900 MHz cordless telephones

• Portable battery-powered radio equipment.

GENERAL DESCRIPTION

The UMA1016xT is a low power synthesizer for radio
communications. Manufactured in bipolar technology, it is
designed for a 70 to 1000 kHz channel spacing in the
500 to 1000 MHz band. The channel is programmed via a
3-wire serial bus. The internal dual register architecture
allows a single synthesizer to be used in TDD systems.
Fast switching between transmit and receive frequencies
is achieved without the need for bus overhead. It also
incorporates a sensitive, low power RF divider and a
dead-zone-eliminated 3-state phase comparator.
A power-down mode enables the circuit to be idled.

QUICK REFERENCE DATA

ORDERING INFORMATION

Notes

1. UMA1016AT has a Reference Division Factor of 27.

2. UMA1016AT has a Reference Division Factor of 16.

3. UMA1016xT is a customized version.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

CC

supply voltage 4.5 − 5.5 V

V

DD

supply voltage 4.5 − 5.5 V

I

CC

+ I

DD

supply current − 12 − mA

I

DD(pd)

digital supply current in power-down − 0.8 − mA

f

ref

phase comparator frequency 70 250 1000 kHz

RF

I

RF input frequency T

amb

= −10 to +70°C 500 − 800 MHz

T

amb

= 0 to +70°C 500 − 1000 MHz

T

amb

operating ambient temperature −10 − +70 °C

TYPE

NUMBER

PACKAGE

NAME PIN POSITION VERSION

UMA1016AT

(1)

SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

UMA1016BT

(2)

SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

UMA1016xT

(3)

SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

1995 Jul 12 3

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MGA193 - 1

REGISTER

Tx

LATCH

RF

DIVIDER

Rx

LATCH

OSCILLATOR

BIAS

GENERATORS

PHASE

DETECTOR

INTERFACE

Ck
DQ

AMPLIFIER

BUFFER

DIVIDER

2 – 31

.

.

REGISTER

Tx

LATCH

MAIN

DIVIDER

Rx

LATCH

12

3

4

5

6

7

16

15

14

12

11

10

9

CP

V

CC

AGND

Tx/Rx

EN

CK

DATA

RO1 RO2

V

DD

REFCK

HPDN

DGND

RFI

UMA1016XT

1995 Jul 12 4

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

PINNING

SYMBOL PIN DESCRIPTION

RO1 1 crystal oscillator input or TCXO

input
RO2 2 oscillator output to crystal circuit
V

DD

3 5 V supply to digital section

REFCK 4 reference crystal frequency

buffered output
HPDN 5 Hardware Power-Down Not;

IC operates when pin is HIGH
DGND 6 digital ground
RFI 7 1 GHz RF signal input
i.c. 8 internally connected
DATA 9 programming bus data input
CK 10 programming bus clock input
EN 11 programming bus enable input

(active LOW)
TX/

RX 12 transmit (HIGH)/receive (LOW)

mode select input
i.c. 13 internally connected
AGND 14 analog ground
V

CC

15 5 V supply to charge pump

circuit
CP 16 charge pump output

Fig.2 Pin configuration.

handbook, halfpage

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

CP
V

CC

AGND
i.c.
TX/RX

EN
CK
DATA

RO1

RO2
V

DD

REFCK

HPDN

DGND

RFI

i.c.

UMA1016XT

MGA192 - 1

FUNCTIONAL DESCRIPTION
General

The UMA1016xT is a low power synthesizer for radio
communications in the range 500 to 1000 MHz. It includes
an oscillator circuit, reference divider, RF divider, 3-state
phase and frequency comparator, charge pump and main
control circuit for the transfer of serial data into two internal
registers.

V

DD

supplies power to the digital circuits while VCC powers
the charge pump. VDD and VCC are nominally 5 V but will
operate in the range 4.5 V to 5.5 V.

Reduced noise coupling is facilitated by separate digital
and analog ground pins which must always be externally
connected to the same DC potential to prevent the flow of
large currents across the die.

The synthesizer is placed in idle mode during power-down
but the oscillator and buffer remain operative and may be
used as a clock for system timing.

Main divider

The main divider is a fully programmable pulse-swallow
type. Following a sensitive (50 mV, −13 dBm) input
amplifier, the RF signal is applied to a 13-bit divider
(MD13 to MD1). The division ratio is provided via the serial
bus to two 13-bit latches, corresponding to transmit and
receive frequencies. The serial programming register is
written to under processor control, independently of divider
operation. This removes difficulty if using a low data bus
transmission speed. The new ratio is transferred to the
appropriate latch when the programming enable signal
(

EN) returns HIGH.

The last register bit (PB0) is used to determine whether the
new value is loaded into the transmit (PB0 = 1) or receive
(PB0 = 0) frequency latch. To avoid spurious phase
changes, the divider incorporates the new ratio only at the
end of the on-going reference period. The minimum
division ratio is 512. One reference cycle is required to
update a new ratio. Internal power-on occurs rapidly.

1995 Jul 12 5

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

Oscillator

External capacitive feedback is applied to the common
collector Colpitts oscillator which has high voltage supply
rejection and negligible temperature drift. It is designed to
function as an input buffer without the need for external
components when a TCXO or other clock is used.
A separate output buffer, which remains active during
power-down (HPDN taken LOW), provides a TTL
compatible signal to drive external logic circuits (REFCK).

Reference divider

The reference divider has a fixed divider ratio set by metal
masking between 2 and 31. For example, a 4 MHz crystal
connected to the oscillator and a ÷16 ratio allows a
channel spacing of 250 kHz. Other frequencies and ratios
are possible.

Phase comparator

The phase comparator combines a phase and frequency
detector and charge pump (see Fig.3). The charge pump
current is internally fixed and determined for fast switching.
It is compensated against power supply and temperature
variation.

The detector is assembled from dual D-type flip-flops
which, together with feedback, remove the ‘dead’ zone.
Upon the detection of a phase error, either UP or DO go
HIGH. This gates the appropriate current generator to
source or sink 1.75 mA at the output pin. When no phase
error is detected, CP becomes 3-state. The tuning voltage
of the VCO is established from the sum of the current
pulses into the loop filter.

A simple passive loop filter may be used to offer high
performance without requiring an operational-amp.
The phase comparator function is summarized in Table 2.

Main control interface

The programming control interface permits access to two
internal latches, denoted Tx and Rx. The serial input bits
on DATA, entered MSB first, are converted to a parallel
word and stored in the appropriate latch under the control
of the last entered register bit (PB0). When this is set

HIGH, data serially fed to the register is loaded into the
transmit (Tx) latch; when PB0 is LOW, the data is
transferred to the receive latch (Rx).

The data sent to the synthesizer is loaded in bursts framed
by the signal

EN. Programming clock edges, together with
their appropriate data bits, are ignored until EN becomes
active (LOW). The internal latches are updated with the
latest programming data whenEN returns inactive (HIGH).
Only the last 15 bits serially clocked into the device are
retained within the programming register. One extra shift
register bit (PB7) can be internally added via metal
masking to allow direct software compatibility with a 7-bit
swallow counter and a 64/65 dual-modulus prescaler.
No check is made on the number of clock pulses received
during the time that programming is enabled. EN going
HIGH while CLOCK is still LOW generates an active clock
edge causing a shift of the data bits.

Data programmed into the register is lost during
power-down (HPDN taken LOW). The maximum serial bus
clock speed is specified as 5 MHz. Minimum speed is
limited by the clock edge rise and fall times to ensure that
no data transparency condition can exist.

Independent of any serial programming activity, the
RF divider chain uses the data previously stored within the
selected latch to determine the synthesized channel
frequency. The Tx/Rx signal controls which latch is read to
preload the counter bits at each division cycle. When new
data is updated into the device, it is used during the cycle
following latch selection by the Tx/Rx control line.

If the Tx/Rx line is tied LOW, only data loaded into the Rx
latch is used. In this event the serial data stream clocked
into the synthesizer must terminate with an ‘0’. The logic
diagram for the first bits of the programming interface is
shown in Fig.3. The other bits are processed in a similar
manner by a further 9 stages of the shift
register-latches-multiplexer.

The signals supplied to the circuit are described by the
timing diagram. The table of values has been specified for
maximum bus speed. Under slow clocking conditions, rise
and fall times must not be excessively slow.

1995 Jul 12 6

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

Table 1 Main divider division ratio

Table 2 Operation of phase comparator

Table 3 Register and latch bit allocations

Note

1. pb7; see Section “Main control interface”.

MAIN COUNTER

MD1 MD2 ../.. MD7 MD8 ../.. MD12 MD13

LSB MSB

SYMBOL F

ref

< F

var

F

ref

> F

var

F

ref=Fvar

UP010
DO100
I

pcd

−1.75 mA +1.75 mA <±5nA

FIRST REGISTER AND LATCH BIT ALLOCATIONS LAST IN

pb14 pb13 pb12 pb11 pb10 pb9 pb8 pb7

(1)

pb6 pb5 pb4 pb3 pb2 pb1 pb0

md13 md12 md11 md10 md9 md8 md7 X md6 md5 md4 md3 md2 md1 address

Fig.3 Phase comparator block diagram.

handbook, full pagewidth

MGA194

var

ref

on/off

V

CC

pump output

1.75 mA

on/off

1.75 mA

PHASE AND

FREQUENCY

DETECTOR

UP

DO

AGND

1995 Jul 12 7

Philips Semiconductors Product specification

Frequency synthesizer for

radio communication equipment

UMA1016xT

handbook, full pagewidth

MGA195

MUX

OUT

SEL

R

B

FLIPFLOP

D

Q

CK

FLIPFLOP

D

Q

CK

FLIPFLOP

D

Q

CK

FLIPFLOP

D

Q

CK

FLIPFLOP

D

Q

CK

DQ

EN

LATCH

DQ

EN

LATCH

DQ

EN

LATCH

DQ

EN

LATCH

FLIPFLOP

DQ

CK

DQ

EN

LATCH

DQ

EN

LATCH

DQ

EN

LATCH

DQ

EN

LATCH

MUX

OUT

SEL

R

B

MUX

OUT

SEL

R

B

MUX

OUT

SEL

R

B

DQ

EN

LATCH

DATA

CK

EN

End_Count_CK

Not_End_Count

Tx / Rx

Bit

0

Bit

1

Bit

2

Bit

3

main divider coefficient

programming shift
register

transmit
frequency
latch

receive
frequency
latch

coefficient
select
multiplexer

Rx Ld

Tx Ld

Select

DATA out

Shift CK

PB0

Fig.4 Simplified interface logic diagram.

1995 Jul 12 8

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

Fig.5 Logic interface signals.

handbook, full pagewidth

MGA196

next

ladrslsb

t

start

t

wid

t

new

t

end

t

r

t

f

t

cyc

t

h1

t

su

CK

DATA

EN

msb

1995 Jul 12 9

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

TIMING CHARACTERISTICS

V

DD

and VCC=5V; T

amb

= −10 to +70 °C; unless otherwise specified; typical values measured at VCC and VDD=5V;

T

amb

=25°C; note 1.

Note

1. Minimum and maximum values are for maximum clock speed.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DD

digital supply voltage range −0.2 − 7V

V

CC

analog supply voltage range −0.2 − 7V

V

i

input voltage range to ground 0 − V

DD

V

T

stg

storage temperature range −55 − 125 °C

T

amb

operating ambient temperature −10 − 70 °C

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

Serial programming clock (pin 10)

f

ck

clock frequency 0.01 4 5 MHz

t

r

rise time − 550ns

t

f

fall time 550ns

T

cy

clock period 200 −−ns

Enable programming (pin 11)

t

start

delay to rising clock edge 30 −−ns

t

end

delay from last clock edge 0 −−ns

t

width

minimum inactive pulse width 200 −−ns

t

new

delay from EN inactive to new data 300 −−ns

Register serial input data (pin 9)

t

su

input data to CK set-up time 10 −−ns

t

h1

input data to CK hold time 10 −−ns

1995 Jul 12 10

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

CHARACTERISTICS

V

DD

and VCC=5V; T

amb

=25°C; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Power supply

V

DD

digital voltage supply VCC=V

DD

4.5 5 5.5 V

V

CC

analog voltage supply 4.5 5 5.5 V

I

DD

digital supply current VDD= 5.5 V; REFCK off − 10.1 10.8 mA

I

CC

analog supply current VCC= 5.5 V; pump off − 1.9 2.1 mA

I

DD(pd)

digital supply current in power-down mode − 0.8 1.5 mA

RF divider input (RFI)

f

vco

RF frequency range T

amb

= −10 to +70°C 500 − 800 MHz

T

amb

= 0 to +70°C 500 − 1000 MHz

V

rf(rms)

input signal voltage level (RMS value) 50 − 200 mV

R

iRF

input resistance RF=1GHz − 350 −Ω

C

iRF

input capacitance indicative; not tested − 1.5 − pF

N main divider division ratio 512 − 8191

Oscillator and reference divider (RO1, RO2)

f

ref

oscillator frequency range R

ref(ck)

used 3 − 16 MHz

V

osc(rms)

sinusoidal input level at pin 1 (RMS value) 0.1 − 0.5 V

C

o1

parasitic capacitance at pin 1 indicative; not tested − 5 − pF

Z

o2

output impedance at pin 2 indicative; not tested − 2 − kΩ

C

o2

output capacitance indicative; not tested − 5 − pF

Phase comparator and charge pump output (CP)

f

cp

phase detector frequency range 70 250 1000 kHz

I

cp(source)

charge pump source current VCC= 4.5 to 5.5 V −2.2 −1.75 −1.3 mA

I

cp(sink)

charge pump sink current VCC= 4.5 to 5.5 V 1.3 1.75 2.2 mA

I

cp(leak)

charge pump off leakage current −10 − +10 nA

V

cp

charge pump voltage compliance range Icp within specified

range

0.5 − VCC− 0.5 V

1995 Jul 12 11

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

Interface logic input signal levels (HPDN, EN, DATA, CK, Tx/Rx)

V

IH

HIGH level input voltage all inputs 3 − VDD+ 0.3 V

V

IL(PD)

LOW level input voltage HPDN −0.3 − 0.6 V

V

IL

LOW level input voltage except HPDN −0.3 − 1V

I

bias

input bias current logic 1 −−5 µA

logic 0 −5 −− µA

C

i

input capacitance indicative; not tested − 3 − pF

Oscillator buffered logic output signal (REFCK)

V

oh

HIGH level driven output voltage VDD= 5 V 3.5 4.0 VDD− 0.5 V

V

ol

LOW level driven output voltage 0 − 0.4 V

I

o(sink)

output sink current VCL= 0.5 V −0.4 −− mA

t

r

reference clock output rise time CI=25pF − 50 − ns

t

f

reference clock output fall time CL=25pF − 50 − ns

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1995 Jul 12 12

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

APPLICATION INFORMATION

In a typical single-synthesizer application, the circuit is
connected as shown in Fig.6. Both analog and digital
supplies are decoupled to ground with HF and LF filter
capacitors. Correct oscillator operation requires capacitors
both to ground and to provide feedback across the
amplifier. Five signals are shown fed from a
microcontroller to provide serial programming, control
TDD frequency selection and initiate the power-down
mode. Other system logic may also be clocked by a crystal
frequency output from the synthesizer.

A passive 2nd-order loop filter giving a 3rd-order system
response is shown in Fig.6. Indicated values are intended
for rapid frequency switching (500 µs), 200 kHz channel
spacing (reference ÷27) and breakthrough levels below

−60 dB. The VCO output shows a power splitter supplying
both the synthesizer RF input and drive buffer for other
system components (RF amplifier in transmit mode, input
mixer in receive mode). The minimizing of loop filter node
leakage currents requires careful board layout.

Fig.6 Application diagram.

handbook, full pagewidth

MGA197 - 2

UMA1016XT

1
2
3
4
5
6
7
8

16

15
14
13
12
11
10

9

P4
P3
P2
P1

P0

10
nF

47
µF

33

Ω

68 pF 33 pF

220
pF

5.4 MHz

REFCK

10 nF

V

P

47
µF

V

P

1
nF

VCO

12 Ω

12 Ω

RFout

100

Ω

82 Ω

330 pF

4.7
nF

18 kΩ

1995 Jul 12 13

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

PACKAGE OUTLINES

X

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

(A )

3

A

8

9

1

16

y

pin 1 index

UNIT

A

max.

A1A2A

3

b

p

cD

(1)E(1) (1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

inches

1.75

0.25

0.10

1.45

1.25

0.25

0.49

0.36

0.25

0.19

10.0

9.8

4.0

3.8

1.27

6.2

5.8

0.7

0.6

0.7

0.3

8
0

o
o

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

1.0

0.4

SOT109-1

95-01-23
97-05-22

076E07S MS-012AC

0.069

0.010

0.004

0.057

0.049

0.01

0.019

0.014

0.0100

0.0075

0.39

0.38

0.16

0.15

0.050

1.05

0.041

0.244

0.228

0.028

0.020

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

SO16: plastic small outline package; 16 leads; body width 3.9 mm

SOT109-1

1995 Jul 12 14

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

SOLDERING SO or SSOP
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
cases reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

(order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

SSOP
Wave soldering is not recommended for SSOP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The longitudinal axis of the package footprint must

be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of

4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

METHOD (SO OR SSOP)
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds at 270 to 320 °C.

1995 Jul 12 15

Philips Semiconductors Product specification

Frequency synthesizer for
radio communication equipment

UMA1016xT

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of this specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

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COPENHAGEN S, Tel. [phone], Fax. [phone]

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. [phone], Fax. [phone]

Germany: P.O. Box 10 63 23, 20043 HAMBURG,

Tel. [phone], Fax. [phone].

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone] 911, Fax. [phone]

India: Philips INDIA Ltd, Shivsagar Estate, A Block,

Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. [phone], Fax. [phone]

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. [phone], Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS S.r.l.,

Piazza IV Novembre 3, 20124 MILANO,
Tel. [phone], Fax. [phone]

Japan: Philips Bldg13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,

Tel. [phone], Fax. [phone]

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
(From 10-10-1995: Tel. [phone], Fax. [phone])

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. [phone],
Fax. [phone]

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. [phone], Fax. [phone]

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

South Africa: S.A. PHILIPS Pty Ltd.,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430, Johannesburg 2000,
Tel. [phone], Fax. [phone].

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone]

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,

International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone] (from 10-10-1995: [phone])

SCD41 © Philips Electronics N.V. 1995

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

413061/1500/03/pp16 Date of release: 1995 Jul 12
Document order number: 9397 750 00206