Datasheet TLE4274V10, TLE4274GV85, TLE4274GV50, TLE4274DV50, TLE4274GV10 Datasheet (Siemens)

Low-Drop Voltage Regulator TLE 4274

Features

• Output voltage tolerance ≤ ± 4 %

• Low-drop voltage

• Very low current consumption

• Short-circuit proof

• Reverse polarity proof

• Suitable for use in automotive electronics

P-TO220-3-1

Type Ordering Code Package

TLE 4274 V10 Q67000-A9258 P-TO220-3-1
TLE 4274 V85 Q67000-A9257 P-TO220-3-1
TLE 4274 V50 Q67000-A9256 P-TO220-3-1
TLE 4274 D V50 Q67006-A9331 P-TO252-3-1
TLE 4274 G V10 Q67006-A9261 P-TO263-3-1
TLE 4274 G V50 Q67006-A9259 P-TO263-3-1
TLE 4274 G V85 Q67006-A9260 P-TO263-3-1

SMD = Surface Mounted Device

Functional Description

The TLE 4274 is a low-drop voltage regulator in a
TO220 package. The IC regulate s an inpu t vol tage up
to 40 V to

V

= 5.0 V (V50), 8.5 V (V85) and 10 V

Qrated

(V10). The maximum output current is 400 mA. The IC
is short-circuit proof and incorporates temperature
protection that disables the IC at over temperature.

P-TO252-3-1

P-TO263-3-1

Dimensioning Information on External Components

C

The input capacitor
approx. 1Ω in series with
be damped. The output capacitor
Stability is guaranteed at values

is necessary for compensating line influences. Using a resistor of

I

, the oscillating of input inductivity and input capacitance can

C

I

C

is necessary for the stability of the regulation circuit.

Q

C

≥ 22 µF and an ESR of ≤ 3 Ω within the operating

Q

temperature range.

Semiconductor Group 1 1998-11-01

TLE 4274

Circuit Description

The control amplifier compares a reference voltage to a voltage that is proportional to the
output voltage and drives the base of the series transistor via a buffer. Saturation control
as a function of the load current prevents any oversaturation of the power element. The
IC also incorporates a number of internal circuits for protection against:

• Overload

• Overtemperature

• Reverse polarity

Pin Configuration (top view)

P-TO220-3-1

GND

Ι

Q

AEP01957

P-TO252-3-1

GND

Ι

Q

AEP02512

P-TO263-3-1

GNDΙQ

AEP02281

Figure 1

Pin Definitions and Functions
Pin No. Symbol Function

1 I Input; block to ground directly at the IC with a ceramic

capacitor.
2GNDGround
3Q Output; block to ground with a ≥ 22 µF capacitor.

Semiconductor Group 2 1998-11-01

TLE 4274

1

Ι

Figure 2
Block Diagram

Temperature

Sensor

Bandgap

Reference

Control

Amplifier

Buffer

Saturation

Control and

Protection

Circuit

2

GND

AEB01959

3

Q

Semiconductor Group 3 1998-11-01

TLE 4274

Absolute Maximum Ratings

T

= – 40 to 150 °C

j

Parameter Symbol Limit Values Unit Test Condition

min. max.

Voltage Regulator
Input

Voltage
Current

V
I

I

I

–42 45
––

V

–

–
Internally limited

Output

Voltage
Current

V
I

Q

Q

–1.0 40 V –
– – – Internally limited

Ground

Current

I

GND

–100mA–

Temperature

Junction temperature
Storage temperature

T

j

T

stg

–150°C–
–50 150 °C–

Note: Maximum ratin gs are absolute ratings; exceeding any one of these values may

cause irreversible damage to the integrated circuit.

Operating Range
Parameter Symbol Limit Values Unit Remarks

min. max.

Input voltage

Junction temperature

V

T

I

j

5.5

9.0/10.54040/40

V

V50
V85/V10

–40 150 °C–

Thermal Resistance

Junction ambient
Junction ambient
Junction case R

1)

Soldered in, min. footprint

Semiconductor Group 4 1998-11-01

R
R

thja
thja
thjc

–65K/WTO220
–70K/WTO252

1)

, TO263

–4K/W–

TLE 4274

Characteristics

V

= 13.5 V; – 40 °C < Tj<150°C (unless otherwise specified)

I

Parameter Symbol Limit Values Unit Measuring Conditions

min. typ. max.

Output voltage
V50-Version

Output voltage
V85-Version

Output voltage
V10-Version

Output current
limitation

1)

Current
consumption;

I

= II– I

q

Q

Current
consumption;

I

= II– I

q

Drop voltage

Q

1)

Load regulation

V

Q

V

Q

V

Q

I

Q

I

q

I

q

I

q

V

dr

∆V

4.8 5 5.2

8.16 8.5 8.84

9.6 10 10.4

V

V

V

5mA<IQ<400mA

V

6V<

<40V

I

5mA<IQ<400mA

V

9.5 V <

<40V

I

5mA<IQ<400mA

V

11 V <

<40V

I

400 600 – mA –

– 100 220 µA IQ=1mA

–
–

8
20

15
30

mA
mA

I

= 250 mA

Q

I

= 400 mA

Q

– 250 500 mV IQ= 250 mA

V

= VI – V

dr

Q

– 2050mVIQ=5mA to

Q

400 mA

Line regulation

Power supply
ripple rejection

Temperature
output voltage

∆V

Q

PSRR

dV

Q

-----------

dT

– 1025mV∆Vl= 12 V to 32 V

I

=5mA

Q

–60–dBfr= 100 Hz;

V

=0.5V

r

SS

–0.5–mV/K–

drift

1)

Measured when the outp ut vo lta ge VQ has dropped 100 mV from the nominal value obtained at VI=13.5V.

Semiconductor Group 5 1998-11-01

TLE 4274

Input

V

Ι

Figure 3
Measuring Circuit

Ι

Ι

µ

100 F

C

Ι

100 nF

1

3

Ι

C

Q

µ

22 F

Output

Q

TLE 4274

V

2

Q

R

L

AES01960

Input

1

3

Output

TLE 4274

C

Ι

C

Q

2

AES01961

Figure 4
Application Circuit

Semiconductor Group 6 1998-11-01

Typical Performance Characteristics (V50, V85 and V10):

TLE 4274

Drop Voltage Vdr versus

I

Output Current

600

mV

V

dr

400

300

200

100

0

0 100

Q

T

= 25 C

T

j

V

dr=QNOM-0.1 V

= 125 C

j

V

300

AED01962

400200

mA

Ι

Q

Output Current
Input Voltage V

800

mA

Ι

Q

600

T

j

V

Q

400

200

0

I

versus

Q

I

= 25 C
= 0 V

20010

30

AED01963

40

50

V

V

Ι

Current Consumption I
Output Current I

60

mA

Ι

q

40

30

20

10

0

100

0 200

(high load)

Q

T
V

300

versus

q

= 25 C

j

= 13.5 V

Ι

AED02267

600400

mA

Ι

Q

Current Consumption Iq versus
Output Current I

0.6

mA

Ι

q

0.4

0.3

0.2

0.1

0

01020mA40 60

(low load)

Q

= 25 C

T

j

= 13.5 V

V

Ι

30

AED02268

Ι

Q

Semiconductor Group 7 1998-11-01

Typical Performance Characteristics (V50):

TLE 4274

Output Voltage VQ versus
Junction Temperature Tj

5.20
V

V

Q

5.10

= 13.5 V

V

Ι

5.00

4.90

4.80

4.70

4.60

40-40 0

80 120

AED01966

160

C

T

j

Current Consumption I
Input Voltage V

30

mA

Ι

q

20

10

0

0

10 20

I

= 25 C

T

j

R

L

= 20

Ω

30

versus

q

AED02269

V

V

Ι

50

Output Voltage V
Input Voltage V

6

V

V

Q

5

4

V

Ι

3

2

1

0

0

I

V

=

Q

2

versus

Q

T

j

R

L

4

V

Q

= 25 C

Ω

= 20

AED01968

1068

V

V

Ι

Input Current II versus

= 25 C

j

= 10 k

L

I

Ω

0

Input Voltage V

3.5

mA

Ι

Ι

3.0

2.5

2.0

1.5

1.0

0.5

T
R

0

-2

-50 -25

AED01977

25 50

V

V

Ι

Semiconductor Group 8 1998-11-01

Typical Performance Characteristics for V85:

TLE 4274

Output Voltage VQ versus
Junction Temperature Tj

9.0
V

V

Q

= 13.5 V

V

Ι

8.5

8.0

7.5

Output Voltage V
Input Voltage V

12

V

V

Q

10

0-40 40

versus

Q

I

V

AED01970

12080

T

j

AED01972

Q

C

160

Current Consumption I
Input Voltage V

30

mA

Ι

q

20

10

0

0

10 20

I

= 25 C

T

j

R

L

= 20

Ω

30

Input Current II versus
Input Voltage V

3.5

mA

Ι

Ι

3.0

2.5

I

versus

q

AED02270

V

V

Ι

AED01973

50

8

V

=

V

Ι

Q

6

T

= 25 C

j

R

L

= 34

Ω

2.0

1.5

1.0

T

j

R

L

= 25 C
= 8.5 k

Ω

4

0.5

2

0

08

4

161220

V

V

Ι

0

-2

-50 -25

0

25 50

V

V

Ι

Semiconductor Group 9 1998-11-01

Typical Performance Characteristics for V10:

TLE 4274

Output Voltage VQ versus
Junction Temperature Tj

10.5
V

V

Q

= 13.5 V

V

Ι

10.0

9.5

9.0

Output Voltage V
Input Voltage V

12

V

V

Q

10

0-40 40

versus

Q

I

V

AED01974

12080

T

j

AED01976

Q

C

160

Current Consumption I
Input Voltage V

30

mA

Ι

q

20

10

0

0

10 20

I

= 25 C

T

j

R

L

= 20

Ω

Input Current II versus
Input Voltage V

3.5

mA

Ι

Ι

3.0

I

versus

q

30

AED02270

V

V

Ι

AED01977

50

2.5

8

2.0

V

=

V

Ι

Q

6

T

= 25 C

j

R

L

= 34

Ω

1.5

1.0

T

j

R

L

= 25 C
= 10 k

Ω

4

0.5

2

0

0

08

4

161220

V

V

-2

-50 -25

0

25 50

V

V

Ι

Semiconductor Group 10 1998-11-01

Package Outlines

P-TO220-3-1

(Plastic Transistor Outline)

±0.3

±0.3

17

15.65

1)

13.4

10

9.8

8.5

3.7

±0.2
±0.15

1)

-0.15

A

±0.2

2.8

1.27

0.05

TLE 4274

B

4.4

±0.1

±0.2

9.25

±0.5

C

0...0.15

±0.2

4.55

3x

0.75

±0.1

13.5

2.4

1.05

1)

Typical

2.54

M

BA0.25

C

All metal surfaces tin plated, except area of cut.

±0.1

0.5

GPT05155

Sorts of Packing

Package outlines for tubes, trays etc. are contained in our

Data Book “Package Information”

Dimensions in mm

Semiconductor Group 11 1998-11-01

P-TO252-3-1

(Plastic Transistor Single Outline)

+0.15

6.5

-0.10

5.4

±0.1

1

±0.1

TLE 4274

+0.05

2.3

A

B

-0.10

0.9

+0.08

-0.04

±0.5

9.9

-0.2

6.22

±0.15

0.8
min0.51

0.15

max

per side

3x

0.75

±0.1

2.28

4.57

M

A0.25

B

0.1

All metal surfaces tin plated, except area of cut.

0...0.15

+0.08

0.5

-0.04

±0.1

1

GPT09051

Sorts of Packing

Package outlines for tubes, trays etc. are contained in our

Data Book “Package Information”

SMD = Surface Mounted Device

Dimensions in mm

Semiconductor Group 12 1998-11-01

P-TO263-3-1

(Plastic Transistor Single Outline)

±0.2

10

±0.15

9.8

8.5

±0.3

1

±0.2

(15)

9.25

0...0.15

TLE 4274

4.4

±0.1

1.27

A

1)

1)

8

±0.1

0.75

1.05

2.54

±0.5

4.7

B

0.1

2.4

±0.3

2.7

8˚ max.

0.5

0.05

±0.1

5.08

1)

Typical

M

BA0.25

0.1

All metal surfaces tin plated, except area of cut.

GPT09057

Sorts of Packing

Package outlines for tubes, trays etc. are contained in our

Data Book “Package Information”

SMD = Surface Mounted Device

Dimensions in mm

Semiconductor Group 13 1998-11-01