Datasheet TDA1310A, TDA1310AT Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA1310A

Stereo Continuous Calibration DAC
(CC-DAC)

Preliminary specification
Supersedes data of TDA1310; TDA1310T July 1993
File under Integrated Circuits, IC01

Philips Semiconductors

May 1994

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

FEATURES

• Space saving package DIL8 or SO8

• Low power consumption

• Wide dynamic range (16-bit resolution)

• Continuous Calibration (CC) concept

• Easy application:

– Single 3 to 5 V supply rail
– Output current and bias current are proportional to

the supply voltage

• Fast settling time permits 2×, 4× and 8× oversampling
(serial input) or double speed operation at 4×
oversampling

• Internal bias current ensures maximum dynamic range

• Wide operating temperature range (-40 t +85 °C)

• Compatible with most current Japanese input formats:

– Time multiplexed
– Two’s complement
– TTL

• No zero-crossing distortion.

TDA1310A

GENERAL DESCRIPTION

The TDA1310A is a device of a new generation of
Digital-to-Analog Converters (DACs) which embodies the
innovative technique of Continuous Calibration. The
largest bit-currents are repeatedly generated by one single
current reference source. This duplication is based upon
an internal charge storage principle having an accuracy
insensitive to ageing, temperature and process variations.

The TDA1310A is fabricated in a 1.0 µm CMOS process
and features an extremely low power dissipation, small
package size and easy application. Furthermore, the
accuracy of the intrinsic high coarse-current combined
with the implemented symmetrical offset decoding method
precludes zero-crossing distortion and ensures high
quality audio reproduction. Therefore, the CC-DAC is
eminently suitable for use in (portable) digital audio
equipment.

ORDERING INFORMATION

TYPE NUMBER

PINS PIN POSITION MATERIAL CODE

TDA1310A 8 DIL8 plastic SOT97DE
TDA1310AT 8 SO8 plastic SOT96AG

PACKAGE

May 1994 2

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC

TDA1310A

(CC-DAC)

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DD

I

DD

I

FS

(THD+N)/S total harmonic distortion

S/N signal-to-noise ratio at

t

CS

BR input bit rate at data input −− 18.4 Mbits/s
f

clk

TC

FS

T

amb

P

tot

supply voltage 3 5.0 5.5 V
supply current VDD= 5 V at code 0000H − 3.0 4.0 mA
full scale output current VDD= 5 V 0.9 1.0 1.1 mA

V

=3V − 0.6 − mA

DD

at 0 dB signal level −−65 −61 dB

plus noise-to-signal ratio

− 0.05 0.08 %

at −60 dB signal level −−30 −24 dB

− 36%

at −60 dB signal level;
A-weighted

at −60 dB signal level;

−−33 − dB

− 2.2 − %

− 1.7 − %

A-weighted;
R3=R4=11kΩ;
(see Fig.1); I

=2mA

FS

A-weighted at code 0000H 86 92 − dB

bipolar zero

A-weighted; I

= 2 mA;

FS

− 95 − dB

R3=R4=11kΩ; see Fig.1

current settling time to

− 0.2 −µs

±1 LSB

clock frequency at clock

−− 18.4 MHz

input BCK
full scale temperature

−±400 × 10−6−
coefficient at analog
outputs (IOL; IOR)

operating ambient

−40 − +85 °C
temperature

total power dissipation VDD= 5 V at code 0000H − 15 20 mW

= 3 V at code 0000H − 6.0 − mW

V

DD

May 1994 3

May 1994 4

BLOCK DIAGRAM

(CC-DAC)

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC

Fig.1 Block diagram.

TDA1310A

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

PINNING

SYMBOL PIN DESCRIPTION

BCK 1 bit clock input
WS 2 word select input
DATA 3 data input
GND 4 ground
V

DD

I

OL

I

ref

I

OR

FUNCTIONAL DESCRIPTION

The basic operation of the continuous calibration DAC is
illustrated in Fig.3. The figure shows the calibration and
operation cycle. During calibration of the MOS current
source (Fig.3a) transistor M1 is connected as a diode by
applying a reference current. The voltage Vgs on the
intrinsic gate-source capacitance Cgs of M1 is then
determined by the transistor characteristics. After
calibration of the drain current to the reference value I
the switch S1 is opened and S2 is switched to the other
position (Fig.3b). The gate-to-source voltage Vgs of M1 is
not changed because the charge on Cgs is preserved.
Therefore, the drain current of M1 will still be equal to I
and this exact duplicate of I
terminal.

The 32 current sources and the spare current source of the
TDA1310A are continuously calibrated (see Fig.1). The
spare current source is included to allow continuous
converter operation. The output of one calibrated source is
connected to an 11-bit binary current divider consisting of
2048 transistors. A symmetrical offset decoding principle
is incorporated and arranges the bit switching in such a
way that the zero-crossing is performed only by switching
the LSB currents.

5 supply voltage
6 left channel output
7 reference input
8 right channel output

is now available at the OUT

ref

ref

ref

TDA1310A

Fig.2 Pin configuration.

An internal bias current I
output current IFS in order to achieve the maximum
dynamic range at the outputs OP1 and OP2 in Fig.1.

The reference input current I
current IFS which is a sink current and with gain G
I

which is a source current

bias

,

The current I

is proportional to VDD so the IFS and the I

ref

will be proportional to VDD as well
are constant.

The reference voltage V
maximum dynamic range is achieved over the entire
power supply voltage range.

The tolerance of the reference input current in Fig.1
depends on the tolerance of the resistors R3, R4

ref

(3)

.

and R

is added to the full scale

bias

controls with gain GFS, the

ref

(1)

.

(2)

because GFS and G

in Fig.1 is2⁄3VDD. In this way

ref

bias

the

bias
bias

The TDA1310A (CC-DAC) accepts serial input data
formats of 16-bit word length. Left and right data words are
time multiplexed. The most significant bit (bit 1) must
always be first. The input data format is shown in
Figs 4 and 5.

With a HIGH level on the word select input (WS), data is
placed in the left input register, with a LOW level on the
WS input, data is placed in the right input register
(see Fig.1). The data in the input registers are
simultaneously latched in the output registers which
control the bit switches.

May 1994 5

(1) IFS=GFSxI

(2)

(3)

V

------------­V

∆I

I

DD1

==

---------­I

DD2

refIref

and I

ref

bias=GbiasxIref

I

FS1
FS2

bias1

------------- ­I

bias2

V

–=

------------------------------------------------------------------------------------------------­R3 ∆R3 R4 ∆R4 R

+++++

DD

ref

∆R

ref

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

Calibration principle

a. b.

a. Calibration.
b. Operation.

TDA1310A

Fig.3 Calibration principle.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

T

stg

T

xtal

T

amb

V

es

supply voltage − 6V
storage temperature −55 +150 °C
maximum crystal temperature − +150 °C
operating ambient temperature −40 +85 °C
electrostatic handling note 1 −2000 +2000 V

note 2 −200 +200 V

Notes

1. Human body model; C = 100 pF; R = 1500 Ω; 3 zaps positive and negative.

2. Machine model; C = 200 pF; L = 0.5 µH; R = 10 Ω; 3 zaps positive and negative.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

DIL8 100 K/W
SO8 210 K/W

May 1994 6

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC

TDA1310A

(CC-DAC)

CHARACTERISTICS

V

=5V; T

DD

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

DD

I

DD

SVRR supply voltage ripple rejection note 1 − 30 − dB

Digital inputs; pins WS, BCK and DATA

|I

| input leakage current LOW VI=0V −− 10 µA

IL

| input leakage current HIGH VI=5V −− 10 µA

|I

IH

f

clk

BR bit rate data input −− 18.4 Mbits/s
f

WS

Timing (see Fig.4)

t

r

t

f

t

CY

t

BCKH

t

BCKL

t

SU;DAT

t

HD:DAT

t

HD:WS

t

SU;WS

Analog input; pin I

R

ref

Analog outputs; pins I

RES resolution −− 16 bits
V

DCC

I

FS

TC

FS

I

bias

G

FS

G

bias

=25°C; measured in Fig.1; unless otherwise specified.

amb

supply voltage 3.0 5.0 5.5 V
supply current at code 0000H − 3.0 4.0 mA

clock frequency −− 18.4 MHz

word select input frequency −− 384 kHz

rise time −− 12 ns
fall time −− 12 ns
bit clock cycle time 54 −−ns
bit clock pulse width HIGH 15 −−ns
bit clock pulse width LOW 15 −−ns
data set-up time 12 −−ns
data hold time to bit clock 2 −−ns
word select hold time 2 −−ns
word select set-up time 12 −−ns

ref

reference resistor see Fig.1 7.4 11.0 14.6 kΩ

and I

OL

OR

DC output voltage compliance 2.0 − VDD− 1V
full-scale current 0.9 1.0 1.1 mA
full-scale temperature

−±400 × 10−6−

coefficient
bias current 643 714 785 µA
reference input current to full

11.9 13.2 14.5

scale output current gain
reference input current to bias

8.48 9.42 10.36

current gain

May 1994 7

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC

TDA1310A

(CC-DAC)

SYMBOL PARAMETER CONDITIONS MIN. TYP . MAX. UNIT

(THD+N)/S total harmonic distortion plus

noise-to-signal ratio

t

cs

α

cs

|∆I

| unbalance between outputs

O

|t

| time delay between outputs

d

current settling time to ±1 LSB − 0.2 −µs
channel separation 86 95 − dB

IOL and I

IOL and I

OR

OR

S/N signal-to-noise ratio at bipolar

zero

at 0 dB signal level;
note 2

at −60 dB signal level;
note 2

at −60 dB signal level;
A-weighted; note 2

at −60 dB signal level;

−−65 −61 dB

− 0.05 0.08 %

−−30 −24 dB

− 36%

−−33 − dB

− 2.2 − %

− 1.7 − %

A-weighted; note 2;
R3=R4=11kΩ;
see Fig.1; I

at 0 dB signal level;
f = 20 Hz to 20 kHz

=2mA

FS

−−65 −61 dB

− 0.05 0.08 %

note 1 − 0.2 0.3 dB

−±0.2 −µs

A-weighted at code

86 92 − dB

0000H
A-weighted; IFS = 2 mA;

− 95 − dB
R3=R4=11kΩ;
see Fig.1

Notes

1. V

= 1% of supply voltage; f

ripple

ripple

= 100 Hz.

2. Measured with 1 kHz sine wave generated at sampling rate of 192 kHz.

May 1994 8

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

TDA1310A

Fig.4 Timing and input signals.

Fig.5 Format of input signals.

May 1994 9

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC

TDA1310A

(CC-DAC)

APPLICATION INFORMATION
Remark: the graphs are constructed from average measurement values of a small amount of engineering samples,

therefore no guarantee for typical values is implied.

Measured with a 1 kHz sinewave generated at a
sample frequency (f

(1) Measured within the specified operation supply voltage range

(3 to 5.5 V).

(2) Measured outside the specified operating supply voltage range

(2 to 3 V and 5.5 to 6 V).

) = 192 kHz.

s

Fig.6 Total harmonic distortion as a function

of supply voltage (4fs).

Measured with a 1 kHz sinewave generated at a
sample frequency (f

) = 192 kHz.

s

Fig.7 Total harmonic distortion as a function

of signal level (4fs).

May 1994 10

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

TDA1310A

(1) Measured including all distortion plus noise at a signal level of −60 dB.
(2) Measured including all distortion plus noise at a signal level of 0 dB.

Fig.8 Total harmonic distortion as a function of frequency (4fs).

May 1994 11

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

PACKAGE OUTLINES

9.8

handbook, full pagewidth

seating plane

3.60

3.05

1.15
max

9.2

2.54
(3x)

1.73 max

0.53
max

0.51
min

3.2

max

0.254 M

4.2

max

0.38 max

8.25

7.80

7.62

10.0

8.3

TDA1310A

MSA252 - 1

Dimensions in mm.

8

5

6.48

6.20

41

Fig.9 Plastic DIL, 8-pin (DIL8).

May 1994 12

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

ndbook, full pagewidth

0.7

0.3

5.0

4.8

0.1 SS

8

5

1.45

1.25

4.0

3.8

6.2

5.8

0.7

0.6

A

0.25

0.19

TDA1310A

1.75

1.35

Dimensions in mm.

pin 1

index

1

1.27

4

0.49

0.36

0.25 M
(8x)

Fig.10 Plastic SO, 8-pin (SO8).

0.25

0.10

detail A

1.0

0.5

0 to 8

MBC180 - 1

o

May 1994 13

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC
(CC-DAC)

SOLDERING
Plastic dual in-line packages

Y DIP OR WAVE

B
The maximum permissible temperature of the solder is

260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.

Plastic small-outline packages

BYWAVE
During placement and before soldering, the component

must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.

TDA1310A

A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.

B

Y SOLDER PASTE REFLOW

Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.

R

EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING

IRON OR PULSE

Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)

For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.

-HEATED SOLDER TOOL)

May 1994 14

Philips Semiconductors Preliminary specification

Stereo Continuous Calibration DAC

TDA1310A

(CC-DAC)

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

May 1994 15

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SCD31 © Philips Electronics N.V. 1994

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513061/1500/02/pp16 Date of release: May 1994
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Philips Semiconductors