Datasheet TDA1517ATW Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TDA1517ATW
8 W BTL or 2 × 4 W SE power amplifier
Product specification Supersedes data of 2001 Feb 14 File under Integrated Circuits, IC01
2001 Apr 17
Page 2
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

FEATURES

• Requires very few external components
• Flexibility in use: mono Bridge-Tied Load (BTL) and
stereo Single-Ended (SE); it should be noted that in stereo applications the outputs of both amplifiers are in opposite phase
• High output power
• Low offset voltage at output (important for BTL)
• Electrostatic discharge protection
• Thermal protection
• Reverse polarity safe
• Capable of handling high energy on outputs (VP=0V)
• No switch-on/switch-off plop
• Low thermal resistance.

GENERAL DESCRIPTION

• Fixed gain
• Good ripple rejection
• Mode select switch (operating, mute and standby)
• AC and DC short-circuit safe to ground and V
P
The TDA1517ATW is an integrated class-AB output amplifier contained in a plastic heatsink thin shrink small outline package (HTSSOP20). The device is primarily developed for multimedia applications.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
P
I
ORM
I
q(tot)
I
stb
supply voltage 6 12 18 V repetitive peak output current −−2.5 A total quiescent current − 40 80 mA standby current − 0.1 100 µA
SE application
P
o
SVRR supply voltage ripple rejection R
α
cs
V
n(o)
input impedance 50 −−kΩ
Z
i
output power THD = 10%; RL=4Ω−4−W
=0Ω 46 −−dB
S
channel separation RS=10kΩ 40 55 − dB noise output voltage RS=0Ω−50 −µV
BTL application
P
o
SVRR supply voltage ripple rejection R
output offset voltage −−150 mV
∆V
OO
V
n(o)(offset)
Z
input impedance 25 −−kΩ
i
output power THD = 10%; RL=8Ω−8−W
=0Ω 50 −−dB
S
noise output offset voltage RS=0Ω−70 −µV

ORDERING INFORMATION

TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TDA1517ATW HTSSOP20 plastic, heatsink thin shrink small outline package; 20 leads; body
width 4.4 mm
2001 Apr 17 2
SOT527-1
Page 3
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

BLOCK DIAGRAM

handbook, full pagewidth
non-inverting
input 1
SVRR
V
P1VP2
15
16
3
60 kΩ
2
kΩ
standby
switch
VA
x 1
5
+
−
+
−
15 kΩ
15 kΩ
mute switch
VA
18 kΩ
V
P
+ +
−
mute reference voltage
C
m
8
OUT1a
9
OUT1b
power stage
TDA1517ATW
17
MODE 1 2
mute switch
standby reference voltage
6 7
14 19 20
not connected
18 kΩ
− +
VA
− +
mute switch
4
SGND PGND1 PGND2
inverting
input 2
2
kΩ
18
60 kΩ
input reference voltage
Fig.1 Block diagram.
2001 Apr 17 3
12
OUT2a
13
OUT2b
C
m
power stage
10 11
MGU303
Page 4
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

PINNING

SYMBOL PIN DESCRIPTION
n.c. 1 not connected n.c. 2 not connected IN1+ 3 non-inverting input 1 SGND 4 signal ground SVRR 5 supply voltage ripple rejection n.c. 6 not connected n.c. 7 not connected OUT1a 8 output 1a OUT1b 9 output 1b PGND1 10 power ground 1 PGND2 11 power ground 2 OUT2a 12 output 2a OUT2b 13 output 2b n.c. 14 not connected V
P1
V
P2
15 supply voltage 1
16 supply voltage 2 MODE 17 mode select switch IN2− 18 inverting input 2 n.c. 19 not connected n.c. 20 not connected
handbook, halfpage
1
n.c.
2
n.c.
3
IN1+
4
SGND
5
SVRR
OUT1a OUT1b
PGND1
n.c. n.c.
10
TDA1517ATW
6 7 8 9
Fig.2 Pin configuration.
MGU302
20 19 18 17 16 15 14 13 12 11
n.c. n.c. IN2− MODE V
P2
V
P1
n.c. OUT2b OUT2a PGND2

FUNCTIONAL DESCRIPTION

The TDA1517ATW contains two identical amplifiers with differential input stages. This device can be used for Bridge-Tied Load(BTL) or Single-Ended (SE) applications. The gain of each amplifier is fixed at 20 dB. A special feature of this device is the mode select switch. Since this pin has a very low input current (<40 µA), a low cost supply switch can be used. With this switch the TDA1517ATW can be switched into three modes:
• Standby: low supply current
• Mute: input signal suppressed
• Operating: normal on condition.
2001 Apr 17 4
Page 5
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT.
V
P
V
PSC
V
rp
ERG
o
I
OSM
I
ORM
P
tot
T
vj
T
stg
T
amb

THERMAL CHARACTERISTICS

supply voltage − 18 V AC and DC short-circuit-safe voltage − 18 V reverse polarity voltage − 6V energy handling capability at outputs VP=0V − 200 mJ non-repetitive peak output current − 4A repetitive peak output current − 2.5 A total power dissipation − 5W virtual junction temperature − 150 °C storage temperature −55 +150 °C ambient temperature −40 +85 °C
SYMBOL PARAMETER CONDITIONS VALUE UNIT
tbf −−

DC CHARACTERISTICS

VP= 12 V; T
=25°C; measured in Fig.3; unless otherwise specified.
amb
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V
P
I
q
supply voltage note 1 6.0 12 18 V quiescent current RL= ∞−40 80 mA
Operating condition
V
MODE(oper)
I
MODE(oper)
V
O
∆V
OO
mode switch voltage level 8.5 − V mode switch current V
=12V − 15 40 µA
MODE
DC output voltage − 5.7 − V
DC output offset voltage −−150 mV
P
V
Mute condition
V
MODE(mute)
V
O
∆V
OO
mode switch voltage level 3.3 − 6.4 V DC output voltage − 5.7 − V
DC output offset voltage −−150 mV
Standby condition
V
MODE(stb)
I
stb
mode switch voltage level 0 − 2V standby current − 0.1 100 µA
Note
1. The circuit is DC adjusted at V
= 6 to 18 V and AC operating at VP= 8.5 to 18 V.
P
2001 Apr 17 5
Page 6
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

AC CHARACTERISTICS

VP= 12 V; f = 1 kHz; T
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
SE application; note 1
P
o
output power note 2
THD total harmonic distortion P f
ro(L)
f
ro(H)
G
V
∆G
channel balance −−1dB
V
low frequency roll-off −1 dB; note 3 − 25 − Hz high frequency roll off −1dB 20 −−kHz voltage gain 19 20 21 dB
SVRR supply voltage ripple rejection note 4
Z
input impedance 50 60 75 kΩ
i
V
n(o)(rms)
α
cs
V
o(mote)
noise output voltage (RMS value) note5
channel separation RS=10kΩ 40 55 − dB
output voltage in mute note 7 −−2mV BTL application; note 8 P
O
output power note 2
THD total harmonic distortion P f
ro(L)
f
ro(H)
G
V
low frequency roll-off −1 dB; note 3 − 25 − Hz
high frequency roll off −1dB 20 −−kHz
voltage gain 25 26 27 dB SVRR supply voltage ripple rejection note 4
Z
input impedance 25 30 38 kΩ
i
V
n(o)(rms)
V
o(mute)
noise output voltage (RMS value) note5
output voltage in mute note 7 −−2mV
=25°C; unless otherwise specified.
amb
THD = 1% 2.5 3.3 − W THD = 10% 3 4 − W
=1W − 0.1 − %
o
on 46 −−dB mute 46 −−dB standby 80 −−dB
on; R
=0Ω−50 −µV
S
on; R
=10kΩ−70 100 µV
S
mute; note 6 − 50 −µV
THD = 1% 5 6.6 − W THD = 10% 6.5 8.0 − W
=1W − 0.03 − %
o
on 50 −−dB mute 50 −−dB standby 80 −−dB
on; R on; R
=0Ω−70 −µV
S
=10kΩ−100 200 µV
S
mute; note 6 − 60 −µV
2001 Apr 17 6
Page 7
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
Notes to the characteristics
1. RL=4Ω, measured in Fig.4.
2. Output power is measured directly at the output pins of the IC.
3. Frequency response externally fixed.
4. V
ripple=Vripple(max)
5. Noise voltage measured in a bandwidth of 20 Hz to 20 kHz.
6. Noise output voltage independent of RS.
7. Vi=V
= 1 V (RMS).
i(max)
8. RL=8Ω, measured in Fig.3.

APPLICATION INFORMATION

= 2 V (p-p); RS=0Ω.
handbook, full pagewidth
On Mute Standby
µc1
MICRO-
CONTROLLER
µc1
µc2
µc2
0 0 1
V
100
TDA1517ATW
3
R
i
60 kΩ
470 nF
+IN1
V
CC
MODE
18
17
15 kΩ
5
15 kΩ
10 kΩ
8.2 kΩ
0 1 0
R
i
60 kΩ
STANDBY/
MUTE LOGIC
reference
voltage
15
V
CC
input
41011
SGND
16
A
B
SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION
PGND
nF
8
+OUT
9
12
−OUT
13
MGU304
1000 µF
R
L
8 Ω
CC
Fig.3 BTL application block diagram.
2001 Apr 17 7
Page 8
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
handbook, full pagewidth
On Mute Standby
µc1
MICRO-
CONTROLLER
µc1
µc2
µc2
0 0 1
V
100
TDA1517ATW
MODE
3
18
17
5
STANDBY/
MUTE LOGIC
15 kΩ
15 kΩ
60 kΩ
60 kΩ
R
i
R
i
reference
voltage
220 nF
IN1+
220 nF
IN2−
V
CC
10 kΩ
8.2 kΩ
100
µF
0 1 0
15
V
CC
input
41011
SGND
16
A
B
SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION
PGND
nF
8 9
12 13
1000 µF
+OUT
1000 µF
−OUT
MGU305
1000 µF
CC
R 4 Ω
R 4 Ω
L
L
Fig.4 SE application block diagram.

Test conditions

T
=25°C; unless otherwise specified: VP= 12 V, BTL
amb
application, f = 1 kHz, RL=8Ω, fixed gain = 26 dB, audio band-pass: 22 Hz to 22 kHz. In the figuresas afunction of frequency a band-pass of 10 Hz to 80 kHz was applied.
The BTL application block diagram is shown in Fig.3. The PCB layout [which accommodates both the mono (BTL) and stereo (single-ended) application] is shown in Fig.6.

Printed-Circuit Board (PCB) layout and grounding

For high system performance levels certain grounding techniques are imperative. The input reference grounds have to be tied to their respective source grounds and must have separate traces from the power ground traces; this will separate the large (output) signal currents from interfering with the small AC input signals. The small signal ground tracesshould be located physically asfar as possible from the powerground traces. Supply and output traces should be as wide as possible for delivering maximum output power.
Proper supply bypassing is critical for low noise performance and high power supply rejection. The respective capacitor locations should be as close as possible to the device and grounded to the power ground. Decoupling the power supply also prevents unwanted oscillations. For suppressing higher frequency transients (spikes) on the supply line a capacitor with low ESR (typical0.1 µF) has to beplacedasclose as possibletothe device. For suppressing lower frequency noise and ripple signals, a large electrolytic capacitor (e.g. 1000 µF or greater) must be placed close to the IC.
In single-ended (stereo) application a bypass capacitor connected to pin SVR reduces the noise and ripple on the midrail voltage. For good THD and noise performance a low ESR capacitor is recommended.
Input configuration
It should be noted that the DC level of the input pins is approximately 2.1 V; a coupling capacitor is therefore necessary.
2001 Apr 17 8
Page 9
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
The formula for the cut-off frequency at the input is as follows:
f
thus
f
=
IC
------------------------------------------------------------------------------
IC
2 π× 30× 103–× 470× 109–×
1
------------------------------
2 π× RiC
×
i
1
11 Hz==
As can be seen it is not necessary to use high capacitor values for the input; so the delay during switch-on, which is necessary for charging the input capacitors, can be minimized. This results in a good low frequency response and good switch-on behaviour.
In stereo applications (single-ended) coupling capacitors on both input and outputare necessary.It shouldbe noted that the outputs of both amplifiers are in opposite phase.

Built-in protection circuits

The IC contains two types of protection circuits:
• Short-circuits the outputs to ground, the supply to groundand across theload: short-circuit isdetectedand controlled by a SOAR protection circuit
• Thermal shut-down protection: the junctiontemperature ismeasured byatemperature sensor.Thermal foldback is activated at a junction temperature of >150 °C.

Output power

The output poweras a function of supplyvoltage hasbeen measured on the output pins and at THD = 10%. The maximum output power is limited by the maximum allowable power dissipation and the maximum available output current, 2.5 A repetitive peak current.

Supply voltage ripple rejection

The SVRR has been measured without an electrolytic capacitor on pin 5 and at a bandwidth of 10 Hz to 80 kHz. Thecurves foroperatingand mutecondition(respectively) were measured with R
=0Ω. Only in single-ended
source
applications is an electrolytic capacitor (e.g. 100 µF) on pin 5 necessary to improve the SVRR behaviour.

Headroom

Atypical musicCD requires atleast 12 dB (isfactor 15.85) dynamic headroom (compared with the average power output) for passing the loudest portions without distortion. The following calculation can be made for this application at VP= 12 V and RL=8Ω: Po at THD = 0.1% is approximately 5 W (see Fig.7).
Average listening level without any distortion yields:
P
P
ALL
tot
---------------- ­factor
5
-------------- -
15.85
315 mW===
The power dissipation canbe derived from Fig.11 for 0 dB and 12 dB headroom.
Table 1 Power rating
RATING HEADROOM
=5W
P
o
(THD = 0.1%)
0 dB 3.5 W
12 dB 2.0 W
POWER
DISSIPATION
Thusfor theaverage listening level(music power) apower dissipation of 2.0 W can be used for the thermal PCB calculation; see Section “Thermal behaviour (PCB design considerations)”.

Mode pin

For the 3 functional modes: standby, mute and operate, the MODE pin can be driven by a 3-state logic output stage, e.g. a microcontroller with some extra components for DC-level shifting; see Fig.10 for the respective DC levels.
• Standby mode is activated by a low DC level between 0 and 2 V. The power consumption of the IC will be reduced to <0.12 mW.
• Mute mode is activated by a DC level between
3.3 and 6.4 V. The outputs of theamplifier willbe muted (no audio output); however the amplifier is DC biased and the DC level of the output pins stays at half the supply voltage. The input coupling capacitors are charged when in mute mode to avoid pop-noise.
• The IC will be in the operating condition when the voltage at pin MODE is between 8.5 V and V
CC
.

Switch-on/switch-off

To avoid audible plops during switch-on and switch-off of the supply voltage, the MODE pin has to be set in standby condition (VCClevel) before the voltage is applied (switch-on) or removed (switch-off). The input and SVRR capacitors are smoothly charged during mute mode.
The turn-on and turn-off time can be influenced by an RC-circuit connected to the MODE pin. Switching the deviceor the MODEpin rapidly onand off maycause‘click and pop’ noise. This can be prevented by proper timing on theMODEpin. Further improvementintheBTL application can be obtained by connecting an electrolytic capacitor (e.g. 100 µF) between the SVRR pin and signal ground.
2001 Apr 17 9
Page 10
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

Thermal behaviour (PCB design considerations)

The typical thermal resistance [R
] of the IC in the
th(j-a)
HTSSOP20 package is 37 K/W if the IC is soldered on a printed-circuit board with double sided 35 µm copper with a minimum area of approximately 30 cm2. The actual usable thermal resistance depends strongly on the mounting method of the device on the printed-circuit board, the solderingmethod and the area andthickness of the copper on the printed-circuit board.
The bottom ‘heat-spreader’ of the IC has to be soldered efficiently on the ‘thermal land’ of the copper area of the printed-circuit board using the re-flow solder technique.
A number of thermal vias in the ‘thermal land’ provide a thermal path to the opposite copper site of the printed-circuit board. The size of the surface layersshould be as large as needed to dissipate the heat.
handbook, full pagewidth
60
K/W
50
The thermal vias (0.3 mm ∅) in the ‘thermal land’ should not use web construction techniques, because those will have high thermal resistance; continuous connection completely around the via-hole is recommended.
For a maximum ambient temperature of 60 °C the following calculation can be made: for the application at VP= 12 V and RL=8Ω the (ALL-) music power dissipation approximately 2.0 W; T
j(max)=Tamb
+P×R
=60°C + 2.0 × 37 = 134 °C.
th(j-a)
Note: the above calculation holds for application at ‘average listening level’ music output signals. Applying (or testing) withsine wave signalswill produce approximately twice the music power dissipation; at worst case condition this can activate the maximum temperature protection.
ON-BOARD-COOLING
COPPER DESIGN
40
30
20
10
0
R
curve is given for practical calculation purpose.
th(j-p)
L = 30 mm plus vias
Fig.5 Thermal resistance of the HTSSOP20 mounted on printed-circuit board.
R
th(j-a)
R
th(j-p)
10
234
number of 35 µm copper layers
CU-LAYER 1
L
L
CU-LAYER 2-4
MGU306
2001 Apr 17 10
Page 11
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
handbook, full pagewidth
top view
bottom copper layout
IN2
Std By
On
220 nF
−
OUT2
+
V
P
1000 µF
25 V
1000 µF
top view
component layout
100 nF
16 V
TDA
1517ATW
100 µF/16 V
sept −2000
+
OUT1
top copper layout
IN1
MGU312
top view
For BTL applications the two 1000 µF/16 V capacitors must be replaced by 0 Ω jumpers.
Fig.6 Printed-circuit board layout for BTL and SE application.
2001 Apr 17 11
Page 12
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
Typical performance characteristics for BTL application at VP= 12 V and RL=8Ω
10
handbook, halfpage
THD
(%)
1
−1
10
−2
10
−2
10
−1
10
1
Po (W)
Fig.7 THD as a function of Po.
MGU307
10
handbook, halfpage
THD
(%)
MGU308
1
−1
10
−2
10
−2
10
10
−1
10
1
Po = 1 W
10
f (kHz)
2
10
Fig.8 THD as a function of frequency.
MGU309
SVRR
(dB)
0
handbook, halfpage
−20
−40
−60
mute
−80
−2
10
−1
10
110
f (kHz)
2
10
Fig.9 SVRR as a function of frequency.
2001 Apr 17 12
10
handbook, halfpage
V
o
(V)
1
−1
10
−2
10
−3
10
−4
10
26
Fig.10 Vo as a function of V
V
MODE
MODE
MGU310
1240810
(V)
.
Page 13
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
handbook, halfpage
6
P
(W)
5
4
3
2
1
0
010
2
VP = 12 V
RL = 8 Ω
VP = 15 V RL = 16 Ω
468
Fig.11 Power dissipation as a function of Po.
MGU311
P
(W)
o
12
handbook, halfpage
P
o
(W)
10
8
6
4
2
0
68
RL = 4 Ω 8 Ω 16 Ω
10 12 18
14 16
Fig.12 Po as a function of VP.
MGU323
VP (V)
2001 Apr 17 13
Page 14
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

PACKAGE OUTLINE

HTSSOP20: plastic, heatsink thin shrink small outline package; 20 leads; body width 4.4 mm

SOT527-1

D
c
y
Z
20
heathsink side
pin 1 index
D
h
11
A
E
h
2
A
1
110
w M
b
e
p
E
H
E
detail X
A
X
v M
A
(A )
3
A
θ
L
p
L
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
mm
OUTLINE
VERSION
SOT527-1
A
max.
1.10
0.15
0.05
p
0.95
0.80
IEC JEDEC EIAJ
0.25
0.30
0.19
UNIT A1A2A3b
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
(1)
cD
0.20
6.6
0.09
6.4
REFERENCES
D
4.3
4.1
(2)
E
h
4.5
4.3
2001 Apr 17 14
eLL
E
3.1
2.9
h
0.65
H
6.6
6.2
E
p
0.75
0.50
EUROPEAN
PROJECTION
(1)
Z
ywv θ
0.13 0.10.21.0
0.5
0.2
ISSUE DATE
99-11-12 00-07-12
o
8
o
0
Page 15
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
SOLDERING Introduction to soldering surface mount packages
Thistext gives averybriefinsight to acomplextechnology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011). There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for certainsurface mount ICs, butitis not suitable forfinepitch SMDs. In these situations reflow soldering is recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied tothe printed-circuit boardby screen printing,stencillingor pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages.
Wave soldering
Conventional single wave soldering is not recommended forsurface mount devices (SMDs)orprinted-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
• Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
• Forpackages with leads onfoursides, the footprint must be placedat a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
During placement and before soldering,the packagemust be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
If wave soldering is used the following conditions must be observed for optimal results:
2001 Apr 17 15
Page 16
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
WAVE REFLOW
(1)
BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable
SOLDERING METHOD
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS not suitable
(3)
PLCC
, SO, SOJ suitable suitable LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO not recommended
(2)
(3)(4) (5)
suitable
suitable suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is onlysuitable forSSOP and TSSOP packages with a pitch(e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2001 Apr 17 16
Page 17
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW

DATA SHEET STATUS

PRODUCT
DATA SHEET STATUS
Objective data Development This data sheet contains data from the objective specification for product
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Product data Production This data sheet contains data from the product specification. Philips
(1)
STATUS
(2)

DEFINITIONS

development. Philips Semiconductors reserves the right to change the specification in any manner without notice.
Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS Short-form specification The data in a short-form
specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition  Limiting values given arein accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device atthese or atanyother conditions abovethosegiven in the Characteristics sections of the specificationis not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make norepresentationor warranty thatsuchapplicationswill be suitable for the specified use without further testing or modification.
DISCLAIMERS Life support applications These products are not
designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expectedto result in personal injury.Philips Semiconductorscustomersusing or selling theseproducts for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes  Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for theuse of any oftheseproducts, conveys no licenceortitle under any patent, copyright, or mask work right to these products,and makes norepresentationsor warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2001 Apr 17 17
Page 18
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
NOTES
2001 Apr 17 18
Page 19
Philips Semiconductors Product specification
8 W BTL or 2 × 4 W SE power amplifier TDA1517ATW
NOTES
2001 Apr 17 19
Page 20
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2001
Internet: http://www.semiconductors.philips.com
72
Printed in The Netherlands 753503/02/pp20 Date of release: 2001 Apr 17 Document order number: 9397 750 08264
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