The STiH239 uses the latest process technology
to provide a cost-effective, feature rich, highly
integrated SoC for set-top boxes (STBs). It is
targeted at the advanced decoding STB market
across satellite networks, and is suitable for
operator markets (with advanced security) and
retail markets worldwide.
The STiH239 provides a solution for operators
and manufacturers to specify a range of costeffective, high performance, interactive STBs, and
DVR STBs, with content delivery possible using
broadcast or broadband networks, or both (hybrid
STBs).
The STiH239 integrates a high performance dual
stream satellite receiver, supporting DVB
compliant reception, channel demodulation, and
forward error correction (FEC). The dual stream
demodulators are compatible with DVB-S2
(QPSK/8PSK), DVB-S (QPSK) and legacy
DirecTV
TM
transmission standards.
JTAG
CPU/FPU
Transport
Security
Transport streams
Parallel/serial in/out
ResetsAnalog out
Clocks
Modes
Clock Gen
System
services
Dual FDMA
L2 cache
Video decoder
Low power
standby
controller
DVB-S
DVB-S2
demodulators
IF in
Transport
streams
PCM I/O
S/PDIF outexternal interrupts
Audio I/O
Audio decoder
DisplayVideo I/O
STBus
STB peripherals I/O
Peripherals
Analog video
HDMI
System
interfaces
DDR3 LMI
Connectivity
SLC NAND Flash
Serial Flash
CI-Plus cards
DDR2/DDR3
Dual USB
eSATA/PCI-E
Ethernet
SD-MMC/SDIO
February 2012Doc ID 022870 Rev 11/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Page 2
IntroductionSTiH239
1 Introduction
The STiH239 offers current users of ST’s growing family of advanced decoding ICs
enhancements in performance and features, enabling operators to offer consumers new
multimedia-rich services and viewing experiences, including new 3DTV features. Faster
DDR3 memory is also supported, and the applications CPU benefits from an L2 cache. The
STiH239 keeps pace with the latest advanced security requirements of the main CA
vendors, and an integrated standby controller enables the STiH239 to target stringent low
power regulations.
FeaturesBenefits
ST40 applications CPU, with 32KI and 32KD L1
caches and 256K L2 cache.
Integrated low power standby controller within its
own power island.
Latest generation of ST's Delta video decoder,
coupled with a High Quality Video Display
Pipeline (HQVDP).
Dual USB 2.0 hosts, eSATA, Ethernet MAC with
MII/RMII/TMII interfaces, PCI-e, SD-MMC/SDIO
interface.
Decoding of 1080p60 AVC, dual HD AVC and
MVC SHP video streams.
High performance processing for applications and
middleware.
Secure hibernation to, and fast resume from, very
low power passive standby mode, targeting STB
standby power < 0.5 W.
Decoding of advanced high definition standards
(MPEG2, H264, VC-1, AVS) plus the performance
and flexibility for web-based content decoding such
as Flash
impacting applications CPU performance.
Extensive high speed connectivity for the widest
range of STB peripherals, such as Flash drives,
external HDDs, Ethernet, home network controllers
(such as MoCA
memory cards.
Enables advanced high-definition viewing
experiences including full resolution per eye 3DTV,
full-HD 2D services and HD picture-in-picture
support (HD-PIP).
Ball compatible with other STiH2xx family
variants.
2/4Doc ID 022870 Rev 1
Fully compliant with the latest advanced security
requirements of CA vendors.
Highly integrated STB solution reducing
component count and manufacturing BOM.
Single platform versatility across all networks
(satellite, cable, terrestrial, and IP).
Page 3
STiH239Revision history
2 Revision history
Table 1.Document revision history
DateRevisionChanges
28-Feb-20121Initial release.
Doc ID 022870 Rev 13/4
Page 4
STiH239
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