Datasheet STi7111 Datasheet (ST)

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STi7111

Low-cost HDTV satellite set-top box decoder for Microsoft VC-1,

H.264 and MPEG-2

Data Brief

Features

■ Microsoft VC-1, MPEG-2 and H.264 support

■ ST40-300 CPU running at 450 MHz, high

performance for Linux, Windows CE and OS21 based systems

■ DVB-S2 and DVB-S front-end integrated

demodulators with a fully featured HD advanced decoder system-on-chi p (SoC)

■ Flexible ST231 based advanced video decoder

■ ST231 audio decoder at 450 MHz supporting

WMA9, AC3, DD+, AAC, AAC+ with SPDIF output

■ HD and SD simultaneous display, 2 video, 3

graphics planes and background color with high quality filtering

■ HDMI/HCDP output plus HD or standard definition

(SD) component and composite output

■ Unified DDR2 32-bit interface operating at up to

400MHz

■ Programmable transport interface (PTI) and

transport stream (TS) merger with up to 2 digital external TS inputs, 2 internal inputs from internal demodulators and one TS from mem ory for net work client

■ USB 2.0 to support network interface and feature

enhancement

■ External memory interface (EMI) with Nand-Flash,

Nor-Flash, PCI, peripherals support

■ 10/100 Mbit/s Ethernet MAC with media

independent interface (MII) and reduced MII (RMII)

■ Advanced security, SVP compliant, WM DRM

compliant

■ Dual smartcard, 4 x UART, 3 x synchronous serial

controllers (SSC), soft m odem and DAA interface, IR blaster and receiver, UHF Rx digital input

■ DiSEqC 2.0 and FSK modem supported

■ 4 x 4 matrix ke y front panel switch scanne r FSM with

key de-bounce

■ 27 x 27mm package, 65nm technology

(2 channels)

Digital PCMout

S/PDIF

Audio Memory

Audio

decoder

ST231

Analog Stereo

DAC

Audio IF

Video out

VDP main

(DEI-HD + IQI)

YPrPb SDTV

HD DACs

HDMI

Video output

Compositor

GDPx3

cursor

alpha

CEC

SD DACs

DENC

VDP aux

PCI NOR/NAND FLASH

Padlogic

EMI/PCI

DDR-2

SDRAM

Padlogic

LMI

ClockGen/

Service

(JTAG, ICE..)

JTAG

IRQs

resets

clock

STBus system interconnect

SAT FE core

DVB-S2+DVB-S

demodulator

CPU

FE0 FE1

DiSEqC 1/FSK

DiSEqC 0

SWTS

TSmerger

TSin 2 x serial or 1 x parallel

Transport/SEC Video

PTI

PDES3

CPU DMA

CPU

ST40-4/300

MailBoxes (x2)

FDMA

(x2)

SSCs, PWM

PIOs, UARTs

MAFE, SC...

Peripheral

COMMS

int I2C

Ethernet

GMAC

MII/RMII

USB 2.0

Host

PHY

USB-bus

Video

decoder

H.264/VC-1 HD

ST231

Blitter display

December 2007 Rev 1 1/4

For further information contact your local STMicroelectronics sales office.

www.st.com

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Description STi7111

1 Description

The STi7111 is an HD set-top box / full back-end processor for satellite set-top boxes, compliant with ATSC, SMPTE VC-1, DVB-S2, DIRECTV, DCII and ARIB BS4 specifications. It provides very high performance for low-cost HD systems. With enhanced performance compared to the STi7109, it includes both VC-1 and H.264 video decoders for new, low bitrate application s.

The main platform target for the STi71 11 is the DVB-S2 zapper. Optionally the device can be used in a client box through IP over Ethernet, Multimedia over Coax Alliance (MoCA) or WiFi.

Figure 1. STi7111 applications

Ethernet

Plug

Coax

plug

USB 2.0 host plug

PSTN

V92 SW modem

27/30MHz

STb6110

Discrete and

power circuitry

27/30MHz

STb6110

Discrete and

power circuitry

Ethernet PHY

MoCA PHY

DDR2-400 MHz

FE0 - DVB-S2

27/30MHz

DiSEqC0

FE1 - DVB-S1

DiSEqC1

Si3062

1 x 128 MB

MII

USB 2.0

DAA

ST8024

1 x 128 MB

DDR2-400 MHz

16 32

IR Rx

UHF Rx

STi7111

EMI/PCI

NOR/NAND

flash

Key scanning

(no front panel micro-ctrl)

PIOs

Analog YPbPr

HDMI TMDS 1.48GHz

CVBS/YC

I2C

L R

CEC / DDC

WiFi

S/PDIF

plug

Buffer filter

EEPROM

VCR

Smart card

socket interface

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STi7111 Revision history

2 Revision history

Table 1. Document revision history

Date Revision Changes

19-Dec-2007 1 Initial release.

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STi7111

t A P

l N

O U

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