Datasheet SP690ACN, SP690ACP, SP690AEN, SP690AEP, SP692AEP Datasheet (Sipex Corporation)

...
Page 1
®
Low Power Microprocessor Supervisory
with Battery Switch-Over
Precision Voltage Monitor: SP690A/SP802L/SP805L at 4.65V SP692A/SP802M/SP805M at 4.40V
Reset Time Delay - 200ms
Watchdog Timer - 1.6 sec timeout
Minimum component count
60µA Maximum Operating Supply Current
0.6µA Maximum Battery Backup Current
0.1µA Maximum Battery Standby Current
Power Switching
250mA Output in VCC Mode (0.6) 25mA Output in Battery Mode (5)
Voltage Monitor for Power Fail or Low Battery Warning
Available in 8 pin SO and DIP packages
RESET asserted down to V
Pin Compatible Upgrades to
MAX690A/692A/802L/802M/805L
CC
= 1V
SP690A/692A/802L/
802M/805L/805M
DESCRIPTION
The SP690A/692A/802L/802M/805L/805M are a family of microprocessor (µP) supervisory circuits that integrate a myriad of components involved in discrete solutions to monitor power­supply and battery-control functions in µP and digital systems. The series will significantly improve system reliability and operational efficiency when compared to discrete solutions. The features of the SP690A/692A/802L/802M/805L/805M include a watchdog timer, a µP reset and backup-battery switchover, and power-failure warning, a complete µP monitoring and watchdog solution. The series is ideal for applications in automotive systems, computers, controllers, and intelligent instruments. All designs where it is critical to monitor the power supply to the µP and it’s related digital components will find the series to be an ideal solution.
REBMUNTRAP
A096PSV56.4Vm521WOL%4 A296PSV04.4Vm521WOL%4 L208PSV56.4Vm57WOL%2 M208PSV04.4Vm57WOL%2 L508PSV56.4Vm521HGIH%4 M508PSV04.4Vm521HGIH%4
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
TESER
dlohserhTdlohserhT
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1
Page 2
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifica­tions below is not implied. Exposure to absolute maxi­mum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device.
VCC........................................................-0.3V to 6.0V
V
.....................................................-0.3V to 6.0V
BATT
All Other Inputs (NOTE 1)..................-0.3V to (VCC to 0.3V)
Input Current:
VCC.........................................................250mA
V
........................................................50mA
BATT
GND........................................................20mA
Output Current:
V
.....Short-Circuit Protected for up to 10sec
OUT
All Other Inputs.................................20mA
Continuous Power Dissipation.......500mW
Rate of Rise, VCC,V
..................100V/µs
BATT
Storage Temperature.......-65°C to +160°C
Lead Temperature(soldering,10sec).................+300°C
ESD Rating.............................................................4KV
SPECIFICATIONS
Vcc=4.75v to 5.50V for SP690A/SP802L/SP805L, VCC=4.50V to 5.50V for SP692A/SP802M/SP805M, V unless otherwise noted.
SRETEMARAP.NIM.PYT.XAMSTINUSNOITIDNOC
,egnaRegatloVgnitarepO05.5stloV
V
Vro
CC
I V
CC
V V
TUO
V
TUO
VCCV<
V
CC
TTAB
YLPPUS
V,V0=
TTAB
tuptuOV
TTAB
Vot
TTAB
2etoN,
I,tnerruCylppuS
,5306
YLPPUS
TTAB
,edoMpukcaByrettaBni
V8.2=
100.06.0
3ETON,tnerruCybdnatS1.0-
1.0-VCC30.0-
V2.0-
CC
edoMpukcaB-yrettaBni
V
TTAB
,dlohserhThctiwSyrettaB
V
CC
51.0-V
TTAB
V
TTAB
02
51.0-
40.0-
02.0-
02-
siseretsyHrevohctiwSyrettaB04VmkaePotkaeP
dlohserhTteseR05.4
52.4
56.4
04.4
55.4
03.4
µA
µA
µA
20.0
57.4
05.4
07.4
54.4
=2.80V, TA=T
BATT
V I
stloV
I I
stloV
I
Vm
to T
, typical specified at 25OC,
MIN
MAX
Ignidulcxe
TUO
V>
CC
TUO
TUO
TUO
TUO
V2.0+
TTAB
Am05=
Am052=
Am5=
Am52=
pu-rewoP
nwod-rewoP
L508PS,L208PS,A096PS
stloV
T,L208PS
A
T,M208PS
A
M508PS,M208PS,A296PS
V,C°52+=
CC
V,C°52+=
CC
gnillaf
gnillaf
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
2
Page 3
SPECIFICATIONS (continued)
Vcc=4.75v to 5.50V for SP690A/SP802L/SP805L, VCC=4.50V to 5.50V for SP692A/SP802M/SP805M, V unless otherwise noted.
SRETEMARAP.NIM.PYT.XAMSTINUSNOITIDNOC
siseretsyHdlohserhTteseR04VmkaePotkaeP
=2.80V, TA=T
BATT
to T
, typical specified at 25OC,
MIN
MAX
t,htdiWesluPteseR
SR
,egatloVtuptuOTESERV
041002082sm
5.1-I
CC
5ETON1.04.0stloVI
400.03.0I
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6ETONV
5.1-stloVI
CC
1.04.0I
00.106.152.2ces
05snVLIV,V4.0=
8.0
05
051-
05-
052.1
522.1
052.1
051
003.1
572.1
V
CC
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DW
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PW
,dlohserhTtupnIIDW
4ETON,V5=5.3
tnerruCtupnIIDW
dlohserhTtupnIIFP002.1
tnerruCtupnIIFP52-10.052An
egatloVtuptuOOFPV
5.1-
CC
1.04.0
008=µA
ECRUOS
Am2.3=
KNIS
05=µV,A
KNIS
4=µV,A
ECRUOS
008=µA
ECRUOS
Am2.3=
KNIS
stloV
µA
stloV
stloV
wolcigoL
hgihcigoL
V=IDW
CC
V0=IDW
M/L208PS
I I
ECRUOS
KNIS
008=µA Am2.3=
0.1=
CC
,V0.1=
CC
V()8.0(=CC)
HI
M/L508PS,A296/A096PS
NOTE 1: The input voltage limits on PFI (pin 4) and WDI (pin 6) may be exceeded if the current into these pins is limited to less than 10 mA. NOTE 2: Either VCC or V
can go to 0V if the other is greater than 2.0V.
BATT
NOTE 3: "-" equals the battery-charging current, "+" equals the battery-discharging current. NOTE 4: WDI is guaranteed to be in an intermediate, non-logic level state if WDI is floating and V
is in the operating voltage range. WDI is internally biased to 35% of VCC with an input impedance of 50K.
NOTE 5: SP690A, SP692A, SP802L, and SP802M only. NOTE 6: SP805L and SP805M only.
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
3
CC
Page 4
1
V
OUT
2
V
CC
GND
3
PFI
4
Figure 10. Pinout
PIN ASSIGNMENTS
8
V
BATT
7
RESET (RESET)*
6
WDI
PFO
5
*( ) SP805 only
BATTERY-SWITCHOVER
V
BATT
V
WDI
CC
CIRCUITRY
3.5V
1.25V
RESET
GENERATOR
WATCHDOG
TIMER
V
OUT
RESET
(RESET)*
Pin 1 —V
— Output Supply Voltage. V
OUT
connects to VCC when VCC is greater than V
and VCC is above the reset thresh-
BATT
old. When VCC falls below V VCC is below the reset threshold, V connects to V capacitor from V
. Connect a 0.1µF
BATT
to GND.
OUT
BATT
OUT
and
OUT
Pin 2 — VCC — +5V Supply Input Pin3 — GND — Ground reference for all signals Pin 4 — PFI — Power-Fail Input. This is the
noninverting input to the power-fail com­parator. When PFI is less than 1.25V, PFO goes low. Connect PFI to GND or V
when not used.
OUT
Pin 5 — PFO — Power-Fail Output. Pin 6 — WDI — Watchdog Input. WDI is a
three level input. If WDI remains high or low for 1.6sec, the internal watchdog timer triggers a reset. If WDI is left floating or connected to a high-impedance tri-state buffer, the watchdog feature is disabled. The internal watchdog timer clears when­ever reset is asserted.
0.8V
PFI
1.25V
Figure 11. Internal Block Diagram
*( ) SP805 only
PFO
Pin 7 for SP805 only — RESET (Active High)–
Reset Output is the inverse of RESET; when RESET is asserted, the RESET output voltage = VCC or V whichever is higher.
Pin 8 — V
VCC falls below the reset threshold, V will be switched to V 20mV greater than VCC. When VCC rises 20mV above V reconnected to VCC. The 40mV
— Backup-Battery Input. When
BATT
OUT
, V
BATT
if V
will be
OUT
BATT
BATT
BATT
is
hysteresis prevents repeated switching if VCC falls slowly.
,
Pin 7 for SP690A/692A/802 only — RESET
(Active Low)– Reset Output. RESET Out­put goes low whenever VCC falls below the reset threshold or whenever WDI remains high or low longer than 1.6 seconds. RESET remains low for 200ms after VCC crosses the reset threshold voltage on power-up or after being trig­gered by WDI.
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
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TYPICAL CHARACTERISTICS (25
o
C, unless otherwise noted)
VCC Supply Current vs.
Temperature (Normal Mode)
51 47 43 39 35
Current (µA)
31
CC
V
27 23 19
-60 -30 0 30 60 90 120 150
Temperature Deg. C
V
BATT
Resistance vs. Temperature
15
VCC=0V V
10
5
Resistance (ohms)
0
-60 -30 0 30 60 90 120 150
Temperature Deg. C
to V
OUT
V
BATT
VCC=5V
BATT
ON
=2V
V
V
BATT
=2.8V
BATT
=4.5V
=2.8V
Reset Output Resistance
vs. Temperature
600
VCC=5V,V
Soucing Current
500 400 300 200
Resistance (ohms)
100
0
-60 -30 0 30 60 90 120 150
=2.8V
BATT
VCC=0V,V
Sink Current
Temperature Deg. C
BATT
=2.8V
Battery Supply Current vs.
Temperature (Backup Mode)
2.9
VCC=0V
2.4
=2.8V
V
BATT
1.9
1.4
Current (µA)
0.9
BATT
V
0.4
-0.1
-60
-40 -20 0
20 406080
Temperature Deg. C
VCC to V
Resistance vs. Temperature
0.9
0.8
0.7
0.6
0.5
Resistance (ohms)
0.4
0.3
-60 -30 0 30 60 90 120 150
OUT
On
V
Temperature Deg. C
Reset Delay
212 210 208 206 204
Reset Delay (mS)
202 200
vs. Temperature
VCC=0V to 5V Step,
V
=2.8V
BATT
-60 -30 0 30 60 90 120 150
Temperature Deg. C
100120
V
CC
BATT
=5V
=0V
140
PFI Threshold
1.256
1.254
1.252
1.250
PFI Threshold (V)
1.248
1.246
vs. Temperature
VCC=5V
V
BATT
NO LOAD ON PFO
-60 -30 0 30 60 90 120 150
Temperature Deg. C
Reset Threshold
4.70
4.69
4.68
4.67
4.66
4.65
4.64
4.63
Reset Threshold (V)
4.62
4.61
4.60
vs. Temperature
SP690A
-60 -30 0 30 60 90 120 150
Temperature Deg. C
Power Down
Battery Current vs. VCC Voltage
IE+2 IE+1 IE+0
IE-1 IE-2 IE-3 IE-4 IE-5 IE-6
Current(µA) Log Scale
IE-7
BATT
V
IE-8
.0000 5.000
VCC (0.5V/div)
=0
V
=0V
BATT
V
=2.8V
BATT
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
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1000
100
VCC=4.5V V
=0V
BATT
Slope=0.6
1000
100
V
=4.5V
BATT
=0V
V
CC
Slope=5
Voltage Drop(mV)
10
1
1 10 100 1000
IOUT (mA)
Figure 1. VCC to V
V
CC
2V div
0V
0V
Vs. Output Current
OUT
RESET
1sec/div
Figure 3A. SP690A RESET Output Voltage vs. Supply Voltage
V T
BATT
A
= 25 C
= 0V
Voltage Drop(mV)
10
1
1 10 100
IOUT (mA)
Figure 2. V
o
to V
V
BATT
A
= +25 C
OUT
= 0V
Vs. Output Current
BATT
V
CC
T
V
CC
2K
RESET
RESET
330pF
GND
Figure 3B. Circuit for the SP690A/802L RESET Output Voltage vs. Supply Voltage
V
CC
CC
V
2V div
0V
5V
V
CC
RESET
RESET
V
0V
BATT
330pF
10K
GND
1sec/div
Figure 4A. SP805L RESET Output Voltage vs. Supply Voltage
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
Figure 4B. Circuit for the SP805 RESET Output Voltage vs. Supply Voltage
6
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+5V
+4V
CC
TA = +25 C
V
VCC
+5V
0V
RESET
2µs/div
Figure 5A. SP690A RESET Response Time
+5V
V
+4V
+4V
0V
CC
RESET
VCC
10K
RESET
30pF
GND
Figure 5B. Circuit for the SP690A/802L RESET Response Time
VCC
VCC
RESET
VBATT
330pF
10K
GND
2µs/div
Figure 6A. SP805L RESET Response Time
Figure 6B. Circuit for the SP805 RESET Response Time
+5V
1K
+1.3V
+1.2V
VCC = 5V V
BATT
= 0V
PFI
5V
PFO
V
CC
A
= +25 C
T
= +5V
PFI
PFO
0V
+1.25V
500ns/div
Figure 7A. Power-Fail Comparator Response Time (FALL)
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
Figure 7B. Circuit for the Power-Fail Comparator Response Time (FALL)
7
30pF
Page 8
+1.3V
VCC = 5V V
BATT
PFI
= 0V
+5V
+1.2V
3V
0V
PFO
2µs/div
Figure 8A. Power-Fail Comparator Response Time (RISE)
+5V
V
CC
RESET*
0V
+5V
0V
+5V
RESET**
0V
VCC = +5V
A = +25 C
T
PFI
PFO
+1.25V
Figure 8B. Circuit for the Power-Fail Comparator Response Time (RISE)
t
RS
3.0V
30pF
1K
+5V
OUT
V
0V
+5V
3.0V
PFO
0V
V
BATT
= PFI = 3.0V
*SP690A/692A/802L/802M
**SP805L/805M
Figure 9. Timing Diagram
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
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FEATURES
THEORY OF OPERATION
The SP690A/692A/802L/802M/805L/805M provide four key functions:
1. A battery backup switching for CMOS RAM, CMOS microprocessors, or other logic.
2. A reset output during power-up, power-down and brownout conditions.
3. A reset pulse if the optional watchdog timer has not been toggled within a specified time.
4. A 1.25V threshold detector for power-fail warning, low battery detection, or to monitor a power supply other than +5V.
The parts differ in their reset-voltage threshold levels and reset outputs. The SP690A/802L/ 805L generate a reset when the supply voltage drops below 4.65V. The SP692A/802M/805M generate a reset below 4.40V.
The SP690A/692A/802L/802M/805L/805M are ideally suited for applications in automotive systems, intelligent instruments, and battery­powered computers and controllers. All designs into an environment where it is critical to monitor the power supply to the µP and it’s related digital components will find the SSP690A/692A/802L/802M/805L/805M ideal.
Regulated +5V
CC
V
RESET
µP
NMI I/O LINE
GND
BUS
RAM
V
GND
CMOS
Figure 12. Typical Operating Circuit
0.1µF
RESET
PFO
WDI
OUT
V
CC
Unregulated
CC
V
GND
PFI
V
BATT
DC
3.6V Lithium Battery
R
1
R
2
The SP690A/692A/802L/802M/805L/805M microprocessor (µP) supervisory circuits monitor the power supplied to digital circuits such as microprocessors, microcontrollers, or memory. The series is an ideal solution for portable, battery-powered equipment that requires power supply monitoring. Implementing this series will reduce the number of components and overall complexity. The watchdog functions of this product family will continuously oversee the operational status of a system. The operational features and benefits of the SP690A/692A/802L/802M/805L/805M are described in more detail below.
Reset Output
The microprocessor's (µP's) reset input starts the µP in a known state. When the µP is in an unknown state, it should be held in reset. The SP690A/SP692A/SP802 assert reset during power-up and prevent code execution errors during power-down or brownout conditions.
On power-up, once VCC reaches 1V, RESET is guaranteed to be a logic low. As VCC rises, RESET remains low. When VCC exceeds the reset threshold, RESET will remain low for 200ms, Figure 9. If a brownout condition occurs and VCC dips below the reset threshold, RESET is triggered. Each time RESET is triggered, it stays low for the reset pulse width interval. If a brownout condition interrupts a previously initiated reset pulse, the reset pulse continues for another 200ms. On power-down, once VCC goes below the threshold, RESET is guaranteed to be logic low until VCC drops below 1V.
RESET is also triggered by a watchdog timeout. If WDI remains either high or low for a period that exceeds the watchdog timeout period (1.6 sec), RESET pulses low for 200mS. As long as RESET is asserted, the watchdog timer remains clear. When RESET comes high, the watchdog resumes timing and must be serviced within
1.6sec. If WDI is tied high or low, a RESET pulse is triggered every 1.8sec (tWD plus tRS).
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
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Page 10
The SP805L/M active-high RESET output is the inverse of the SP690A/SP692A/SP802 RE­SET output, and is valid with VCC down to 1V. Some µP's, such as Intel's 80C51, require an active-high reset pulse.
Watchdog Input
The watchdog circuit monitors the µP's activity. If the µP does not toggle the watchdog input (WDI) within 1.6sec, a reset pulse is triggered. The internal 1.6sec timer is cleared by either a reset pulse or by floating the WDI input. As long as RESET is asserted or the WDI input is floating, the timer remains cleared and does not count. As soon as RESET is released and WDI is driven high or low, the timer starts counting. It can detect pulses as short as 50ns.
Power-Fail Comparator
The Power-Fail Comparator can be used as an under-voltage detector to signal the failing of a power supply (it is completely separate from the rest of the circuitry and does not need to be dedicated to this function). The PFI input is compared to an internal 1.25V reference. If PFI is less than 1.25V, PFO goes low. The external voltage divider drives PFI to sense the unregulated DC input to the +5V regulator. The voltage-divider ratio can be chosen such that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. PFO then triggers an interrupt which signals the µP to prepare for power-down.
When V comparator is turned off and PFO is forced low
connects to V
BATT
, the power-fail
OUT
to conserve backup-battery power.
Backup-Battery Switchover
V
SW1
V
OUT
BATT
D1
V
D3
CC
D2
SW2
GND
NOITIDNOC1WS2WS
V
CC
V
CC
V>
V
CC
TTAB
V
CC
V<
V
CC
TTAB
Reset Threshold = 4.65V in SP690A/802L/805L Reset Threshold = 4.40V in SP692A/802M/805M
Figure 13. BACKUP-BATTERY Switchover Block Diagram
dlohserhTteseR>nepOdesolC
dnadlohserhTteseR<
dnadlohserhTteseR<
nepOdesolC
desolCnepO
In the event of a brownout or power failure, it may be necessary to preserve the contents of RAM. With a backup battery installed at V the RAM is assured to have power if VCC fails.
BATT
As long as VCC exceeds the reset threshold, V
connects to VCC through a 0.6 PMOS
OUT
power switch. Once VCC falls below the reset threshold, VCC or V switches to V through a 5 switch only when VCC is below the
OUT
reset threshold and V
, whichever is higher,
BATT
. V
connects to V
BATT
is greater than VCC.
BATT
OUT
When VCC exceeds the reset threshold, it is connected to V applied to V the diode (D1) between V conduct current from V more than .6V above V
When V activated and the internal circuitry will be pow-
BATT
, regardless of the voltage
OUT
Figure 13. During this time,
BATT
BATT
OUT
connects to V
and V
BATT
to V
.
OUT
if V
OUT
, backup mode is
OUT
will
BATT
is
ered from the battery Figure 14. When VCC is just below V current drawn from V 30µA. When VCC drops to more than 1V below V
, the internal switchover comparator shuts
BATT
off and the supply current falls to less than 0.6µA.
, in the backup mode the
BATT
will be typically
BATT
,
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
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Page 11
LANGISSUTATS
V
CC
V
TUO
V
TTAB
V
CC
IFP
8lanretninahctiwsSOMP
6.0nahtsselµsagnolsa,A
V<
TTAB
.delbasid
VmorfdetcennocsiD
TUO
VotdetcennoC
TTAB
VotdetcennoC
TUO
hguorht
siyrettabehtmorfnward
.V1-
sirotarapmocliaf-rewoP
OFPwolcigoL
TESERwolcigoL
tnerruC.
VBATT
0.1F
Figure 16. Backup Power Source Using High Capacity Capacitor with SP690A/802L/805L and a +5V ±5% Supply
+5V
VCC
GND
VOUT
CONNECT TO
STATIC RAM
RESET
(RESET)*
*( ) SP805L only
CONNECT
TO µP
TESER)ylno508PS(hgihcigoL
IDWdelbasidsiremitgodhctaW
Figure 14. Input and Output Status in Battery-Backup Mode.
To enter the Battery-Backup mode, VCC must be less than the Reset threshold and less than V
BATT
.
Using a High Capacity Capacitor as a Backup Power Source
VBATT has the same operating voltage range as VCC, and the battery-switchover threshold volt­ages are typically +20mV centered at VBATT, allowing use of a capacitor and a simple charging circuit as a backup source (see Figure 16).
TRAP
REBMUNREBMUN
REBMUNREBMUN
REBMUN
MUMIXAM
YRETTAB-PUKCABYRETTAB-PUKCAB
YRETTAB-PUKCABYRETTAB-PUKCAB
YRETTAB-PUKCAB
]V[EGATLOV]V[EGATLOV
]V[EGATLOV]V[EGATLOV
]V[EGATLOV
A096PS
L208PS
08.4
L508PS
A296PS
M208PS
55.4
M508PS
If VCC is above the reset threshold and VBATT is 0.5V above VCC, current flows to VOUT and VCC from VBATT until the voltage at VBATT is less than 0.5V above VCC.
Leakage current through the capacitor charging diode and the SP690A/SP802L/SP805L internal power diode eventually discharges the capacitor to VCC. Also, if VCC and VBATT start from 0.5V above the reset threshold and power is lost at VCC, the capacitor on VBA TT dischar ges through VCC until VBA TT reaches the reset threshold; the SP690A/SP802L/SP805L then switches to battery-backup mode.
+5V
V
CC
CONNECT TO
OUT
STATIC RAM
CONNECT
TO µP
*( ) SP805M only
0.1F
100K
GND
V
RESET
(RESET)*
V
BATT
Figure 15. Allowable BACKUP-BATTERY Voltages
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
Figure 17. Backup Power Source Using High Capacity Capacitor with SP692A/802M/805M and a +5V ±10% Supply
11
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+5V
PFO
V
CC
GND
PFI
PFO
1.25 R
2
V
TRIP
=
VH =
R
=
L
- 1.25
V
R
R1 + R2 || R
3
connect to µP
1.25 R
2
R1 + R
+
1
1.25
2
|| R
R
V
IN
*C
1
*optional
2
5.0 - 1.25
3
R
3
3
Operation Without a Backup Power Source
R
1
R
2
If a backup power source is not used, ground V
and connect V
BATT
no need to switch over to any backup power source, V direct connection to VCC eliminates any voltage
does not need to be switched. A
OUT
drops across the switch which may push V below VCC.
to VCC. Since there is
OUT
OUT
Replacing the Backup Battery
The backup battery can be removed while V remains valid, without danger of triggering
CC
RESET/RESET. As long as VCC stays above the reset threshold, battery-backup mode cannot be entered.
Adding Hysteresis to the Power-Fail Comparator
+5V
0V
0V
Figure 18. Adding Hysteresis to the POWER-FAIL Comparator
V
L
V
TRIP
V
H
V
IN
Allowable Backup Power-Source Batteries
Lithium batteries work very well as backup batteries due to very low self-discharge rate and high energy density. Single lithium batteries with open-circuit voltages of 3.0V to 3.6V are ideal. Any battery with an open-circuit voltage less than the minimum reset threshold plus 0.3V can be connected directly to the V this series with no additional circuitry; see
BATT
input of
FIGURE 12. However, batteries with open­circuit voltages that are greater than this value cannot be used for backup, as current is sourced into V when VCC is close to the reset threshold.
through the diode (D1 in Figure 13)
OUT
Hysteresis adds a noise margin to the power-fail comparator and prevents repeated triggering of PFO when VIN is close to its trip point. Figure 18 shows how to add hysteresis to the power-fail comparator. Select the ratio of R1 and R2 such that PFI sees 1.25V when VIN falls to its trip point (V typically be an order of magnitude greater (about
). R3 adds the hysteresis. It will
TRIP
10 times) than R1 or R2. The current through R and R2 should be at least 1µA to ensure that the 25nA (max) PFI input current does not shift the trip point. R3 should be larger than 10K so it does not load down the PFO pin. Capacitor C1 adds additional noise rejection.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a negative supply rail using the circuit of Figure
19. When the negative rail is valid, PFO is low. When the negative supply voltage drops, PFO goes high. This circuit's accuracy is affected by the PFI threshold tolerance, the V voltage, and the resistors, R1 and R2.
CC
1
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
12
Page 13
+5V
V
CC
GND
PFI
PFO
V-
Buffered RESET connects to System Components
R
1
+5V
V
R
2
CC
RESET
RESET
4.7K
+5V
µP
V
CC
5.0 - 1.25
1
R
1.25 - V
=
TRIP
R
2
PFO
+5V
0V
0V
*V
TRIP
TRIP
is a negative voltage
*V
Figure 19. Monitoring a Negative Voltage
V-
Interfacing to Microprocessors with Bidirectional Reset Pins
Microprocessors with bidirectional reset pins, such as the Motorola 68HC11 series, can con­tend with this series' RESET output. If, for example, the RESET output is driven high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a
4.7K resistor between the RESET output and the µP reset I/O, as in Figure 20. Buffer the RESET output to other system components.
GND
Figure 20. Interfacing to Microprocessors with Bidirectional RESET I/O
GND
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
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D1 = 0.005" min.
(0.127 min.)
D
e = 0.100 BSC
(2.540 BSC)
B1
B
ALTERNATE
END PINS
(BOTH ENDS)
PACKAGE: PLASTIC
DUAL–IN–LINE (NARROW)
E1
E
A1 = 0.015" min.
(0.381min.)
A = 0.210" max.
(5.334 max).
A2
L
C
Ø
eA = 0.300 BSC
(7.620 BSC)
DIMENSIONS (Inches)
Minimum/Maximum
(mm) A2
B
B1
C
D
E
E1
L
Ø
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.355/0.400
(9.017/10.160)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.735/0.775
(18.669/19.685)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.780/0.800
(19.812/20.320)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
18–PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.880/0.920
(22.352/23.368)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
20–PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.980/1.060
(24.892/26.924)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
22–PIN8–PIN 14–PIN 16–PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
1.145/1.155
(29.083/29.337)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
14
Page 15
D
Be
DIMENSIONS (Inches)
Minimum/Maximum
(mm) A
A1
B
D
E
e
H
h
L
Ø
EH
A
A1
8–PIN
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249
0.014/0.019 (0.35/0.49)
0.189/0.197 (4.80/5.00)
0.150/0.157
(3.802/3.988)
0.050 BSC
(1.270 BSC)
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
PACKAGE: PLASTIC
h x 45°
14–PIN
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249)
0.013/0.020
(0.330/0.508)
0.337/0.344
(8.552/8.748)
0.150/0.157
(3.802/3.988)
0.050 BSC
(1.270 BSC)
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
16–PIN
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249)
0.013/0.020
(0.330/0.508)
0.386/0.394
(9.802/10.000)
0.150/0.157
(3.802/3.988)
0.050 BSC
(1.270 BSC)
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
SMALL OUTLINE (SOIC) (NARROW)
Ø
L
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
15
Page 16
Model Temperature Range Package Types
ORDERING INFORMATION
SP690ACN..........................................................0°C to +70°C....................................................8-Pin NSOIC
SP690ACP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP690AEN......................................................-40°C to +85°C.....................................................8-Pin NSOIC
SP690AEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP692ACN........................................................0°C to +70°C......................................................8-Pin NSOIC
SP692ACP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP692AEN......................................................-40°C to +85°C.....................................................8-Pin NSOIC
SP692AEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP802LCN........................................................0°C to +70°C......................................................8-Pin NSOIC
SP802LCP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP802LEN.......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP802LEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP802MCN.......................................................0°C to +70°C......................................................8-Pin NSOIC
SP802MCP.......................................................0°C to +70°C.........................................................8-Pin PDIP
SP802MEN......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP802MEP......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP805LCN........................................................0°C to +70°C......................................................8-Pin NSOIC
SP805LCP........................................................0°C to +70°C.........................................................8-Pin PDIP
SP805LEN.......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP805LEP.......................................................-40°C to +85°C.......................................................8-Pin PDIP
SP805MCN.......................................................0°C to +70°C......................................................8-Pin NSOIC
SP805MCP.......................................................0°C to +70°C.........................................................8-Pin PDIP
SP805MEN......................................................-40°C to +85°C....................................................8-Pin NSOIC
SP805MEP......................................................-40°C to +85°C.......................................................8-Pin PDIP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation Headquarters and
Sales Office
22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation
16
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