Datasheet SP6644, SP6645 Datasheet (Sipex)

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Page 1

SP6644/6645

Single/Dual Alkaline Cell, High Efficiency

Boost DC-DC Regulator

■ 90mA Output Current at 1.3V Input

■ 190mA Output Current at 2.6V Input

■ +2V to +5.5V Output Range

■ 0.88V Guaranteed Start-Up

■ 92% High Efficiency

■ 1.6µA Quiescent Supply Current at V

BATT

■ Reverse Battery Protection

■ Internal Synchronous Rectifier

■ 5nA Logic Controlled Shutdown Current

From V

BATT

■ Low-Battery Detection Active LOW Output

■ Small 8 Pin MSOP Package

■ Flexibility to Optimize Inductor Type with

Programmable Peak Current Control

■ No External FETs

The SP6644/6645 devices are high-efficiency, low-power step-up DC-DC converters ideal for single or dual alkaline cell applications such as pagers, remote controls, pointing devices, medical monitors, and other low-power portable end products. Designers can control the SP6644 device with an active LOW shutdown input. The SP6644 device features an active low output for batteries below +1.0V. The SP6645 device features an active low output for batteries below +2.0V. Both devices contain a 0.8Ω synchronous rectifier, a 0.5Ω N-channel MOSFET power switch, an internal voltage reference, circuitry for pulsefrequency-modulation, and an under voltage comparator. The output voltage for the SP6644/6645 devices is preset to +3.3V + 4% or can be adjusted from +2V to +5.5V by manipulating two external resistors

22µH

0.88V to

3.3V Input 47µF

0.7A

BATT

LIM

SP6644 SP6645

BATTL0

SHDN

OUT

BAT

LIM

1 2

3 4

SP6644 SP6645

8 Pin MSOP

8 7 6 4

DESCRIPTION

TYPICAL APPLICATION CIRCUIT

+3.3V

OUT

47µF

OUT

LX GND FB

SHDN

GND

BATTLO

Page 2

These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.

to GND.............................................-0.3 to 6.0V

BATT

to GND..............................................-0.3 to 6.0V

OUT

LX, SHDN, FB, BATTLO, to GND.............-0.3 to 6.0V

Reverse battery Current, T (NOTE 1) V

forward current............................................0.5A

BATT

, LX current......................................................1A

OUT

Storage Temperature Range............-65˚C to +165˚C

=+25˚C.............220mA

AMB

Lead Temperature (soldering 10s)..................+300˚C

Operating Temperature.......................-40˚C to +85˚C

ABSOLUTE MAXIMUM RATINGS

Power Dissipation Per Package 8-pin µSOIC (derate 4.85mW/

= V

= 1.3V, I

BATT

SHDN

LOAD

C above +70OC)..........390mW

= 0mA, FB = GND, T

RETEMARAP.NIM.PYT.XAMSTINU

)XAM(TTAB

V,egatloVtupnIpU-tratS

TTAB

V,egatloVtupnIpU-tratS

TTAB

tneiciffeoCerutarepmeT

egatloVtupnINDHS

tnerruCtupnINDHS1001An

tnerruCtupnIBF1001An

V,egatloVteSBF

egatloVpirTgnillaFOLTTAB49.0

V,egatloVtuptuO

TUO

egnaRegatloVtuptuO0.25.5V

ecnatsiseR-nOlennahC-N5.00.1

ecnatsiseR-nOlennahC-P8.06.1

= -40oC to +85oC, and typical values are at T

AMB

,egatloVtupnIgnitarepOmumixaM

3.3V

28.01.1V

51% Vfo%

512.1262.1903.1V

00.1

88.1

60.1

00.2

21.2

61.303.344.3V

ELECTRICAL CHARACTERISTICS

= +25oC unless otherwise noted.

AMB

♦♦♦♦♦

RLk3= Ω,

CºVm

TTAB

Vfo%

TTAB

♦♦♦♦♦ ♦♦♦♦♦

,V3.1=

♦♦♦♦♦

V,4466PS

♦♦♦♦♦

TUO

V,5466PS

TUO

V1.0<

♦♦♦♦♦ Ω Ω

V V

V3.3=

TUO

V3.3=

TUO

SNOITIDNOC

kcabdeeflanretxe

V3.3= V3.3=

kcabdeeflanretxe

Page 3

ELECTRICAL CHARACTERISTICS

= V

= 1.3V, I

BATT

SHDN

ycneiciffE98%

NOTE 1: The reverse battery current is measured from the Typical Operating Circuit's input terminal to GND when the battery is connected backward. A reverse current of 220mA will not exceed package dissipation limits but, if left for an extended time (more than 10 minutes), may degrade performance.

NOTE 2: Specifications to -40oC are guaranteed by design, not production tested.

NOTE 3: Inductor Peak Current where .

= 0mA, FB = GND, T

LOAD

= -40oC to +85oC, and typical values are at T

AMB

RETEMARAP.NIM.PYT.XAMSTINUSNOITIDNOC

VotnitnerruCtnecseiuQ

TUO

TUOQ

VotnitnerruCtnecseiuQ

TTAB

TTABQ

VotnitnerruCnwodtuhS

TUO

TUONDHS

VotnitnerruCnwodtuhS

TTAB

TTABNDHS

V,OLTTABrofegatloVtuptuOwoL

0508

6.10.3

100.05.0

500.01.0

OLTTABroftnerruCegakaeL1

I,tnerruCkaeProtcudnI

KAEP

572053004Am

µA ♦♦ µA ♦♦ µA ♦♦ µA ♦♦

4.0V µA ♦♦

)OLVU(tuo-kcoLegatloVrednU005.0027.0V

1400

LIM

PEAK

= +25oC unless otherwise noted.

AMB

♦♦

♦

♦♦

♦

♦♦

♦

♦♦

♦

♦♦♦♦♦

♦♦

♦

♦♦♦♦♦

V5.3=

TUO

V0.1=

TTAB

TUO

TTAB

DAOL

MIL

V,V5.3=

V,V0.1=

V,V9.0=

V,V6.2=

V,Am051=

k5= Ω 3ETON,

♦♦♦♦♦

V0-

NDHS

V0-

NDHS

TUO

I,V3.3+=

KNIS

V5.3=

OLTTAB

V6.2=

TTAB

Am1=

Page 4

Refer to the circuit in

Figure 28,

= +25oC unless otherwise noted.

AMB

PERFORMANCE CHARACTERISTICS

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Iload (mA)

Vb=1.0V Vb=1.3V Vb=2.0V Vb=2.6V Vb=3.2V

Figure 1. Efficiency vs. Output Current (Vout=3.3V), Rlim=2.5k, Li=22uH Sumida CD43

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Iload (mA)

Vb=1.0V Vb=1.3V Vb=2.0V Vb=2.6V Vb=3.2V

Figure 3. Efficiency vs. Output Current (Vout=3.3V), Rlim=2.5k, Li=22uH Sumida CDRH5D18 Low Profile

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Iload (mA)

Vb=1.0V Vb=1.3V

Vb=2.0V Vb=2.6V Vb=3.2V

Figure 5. Efficiency vs. Output Current (Vout=5V), Rlim=2.5k, Li=22uH Sumida CD43, Refer to Figure 29, R1=499k, R2=169k

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Iload (mA)

Figure 2. Efficiency vs. Output Current (V Rlim=5k, Li=22µH Sumida CD43

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Iload (mA)

OUT

Vb=1.0V Vb=1.3V Vb=2.0V Vb=2.6V Vb=3.2V

=3.3V),

Vb=1.0V Vb=1.3V Vb=2.0V Vb=2.6V Vb=3.2V

Figure 4. Efficiency vs. Output Current (Vout=3.3V), Rlim=5k, Li=100µH Sumida CD54

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Iload (mA)

Vb=1.0V Vb=1.3V Vb=2.0V Vb=2.6V Vb=3.2V

Figure 6. Efficiency vs. Output Current (Vout=5V), Rlim=5k, Li=22uH Sumida CD43, Refer to Figure 29, R1=499k, R2=169k

3.33

3.32

3.31

3.30

(V)

OUT

3.29

3.28

3.27 020406080100 120 140 160 180 200

Iload (mA)

Figure 7. Line/Load Rejection vs. Output Current (Vout=3.3V), Rlim=2.5k, Li=22uH Sumida CD43

Vb=1.3V Vb=2.6V

3.33

3.32

3.31

3.30

(V)

3.29

OUT

3.28

3.27 0102030405060708090100

Iload (mA)

Figure 8. Line/Load Rejection vs. Output Current (Vout=3.3V), Rlim=5k, Li=22uH Sumida CD43

Vb=1.3V Vb=2.6V

Page 5

Refer to the circuit in

Figure 28,

= +25oC unless otherwise noted.

AMB

PERFORMANCE CHARACTERISTICS

5.08

5.07

5.06

5.05

5.04

(V)

5.03

OUT

5.02

5.01

5.00 0102030405060708090100

Iload (mA)

Vb=1.3V Vb=2.6V

Figure 9. Line/Load vs. Output Current (Vout=5V), Rlim=2.5k, Li=22uH Sumida CD43, Refer to figure 29, R1=499k, R2=169k

240 220 200 180 160 140 120

(mA)

100

Max I

60 40 20

0.0 1.0 2.0 3.0 4.0

Vbatt (V)

Rlim=2.5K Rlim=5K

Figure 11. Maximum Load Current vs. Vbatt (Vout=3.3V), Li=22uH Sumida CD43

10000

1000

100

Battery Current (µA)

0.0 1.0 2.0 3.0 4.0

Vbatt (V)

Rlim=2.5k Rlim=5k

Figure 13. No Load Battery Current vs. Vbatt (Vout=3.3V), Li=22uH Sumida CD43

5.08

5.07

5.06

5.05

(V)

5.04

OUT

5.03

5.02

5.01

5.00 01020304050

Iload (mA)

Vb=1.3V Vb=2.6V

Figure 10. Line/Load vs. Output Current (Vout=5V), Rlim=5k, Li=22uH Sumida CD43, Refer to figure 29, R1=499k, R2=169k

240 220 200 180 160 140 120

(mA)

100

Max I

60 40 20

0.0 1.0 2.0 3.0 4.0

Vbatt (V)

Rlim=2.5K Rlim=5K

Figure 12. Maximum Load Current vs. Vbatt (Vout=5V), Li=22uH Sumida CD43, Refer to Figure 29, R1=499k, R2=169k

3.33

3.32

3.31

(V)

3.30

OUT

3.29

3.28

3.27

-40 -20 0 20 40 60 80 100

Temperature (degC)

Figure 14. Output Voltage vs. Temperature, Rlim=2.5k, Rload=3k, (Vout=3.3V),Li=22uH Sumida CD43

(µA)

-40 -20 0 20 40 60 80 100

Temperature (degC)

Figure 15. Io Pin Quiescent Current vs. Temperature, (Vout=3.3V)

3.0

2.5

2.0

1.5

(µA)

1.0

0.5

0.0

-40 -20 0 20 40 60 80 100

Temperature (degC)

Figure 16. Ibatt Pin Quiescent Current vs. Temperature, (Vout=3.3V), Vbatt=1.0V

Page 6

Refer to the circuit in

100

Efficiency (%)

0.1 1.0 10.0 100.0 1000.0

Figure 28,

Iload (mA)

= +25oC unless otherwise noted.

AMB

Vb=1.0V Vb=1.3V Vb=2.0V Vb=2.6V Vb=3.2V

Figure 17. SP6644/6201 DC/DC LDO Combination Efficiency vs. Output Current (Vout=3.3V), Rlim=2.5k, Li=22µH Sumida CD-43, Refer to Figure 30

240 220 200 180 160 140

(mA)

120

100

Max I

60 40 20

0.0 1.0 2.0 3.0 4.0

Vbatt (V)

Figure 19. SP6644/6201 DC/DC LDO Maximum Load Current vs. Vbatt (Vout=3.3V), Rlim=2.5k, Li=22µH Sumida CD-43, Refer to Figure 30

PERFORMANCE CHARACTERISTICS

3.037

3.036

3.035

(V)

3.034

OUT

3.033

3.032 020406080100 120 140 160 180 200

Iload (mA)

Figure 18. SP6644/6201 LDO Line/Load Rejection vs. Output Current (Vout=3.3V), Rlim=2.5k, Li=22µH Sumida CD-43, Refer to Figure 30

10000

1000

100

Battery Current (µA)

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Vbatt (V)

Figure 20. SP6644/6201 DC/DC LDO No-Load Ibatt vs. Vbatt (Vout=3.3V), Rlim=2.5k, Li=22µH Sumida CD43, Refer to Figure 30

Vb=1.3V Vb=2.6V

SP6201 Out 10mV/div

SP6644 Out 20mV/div

Figure 21. SP6644/6201 DC/DC LDO Output Ripple Voltage (Vout=3.3V), Rlim=2.5k, Li=22µH Sumida CD43, Refer to Figure 30

OUT

50mV/div

BATT

1V/div

Figure 23. Line Transient Response, (Vout=3.3V), Rlim=2.5k, Iload=22µH Sumida CD-43

Figure 22. Load Transient Response, Vbatt=1.3V, (Vout=3.3V), Rlim=2.5k, Li=22µH Sumida CD-43

Figure 24. Switching Waveforms, (Vout=3.3V), Vbatt=1.3V, Rlim=2.5k, Iload=10mA, Li=22µH Sumida

0.5A/div

OUT

50mV/div

BATT

50mV/div

0.2A/div

OUT

1V/div

, VLX,V

BATT

CD-43

Page 7

Refer to the circuit in

Figure 28,

= +25oC, unless otherwise noted.

AMB

SDN 2V/div

0.5A/div

V 1V/div

OUT

PERFORMANCE CHARACTERISTICS

BATT

, V

BATT

BATTLO

RLIM

SHDN

2 3 4

SP6644 SP6645

OUT

GND

Figure 25. Shutdown Response and Inductor Current,

Figure 26. Pinout for the SP6644/6645 Vout=3.3V, Vbatt=1.3V, Rlim=2.5k, Rload=550 Ohms, Li=22uH Sumida CD43

PIN DESCRIPTION

EMANNOITCNUF.ONNIP

TTAB

OLTTAB

MIL

NDHSVottcennoC.tupnInwodtuhSWOL-evitcA

ehtrofV2 5466PS .tnerrucsknisOLTTAB,

.noitarepotuptuo

PEAK

erehwtnerruckaeprotcudniehtsmargorpdnuorg

TTAB

Vneewtebredividegatlovrotsiserlanretxe

TUO

1400

LIM

DNG.dnuorgyllacipyt,laitnetoptiucrictsewolehtottcennoC 6

VmorfdetcennocsirotcudninA.lioC

TTAB

.nipsihthguorhtniardreifitcer-suonorhcnyslennahC-Peht

.rotarapmocOLTTABehtfotupnirosnesehtotseitnipsihT.ylppuSyrettaB 1

ehtrofV1wolebspordegatlovehtnehW.tuptuOwoLyrettaBniarD-nepO 4466PS ro

.noitarepolamronrof4

otnipsihtmorfrotsiseragnitcennoC.tnerruCkaeProtcudnIelbammargorProtsiseR

naotniptupnisihttcennoC.noitarepotuptuo-elbatsujdaroftupnI.tupnIkcabdeeF

-dexifrofDNGottcennoC.DNGdna

dnaniardhctiwsTEFSOMlennahC-Nehtot

TUO

Votesolcroticapacretlif

TUO

tcennoC.tupnirewopCIdnanoitarepoV3.3dexifroftupnikcabdeeF.tuptuOrewoP

Table 1. SP6644/6645 Pin Descriptions

Page 8

DESCRIPTION

The SP6644/6645 devices are high-efficiency, low-power step-up DC-DC converters ideal for single or dual alkaline cell applications such as pagers, remote controls, and other low-power portable end products.

The SP6644/6645 devices feature a 5nA logiccontrolled shutdown mode and a dedicated low-battery detector circuitry. Both devices contain a 0.8Ω synchronous rectifier, a 0.5Ω N-channel MOSFET power switch, an internal voltage reference, circuitry for pulse-frequencymodulation, and an under voltage comparator. The output voltage for the SP6644/6645 devices can be adjusted from +2V to +5.5V by manipulating two external resistors. The output voltage is preset to +3.3V.

THEORY OF OPERATION

The SP6644/6645 devices are ideal for end products that function with a single or dual alkaline cell, such as remote controls, pagers, and other portable consumer products. Designers can implement the SP6644/6645 devices into applications with the following power management operating states: 1. where the primary battery is good and the load is active, and

2. where the primary battery is good and the load is sleeping.

In the first operating state where the primary supply is good and the load is active, the SP6644/6645 devices typically offer 88% efficiency, drawing tens of milliamps.

Applications will predominantly operate in the second state where the primary supply is good and the load is sleeping. The SP6644/6645 devices draw a very low quiescent current while the load in its disabled state will draw typically hundreds of microamps.

The pulse-frequency-modulation (PFM) circuitry provides higher efficiencies at low to moderate output loads than traditional PWM converters are capable of delivering.

In a state where the error comparator detects that the output voltage at V N-channel MOSFET switch is turned on until the

is too low, the internal

OUT

peak inductor current is satisfied. This is indicated by the falling edge of the I-Charge comparator output. The approximate inductor charging time is defined by:

≅≅

where t charging time, L [H] is the inductance, I

CHARGE

≅ L x I

≅≅

CHARGE

[s] is the approximate inductor

is the peak inductor current, and V input voltage to the device.

The peak inductor current, I externally by putting a resistor between the R pin and ground. This is defined by:

PEAK

where I R

LIM

from pin R

[A] is the peak inductor current and

PEAK

[Ω] is the value of the resistor connected

to ground.

LIM

PEAK

1400

/ V

BATT

, is programmed

PEAK

LIM

[A]

PEAK

[V] is the

LIM

When the charging N MOSFET turns off, the discharging P MOSFET turns on and the inductor current flows into the output capacitor and the load recharging the output. When the current through the discharging P MOSFET approaches zero, the I-Discharge comparator indicates to the logic to turn off the P MOSFET. The approximate time for discharging the inductor current can be determined by:

L x I

≅≅

≅

≅≅

DCHG

where t inductor, L [H] is the inductance, I

[s] is the time to discharge the

DCHG

peak inductor current, V voltage, and V device.

[V] is the input voltage to the

BATT

PEAK

- V

OUT

BATT

[V] is the output

OUT

[A] is the

PEAK

The output filter capacitor stores charge while current from the inductor is high and holds the output voltage high until the discharge phase of the next switching cycle, smoothing power flow to the load. Between switching cycles, the inductor damping switch is closed suppressing the ringing caused by the inductor and the parasitic capacitance on the LX node.

Page 9

BATT

LOGIC

SHDN

+1.25V

REFREADY

REF

+1.0V (SP6644) +2.0V (SP6645)

SP6644 SP6645

+1.0V (SP6644) +2.0V (SP6645)

Figure 27. Internal Block Diagram of the SP6644/6645

DRV-N

START

DRV-P

Inductor

Damping

OSC

Switch

DISCHARGE

CHARGE

GND

BLOCK DIAGRAM

OUT

I-Discharge

I-Charge

LPK

BATTLO

LIM

Page 10

Internal Bootstrap Circuitry

The internal bootstrap circuitry contains a low-voltage start-up oscillator that pumps up the output voltage to approximately 1.9V so the main DC-DC converter can function. At lower battery supply voltages, the circuitry can start up with low-load conditions. Designers can reduce the load as needed to allow start-up with input voltages below 1V. Refer to Figures 10 to

13. Once started, the output voltage can maintain the load as the battery voltage decreases below the initial start-up voltage. The start-up oscillator is powered by V NMOS switch. During start-up, the P-channel

driving a charge pump and

BATT

synchronous rectifier remains off and either its body diode or an external diode is used as an output rectifier.

BATTLO Circuitry

The SP6644 device has an internal comparator for low-battery detection. If V 1V, BATTLO will sink current. BATTLO is an

drops below

BATT

open-drain output. The SP6645 operates in the same manner with a threshold voltage of 2V.

Shutdown for the SP6644

A logic LOW at SHDN will drive the SP6644 into a shutdown mode where BATTLO goes into a high-impedance state, the internal switching MOSFET turns off, and the synchronous rectifier turns off to prevent reverse current from flowing from the output back to the input. Designers should note that in shutdown, the output can drift to one diode drop below V current path through the synchronous-rectifier

because there is still a forward

BATT

body diode from the input to the output. To disable the shutdown feature, designers can connect SHDN to V

BATT

Adjustable Output Voltage

Driving FB to ground (logic LOW) will drive the output voltage to the fixed-voltage operation of +3.3V + 4%. Connecting FB to a voltage divider between V output voltage between +2V and +5.5V. Refer to

and ground will select an adjustable

OUT

Figure 28. FB regulates to +1.25V.

Since the FB leakage current is 10nA maximum, designers should select the feedback resistor R2 in the 100kΩ to 1MΩ range. R1 can be determined with the following equation:

OUT

R1 = R2 x -1

V V

REF

where R1 [Ω] and R2 [Ω] are the feedback resistors in Figure 29, V voltage, and V

[V] is 1.25V.

REF

[V] is the output

OUT

Battery Reversal Protection

The SP6644/6645 devices will tolerate singlecell battery reversal up to the package powerdissipation limits noted in the ABSOLUTE MAXIMUM RATINGS section. An internal diode in series with an internal 5Ω resistor limits any reverse current to less than 220mA preventing damage to the devices. Prolonged operation above 220mA reverse-battery current can degrade performance of the devices.

The Inductor

The programmable peak inductor current feature of the SP6644/6645 devices affords a great deal of flexibility in choosing an inductor. The most important point to consider when choosing an inductor is to insure that the peak inductor current is programmed below the saturation rating of the inductor. If the inductor goes into saturation, the internal switches and the inductor will be stressed due to current peaking, potentially leading to reliability problems with the application circuit.

The peak inductor current is programmed by putting a resistor between the R The usable current range is between 150mA and

pin and ground.

LIM

560mA. This is defined by:

PEAK

where I R

LIM

from pin R

[A] is the peak inductor current, and

PEAK

[Ω] is the value of the resistor connected

to ground.

LIM

1400

LIM

Page 11

0.88V to

3.3V Input 22µF

0.1µF

22µH

0.7A

BATT

LIM

SP6644 SP6645

OUT

100pF*

47µF

OUT

2V to 5.2V

SHDN

GND

Figure 28. Adjustable Output Voltage Circuitry

With an external resistor tolerance of +1%, the peak current tolerance will be +6%. To make sure that the SP6644/6645 internal circuitry adequately controls the inductor current, it is recommended that values equal to or greater than 22µH (+10%) be used.

The SP6644/6645 devices control algorithm delivers an average maximum load current in regulation as defined by:

PEAK

2 x V

x V

OUT

BATT

LOAD-MAX

where I

LOAD-MAX

E is the efficiency factor (generally between 0.8 and 0.9), I inductor current, V

PEAK

the device, and V

E x I

[A] is the maximum load current, [A] is the programmed peak

[V] is the input voltage to

BATT

[V] is the output voltage.

OUT

BATTLO

*optional compensation

APPLICATION NOTES

Printed circuit board layout is a critical part of design. Poor designs can result in excessive EMI on the voltage gradients and feedback paths on the ground planes with applications involving high switching frequencies and large peak currents. Excessive EMI can result in instability or regulation errors.

All power components should be placed on the PC board as closely as possible with the traces kept short, direct, and wide (>50mils or 1.25mm). Extra copper on the PC board should be integrated into ground as a pseudo-ground plane. On a multilayer PC board, route the star ground using component-side copper fill, then connect it to the internal ground plane using vias.

Given the minimum input voltage, output voltage, and maximum average load current, the value of I

can be solved for and an appropriate inductor

PEAK

can be chosen. It is good design practice to use the lowest peak current possible to reduce possible EMI and output ripple voltage. A closed-core inductor, such as a toroid or shielded bobbin, will minimize any fringe magnetic fields or EMI.

For the SP6644/6645 devices, the inductor and input and output filter capacitors should be soldered with their ground pins as close together as possible in a star-ground configuration. The V directly to ground as close to the SP6644/6645

pin must be bypassed

OUT

devices as possible (within 0.2in or 5mm). The DC-DC converter and any digital circuitry should be placed on the opposite corner of the PC board as far away from sensitive RF and analog input stages. The external voltage-feedback network should be placed very close to the FB pin as well as the R

resistor (within 0.2in or 5mm). Any

LIM

Page 12

noisy traces, such as from the LX pin, should be kept away from the voltage-feedback network and separated from it using grounded copper to minimize EMI.

Capacitor equivalent series resistance is a major contributor to output ripple, usually greater than 60%. Low ESR capacitors are recommended. Ceramic capacitors have the lowest ESR. Low-ESR tantalum capacitors may be a more acceptable solution having both a low ESR and lower cost than ceramic capacitors. Designers should select input and output capacitors with a rating exceeding the peak inductor current. Do not allow tantalum capacitors to exceed their ripple-current ratings. A 22µF, 6V, low-ESR, surface-mount tantalum output filter capacitor typically provides 60mV output ripple when stepping up from 1.3V to 3.3V at 20mA. An input filter capacitor can reduce peak currents drawn from the battery and improve efficiency. Low-ESR aluminum electrolytic capacitors are acceptable in some applications but standard aluminum electrolytic capacitors are not recommended.

Designers should add LC pi filters, linear post-regulators, or shielding in applications necessary to address excessive noise, voltage ripple, or EMI concerns. The LC pi filter's cutoff frequency should be at least a decade or two below the DC-DC converters's switching frequency for the specified load and input voltage.

A small SOT23-5pin 200mA Low Drop Out linear regulator can be used at the SP6644/6645 output to reduce output noise and ripple. The schematic in figure 29 illustrates this circuit with the SP6644 3.3V output followed by the Sipex SP6201 3.0V output Low Drop Out linear regulator. Compare in Figure 21 the SP6644 ripple of 40-50mVpp with the SP6201 ripple of about 3mVpp and you can see the amount of noise reduction obtained. Additional performance characteristics for the SP6644/6201 combination can be seen in figures 17 to 20.

Inductor Specification

Inductance Manufacturer/Part No. Resistance Isat (uH) (ohms) (mA)

Sumida CD43-220 0.38 (max) 680

22 Sumida CDRH5D18-220 0.28 (max) 760

Coilcraft DO1608C-223 0.32 (typ) 700

47 Sumida CD43-470 0.84 (max) 440

Coilcraft DO1608C-473 0.56 (typ) 500

100 Sumida CD54-101 0.7 (max) 520

Coilcraft DO1608C-104 1.1(typ) 310

Table 1. Surface-Mount Inductor Information

Page 13

0.88V to 3.3V Input

BATT

GND

BATTLO

SHDN

SCHEMATIC WITH LDO COMBINATION

C1 47µF

1 2

3 4

BATT

BATTLO R

LIM

SHDN

L1 22µH

R4 1M

SP6644

GND

OUT

8 7

6 5

R1 Open

+3.3V

OUT

+3.0V

OUT

RESET_N

GND

ENABLE

SP6201

C2 47µF

C3 1µF

OUT

2.5k

Probe access points for external connection by the user

Figure 29. Schematic SP6644/6201 DC/DC LDO Combination

R2 100k

Page 14

E/2

PACKAGE: 8 PIN MSOP

D e1

Ø1

Seating Plane

Pin #1 indentifier must be indicated within this shaded area (D/2 * E1/2)

Dimensions in (mm)

A A1 A2

c D

N R R1 Ø

Ø1

8-PIN MSOP JEDEC MO-187 (AA) V ariation

MIN NOM MAX

- - 1.10 0 - 0.15

0.75 0.85 0.95

0.22 - 0.38

0.08 - 0.23

3.00 BSC

4.90 BSC

3.00 BSC

0.65 BSC

1.95 BSC

0.40 0.60 0.80

0.95 REF

0.25 BSC

- 8 -

0.07 - -

0º 8º

0º - 15º

Ø1

WITH PLATING

BASE METAL

Gauge Plane

(b)

PACKAGE:

8-PIN MSOP

Page 15

ORDERING INFORMATION

Model Temperature Range Package Type

SP6644EU ............................................. -40OC to +85OC .........................................8-Pin MSOP

SP6645EU ............................................. -40OC to +85OC .........................................8-Pin MSOP

Please consult the factory for pricing and availability on a Tape-On-Reel option.

Corporation

SIGNAL PROCESSING EXCELLENCE

Sipex Corporation Headquarters and

Sales Office

22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com

Sales Office

233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

Datasheet SP6644, SP6645 Datasheet (Sipex)

Specifications and Main Features

Frequently Asked Questions

User Manual