Datasheet M-984-02T, M-984-02S, M-984-02P Datasheet (CLARE)

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DS-M984-02-R3

M-984-02

Special Information Tone Detector

1

Block Diagram

Pin Diagram

Ordering Information

Part # Description

M-984-02P 14-pin plastic DIP
M-984-02S 16-pin plastic, SOIC
M-984-02T 16-pin SOIC, Tape and Reel

Description

The M-984-02 Special Information Tone Detector is a
monolithic integrated circuit designed to provide reli­able detection of many common telephone network
status signals. In particular, it detects the signals
known as Special Information Tones (SITs) or error
tones as defined by the CCITT, and single tones often
used as dial tone, audible ringing, and other general
progress indications. The M-984-02 uses CMOS
switched capacitor filters and a crystal time base to
achieve the high stability and accuracy specified. Each
tone detection window has an associated output pin,
which can be placed in a high impedance state for use
with time-share microcomputer bus applications.

In comparison with the earlier M-984, the M-984-02
has wider acceptance bands for SIT tones to facilitate
reception of tape-loop tones, lower power consump­tion at 5V operation, 3V operation, superior tempera­ture performance, lower cost, and is available in DIP,
SOIC, and SOIC tape and reel versions.

Features

• Detects single-frequency tones used for error

indication and call progress in telephone systems

• Provides detection windows for:

400/425 Hz (Call Progress)
950 Hz (Special and error indication)
1400 Hz (Special and error indication)
1800 Hz (Special and error indication)

• Separate tri-state outputs for each tone window

• Inexpensive 3.58 MHz crystal time base

• Auxiliary 3.58 MHz clock output

• 14-pin DIP package and 16-pin SOIC package

• Single supply 3 to 5 volt (low power CMOS)

• Wide dynamic range (30 dBm)

Applications

• Automatic dialers

• Modems

• Telecom test equipment

• Telephone traffic measurement,

• Service evaluation

• Billing equipment

Specifications

Parameter Conditions Min Max Units

Operating Conditions V

DD

- 2.7 5.5 V

Power supply noise 0.1 - 5 kHz - 20 mV p-p

Power Current drain (IDD)V

REF

open - 15 mA

V

REF

V

REF

- 48% of V

DD

52% of V

DD

V

Impedance - 3.25 8.25 kΩ

Signal Detection Frequency Range - Note 1 Note 1 -

Level: V

DD

= 5.0V - -30 (24.5 mV) 0 (775 mV) dBm

Level: V

DD

= 3.0V - -33 (17.4 mV) -3 (173.5 mV) dBm

Duration f

c

= 400 Hz 85 - ms

f

c

= 950, 1400, 1800 Hz 50 - ms
Bridge Time - - 15 ms
Signal to Noise Ratio - 16 - dB

Signal Rejection Frequency Range - Note 1 Note 1 -

Level: V

DD

= 5.0V - - -40 (7.8 mV) dBm

Level: V

DD

= 3.0V - - -43 (5.5 mV) dBm

Duration - - 50 ms

Outputs Except X358 V

OL

I

SINK

= -1.0 mA - 0.5 V

V

OH

I

SOURCE

= 1.0 mA VDD-0.5 - V

Dn pins only I

OZ

VO= VDD, V

SS

-1µA

Inputs EN pin V

IL

- - 0.5 V

V

IH

VDD= 5V VDD-2.0 - V

V

DD

= 2.7V VDD- 0.5 - V

Pull-up and Pull- MODE = V

SS

VDD= 5V 12.5 50 µA

down currents V

DD

= 2.7V 4 20 µA

/XRANGE +V

SS

-26µA

MODE2 = V

DD

VDD= 5V 12.5 100 µA

V

DD

= 2.7V 12.5 25 µA

PD = V

DD

- 4 10 µA

SIGIN pin Voltage range - -6.5 V

DD

V
Input impedance f = 500 Hz 80 - kΩ
Input Spectrum - - 28 kHz

Clock External clock V

IL

XOUT open - 0.2 V

connected to V

IH

XOUT open VDD- 0.2 - V
XIN pin Duty cycle XOUT open 40 60 %
XIN, XOUT with Capacitance - - 10 pF

crystal ocs. active Internal res. - 20 - MΩ
X358 pin V

OL

CL= 20 pF, I

SINK

= -1.0 mA - 0.5 V

V

OH

CL= 20 pF, I

SOURCE

= 1.0 mA VDD- 0.5 - V

Duty cycle CL= 20 pF 40 60 %

Tri-state Operation t

EN

(High Z to Low Z) CL = 50 pF - 250 ns

t

DE

(Low Z to High Z) RL = 100 KΩ - 250 ns

Unless otherwise noted, specifications hold over VDD- VSS= 2.8V to 5.5V power supply, and TOL-40°C to +85°C.

Notes:

1. See the Detector Frequency Windows table on page 4 for detection/ rejection frequencies.

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M-984-02

Rev. 3

Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at these or
any other conditions beyond those indicated in the opera­tional sections of this data sheet is not implied. Exposure of
the device to the absolute maximum ratings for an extend­ed period may degrade the device and effect its reliability.

2

Absolute Maximum Ratings

DC Supply Voltage 7V
Input Voltage on SIGIN VSS- 6.5V to VDD+0.3V
Input Voltage on Any Pin VSS- 0.3 to VDD+ 0.3V

(except SIGIN)
Storage Temperature Range -40°C to +150°C
Operating Temperature Range -40°C to +85°C
Lead Soldering Temperature 260°C for 5 seconds

Note:

Exceeding these ratings may permanently damage the device.

M-984-02

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Rev. 3

3

Pin Functions

PIN FUNCTION

XIN Crystal Connection — 3.58 MHz crystal across these pins will produce the timebase needed for proper operation of the
XOUT M-984-02. An external clock signal may be fed to XIN providing the clock signal has a duty cycle of 50

±

10% and comes within

0.2 volts of the supply rails. XOUT remains unconnected when an external clock is used.

X358 A buffered output pin. A 3.58 MHz clock signal is available for use in other circuits as a timebase. Leave open when unused.

ENVLP The ENVLP pin is a common detection indicator for the four detect pins. Simply put, the ENVLP is a logical “OR” of the active

detect circuits for each of the four windows, though there is a delay provided to permit ENVLP to latch the first active detect pin.
ENVLP is not tri-state controlled.

V

SS

The power supply pins, VDDbeing the most positive. Commonly, VDDis at 3-5 volts, white VSSis at ground.

V

DD

SIGIN Analog signal input. (Internally capacitively coupled.)

V

REF

V

REF

is a bias voltage generated in the chip for use in external analog circuits, such as active filters and AC-coupled buffers.

Leave open when unused.

OE The tri-state control pin. OE places the DET pins in the active mode when at logic “1”. When at logic “0,” OE causes the DET

outputs to appear as high impedance. Should be tied to logic “1” when the M-984-02 is not used in a time-shared bus
application.

D1800
D1400 The detect outputs associated with each window. Tri-state control is available through use of the OE pin.
D950 Timing is shown in the Timing Diagram on page 4.
D400

Detector Frequency Windows

Detector Low Reject Low Accept High Accept High Reject

D400 363 392 459 493

D950 835 885 1016 1070
D1400 1275 1328 1472 1527
D1800 1656 1722 1854 1924

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4

M-984-02

Rev. 3

Typical Application

Timing Diagram

Tri-State Timing

M-984-02

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5

Rev. 3

Dimensions

mm

(inches)

Mechanical Dimensions

Tolerances

Inches Metric (mm)

Min Max Min Max

A - .210 - 5.33

A1 .015 - .38 -

b .014 .022 .36 .56

b2 .045 .070 1.1 1.8

C .008 .014 .20 .36
D .735 .775 18.7 19.7

E .300 .325 7.6 8.3

E1 .240 .280 6.1 7.1

e .100 BSC 2.54 BSC

ec 0° 15° 0° 15°

L .115 .150 2.9 4.1

Tolerances

Inches Metric (mm)

Min Max Min Max

A .093 .104 2.35 2.65

A1 .004 .012 .10 .30

b .013 .020 .33 .51
D .398 .413 10.10 10.50
E .291 .299 7.4 7.6

e .050 BSC 1.27 BSC
H .394 .419 10.00 10.65
L .016 .050 .40 1.27

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Specification: DS-M-984-02-R3
©Copyright 2001, Clare, Inc.
All rights reserved. Printed in USA.
7/17/01