Datasheet M-993 Datasheet (CLARE)

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Page 1

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DS-M993-R1

M-993

Region 1 MF Tone Generator

Block Diagram

Pin Diagram

Ordering Information

Part # Description

M-993 14-pin plastic DIP

Features

• Generates standard CCITT R1 MF tones

• Digital input control

• Linear (analog) output

• Power output capable of driving standard line

• 14-pin DIP

• Single 5-Volt supply

• Inexpensive 3.58 MHz time base

Applications

• Telephone systems

• Test equipment

Description

The M-993 is a monolithic CMOS integrated circuit designed to generate multifrequency (MF) tone pairs for use in trunk signaling. The tones generated conform to CCITT R1 signal recommendations and to AT&T MF standards. The M-993 permits design engineers to implement a highly accurate MF sender with a minimum of space, power, and added components. The accuracy of the tone frequencies is assured through use of an easily obtained 3.58 MHz color burst crystal or an external 3.58 MHz clock source.

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Specifications

Parameter Min Typ Max Units Notes

Power Supply V

4.75 - 5.25 V 1

and Reference Current Drain, IDD - 2.0/4.0 - mA 8

REF

PIN:

Voltage 48% of V

- 52% of V

Internal Resistance from V

REF

to VDD, V

3.25 - 6.75 kΩ -

Oscillator Frequency Deviation -0.01 - +0.01 % 7

External CLock: (X

OUT

open)

0 - 0.2 V -

VDD- 0.2 - V

VDuty Cycle 40 - 60 % XIN, X

OUT

Loading: Capacitance - - 10 pF 9 Resistance 20 - - MΩ -

Tone Output Frequency Deviation -1.5 - 1.5 % -

Level 110 - 180 mV 2 Distorting Components -35 - - dB 2, 3 Idle - - -60 dBm 4 OUTDRIVE Envelope Rise Time - - 4 ms 5

Control DX, CE Pins:

- - 0.5 V 6

2.5 - - V Mute Pins: VOL (ISINK = -100 µA) - - 1.5 V VOH (ISOURCE = 100 µA) VDD- 1.5 - - V -

Timing Data Setup (t

DSRT

) 200 - - ns 10 Data Hold (tDH)10--nsChip Enable Fall (tPL)--90nsTone On Delay (tTO)5--msTone Off Delay (tTD)5--msMute Delay from Outdrive (tMO) - - 200 ns -

Unless otherwise noted, VDD- VSS= 5 VDC, Ta - 25° C

Notes:

1. All DC voltages are referenced to V

2. Vrms per tone, 540W load.

3. Any one frequency relative to the lowest level output tone (f<4000 Hz).

4. 0 dBm = 0.775 Vrms.

5. To 90% maximum amplitude.

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M-993

Rev. 1

Absolute Maximum Ratings

Storage Temperature -55 to 125°C Operating Ambient Temperature -25 to 70°C V

7.0V

Any Input Voltage VSS- 0.6 to VDD+ 0.6V

Note:

1. Exceeding these ratings may permanently damage the M-993.

Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. Exposure of the device to the absolute maximum ratings for an extended period may degrade the device and effect its reliability.

6. For all supply voltages in the operating range.

7. At XOUT pin as compared to 3.579545 MHz.

8. OUTDRIVE with load >5 KW/OUTDRIVE with 540W load.

9. Crystal oscillator active.

10. Measured 90% to 10%.

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Data/Tone Selection

D3 D2 D1 D0 Frequency (Hz) Use

00001100 1700 Key Pulse (KP) 0 0 0 1 700 900 Digit 1 0010700 1100 Digit 2 0011900 1100 Digit 3 0100700 1300 Digit 4 0101900 1300 Digit 5 01101100 1300 Digit 6 0111700 1500 Digit 7 1000900 1500 Digit 8 10011100 1500 Digit 9 10101300 1500 Digit 0 10111500 1700 ST 1100900 1700 ST1 11011300 1700 ST2 1110700 1700 ST3

Pin Function

CE Latches data and enables output (active low

input). D0 - D3 Data input pins. (See Data/Tone Selection.) D4-D5 Leave open. MUTE Output indicates that a signal is being

generated at OUTDRIVE. OUTDRIVE Linear buffered tone output. V

Most positive power supply input pin. V

REF

Internally generated mid-power supply

voltage (output). V

Most negative power supply input pin. X

Crystal oscillator or digital clock input. X

OUT

Crystal oscillator output.

M-993

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Rev. 1

A typical control sequence for the M-993 is: (1) set data lines Selection for data settings for a particular tone pair output).to desired frequency selection, (2) wait for data lines to settle, (3) drive the chip enable (CE) low, (4) maintain CE low for desired tone duration (Note: data lines may be changed after data hold time), and (5) return CE to a logic high.

In a bus-oriented system, noise on the data lines may propagate through the device and appear at the output. To safeguard against this, use an external latch to clock the data into the device. In addition, it is good

practice to bypass the V

REF

pin to ground with a small capacitor (~0.01mF) to reduce power supply noise. The designer should be aware of device timing requirements and design accordingly. Beware of hardwiring the data input pins for dedicated tone generation. An RC network like that shown in Power-On Reset Circuit should be used to momentarily reset the device immediately following a power-up to ensure reliable operation.

Power-On Reset Circuit

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M-993

Rev. 1

Timing Diagram

Expanded Timing Diagram

Typical Application

Page 5

Tolerances

Inches Metric (mm)

Min Max Min Max

A - .210 - 5.33

A1 .015 - .38 -

b .014 .022 .36 .56

b2 .045 .070 1.1 1.8

C .008 .014 .20 .36 D .735 .775 18.7 19.7

E .300 .325 7.6 8.3

E1 .240 .280 6.1 7.1

e .100 BSC 2.54 BSC

ec 0° 15° 0° 15°

L .115 .150 2.9 4.1

M-993

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Rev. 1

Mechanical Dimensions

Dimensions

(inches)

Page 6

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Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in Clare’s Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.

The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of Clare’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice.