Page 1
LZ2336
149
Two-power supply
LZ2336
DESCRIPTION
U2336
is a 1 /3-type (6.0 mm) solid-state image
sensor that consists of PN phote-diodes and
CCDS (charge-coupled devices) driven by only
positive voltages. Having approximately 190000
pixels (horizontal 384
provides a stable B/W image.
FEATURES
●
Number of pixels : 362 (H) X 492 (V)
Pixel pitch : 13.6
Number of optical black pixels
●
Low fixed pattern noise and lag
●
No sticking and no image distortion
●
Blooming suppression structure
●
Built-in output amplifier
●
Variable electronic shutter (1 /60 to 1/1 O 000
●
Compatible with EIA standard
●
Package : 16-pin
X
vertical 492), the sensor
Mm
(H) X 7.5 Am (V)
: Horizontal; front 2 and rear 20
SDIPICERDIP](WDIPO1 6-N-0500B)
1/3
S
(+5
V and +12 V) operation
type B/W CCD Area Sensor for EIA
PIN CONNECTIONS
16-PIN SDIP
d
RS
RD
GND
0s
OD
d
H2B
$
H2
dHIB
)
,——_— ——— ——— — ,
,
1
I
.—. ——— ——— ———
J
TOP VIEW
GND
0s
“In
tie
abwnce of conf!mtlon by device swIflcation
dats bwks, etc
hnhct
WARP (n waler to obb[n ti latest
OD
RD d ,S
sh=b,
WARP Wes no reswsib(llv b any defeck hat
@mIon
of
tie dev(ce
dH1 +H2
swdlcabon shwh
dHIB dH2B
bsti us!ng
cccur In
quipmsnt
any SHARPs device
us!ng
OFD
dTG
any of SHARP’s &vIces, zhom In
catalcgs,
I
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PIN DESCRIPTION
SYMBOL
w-
OD
0s Video
&-
dVl, dV2Yd V3, dV4
4HI,4H2,4H16,4H213
d
TG
OFD
TI Test terminal
GND
I
Reset transistor drain
Output transistor drain
outl)ut
]
Reset transistor gate clock
Vertical shift register gate clock
Horizontal shift register gate clock
Transfer gate clock
Overflow drain
Ground
LZ2336
PIN NAME
I
I
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Out~ut
transistor drain voltage
Reset transistor drain voltage
Test terminal,
Reset sate clock voltage
Vertical shift register clock voltage
Horizontal shift register clock voltage
Transfer qate clock voltage
Overflow drain voltage Vom O to +27 v
Storage temperature
ODeratina
TI
ambient
tem~rature
SYMBOL
VOD
RD
V
VT1
vdRs
Vdv
V4H
VdTG
Tstg
Topr
RATING
Oto +15 v
Oto +15
Oto +15 v
–0.3 to +15 v
–0.3 to +15 v
–0.3 to +15 v
–0.3 to +15 v
–40 to
–20 to +70
(Ta =
+85
2SC
UNIT
v
‘c
‘c
)
150
Page 3
RECOMMENDED OPERATING CONDITIONS
PARAMHER
Operating ambient
Output transistor drain voltage
Reset transistor drain voltage
Overflow
drain
voltage
Test terminal, TI
Ground voltage
Transfer gate clock
Vertical shift
register clock
Horizontal shift
register clock
Reset gate
Vertical shift register clock frequency
Horizontal shift register clock frequency
Reset gate clock frequency
Horizontal shift register clock phase
tem~rature
When N is applied
When pulse is applied
p-p level
LOW level
HIGH level
LOW level
HIGH level
LOW level
HIGH level
clink
LOW level
HIGH level
V
v
SYMSOL
Topr 25.0 ‘c
Vm 12.0
VRO
Vom 3,0
V40M
VT1
GND
V
4TGL
V
4TGH
V4v14L
V4v1-4H
4H1-2L,
V+
HIB-2BL
4H1-2H, VdHIB-ZBH
v4m
v4R2n
f+v14
f+ Hi-2,
f+
H1E2B
f+m
twl, tw2
MIN.
12.0
TYP. MAX.
12.5 14.0
Voo
12.5
VOD
0.0
–0.05
12.0
–
0,05
4.7
– 0.05
4.7
0.0
VRO
0.0 5.0
0.0
12.5 14.0
0.0
5.0
0,0 0.05
5.0 6.0
Vm - 10,5
-6.0 9.5 v
15.73 kHz
6.75
6.75 MHz
12.0
14.0
0,05
0.05
6.0
10.0
UNIT
v
v
v
v
v
v
v
v
v
v
v
v
v
MHz
ns
LZ2336
NOTE
1
2
3
[
fi
@
j
a
8
u
~
L
NOTES :
1. When DC voltage is applied, shutter speed is 1/@ seconds.
2.
When pulse is applied, shutter speed is less than 1/60 seconds.
3“
n_rL
~
:,
::
,,
‘Hi”
‘H”
“
151
Page 4
LZ2336
ELECTRICAL CHARACTERISTICS (Drive method : Field Accumulation)
(Ta=25°C, Operating conditions : typical values for the recommended operating conditions, Color
temperature of light source : 3200 K /
PARAMETER SYMBOL
Photo response non-uniformity
Saturation signal
Dark output voltage
Dark signal non-uniformity
Sensitivity
Smear ratio SMR – 85 – 76
Image lag
Blooming suppression ratio
Output transistor drain current
Output impedance
.
Tt?e
standard output voltage is defined as 150 mV by the
average output voltage under uniform illumination.
● The standard exposure level is defined when the average
output voltage is 150
NOTES :
1. Ta :
+60CC
2. The image area is divided into 10x 10 segments. The segment’s voltage is the average output voltage of all the
pixels within the segment. PRNU is defined by (Vmax –
Vmin)/Vo,
the minimum values of each segment’s voltage respectively, when the average output voltage Vo is 150mV.
3. The image area is divided into 10x 10 segments.
The saturation signal is defined as the minimum of each
segment’s voltage which is the average output voltage of
all the pixels
is set as 10 times, compared to standard level,
4. The average output voltage under a non-exposure condition.
5. The image ~ea is
defined by
where Vmax and Vmin are the maximum and
(Vdmex
mV
under uniform illumination.
with!n
the segment, when the exposure level
d!vlded
into 10x 10 segments. DSNU is
–
Vdmin)
under the non-exposure con-
IR
cut-off filter (CM-500, 1
PRNU
Vsat
Vdark
DSNU
R
Al
ABL
iOD
Ro
dition where Vdmax and Vdmin are the maximum and the
minimum values of each segment’s voltage, respectively,
that is the average output voltage over all pixels in the
segment.
The average output voltage when a 10W
6
attached with a
f50 mm.
7
The sensor is adjusted to
center of image area where V is the vertical length of the
image area, SMR is defined by the ratio of the output
voltage detected during the vertical blanking period to the
maximum of the pixel voltage in the V/l O square.
The sensor is exposed at the exposure level correspond-
8
ing to the standard condition preceding non-exposure condition. Al is defined by the ratio between the output voltage measured at the 1st field during the non-exposure
period and the standard output voltage.
The sensor is adjusted to position a V/l O square at the
9
center of image area. ABL is the ratio between the exposure at the standard condition and the exposure at a
point where a blooming is observed.
mmt))
MIN.
TYP. MAX.
15
500
5.0
15.0
1.5
160 220
1000
2.5 5.0
400
90”A
reflector is imaged by a lens of F4,
5.0
1.0
poslt(on
a V/l O square at the
UNIT NOTE
‘?/0
mV
mV
mV
mV
dB
0/0
mA
2
3
1, 4
1, 5
6
7
8
9
Q
Iux I
ight source
152
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PIXEL STRUCTURE
W2336
SPECTRAL
100
80
OPTICAL BLACK
(2 PIXELS)
RESPONSE EXAMPLE
/
362
(H) X 492
\
(v)
OPTICAL BLACK
(20 PIXELS)
20
o
1
400
800
WAVE LENGTH
(rim)
Wo
1200
153
Page 6
TIMING DIAGRAM EXAMPLE
LZ2336
VERTICAL TRANSFER TIMING
(ODD FIELD)
HD
VD
6TG
0s
(EVEN FIELD)
HD
VD
4
V1
d
TG
0s
525 1
mu
n n n
I
17
u u
u u u
1
u
u u u[u
n n nnnnn
n n
n nnn
~+4a+6~+84~0 492
485487489491
JI
II IIIIIu
263
~~~1
1
1
v
1
u u
u u u uuu u
uuu
u uuu
~~~~
U!l
483485467489491
&26
&4;04;2
II
n
nnn n
u u
u
u
u u uuu u u
n n
nnnnn
n
n IInnnn
u u
u~
10
n n n
1uu uuu
u u u
n n
n n
nnn
272
n n
u
u u
u u u u u
n
nnn n
17
n
u u
u
n
n n
u
n
u u u u
u uuu
n
n n n
n
n n
279
u
n
JI
nnn n
n
n n
n
n
nnn
u u
u
u uuu
n n
n
n
n
n n
nnn n n
357911
i+++++
246
II
[
nnn
8 10 12
II
nnn
II
uuu u uu1
uuu
n n
::+++
nnn
6810
u u u
n n
1
Il.
dH1
4,2
d
HD
es
0s
m~
...............362
I
OB(20)
HORIZONTAL TRANSFER
I
I
I
I
I
TIMING
0B(2) 1...0UTPUT(362) . . . . . . . . . . . . . . . . . . . . . .
Page 7
(ODD FIELD)
U2336
READOUT
4V4
dTG
(EVEN FIELD)
HD
d
VI
d
V2
n
I
I
r--
155
Page 8
CCD
OUT O
+RS
VOD O
O
“$
—
—
—
—
LZ2336
I
I
L
I
I
I
o
o
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