Datasheet HV4530PG, HV4530PJ, HV4530X, HV4630PG, HV4630PJ Datasheet (Supertex)

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Page 1
32-Channel Serial To Parallel Converter
with P-Channel Open Drain Outputs
Ordering Information
Recommended
Device Operating
Max
V
PP
HV4530 -300 HV4530PJ HV4530PG HV4530X HV4630 -300 HV4630PJ HV4630PG HV4630X
44 J-Lead Quad 44 Quad Plastic Die
Plastic Chip Carrier Gullwing
Package Options
HV4530 HV4630
Features
Processed with HVCMOS TechnologyOutput voltages to -300VSource current minimum 60 mAShift register speed 8 MHzPolarity and blanking inputsCMOS compatible inputsForward and reverse shifting options44-lead plastic and ceramic surface mount packagesHi-Rel processing availableCan be used with the HV55 and HV56 to provide 300V
push pull operation
Absolute Maximum Ratings
Supply voltage, V Off state output voltage HV4630 +0.5V to -315V
Logic input levels +0.5V to V Ground current Continuous total power dissipation Operating temperature range -40°C to +85°C Storage temperature range -65°C to +150°C Lead temperature 1.6mm (1/16 inch) 260°C
from case for 10 seconds
Notes:
1. All voltages are referenced to V
2. Duty cycle is limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C for plastic and at 15mW/°C for ceramic.
DD
HV4622 +0.5V to -240V
2
3
.
SS
1
+0.5V to -16V
- 0.3V
DD
1.5A
1200mW
General Description
The HV45 and HV46 are low-voltage serial to high-voltage parallel converters with P-Channel open drain outputs. These devices have been designed for use as drivers for AC-electrolu­minescent displays. They can also be used in any application requiring multiple output high-voltage current source capabilities such as driving inkjet and electrostatic print heads, plasma panels, or vacuum fluorescent displays.
These devices consist of a 32-bit shift register, 32 data latches, and control logic to perform polarity and blanking functions. Data is shifted through the shift register on the logic high-to-low transition of the clock. The HV45 shifts in the counterclockwise direction when viewed from the top of the package and the HV46 shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. The data in the shift register is latched when the latch enable pin is brought to logic high and then returned to ground. If the latch enable pin is held high, the latch becomes transparent and the shift register data is directly re­flected in the outputs.
For applications requiring active pull down as well as pull up, the HV45 and HV46 can be paired with the HV55 and HV56 devices, respectively.
03/13/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
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Page 2
Electrical Characteristics1 (over recommended operating conditions unless noted)
DC Characteristics
Symbol Parameter Min Max Units Conditions
I
DD
I
DDQ
I
O(OFF)
I
IH
I
IL
V
OH
V
OL
V
OC
VDD supply current -15 mA f
Quiescent VDD supply current -100 µAVIN = VSS or V Off state output current -100 µA All SWS parallel High-level logic input current -1 µAVIH = V Low-level logic input current +1 µAVIL = V High-level output data out VDD + 1.0V V I Low-level output voltage HV
OUT
-30.0 V I
Data out -1.0 V I
HV
clamp voltage +1.5 V IOL = +60mA
OUT
HV4530//HV4630
= 8 MHz
CLK
F
= 4 MHz
DATA
DD
SS
= -100µA
Dout
= -60mA
HVout
= -100µA
Dout
DD
AC Characteristics (V
= -12V, TC = 25°C)
DD
Symbol Parameter Min Max Units Conditions
f
CLK
t
WH/tWL
t
SU
t
H
t
ON
t
DHL
t
DLH
t
DLE
t
WLE
t
SLE
Clock frequency 8 MHz Clock width high or low 62 ns Data set-up time before clock rises 50 ns Data hold time after clock rises 20 ns Turn ON time, HV
from enable 400 ns RL = 10K to VOO MAX
OUT
Delay time clock to data high to low 100 ns CL = 15pF Delay time clock to data low to high 100 ns CL = 15pF Delay time clock to LE low to high 50 ns Width of LE pulse 50 ns LE set-up time before clock falls 50 ns
Recommended Operating Conditions
Symbol Parameter Min Max Units
V
DD
HV
OUT
V
IH
V
IL
f
CLK
T
A
Note: All voltages are referenced to VSS.
Logic supply voltage -10.8 -13.2 V Output off voltage +0.3 -300 V High-level input voltage (LOGIC “1”) VDD + 2V V
DD
Low-level input voltage (LOGIC “0”) 0 -2.0 V Clock frequency 8 MHz Operating free-air temperature -40 +85 °C
V
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Page 3
Input and Output Equivalent Circuits
HV4530//HV4630
V
SS
Input
V
DD
Logic Inputs
Switching Waveforms
Clock
50% 50% 50%
t
WH
V
SS
V
SS
Data Out
HV
OUT
V
DD
Logic Data Output
High Voltage Output
V
SS
Data Valid50% 50%Data Input
VSS-12
t
SU
t
H
V
SS
50%
VSS-12
t
WL
Data Out
Latch Enable
HV
OUT
w/ S/R HIGH
t
DLE
t
DHL
t
DLH
50%
V
SS
50%
VSS-12
V
50%
SS
VSS-12
V
50%
SS
VSS-12
t
WLE
10%
t
ON
t
SLE
V
SS
V
OO
3
Page 4
Functional Block Diagram
V
SS
Polarity
Blanking
Latch Enable
HV4530//HV4630
Data Input
Latch
HV
OUT
1
Clock
Data Out
32-Bit
Shift
Register
Latch
(Outputs 3 to 30
Latch
Latch
HV
OUT
not shown)
HV
OUT
HV
OUT
2
31
32
Function Table
Inputs Outputs
Function Shift Reg HV Outputs Data Out
All on X X X L L * *…*ONON…ON * All off X X X L H * *…* OFF OFF…OFF * Invert mode X X L H L * *…***…** Load S/R H or L
Load latches
Transparent latch mode
Notes:
H = high level = -12V, L = low level = 0V, X = irrelevant, = high-to-low transition, = low-to-high transition. * = dependent on previous stage’s state before the last CLK high-to-low transition or last LE high.
Data CLK LE BL POL
12…32 1 2…32 *
LHHH or L *…***…**
XH or L HH **…***…** XH or L HL **…***…** L
HHHL*…* OFF ***
H H HHH*…*ON*…**
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Page 5
HV4530//HV4630
Pin Configurations
HV45 44 Pin J-Lead Package
Pin Function Pin Function
1HV 2HV 3HV 4HV 5HV 6HV 7HV 8HV 9HV 10 HV 11 HV 12 HV 13 HV 14 HV 15 HV 16 HV 17 N/C 39 HV 18 Data Out 40 HV 19 N/C 41 HV 20 N/C 42 HV 21 N/C 43 HV 22 Polarity 44 HV
17 23 Clock
OUT
18 24 V
OUT
19 25 V
OUT
20 26 Latch Enable
OUT
21 27 Data In
OUT
22 28 Blanking
OUT
23 29 HV
OUT
24 30 HV
OUT
25 31 HV
OUT
26 32 HV
OUT
27 33 HV
OUT
28 34 HV
OUT
29 35 HV
OUT
30 36 HV
OUT
31 37 HV
OUT
32 38 HV
OUT
SS
DD
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Package Outline
39 38 37 36 35 34
40 41 42 43 44
1 2 3 4 5 6
7 8 9 10 11 12
top view
44-pin J-Lead Package
33 32 31 30 29
28 27 26 25 24 23 22 21 20 19 18
13 14 15 16 17
HV46 44 Pin J-Lead Package
Pin Function Pin Function
1HV 2HV 3HV 4HV 5HV 6HV 7HV 8HV 9HV 10 HV 11 HV 12 HV 13 HV 14 HV 15 HV 16 HV
16 23 Clock
OUT
15 24 V
OUT
14 25 V
OUT
13 26 Latch Enable
OUT
12 27 Data In
OUT
11 28 Blanking
OUT
10 29 HVout 32
OUT
930HV
OUT
831HV
OUT
732HV
OUT
633HV
OUT
534HV
OUT
435HV
OUT
336HV
OUT
237HV
OUT
138HV
OUT
SS
DD
17 N/C 39 HV 18 Data Out 40 HV 19 N/C 41 HV 20 N/C 42 HV 21 N/C 43 HV 22 Polarity 44 HV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
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Page 6
HV45 44-Pin Plastic Gullwing (QFP) Package
HV4530//HV4630
Package OutlinePin Configurations
Pin Function
1HV 2HV 3HV 4HV 5HV 6HV 7HV 8HV 9HV 10 HV 11 HV 12 HV 13 HV 14 HV 15 HV 16 HV 17 HV 18 HV 19 HV 20 HV 21 HV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
22 N/C
Pin Function 23 Data Out 24 N/C 25 N/C 26 N/C 27 Polarity 28 Clock 29 V 30 V
SS
DD
31 Latch Enable 32 Data In 33 Blanking 34 HV 35 HV 36 HV 37 HV 38 HV 39 HV 40 HV 41 HV 42 HV 43 HV 44 HV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
1 2 3 4 5 6 7 8 9 10
11
44
1 2
3 4 5 6
7 8
9 10 11
12
41
43
13 14 151617
33 32 31 30 29 28 27
26
25 24 23
22
20
19
18
21
39 38 37 36 35 34
40
42
top view
44-pin PQFP Package
HV46 44-Pin Plastic Gullwing (QFP) Package
Pin Function
1HV 2HV 3HV 4HV 5HV 6HV 7HV 8HV 9HV 10 HV 11 HV 12 HV 13 HV 14 HV 15 HV 16 HV 17 HV 18 HV 19 HV 20 HV 21 HV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
22 N/C
Pin Function 23 Data Out 24 N/C 25 N/C 26 N/C 27 Polarity 28 Clock 29 V 30 V
SS
DD
31 Latch Enable 32 Data In 33 Blanking 34 HV 35 HV 36 HV 37 HV 38 HV 39 HV 40 HV 41 HV 42 HV 43 HV 44 HV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
32 31 30 29 28 27 26 25 24 23
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©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
03/13//02
1235 Bordeaux Drive, Sunnyvale, CA 94089
6
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
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