Supply voltage, V
Supply voltage, V
Logic input levels-0.5V to VDD +0.5V
Ground current
Continuous total power dissipation
Operating temperature range-40°C to +85°C
Storage temperature range-65°C to +150°C
Notes:
1. All voltages are referenced to GND.
2. For operation above 25°C ambient derate linearly by 20mW/°C up to 85°C.
DD
PP
2
2
1
-0.5V to +9V
-0.5V to +400V
0.75A
1200mW
General Description
The HV31 is a low voltage serial to high voltage parallel converter
with open drain outputs. It has been designed especially for use
as a driver for electrostatic printers.
This device consists of a 64-bit shift register, 64 latches, latch
enable (LE), and output enable (OE). Data is shifted through the
shift register on the high to low transition of the clock. When the
DIR pin is set high, the HV31 shifts in the counterclockwise
direction when viewed from the top of the package. When the DIR
pin is set low, the HV31 shifts in the clockwise direction. A serial
data output buffer is provided for cascading devices. This output
reflects the current status of the last bit of the shift register.
Operation of the shift register is not affected by the LE or the OE
inputs. Transfer of data from the shift register to the latch occurs
when the LE input is high. The data in the latch is stored when LE
is low.
02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Quiescent VDD Supply Current250µAAll VIN = 0V
Off State Output Current at 25°C, per Switch100nAOutput high, and at 375V
High-Level Logic Input Current10µAVIH = V
Low-Level Logic Input Current-10µAV
High-Level Data OutVDD -1VVID
Low-Level OutputHV
OUT
10VIHV
Data Out1VID
HV
V
OC
C
HVO
Clamp Voltage-3.0VIOL = -1mA
OUT
Output Capacitance per Channel3pFVDS = 100V
AC Characteristics
SymbolParameterMinTypMaxUnitsConditions
f
CLK
t
W
t
SU
t
H
t
WLE
t
DLE
t
SLE
t
DHL
t
DLH
Clock Frequency6MHz
Clock Width High or Low83ns
Data Setup Time Before Clock Falls35ns
Data Hold Time After Clock Falls15ns
Width of Latch Enable Pulse83ns
LE Delay Time After Falling Edge of Clock35ns
LE Setup Time Before Falling Edge of Clock40ns
Clock Delay Time Data High to Low135ns
Clock Delay Time Data Low to High135ns
= 6MHz, f
CLK
LE = LOW
DD
= 0V
I
= -100µA
OUT
= +1mA
OUT
= +100µA
OUT
DATA
HV3137
= 3MHz
Recommended Operating Conditions
SymbolParameterMinTypMaxUnits
V
DD
HV
OUT
V
IH
V
IL
T
A
Notes:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
Power-down sequence should be the reverse of the above.
DD
PP
.
.
Logic supply voltage4.555.5V
High voltage output8.0375V
High-level input voltage3.5V
X = Don’t care
* = Dependent on previous stage’s state before the last CLK : High to low transition.
↓ = High to low transition
H = High level
L = Low level