Page 1
HV302DB1
Introduction
The Supertex HV302DB1 demo board contains all circuitry
necessary to demonstrate the features of the HV302
hotswap controller. Intended primarily as a negative
hotswap controller, the HV302 controls the negative supply
path. Four sequenced power-good signals are provided,
with timing controlled via 3 resistors.
Included on board is a 100+F capacitor to provide a
capacitive load for testing. Additional capacitance may be
connected to the V
terminals. Or the 100+F may be
OUT
removed altogether
The board may be modified to meet custom requirements.
Instructions are provided on the next page for modifications.
Board Layout and Connections
R10
R9
V302
H
C1
R7
R6C2
V
IN
C4
R5
6
C
R8
R4
C3
Q1
Specifications
Input Voltage 10V to 90V
Inrush Limit 1A ±20%
Circuit Breaker Trip 6.7A ±20%
Retry Interval 16sec typ
On Resistance
Undervoltage Trip 38.0V on, 32.2V off
Overvoltage Trip 64.5V on, 70.0V off
Power Good Signals
PWRGD A
PWRGD B
PWRGD C
PWRGD D
+
DC/DC
Converter
enable enable
–
last enabled
+
DC/DC
Converter
–
Hotswap Controller
40m8 max
Active High
enable
~5ms after C
+
DC/DC
Converter
–
~200ms after ‘A’
~100ms after ‘B’
enable
charged
LOAD
~5ms after ‘C’
+
DC/DC
Converter
–
first enabled
VIN
Connect the supply voltage to these terminals. Supply
voltage may range from 10 volts to 90 volts.
A high source impedance may cause oscillations when the
input voltage is near the undervoltage trip point. A high
source impedance results in a large voltage drop when
loaded, causing undervoltage lockout to kick in,
disconnecting the load. With the load removed, input voltage
rises, causing undervoltage to release and reconnecting the
load. The cycle repeats, resulting in oscillations. Source
impedance must be less than the following to avoid
oscillations:
R
SOURCE
V
OUT
Connect the power supply or other load to these terminals.
V
is connected to V
OUT+
, it is V
IN+
Application of a DC load during start-up extends the time
inrush limiting is active. If this time exceeds 100ms, the
HV302 shuts off, retrying as quickly as 12s later. For this
V3
<
I
LOAD
that is switched.
OUT–
reason, DC load at start-up should be less than 900mA.
Note that DC start-up load limitation decreases with added
load capacitance.
Connecting additional load capacitance alters the inrush
current limit. See the HV302/312 data sheet for details.
PWRGD
Connect to the power supply’s ENABLE inputs. Depending
on the power supply, it may be necessary to level-translate
this signal via opto-isolator or discrete circuit. Refer to the
HV302/312 data sheet for a description of PWRGD and
related application circuits.
PWRGD is an open-drain output. During start-up and
whenever V
greater than the overvoltage trip point, PWRGD is pulled
down to V
load capacitance has fully charged, PWRGD assumes a high
impedance state.
is lower than the undervoltage trip point or
IN
. Once VIN is within the proper range and the
IN–
rev 0 21MAY021 1
Page 2
HV302DB1 Hotswap Controller
=
=
V
Schematic
IN+
14
V
DD
R
1
487k
R
9.09k
R
9
.09k
V
I
N-
6
U
V
2
5
OV
3
V
R
EE
AMP SENSE GATE
7
R
4
n
ot used
C
1
10nF
HV302
C
2
n
ot used
R
1
5m
Inrush Limit
As supplied, the inrush current limit is set at 1 amp. To set
inrush limit to another value, please refer to the HV302/312
data sheet.
The circuit breaker trip point is set at 6.7 Amps. To set at a
different level, change R
equation:
The power rating of R5should be selected based on
maximum current during normal operation, which could be
just under the circuit breaker trip point.
according to the following
5
mV100
=
I
CB
R
5
V
OUT+
R
7
4
A
3
B
2
C
1
D
11
T
B
12
T
C
13
T
D
9810
Q
1
IRF3710S
R
8
1
21k
R
10
3.01k
C
n
R
9
60.4k
5
ot used
C
6
100+F
V
OUT-
PWRGD
PWRGD
PWRGD
PWRGD
C
3
6
80pF
n
ot used
R
6
0
C
5
4
not used
Circuit Breaker Transient Immunity
The HV302 has built-in transient immunity of 2–5+s. To
increase transient immunity, an RC low-pass filter (R
6C2
)
may be placed on the SENSE input. (The demo board is
supplied with no filtering.)
Be aware that filtering the sense input will cause the inrush
current limit to overshoot at turn-on – the greater the filtering,
the greater the overshoot.
Undervoltage/Overvoltage Lockout
Resistors R1, R2, and R3set the undervoltage and
overvoltage trip points. New trip points may be programmed
by changing the values of these resistors. Refer to the
HV302/312 data sheet for more information.
IP
mV100
5
CB
Additional Components
Timing
Timing capacitor C1determines start-up delay, rise time, and
circuit breaker retry interval,. Changing C
timings. Refer to the HV302/312 datasheet for the equations
that relate these timings to the value of C
equations, the nominal gate threshold voltage (V
supplied IRFR3710 is 3V and transconductance is about 10
siemens.
Resistors R
, R9, and R10 set the delays for PWRGDs B, C,
8
and D according to the following equation:
Rt
µF67.1
XD
rev 1 24MAY02 2
will alter these
1
. For use in the
1
) of the
GS
The RC network (R7C4) across the gate-source of the
external FET provides control loop compensation which
prevents inrush current peaking.
If the PWRGD A signal is used and experiences large
voltage swings, a 10nF capacitor should be installed at C
This limits dV/dt which may otherwise cause undesirable
coupling to internal circuits.
To defeat the circuit breaker auto-retry, install a 2.4M
resistor at location R
For servo-mode inrush control, remove C
.
4
. Inrush limit will
3
then be 3.3 Amps. See the HV302/312 data sheet for
details.
.
5
Loading...