Datasheet FDS8928A Datasheet (Fairchild Semiconductor)

Page 1
FDS8928A Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description Features
These dual N- and P -Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
N-Channel 5.5 A,30 V, R R P-Channel -4 A,-20 V, R R
=0.030 @ VGS=4.5 V
DS(ON)
DS(ON)
=0.055 @ VGS=-4.5 V
DS(ON)
DS(ON)
High density cell design for extremely low R High power and current handling capability in a widely used
surface mount package. Dual (N & P-Channel) MOSFET in surface mount package.
July 1998
=0.038 @ VGS=2.5 V. =0.072 @ VGS=-2.5 V.
.
DS(ON)
SuperSOTTM-6
SOIC-16SOT-23 SuperSOTTM-8 SO-8 SOT-223
D1
D1
D2
D2
FDS
8928A
5
6
7
3 2
G2
SO-8
pin 1
G1
S1
Absolute Maximum Ratings T
S2
A
8
Symbol Parameter N-Channel P-Channel Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 30 -20 V Gate-Source Voltage 8 -8 V Drain Current - Continuous (Note 1a) 5.5 -4 A
- Pulsed 20 -20
P
D
Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9
TJ,T
Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
θJA
R
θ
JC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
141
© 1998 Fairchild Semiconductor Corporation
FDS8928A Rev. B
Page 2
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Type Min Typ Max Units OFF CHARACTERISTICS
BV
BV
I
DSS
I
GSSF
I
GSSR
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 30 V
VGS = 0 V, ID = -250 µA
Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC N-Ch 32 mV/oC
/T
J
ID = -250 µA, Referenced to 25 oC
Zero Gate Voltage Drain Current VDS = 24 V, V
VDS = -16 V, V
= 0 V N-Ch 1 µA
GS
= 0 V
GS
P-Ch -20 V
P-Ch -23
P-Ch -1 µA Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V All 100 nA Gate - Body Leakage, Reverse
VGS = -8 V, V
DS
= 0 V
All -100 nA
ON CHARACTERISTICS (Note 2)
V
V
R
I
D(on)
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage
Gate Threshold Voltage Temp. Coefficient
/T
J
Static Drain-Source On-Resistance
On-State Drain Current
V
= VGS, ID = 250 µA
DS
V
= VGS, ID = -250 µA
DS
ID = 250 µA, Referenced to 25 oC ID = -250 µA, Referenced to 25 oC V
= 4.5 V, ID = 5.5 A
GS
V
= 2.5 V, ID = 4.5 A 0.031 0.038
GS
V
= -4.5 V, ID = -4 A
GS
V
= -2.5 V, ID = -3.4 A 0.059 0.072
GS
VGS = 4.5 V, VDS= 5 V
N-Ch 0.4 0.67 1 V
P-Ch -0.4 -0.6 -1 V
N-Ch -3
mV/oC P-Ch 4 N-Ch 0.025 0.03
P-Ch 0.043 0.055
N-Ch 20 A
VGS = -4.5 V, VDS= -5 V P-Ch -20
g
FS
Forward Transconductance
VDS = 5 V, I D = 5.5 A
N-Ch 20 S
VDS = -5 V, I D = -4 A P-Ch 13 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
Input Capacitance
VDS = 10 V, VGS = 0 V, f = 1.0 MHz
Input Capacitance N-Ch 410 pF
VDS = -10 V, VGS = 0 V,
C
rss
Reverse Transfer Capacitance N-Ch 110 pF
f = 1.0 MHz
N-Ch 900 pF P-Ch 1130
P-Ch 480
P-Ch 120
FDS8928A Rev. B
Page 3
Electrical Characteristics (continued)
SWITCHING CHARACTERISTICS (Note 2) Symbol Parameter Conditions Type Min Typ Max Units
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
JA
θ
design while R
Turn - On Delay Time V
= 6 V, I D = 1 A N-Ch 6 12 ns
DS
VGS = 4.5 V , R
GEN
= 6
P-Ch 8 16
Turn - On Rise Time N-Ch 19 31 ns
P-Ch 23 37
Turn - Off Delay Time VDS= -10 V, I D = -1 A N-Ch 42 67 ns
VGS = -4.5 V , R
GEN
= 6
P-Ch 260 360
Turn - Off Fall Time N-Ch 13 24 ns
P-Ch 90 125
Total Gate Charge
VDS = 10 V, I D = 5.5 A, VGS = 4.5 V
N-Ch 19.8 28 nC P-Ch 20 28
Gate-Source Charge N-Ch 2 nC
VDS = -5 V, I D = -4 A, P-Ch 2.8
Gate-Drain Charge
VGS = -5 V
N-Ch 6.3 nC P-Ch 3.2
Maximum Continuous Drain-Source Diode Forward Current N-Ch 1.3 A
P-Ch -1.3 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A
VGS = 0 V, IS = -1.3 A
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design.
CA
θ
(Note 2) N-Ch 0.68 1.2 V
(Note 2)
P-Ch -0.7 -1.2 V
is guaranteed by
JC
θ
a. 78OC/W on a 0.5 in
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%..
pad of 2oz copper.
2
b. 125OC/W on a 0.02 in
pad of 2oz copper.
2
c. 135OC/W on a 0.003 in
pad of 2oz copper.
2
FDS8928A Rev. B
Page 4
Typical Electrical Characteristics: N-Channel
30
V = 4.5V
GS
3.0V
24
18
12
6
D
I , DRAIN-SOURCE CURRENT (A)
0
0 1 2 3 4 5
2.5V
2.0V
1.5V
V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.8
I = 5.5 A
D
1.6
V = 4.5 V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
2
1.6
V = 2.0V
GS
1.2
DS(ON)
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.8 0 6 12 18 24 30
2.5 V
3.0V
3.5 V
I , DRAIN CURRENT (A)
D
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.1
0.075
0.05
0.025
DS(ON)
R , ON-RESISTANCE (OHM)
0
1 2 3 4 5
V , GATE TO SOURCE VOLTAGE (V)
GS
T = 125°C
A
25°C
4.5V
I = 3A
D
Figure 3. On-Resistance Variation
with Temperature.
20
V =5V
DS
16
12
8
D
I , DRAIN CURRENT (A)
4
0
0 0.5 1 1.5 2 2.5 3
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
T = -55°C
A
25°C
125°C
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
20
V = 0V
GS
1
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2
T = 125°C
A
25°C
-55°C
V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Variation with Source Current and Temperature.
FDS8928A Rev. B
Page 5
Typical Electrical Characteristics: N-Channel (continued)
5
I = 5.5A
D
4
3
2
1
GS
V , GATE-SOURCE VOLTAGE (V)
0
0 5 10 15 20 25
Q , GATE CHARGE (nC)
g
V = 5V
DS
10V
15V
Figure 7. Gate Charge Characteristics.
50
10
RDS(ON) LIMIT
3 1
0.3
V = 4.5V
0.1
D
I , DRAIN CURRENT (A)
0.03
0.01
GS
SINGLE PULSE
R =135 °C/W
JA
θ
T = 25°C
A
0.1 0.2 0.5 1 2 5 10 20 30 50 V , DRAI N-SOURCE VOLTAGE (V)
DS
DC
1ms
10ms
100ms
1s
10s
100us
3000
1000
500
200
CAPACITANCE (pF)
f = 1 MHz
80
V = 0V
GS
30
0.1 0.4 1 2 5 10 30 V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
iss
C
oss
C
rss
Figure 8. Capacitance Characteristics.
30
25
20
15
POWER (W)
10
5
0
0.01 0.1 0.5 10 50 100 300 SINGLE PULSE TIME (SEC)
SINGLE PULSE
R =135 °C/W
JA
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
FDS8928A Rev. B
Page 6
Typical Electrical Characteristics: P-Channel
30
24
18
V = -4.5V
GS
-3.5V
-3.0V
- 2.5V
-2.0V
12
6
D
-I , DRAIN-SOURCE CURRENT (A) 0
0 1 2 3 4 5
- V , DRAIN-SOURCE VOLTAGE (V)
DS
-1.5V
Figure 11. On-Region Characteristics.
1.6
I = -4.0A
D
V = -4.5V
GS
1.4
1.2
1
DS(ON)
0.8
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
2
1.6
V = - 2.0V
GS
-2.5 V
1.2
DS(ON)
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.8 0 6 12 18 24 30
-3.0 V
-3.5V
-I , DRAIN CURRENT (A)
D
-4.5V
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
0.2
0.15
0.1
0.05
DS(ON)
R , ON-RESISTANCE (OHM)
0
0 1 2 3 4 5
-V , GATE TO SOURCE VOLTAGE (V)
GS
T = 125°C
A
25°C
I = -2A
D
Figure 13. On-Resistance Variation
with Temperature.
10
V = -5V
DS
8
6
4
D
- I , DRAIN CURRENT (A)
2
0
0.4 0.8 1.2 1.6 2
-V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
25°C
125°C
Figure 15. Transfer Characteristics.
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
10
V = 0V
GS
3 1
T =125°C
J
25°C
0.1
0.01
S
- I , REVERSE DRAIN CURRENT (A)
0.001 0 0.2 0.4 0.6 0.8 1 1.2
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
-55°C
Figure 16. Body Diode Forward Voltage
Variation with Source Current and Temperature.
FDS8928A Rev. B
Page 7
Typical Electrical Characteristics: P-Channel (continued)
5
I =-4.0A
D
4
3
2
1
GS
-V , GATE-SOURCE VOLTAGE (V) 0
0 4 8 12 16 20
50 20
10
5
RDS(ON) LIMIT
Q , GATE CHARGE (nC)
g
V = -5V
DS
10ms
-15V
100us
1ms
100ms
1
0.3
V = -4.5V
0.1
D
- I , DRAIN CURRENT (A)
0.03
0.01
GS
SINGLE PULSE
R = 135°C/W
JA
θ
T = 25°C
A
A
0.1 0.2 0.5 1 2 5 10 20 30 50
- V , DRAIN-SOURCE VOLTAGE (V)
DS
1s
10s
DC
-10V
3000 2000
C
1000
500
200
CAPACITANCE (pF)
100
f = 1 MHz V = 0 V
GS
50
0.1 0.2 0.5 1 2 5 10 20
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
iss
C
oss
C
rss
Figure 18. Capacitance Characteristics.Figure 17. Gate Charge Characteristics.
30
25
20
15
POWER (W)
10
5
0
0.01 0.1 0.5 10 50 100 300 SINGLE PULSE TIME (SEC)
SINGLE PULSE R =135 °C/W
JA
θ
T = 25°C
A
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum Power
Dissipation.
FDS8928A Rev. B
Page 8
Typical Thermal Characteristics: N & P-Channel (continued)
1
D = 0.5
0.5
0.2
0.1
0.05
0.02
0.01
0.005
r(t), NORMALIZED EFFECTIVE
0.002
TRANSIENT THERMAL RESISTANCE
0.001
0.2
0.1
0.05
0.02
0.01 Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1.
Transient thermalresponse will change depending on the circuit board design.
t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R =
JA
θ
P(pk)
t
1
t
T - T = P * R (t)
J
A
Duty Cycle, D = t /t
JA
θ
°C/W
135
2
JA
θ
1 2
FDS8928A Rev. B
Page 9
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging Configuration: Figure 1.0
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS
TNR DATE PT NUMBER PEEL STRENGTH MIN ______________gms
Customized Label
Packaging Option Packaging type
Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)
Note/Comments
MAX _____________ gms
ESD Label
SOIC (8lds) Packaging Information
Standard
(no flow code)
2,500 95 4,000
13" Dia
343x64x343 530x130x83 343x64x343
5,000 30,000 8,000
0.0774 0.0774 0.0774 0.0774
0.6060 - 0.9696 0.1182
TNR
L86Z F011
Rail/Tube-TNR
13" Dia
Embossed Car rier Tape
Antistatic Cover Tape
Static Dissipative
F63TNR Label
D84Z
TNR
500
7" Dia
184x18 7x47
1,000
F
NDS
9959
852
9959
SOIC-8 Unit Orientation
343mm x 342mm x 64mm Stand a r d In t e rm ed iate box
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 uni t s pe r 13" o r 33 0c m d ia met er reel . Th e reel s ar e dark blue in color and is made of polystyrene plastic (anti­static coated). Other option comes in 500 units per 7" or 177cm di ameter reel. This and some o ther options are further described in the Packaging Information table.
These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in di ff ere nt siz es depe nd in g on th e num be r of pa rts shippe d.
F
NDS
9959
F
NDS
9959
F
NDS
852
852
852
F
NDS 9959
852
Pin 1
F63TNR Label sample
LOT: CBVK741B019
FSID: FDS9953A
D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:
QTY: 2500
SPEC:
N/F: F (F63TNR)3
SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0
Carrier Tape
Cover Tape
Trailer Tape 640mm minimum or 80 empty pockets
F63TNLab el
ESD Label
Components
ESD Label
F63TNLabel
Leader Tape 1680mm minimum or 210 empty pockets
July 1999, Rev. B
Page 10
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0
T
K0
Wc
B0
P0
D0
E1
F
W
E2
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
(8lds)
SOIC
(12mm)
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
SOIC(8lds) Reel Configuration: Figure 4.0
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
6.50
5.30
12.0
1.55
1.60
1.75
+/-0.10
+/-0.10
+/-0.3
+/-0.05
+/-0.10
+/-0.10
10.25 min
rotational and lateral movement requirements (see sketches A, B, and C).
B0
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
W1 Measured at Hub
A0
Sketch B (Top View)
Component Rotation
5.50 +/-0.05
20 deg maximum
8.0 +/-0.1
Typical component cavity center line
Typical component center line
Dim A
Max
4.0 +/-0.1
0.450
2.1 +/-0.10
0.5mm maximum
Sketch C (Top View)
Component lateral movement
+/-
0.150
9.2 +/-0.3
0.5mm maximum
0.06 +/-0.02
Dim A
max
Tape Size
12mm 7" Dia
12mm 13" Dia
1998 Fairchild Semiconductor Corporation
Reel
Option
Dim N
Diameter Option
7"
See detail AA
B Min
Dim C
13" Diameter Option
See detail AA
W2 max Measured at Hub
Dim D
W3
min
DETAIL AA
Dimensions are in inches and millimeters
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
7.00
0.059
177.8
13.00 330
1.5
0.059
1.5
512 +0.020/-0.008 13 +0.5/-0.2
512 +0.020/-0.008 13 +0.5/-0.2
0.795
2.165550.488 +0.078/-0.000
20.2
0.795
7.00
20.2
178
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.724
18.4
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
July 1999, Rev. B
Page 11
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions s hown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
Page 12
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™
2
CMOS
E
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™
Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8
TinyLogic™ UHC™ VCX™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
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2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
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PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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