Compal LA-8943P Q1VZC Chrome, Chromebook C710 Schematic

A
Compal Confidential
B
C
D
E
ZZZ5
1 1
File Name :LA-8943P BOM P/N:43
ZZZ5
PCB
PCB
DAZ@
DAZ@
ZZZ1
ZZZ1
LA-8943P
LA-8943P
DA2@
DA2@
ZZZ2
ZZZ2
LS-8941P
LS-8941P
DA2@
DA2@
ZZZ3
ZZZ3
LS-8942P
LS-8942P
DA2@
DA2@
ZZZ4
ZZZ4
LS-8943P
LS-8943P
DA2@
DA2@
Compal Confidential
2 2
CHROME M/B Schematics Document
Intel Sandy Bridge ULV Processor + Panther Point PCH
3 3
2012-08-10
REV:1.0
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
1 45Friday, August 10, 2012
1 45Friday, August 10, 2012
1 45Friday, August 10, 2012
0.1
0.1
0.1
A
B
C
D
E
Compal Confidential
Model Name : Q1VZC File Name :LA-8943P
1 1
Intel
Sandy Bridge ULV
Processor
eDP(UMA)
BGA1023
17W
page 4~10
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 1066/1333
204pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
page 11,12
FDI x8
CRT Conn
page 24
2 2
HDMI Conn.
LVDS/eDP Conn.
page 22page 23
LVDS(UMA)
TMDS(UMA)
CLK=100MHz
2.7GT/s
Intel
RGB(UMA)
HD Audio
3.3V 24MHz
Panther Point-M
PCH
DMI x4
CLK=100MHz
2.5GB/s x4
USBx14
3.3V 48MHz
PCI-Express x 8 (PCIE2.0 5GT/s)
USB 2.0 conn x1(Option for USB3.0)
page 34 page 22
Port 1
LAN(GbE)/CardReader
Broadcom 57785
page 25
Port 3 Port 2
100MHz
USB 2.0 conn x2
page 30
Port 2,3
MINI Card
WLAN
CMOS Camera
Port 10
Port 8
page 36
SPI
HDA Codec
ALC271X-VB6
page 31
3 3
Int. Speaker
page 31
SPI ROM x1
page 13
Touch Pad
SM Bus
page 30
989pin BGA
page 13~21
LPC BUS
CLK=33MHz
ENE
page 29
KB932
Int.KBD
page 30
page 29
RTC CKT.
page 13
Power On/Off CKT.
page 36
DC/DC Interface CKT.
4 4
page 33
SPI ROM x1
SATA x 6 (GEN2 3.0GT/S ,GEN3 6GT/S)
100MHz
GEN3
Port 0
SATA HDD Conn.
page 24
TPM
page 30
LS-8941P
LED/B
page 30
LS-8942P
IO/B
page 28
LS-8943P
HDD/B
page 24
Power Circuit DC/DC
page 34~43
A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
2 45Friday, August 10, 20 12
2 45Friday, August 10, 20 12
2 45Friday, August 10, 20 12
E
0.1
0.1
0.1
A
Voltage Rails
Power Plane Description
VIN
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+
1 1
+CPU_CORE
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator
+1.05VS_VTT
+1.5V
+1.5VS
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU
+3VALW +3VALW always on power rail
+VCCSUS3_3 +3VALW to +VCCSUS3_3 power rail for PCH (Short Jump) ON ON
+3VS
+5VALW
+5VREF_SUS
+5VS +5VALW to +5VS switched power rail OFFON OFF
+VSB +VSBP to +VSB always on power rail for sequence control ON ON*
+RTCVCC RTC power
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
+1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU
+1.5VP to +1.5V power rail for DDRIII ON ON OFF
+1.5V to +1.5VS switched power rail
+3VALW to +3VS power rail
+5VALWP to +5VALW power rail
+5VALW to +5VREF_SUS power rail for PCH (Short resister)
EC SM Bus1 address
Device
Smart Battery
Address
0001 011X b
PCH SM Bus address
Device Address
ChannelA DIMM0 ChannelB DIMM0
3 3
A0 1010 000X B0 1010 010X
JDIMM1(STD) JDIMM2(REV)
B
S1
S3 S5
N/A N/A N/A
OFF
OFF
ON
OFF
ON
N/AN/AN/A
OFF
OFF
ON
OFF
OFF
ON
OFF
ONON
ON
ON OFF OFF
ON OFF OFF
ON OFF OFF
ON
ON
ON
ON
ON ON
ON
ON
C
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
HIGH
LOWLOWLOW
LOW LOW LOW LOW
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
AD_BID
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
BOARD ID Table
Board ID
0 1 2 3 4 5 6 7
PCB Revision
0.1
USB Port Table
USB 2.0 USB 1.1 Port
0 1 2 3 4 5 6 7 8
9 10 11 12 13
EHCI1
EHCI2
UHCI0
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
3 External USB Port
USB 2.0(Options for USB3.0) USB port(Left 2.0) USB Port(Left 2.0)
Mini Card(WLAN)
Camera
D
ON
ON
ON
HIGHHIGHHIGH
HIGH
HIGH
V typ
AD_BID
ON
ON
ON
ON
OFF
ON
OFF
V
0 V 0 V
0.503 V
0.819 V
1.185 V 1.264 V
2.200 V
3.300 V
BTO Item BOM Structure
Celeron 867 Celeron 877 Unpop @ eDP Panel LVDS Panel
Deep S3 DS3@ Normal S3 S3@
Intel i5/i7 CPU only
Celeron/Pentium/i3 CPU only
XHCI
ON ON
ON
LOW
OFF
OFF
OFF
OFF
OFF
OFF
max
AD_BID
0.538 V
0.875 V
2.341 V
3.300 V
BTO Option Table
PortUSB 3.0
1 2
USB Port(Right 3.0)
3 4
E
C867@ C877@
EDP@ LVDS@ CONN@Connector USB3@USB3 Only
I57@
CP3@
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
3 45Wednesday, August 15, 2012
3 45Wednesday, August 15, 2012
3 45Wednesday, August 15, 2012
0.1
0.1
0.1
A
1 1
2 2
12
R3
R3 1K_0402 _5%
1K_0402 _5%
EDP@
EDP@
EDP_HPD #
+1.05VS_ VTT
12
R2
R2
24.9_040 2_1%
24.9_040 2_1%
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms can't be left floating ,even if disable eDP function...
3 3
+1.05VS_ VTT
EDP_HPD #<22>
B
DMI_CRX_P TX_N0<15> DMI_CRX_P TX_N1<15> DMI_CRX_P TX_N2<15> DMI_CRX_P TX_N3<15>
DMI_CRX_P TX_P0<15> DMI_CRX_P TX_P1<15> DMI_CRX_P TX_P2<15> DMI_CRX_P TX_P3<15>
DMI_CTX_P RX_N0<15> DMI_CTX_P RX_N1<15> DMI_CTX_P RX_N2<15> DMI_CTX_P RX_N3<15>
DMI_CTX_P RX_P0<15> DMI_CTX_P RX_P1<15> DMI_CTX_P RX_P2<15> DMI_CTX_P RX_P3<15>
FDI_CTX_P RX_N0<15> FDI_CTX_P RX_N1<15> FDI_CTX_P RX_N2<15> FDI_CTX_P RX_N3<15> FDI_CTX_P RX_N4<15> FDI_CTX_P RX_N5<15> FDI_CTX_P RX_N6<15> FDI_CTX_P RX_N7<15>
FDI_CTX_P RX_P0<15> FDI_CTX_P RX_P1<15> FDI_CTX_P RX_P2<15> FDI_CTX_P RX_P3<15> FDI_CTX_P RX_P4<15> FDI_CTX_P RX_P5<15> FDI_CTX_P RX_P6<15> FDI_CTX_P RX_P7<15>
FDI_FSYNC0<15> FDI_FSYNC1<15>
FDI_INT<15>
FDI_LSYNC0<15> FDI_LSYNC1<15>
W=12mil L=500mil S=15mil
EDP_COM P
EDP_HPD #
EDP_AUX N<22> EDP_AUX P<22>
EDP_TXN 0<2 2> EDP_TXN 1<2 2>
EDP_TXP 0<22> EDP_TXP 1<22>
UCPU1A
UCPU1A
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
P10
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
P11
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
W11
FDI0_TX#[1]
W1
FDI0_TX#[2]
AA6
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
AC9
FDI1_TX#[3]
U6
FDI0_TX[0]
W10
FDI0_TX[1]
W3
FDI0_TX[2]
AA7
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
AA3
FDI1_TX[2]
AC8
FDI1_TX[3]
AA11
FDI0_FSYNC
AC12
FDI1_FSYNC
U11
FDI_INT
AA10
FDI0_LSYNC
AG8
FDI1_LSYNC
AF3
eDP_COMPIO
AD2
eDP_ICOMPO
AG11
eDP_HPD#
AG4
eDP_AUX#
AF4
eDP_AUX
AC3
eDP_TX#[0]
AC4
eDP_TX#[1]
AE11
eDP_TX#[2]
AE7
eDP_TX#[3]
AC1
eDP_TX[0]
AA4
eDP_TX[1]
AE10
eDP_TX[2]
AE6
eDP_TX[3]
IVY-BRIDGE_BGA1 023
IVY-BRIDGE_BGA1 023
C867@
C867@
C
24.9_040 2_1%
W=12mil L=500mil S=15mil
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]
G3 G1 G4
H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7
K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6
G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4
F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1]
DMI Intel(R) FDI
DMI Intel(R) FDI
eDP
eDP
PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8]
PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_COM P
24.9_040 2_1%
Celeron 867C867@
C877@
UCPU1
UCPU1
AV80627 01148001
AV80627 01148001
C877@
C877@
Celeron 877
SA00005QI10
+1.05VS_ VTT
12
R1
R1
D
HR 1.3G
HR
1.4G
UCPU1
UCPU1
AV80627 00852800
AV80627 00852800
C847@
C847@
SA00005VK20
E
PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with ­max length = 500 mils
- typical impedance = 14.5 mohms
SA00005BH40(S IC AV80627 01148901 SR0FK J1 1.3 G ABO!)
SA00005QI10(S IC AV8062701 148001 QB35 J1 1.4 G ABO!)
4 4
Security Class ification
Security Class ification
Security Class ification
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/03/ 21 2013/03/ 21
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(1/7) DMI,FDI,PEG
PROCESSOR(1/7) DMI,FDI,PEG
PROCESSOR(1/7) DMI,FDI,PEG
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
4 45Friday, August 10, 20 12
4 45Friday, August 10, 20 12
4 45Friday, August 10, 20 12
E
0.1
0.1
0.1
A
B
C
D
E
0921 LVDS@->@
LVDS@
CLK_CPU _DPLL#
CLK_CPU _DPLL
Checklist1.5 P.67 Graphis Disable Guide eDP disable:
1 1
UCPU1B
PCH->CPU UNCOREPWRGOOD: SM_DRAMPWROK:DRAM power ok RESET#:
ok
CPU
CORE
reset
OK
PROC_SELECT# PH VCPLL and connect to PCH DF_TVS
H_SNB_IVB #<17>
CPU
Follow DG 1.5& Tacoma_Fall2 1.0
H_PROCH OT#_RH_PROCH OT#
H_CPUPW RGD_R
CORE
BUF_CPU _RST#
H_CATER R#
OK
reserve XBOX
@
@
12
C65 0.1U_0 402_16V4Z
C65 0.1U_0 402_16V4Z
R6 10K_0402_5%R6 10K_040 2_5%
2 2
12
Follow DG 1.5 & Tacoma_Fall2 1.0 Use open drain logic gate:
Buffered reset to CPU
PLT_RST #<17>
Follow DG 1.5 & Tacoma_Fall2 1.0
3 3
SYS_PW ROK<15>
PM_DRAM _PWRGD<15>
PLT_RST # PM_DRAM _PWRGD_R
C67
C67
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
H_CPUPW RGD
R14
R14
0_0402_ 5%
0_0402_ 5%
1 2
@
@
RESET#:
ok
+3VALW
1
2
5
U2
U2
1
B
Y
VCC
2
A
G
MC74VHC 1G09DFT2G_SC 70-5
MC74VHC 1G09DFT2G_SC 70-5
3
+3VS
1
2
5
U1
U1
1
P
NC
Y
2
A
G
SN74LVC 1G07DCKR_SC7 0-5
SN74LVC 1G07DCKR_SC7 0-5
3
CPU
4
PM_SYS_PW RGD_BUF
C66
C66
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
4
BUFO_CP U_RST#
reset
+1.5V_CP U_VDDQ
12
follow Checklist 1.5
+1.05VS_ VTT
H_PROCH OT#<29,35>
+1.05VS_VTT PU pop 75ohm series resister pop 43ohm
+1.05VS_ VTT
12
R12
R12 75_0402 _5%
75_0402 _5%
R15
R15
43_0402 _1%
43_0402 _1%
1 2
Use open drain logic gate: +1.5V_CPU_VDDQ PU pop 200ohm series resister pop 130ohm
R16
R16 200_040 2_5%
200_040 2_5%
1 2
R18 130_040 2_5%R18 130_ 0402_5%
BUF_CPU _RST#
PM_DRAM _PWRGD_R
R7 6 2_0402_5%R7 6 2_0402_5%
12
H_THRMT RIP#<18>
H_PM_SYNC<15>
H_CPUPW RGD<18>
UNCOREPWRGOOD:
SM_DRAMPWROK:DRAM power ok
T1 PAD@T1 PAD@
H_PECI<18,29>
R8
R8
56_0402 _5%
56_0402 _5%
1 2
1 2
R13 0_040 2_5%R13 0_040 2_5%
C476
C476
@
@
12
H_CPUPW RGD_R
180P_04 02_50V8J
180P_04 02_50V8J
12/22 Add(ESD request)
UCPU1B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWROK
D44
RESET#
IVY-BRIDGE_BGA1 023
IVY-BRIDGE_BGA1 023
C867@
C867@
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PRDY# PREQ#
TCK TMS
TRST#
TDO
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
TDI
DPLL_REF_SSCLK PD 1K_5% to GND DPLL_REF_SSCLK# PU 1K_5% to +1.05VS_VTT
J3 H2
AG3 AG1
AT30
BF44 BE43 BG43
CLK_CPU _DMI < 14> CLK_CPU _DMI# <14>
CLK_CPU _DPLL CLK_CPU _DPLL#
SM_RCOMP0,SM_RCOMP1 W=20mil L=500mil S=13mil
SM_RCOMP2 W=15mil L=500mil S=13mil
SM_DRAM RST#H_PECI
SM_RCOM P0 SM_RCOM P1 SM_RCOM P2
R9 140_0402_1%R9 140_0402_1% R10 25.5_ 0402_1%R10 25.5_ 0402_1% R11 200_ 0402_1%R11 2 00_0402_1%
DDR3 Compensation Signals
N53 N55
L56
XDP_TCK
L55
XDP_TMS
J58
XDP_TRS T#
M60
XDP_TDI
L59
XDP_TDO
K58
XDP_DBR ESET#
G58 E55 E59 G55 G59 H60 J59 J61
XDP_DBR ESET#
Tacoma_Fall2 1.0 PU 1K +3VS Check list 1.5 PU 1K +3VS Debug port DG1.1-1.3 50~5K ohm
LVDS@
R4 1K_0402_5%
R4 1K_0402_5%
LVDS@
LVDS@
R5 1K_0402_5%
R5 1K_0402_5%
CLK_CPU _DPLL <14> CLK_CPU _DPLL# <14>
SM_DRAM RST# <6>
12 12 12
T2PAD@ T2PAD@ T3PAD@ T3PAD@ T4PAD@ T4PAD@
T5PAD@ T5PAD@ T6PAD@ T6PAD@
XDP_DBR ESET# <15,28>
R17 1 K_0402_5%R17 1 K_0402_5%
+1.05VS_ VTT
12
12
+3VS
12
4 4
Security Class ification
Security Class ification
Security Class ification
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/03/ 21 2013/03/ 21
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(3/7) DDRIII
PROCESSOR(3/7) DDRIII
PROCESSOR(3/7) DDRIII
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
5 45Friday, August 10, 20 12
5 45Friday, August 10, 20 12
5 45Friday, August 10, 20 12
E
0.1
0.1
0.1
A
UCPU1C
DDR_A_D[0..63]<11>
1 1
2 2
3 3
DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>
DDR_A_CAS#<11> DDR_A_RAS#<11> DDR_A_WE#<11>
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AG6
AP11
AJ10
AR11
AP6 AU6 AV9 AR6
AP8 AT13 AU13
BC7
BB7 BA13 BB11
BA7
BA9
BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43
AW48
BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56
BD37 BF36 BA28
BE39 BD39 AT41
UCPU1C
SA_DQ[0]
AJ6
SA_DQ[1] SA_DQ[2]
AL6
SA_DQ[3] SA_DQ[4]
AJ8
SA_DQ[5]
AL8
SA_DQ[6]
AL7
SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
B
AU36
SA_CK[0]
AV36
SA_CK#[0]
AY26
SA_CKE[0]
AT40
SA_CK[1]
AU40
SA_CK#[1]
BB26
SA_CKE[1]
BB40
SA_CS#[0]
BC41
SA_CS#[1]
AY40
SA_ODT[0]
BA41
SA_ODT[1]
AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55
AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54
BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
SA_CLK_DDR0 <11> SA_CLK_DDR#0 <11> DDRA_CKE0_DIMMA <11>
SA_CLK_DDR1 <11> SA_CLK_DDR#1 <11> DDRA_CKE1_DIMMA <11>
DDRA_CS0_DIMMA# <11> DDRA_CS1_DIMMA# <11>
SA_ODT0 <11> SA_ODT1 <11>
DDR_A_DQS#[0..7] <11>
DDR_A_DQS[0..7] <11>
DDR_A_MA[0..15] <11>
C
UCPU1D
BD13 BF12
BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54
BA58 AW59 AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58 AG58 AG59 AM60
AL59 AF61 AH60
BG39 BD42 AT22
AV43 BF40 BD45
AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9
BF8
UCPU1D
AL4
SB_DQ[0]
AL1
SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
DDR_B_D[0..63]<12>
DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>
DDR_B_CAS#<12> DDR_B_RAS#<12> DDR_B_WE#<12>
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
D
BA34
SB_CK[0]
AY34
SB_CK#[0]
AR22
SB_CKE[0]
BA36
SB_CK[1]
BB36
SB_CK#[1]
BF27
SB_CKE[1]
BE41
SB_CS#[0]
BE47
SB_CS#[1]
AT43
SB_ODT[0]
BG47
SB_ODT[1]
AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59
AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61
BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
E
SB_CLK_DDR0 <12> SB_CLK_DDR#0 <12> DDRB_CKE0_DIMMB <12>
SB_CLK_DDR1 <12> SB_CLK_DDR#1 <12> DDRB_CKE1_DIMMB <12>
DDRB_CS0_DIMMB# <12> DDRB_CS1_DIMMB# <12>
SB_ODT0 <12> SB_ODT1 <12>
DDR_B_DQS#[0..7] <12>
DDR_B_DQS[0..7] <12>
DDR_B_MA[0..15] <12>
IVY-BRIDGE_BGA1023
IVY-BRIDGE_BGA1023
IVY-BRIDGE_BGA1023
C867@
C867@
R20
R20
1K_0402_5%
1K_0402_5%
+1.5V
12
1 2
R21 1K_0402_5%R21 1K_0402 _5%
S0 DRAMRST_CNTRL_PCH hgih ,MOS ON SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH Dimm not reset S3 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# lo,DDR3 DRAMRST# HIGH Dimm not reset S4,5 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# lo,DDR3 DRAMRST# low Dimm reset
B
DIMM_DRAMRST# <11,12>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Follow CRB1.0
R19
R19
0_0402_5%
0_0402_5%
1 2
@
1 2
@
D
S
D
S
13
Q1
Q1 BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
G
G
2
RST_GATE_R
1
C68
C68
0.047U_0402_16V7K
0.047U_0402_16V7K
2
DIMM_DRAMRST#_RSM_DRAMRST#
RST_GATE_R <11,12>
CPUDIMMreset
SM_DRAMRST#<5>
R22
R22
4.99K_0402_1%
4.99K_0402_1%
4 4
RST_GATE<14>
EC_RST_GATE<29>
0_0402_5%
0_0402_5%
1 2
0_0402_5%
0_0402_5%
1 2
A
R23
R23
DS3@
DS3@
R24
R24
DS3@
DS3@
IVY-BRIDGE_BGA1023
C867@
C867@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(3/7) DDRIII
PROCESSOR(3/7) DDRIII
PROCESSOR(3/7) DDRIII
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
6 45Friday, August 10, 2012
6 45Friday, August 10, 2012
6 45Friday, August 10, 2012
0.1
0.1
0.1
A
B
C
D
E
CFG Straps for Processor
CFG6 CFG5
1K_0402 _1%
1K_0402 _1%
CFG2
*
*
R31
R31
12
R25
R25 1K_0402 _1%
1K_0402 _1%
@
@
1: Normal Operation; Lane # definition matches socket pin map definition
0:Lane Reversed
CFG4
12
R28
EDP@ R28
EDP@
1K_0402 _1%
1K_0402 _1%
UMA,Optimus eDP DISO eDP
1:Disable
0:Enable
12
12
R32
R32
1K_0402 _1%
@
@
1K_0402 _1%
@
@
11: (Default) 1x16 PCI Express
10: 2x8 PCI Express
*
01: Reserved
00: 1x8,2x4 PCI Express
CFG7
12
R33
R33 1K_0402 _1%@
1K_0402 _1%@
UCPU1E
UCPU1E
T7 P AD@T7 PAD@
1 1
T37 PAD @T37 PAD @ T38 PAD @T38 PAD @
T39 PAD @T39 PAD @ T40 PAD @T40 PAD @
2 2
CFG0
CFG2
CFG4 CFG5 CFG6 CFG7
VCC_VAL _SENSE VSS_VAL _SENSE
VAXG_VA L_SENSE VSSAXG_ VAL_SENSE
T8 P AD@T8 PAD@
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
RESERVED
RESERVED
DC_TEST_A4 DC_TEST_C4 DC_TEST_D3
DC_TEST_D1 DC_TEST_A58 DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
BCLK_ITP
BCLK_ITP#
RSVD30 RSVD31 RSVD32 RSVD33
RSVD34 RSVD35 RSVD36 RSVD37 RSVD38
RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44
RSVD45
N59 N58
N42 L42 L45 L47
M13 M14 U14 W14 P13
AT49 K24
AH2 AG13 AM14 AM15
N50
A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1
DC_TEST _C4_D3
DC_TEST _A59_C59
DC_TEST _A61_C61
DC_TEST _BE59_BE61
DC_TEST _BG59_BG61
DC_TEST _BE3_BG3
DC_TEST _BE1_BG1
These pins are for solder joint reliability and non-critical to function. For BGA only.
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
eDP enable
CFG4
PCIE Port Bifurcation Straps
CFG[6:5]
IVY-BRIDGE_BGA1 023
IVY-BRIDGE_BGA1 023
C867@
3 3
C867@
PEG DEFER TRAINING
CFG7
1: (Default) PEG Train immediately following xxRESETB de assertion
Tacoma_Fall2 1.0 P.12
0: PEG Wait for BIOS for training
4 4
Security Class ification
Security Class ification
Security Class ification
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/03/ 21 2013/03/ 21
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(4/7) RSVD,CFG
PROCESSOR(4/7) RSVD,CFG
PROCESSOR(4/7) RSVD,CFG
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
7 45Friday, August 10, 20 12
7 45Friday, August 10, 20 12
7 45Friday, August 10, 20 12
E
0.1
0.1
0.1
A
1 1
INTEL Recommend VCC 4*470UF,12*22uF(0805) and 35*2.2uF(0402) PD0.8 CAP at P.51
2 2
3 3
B
UCPU1F
ULV type
UCPU1F
DC 33A
+CPU_CORE
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
C
POWER
POWER
CORE SUPPLY
CORE SUPPLY
D
E
8.5A
+1.05VS_VTT
AF46
VCCIO[1]
AG48
VCCIO[3]
AG50
VCCIO[4]
AG51
VCCIO[5]
AJ17
VCCIO[6]
AJ21
VCCIO[7]
AJ25
VCCIO[8]
AJ43
VCCIO[9]
AJ47
VCCIO[10]
AK50
VCCIO[11]
AK51
VCCIO[12]
AL14
VCCIO[13]
AL15
VCCIO[14]
AL16
VCCIO[15]
AL20
VCCIO[16]
AL22
VCCIO[17]
AL26
VCCIO[18]
AL45
VCCIO[19]
AL48
VCCIO[20]
AM16
VCCIO[21]
AM17
VCCIO[22]
AM21
VCCIO[23]
AM43
VCCIO[24]
AM47
VCCIO[25]
AN20
VCCIO[26]
AN42
VCCIO[27]
AN45
VCCIO[28]
AN48
VCCIO[29]
AA14
VCCIO[30]
AA15
VCCIO[31]
AB17
VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]
VCCIO50 VCCIO51
VCCIO_SEL
VCCPQE[1] VCCPQE[2]
AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15
W16 W17
BC22
AM25 AN22
PEG IO AND DDR IO
PEG IO AND DDR IO
RAILS
RAILS
For DDR
INTEL Recommend VCCIO 2*330UF,10*10uF(0603) and 26*1uF(0402) PD0.8 CAP at P.51
For PEG
+3VS
12
R34
R34
10K_0402_5%
10K_0402_5%
@
VCCIO_SEL
R35
R35
10K_0402_5%
10K_0402_5%
@
VCCIO_SEL after Ivy bridge ES2 Voltage support
12
@
@
12
R36
R36 130_0402_5%
130_0402_5%
BC22
*
+1.05VS_VTT
VCCIO_SEL
+1.05VS_VTT
C69
C69 1U_0402_6.3V6K
1U_0402_6.3V6K
1 2
1/NC : (Default) +1.05VS_VTT
0: +1.0VS_VTT
+1.05VS_VTT+ 1.05VS_VTT
12
R37
R37 75_0402_5%
75_0402_5%
Place the PU resistors close to CPU
A44
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
SENSE LINES SVID QUIET
IVY-BRIDGE_BGA1023
4 4
A
B
IVY-BRIDGE_BGA1023
C867@
C867@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
H_CPU_SVIDALRT#
B43
H_CPU_SVIDCLK
C44
H_CPU_SVIDDAT
F43
VCCSENSE_R
G43
VSSSENSE_R
R44 10_04 02_5%R44 10_04 02_5%
AN16 AN17
VSSIO_SENSE
Compal Secret Data
Compal Secret Data
Compal Secret Data
Place the PU resistors close to VR
1 2
R42 0_0402_5%R42 0_0402_5% R43 0_0402_5%R43 0_0402_5%
1 2
1 2
VCCIO_SENSE <40>
12
R46
R46 10_0402_5%
10_0402_5%
Check list 1.5
Deciphered Date
Deciphered Date
Deciphered Date
D
+1.05VS_VTT
1 2
R38 43_0402_ 1%R38 43_0402_ 1% R39 0_0402_5 %R39 0_0402_5%
1 2 1 2
R40 0_0402_5 %R40 0_0402_5%
+CPU_CORE
12
R41
R41 100_0402_1%
100_0402_1%
VCCSENSE <41>
12
VSSSENSE <41>
R45
R45 100_0402_1%
100_0402_1%
Should change to connect form power cirucit & layout differential with VCCIO_SENSE.
SVID_ALERT# <41> SVID_CLK <41> SVID_DATA <41>
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(5/7) PWR,BYPASS
PROCESSOR(5/7) PWR,BYPASS
PROCESSOR(5/7) PWR,BYPASS
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
8 45Friday, August 10, 2012
8 45Friday, August 10, 2012
8 45Friday, August 10, 2012
0.1
0.1
0.1
A
+VGFX_CORE
1 1
INTEL Recommend VAXG 2*470uF,6*22uF(0805) and 6*10uF(0603) 11*1U(0402) PD0.8
2 2
CR CheckList Rev1.5
+VGFX_CORE
INTEL Recommend VCCPLL 1*330uF,2*1uF(0402)
VCC_GFXSENSE<41> VSS_GFXSENSE<41>
PD0.8
3 3
SGA00001700 S POLY C 220U 220U 2.5V M B2 ESR35 TPE H1.9
SGA20331E10 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9
INTEL Recommend VCCSA
4 4
+1.8VS
+VCCSA
1*330uF,5*10uF(0603) ,5*1uF(0402)
Place BOT OUT Conn
1
+
+
C91
C91
@
@
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
2
1
+
+
C94
C94 330U_D2_2V_Y
330U_D2_2V_Y
2
Place TOP IN BGA
+VCCSA
C95
C95
C96
C96
C97
1U_0402_6.3V6K
1U_0402_6.3V6K
12
C97
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
Place BOT OUT BGA
C101
C101
C102
C100
C100
10U_0603_6.3V6M
10U_0603_6.3V6M
12
C102
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
12
R51
R51
100_0402_5%
100_0402_5%
12
R52
R52
100_0402_5%
100_0402_5%
C92
1U_0402_6.3V6K
C92
1U_0402_6.3V6K
1
2
C98
C98
1U_0402_6.3V6K
1U_0402_6.3V6K
12
C103
C103
10U_0603_6.3V6M
10U_0603_6.3V6M
12
B
DC 16A
C93
1U_0402_6.3V6K
C93
1U_0402_6.3V6K
1
2
C99
C99
1U_0402_6.3V6K
1U_0402_6.3V6K
12
C104
C104
10U_0603_6.3V6M
10U_0603_6.3V6M
12
1.2A
6A
UCPU1G
UCPU1G
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IVY-BRIDGE_BGA1023
IVY-BRIDGE_BGA1023
C867@
C867@
POWER
POWER
VREF
VREF
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GRAPHICS
GRAPHICS
SENSE
LINES
SENSE
LINES
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
VCCSA VID
VCCSA VID
SM_VREF
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]
VCCDQ[1] VCCDQ[2]
QUIET RAILS
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
SENSE LINES
VCCSA_VID[0] VCCSA_VID[1]
lines
lines
VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8] VDDQ[9]
C
AY43
+V_SM_VREF
BE7
SA_DIMM_VREFDQ
BG7
SB_DIMM_VREFDQ
5A
AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33
+1.5V_CPU_VDDQ
AM28 AN26
BC43 BA43
U10
CPU EDS1.3 P.93 VCCSA_VID0 Must PD
D48 D49
H_VCCSA_VID0 H_VCCSA_VID1
1K_0402_1%
1K_0402_1%
C71
C71
12
12
C90
C90 1U_0402_6.3V6K
1U_0402_6.3V6K
D
+1.5V_CPU_VDDQ
+V_SM_VREF should have 20 mil trace width
C70
SA_DIMM_VREFDQ <11>
R50
R50
SB_DIMM_VREFDQ <12>
INTEL Recommend VDDQ
12
12
R49
R49
1K_0402_1%
1K_0402_1%
@
@
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C70
12
R47
R47 1K_0402_5%
1K_0402_5%
12
1
R48
R48 1K_0402_5%
1K_0402_5%
2
SA_DIMM_VREFDQ SB_DIMM_VREFDQ Check list1.5 P18 M1 default M3 no stuff
E
1*330uF,8*10uF(0603) ,10*1uF(0402) PD0.8
Place TOP IN BGA
C73
C73
C74
C72
C72
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
C74
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
C76
C76
C77
C75
C75
1U_0402_6.3V6K
1U_0402_6.3V6K
12
C77
C78
1U_0402_6.3V6K
1U_0402_6.3V6K
12
C78
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
+1.5V_CPU_VDDQ
C79
C79
C80
C80
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
1
+
+
C81
C81 330U_D2_2V_Y
330U_D2_2V_Y
2
Place BOT OUT BGA
C89
12
VID0
0
0
1 1
C89
C88
C88
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
SGA20331E10 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9
VCCSA
VID1
0
1
0 X1
Vout
0.9V
0.85V
0.775V
0.75V
HR CR
V V
V
V
V
VX
12
@
@
C82
C82
10U_0603_6.3V6M
10U_0603_6.3V6M
12
R53
R53 0_0402_5%
0_0402_5%
C83
C83
10U_0603_6.3V6M
10U_0603_6.3V6M
12
C85
C85
C84
C84
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
VCCSA_SENSE < 39>
H_VCCSA_VID0 <39> H_VCCSA_VID1 <39>
C86
C86
C87
C87
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
J1
J1
1 2
JUMP_43X118
JUMP_43X118
@
@
+1.5VS
PD0.8
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(6/7) PWR
PROCESSOR(6/7) PWR
PROCESSOR(6/7) PWR
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
9 45Friday, August 10, 2012
9 45Friday, August 10, 2012
9 45Friday, August 10, 2012
0.1
0.1
0.1
A
UCPU1H
UCPU1H
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
1 1
2 2
3 3
4 4
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
IVY-BRIDGE_BGA1023
IVY-BRIDGE_BGA1023
C867@
C867@
VSS
VSS
A
VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]
AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13
B
UCPU1I
UCPU1I
BG17
VSS[181]
BG21
VSS[182]
BG24
VSS[183]
BG28
VSS[184]
BG37
VSS[185]
BG41
VSS[186]
BG45
VSS[187]
BG49
VSS[188]
BG53
VSS[189]
BG9
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
VSS[204]
D50
VSS[205]
D54
VSS[206]
D58
VSS[207]
D6
VSS[208]
E25
VSS[209]
E29
VSS[210]
E3
VSS[211]
E35
VSS[212]
E40
VSS[213]
F13
VSS[214]
F15
VSS[215]
F19
VSS[216]
F29
VSS[217]
F35
VSS[218]
F40
VSS[219]
F55
VSS[220]
G51
VSS[221]
G6
VSS[222]
G61
VSS[223]
H10
VSS[224]
H14
VSS[225]
H17
VSS[226]
H21
VSS[227]
H4
VSS[228]
H53
VSS[229]
H58
VSS[230]
J1
VSS[231]
J49
VSS[232]
J55
VSS[233]
K11
VSS[234]
K21
VSS[235]
K51
VSS[236]
K8
VSS[237]
L16
VSS[238]
L20
VSS[239]
L22
VSS[240]
L26
VSS[241]
L30
VSS[242]
L34
VSS[243]
L38
VSS[244]
L43
VSS[245]
L48
VSS[246]
L61
VSS[247]
M11
VSS[248]
M15
VSS[249]
IVY-BRIDGE_BGA1023
IVY-BRIDGE_BGA1023
C867@
C867@
Security Classification
Security Classification
Security Classification
B
VSS
VSS
NCTF
NCTF
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
M4
VSS[250]
M58
VSS[251]
M6
VSS[252]
N1
VSS[253]
N17
VSS[254]
N21
VSS[255]
N25
VSS[256]
N28
VSS[257]
N33
VSS[258]
N36
VSS[259]
N40
VSS[260]
N43
VSS[261]
N47
VSS[262]
N48
VSS[263]
N51
VSS[264]
N52
VSS[265]
N56
VSS[266]
N61
VSS[267]
P14
VSS[268]
P16
VSS[269]
P18
VSS[270]
P21
VSS[271]
P58
VSS[272]
P59
VSS[273]
P9
VSS[274]
R17
VSS[275]
R20
VSS[276]
R4
VSS[277]
R46
VSS[278]
T1
VSS[279]
T47
VSS[280]
T50
VSS[281]
T51
VSS[282]
T52
VSS[283]
T53
VSS[284]
T55
VSS[285]
T56
VSS[286]
U13
VSS[287]
U8
VSS[288]
V20
VSS[289]
V61
VSS[290]
W13
VSS[291]
W15
VSS[292]
W18
VSS[293]
W21
VSS[294]
W46
VSS[295]
W8
VSS[296]
Y4
VSS[297]
Y47
VSS[298]
Y58
VSS[299]
Y59
VSS[300]
G48
VSS[301]
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61
Compal Secret Data
Compal Secret Data
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(7/7) VSS
PROCESSOR(7/7) VSS
PROCESSOR(7/7) VSS
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
0.1
0.1
0.1
10 45Friday, August 10, 2012
10 45Friday, August 10, 2012
10 45Friday, August 10, 2012
E
A
R55
M3 support(unpop)
SA_DIMM_VREFDQ<9>
BSS138_NL_SOT23-3
1 1
+1.5V
1
2
2 2
+1.5V
1
2
+1.5V
1
2
3 3
+0.75VS
1
2
Layout Note: Place near JDIMM1.203,204
4 4
BSS138_NL_SOT23-3
RST_GATE_R<12 ,6>
Layout Note: Place near JDIMM1
C107
1U_0402_6.3V6K
C107
1U_0402_6.3V6K
C108
1U_0402_6.3V6K
C108
1U_0402_6.3V6K
1
2
C111
10U_0603_6.3V6M
C111
10U_0603_6.3V6M
C115
10U_0603_6.3V6M
C115
10U_0603_6.3V6M
C121
1U_0402_6.3V6K
C121
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
1
1
2
2
C116
10U_0603_6.3V6M
C116
10U_0603_6.3V6M
10U_0603_6.3V6M@C117
10U_0603_6.3V6M
1
1
@
2
2
C122
1U_0402_6.3V6K
C122
1U_0402_6.3V6K
1
2
1
2
C113
C113
C117
1
2
R55
0_0402_5%
0_0402_5%
1 2
@
@
S
S
@
@
G
G
2
DDR_A_DQS#[0..7] <6>
DDR_A_DQS[0..7] <6>
DDR_A_D[0..63] <6>
DDR_A_MA[0..15] <6>
C110
1U_0402_6.3V6K
C110
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
1
2
C114
10U_0603_6.3V6M
C114
10U_0603_6.3V6M
1
2
1
+
+
C118
C118 330U_D2_2V_Y
330U_D2_2V_Y
2
SGA20331E10 330U 2V H1.9 9mohm POLY
C124
1U_0402_6.3V6K
C124
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
1
2
D
D
13
Q2
Q2
+1.5V
12
R54
R54 1K_0402_1%
1K_0402_1%
C105
2.2U_0603_6.3V6K
C105
12
R56
R56 1K_0402_1%
1K_0402_1%
All VREF traces should have 10 mil trace width
+3VS
+0.75VS
2.2U_0603_6.3V6K
1
2
DDRA_CKE0_DIMMA<6>
DDR_A_BS2<6>
SA_CLK_DDR0<6> SA_CLK_DDR#0<6>
DDR_A_BS0<6>
DDR_A_WE#<6> DDR_A_CAS#<6>
DDRA_CS1_DIMMA#<6>
C125
0.1U_0402_16V4Z
C125
0.1U_0402_16V4Z
1
2
C106
0.1U_0402_16V4Z
C106
0.1U_0402_16V4Z
1
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
2
+V_DDR_REFA
DDR_A_D0 DDR_A_D1
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_D26 DDR_A_D27
DDRA_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
SA_CLK_DDR0 SA_CLK_DDR#0
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS#
DDR_A_MA13
DDRA_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
C126
C126
1 2
B
+1.5V +1.5V+V_DDR_REFA
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
10K_0402_5%
10K_0402_5%
R60
R60
R59
R59
10K_0402_5%
10K_0402_5%
1 2
VTT1
205
G1
TYCO_2-2013022-1
TYCO_2-2013022-1
CONN@
CONN@
SP07000JN10
<Address: SA1:SA0=00>
1/3 Modify
DQ4 DQ5
VSS3
DQS#0
DQS0 VSS6
DQ6
DQ7 VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
A15 A14
VDD4
A11
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA
SCL
VTT2
2 4
DDR_A_D4
6
DDR_A_D5
8 10
DDR_A_DQS#0
12
DDR_A_DQS0
14 16
DDR_A_D6
18
DDR_A_D7
20 22
DDR_A_D12
24
DDR_A_D13
26 28 30
DIMM_DRAMRST#
32 34
DDR_A_D14
36
DDR_A_D15
38 40
DDR_A_D20
42
DDR_A_D21
44 46 48 50
DDR_A_D22
52
DDR_A_D23
54 56
DDR_A_D28
58
DDR_A_D29
60 62
DDR_A_DQS#3
64
DDR_A_DQS3
66 68
DDR_A_D30
70
DDR_A_D31
72
74
DDRA_CKE1_DIMMA
76 78
DDR_A_MA15
80
DDR_A_MA14
82 84
DDR_A_MA11
86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
DDR_A_MA7
DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
SA_CLK_DDR1 SA_CLK_DDR#1
DDR_A_BS1 DDR_A_RAS#
DDRA_CS0_DIMMA# SA_ODT0
SA_ODT1
+VREF_CA
DDR_A_D36 DDR_A_D37
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
D_CK_SDATA
D_CK_SCLK
+0.75VS
A7
A6 A4
A2 A0
G2
Channel A
C
DIMM_DRAMRST# <12,6>
DDRA_CKE1_DIMMA <6>
SA_CLK_DDR1 <6> SA_CLK_DDR#1 <6>
DDR_A_BS1 <6> DDR_A_RAS# <6>
DDRA_CS0_DIMMA# <6> SA_ODT0 <6>
SA_ODT1 <6>
D_CK_SDATA <12,14> D_CK_SCLK <12,14>
D
+1.5V
12
R57
R57 1K_0402_1%
1K_0402_1%
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K C119
C119
C120
0.1U_0402_16V4Z
C120
0.1U_0402_16V4Z
12
R58
1
2
R58
1
1K_0402_1%
1K_0402_1%
2
E
DIMM_1 Standard H:4.0mm
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
11 4 5Friday, August 10, 2012
11 4 5Friday, August 10, 2012
11 4 5Friday, August 10, 2012
0.1
0.1
0.1
A
+1.5V
12
R67
R67 1K_0402_1%
R62
M3 support(unpop)
SB_DIMM_VREFDQ<9>
BSS138_NL_SOT23-3
1 1
+1.5V
1
2
2 2
+1.5V
1
2
+1.5V
1
2
3 3
+0.75VS
1
2
Layout Note: Place near JDIMM2.203,204
4 4
BSS138_NL_SOT23-3
RST_GATE_R<11 ,6>
Layout Note: Place near JDIMM2
C141
1U_0402_6.3V6K
C141
1U_0402_6.3V6K
C128
1U_0402_6.3V6K
C128
1U_0402_6.3V6K
1
2
10U_0603_6.3V6M
C147
10U_0603_6.3V6M
C147
10U_0603_6.3V6M
C149
10U_0603_6.3V6M
C149
10U_0603_6.3V6M
C138
1U_0402_6.3V6K
C138
1U_0402_6.3V6K
10U_0603_6.3V6M
C131
10U_0603_6.3V6M
C131
10U_0603_6.3V6M
1
1
2
2
C142
10U_0603_6.3V6M
C142
10U_0603_6.3V6M
10U_0603_6.3V6M@C130
10U_0603_6.3V6M
1
1
@
2
2
C140
1U_0402_6.3V6K
C140
1U_0402_6.3V6K
1
2
1
2
C133
C133
C130
1
2
R62
0_0402_5%
0_0402_5%
1 2
@
@
S
S
@
@
G
G
2
DDR_B_DQS#[0..7] <6>
DDR_B_DQS[0..7] < 6>
DDR_B_D[0..63] <6 >
DDR_B_MA[0..15] <6>
C143
1U_0402_6.3V6K
C143
1U_0402_6.3V6K
C145
1U_0402_6.3V6K
C145
1U_0402_6.3V6K
1
2
C137
10U_0603_6.3V6M
C137
10U_0603_6.3V6M
1
2
1
+
+
C139
C139 330U_D2_2V_Y
330U_D2_2V_Y
@
@
2
SGA20331E10 330U 2V H1.9 9mohm POLY
C146
1U_0402_6.3V6K
C146
1U_0402_6.3V6K
C132
1U_0402_6.3V6K
C132
1U_0402_6.3V6K
1
2
A
D
D
13
Q3
Q3
1K_0402_1%
C127
2.2U_0603_6.3V6K
C127
12
R63
R63 1K_0402_1%
1K_0402_1%
All VREF traces should have 10 mil trace width
+3VS
+0.75VS
2.2U_0603_6.3V6K
1
1
2
2
DDRB_CKE0_DIMMB<6>
DDR_B_BS2<6>
SB_CLK_DDR0<6> SB_CLK_DDR#0<6>
DDR_B_BS0<6>
DDR_B_WE#< 6> DDR_B_CAS#<6>
DDRB_CS1_DIMMB#<6>
C135
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
1
2
2
C148
0.1U_0402_16V4Z
C148
0.1U_0402_16V4Z
C134
C134
1 2
DDRB_CKE0_DIMMB
DDRB_CS1_DIMMB#
R61
R61
1 2
10K_0402_5%
10K_0402_5%
R64
R64
+V_DDR_REFB
DDR_B_D0 DDR_B_D1
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDR_B_BS2
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
SB_CLK_DDR0 SB_CLK_DDR#0
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
DDR_B_MA13
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D58 DDR_B_D59
10K_0402_5%
10K_0402_5%
B
+1.5V +1.5V+V_DDR_REFB
JDIMM2
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
TYCO_2-2013287-1
TYCO_2-2013287-1
CONN@
CONN@
SP07000KW00
<Address: SA1:SA0=10>
12/21 Modify
VSS DQ4 DQ5
VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS
DQ12 DQ13
VSS DM1
RESET#
VSS
DQ14 DQ15
VSS
DQ20 DQ21
VSS DM2
VSS
DQ22 DQ23
VSS
DQ28 DQ29
VSS
DQS3#
DQS3
VSS
DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
ODT0
VDD
ODT1
VDD
VREF_CA
VSS
DQ36 DQ37
VSS DM4
VSS
DQ38 DQ39
VSS
DQ44 DQ45
VSS
DQS5#
DQS5
VSS
DQ46 DQ47
VSS
DQ52 DQ53
VSS DM6
VSS
DQ54 DQ55
VSS
DQ60 DQ61
VSS
DQS7#
DQS7
VSS
DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
BOSS2
2 4
DDR_B_D4
6
DDR_B_D5
8 10
DDR_B_DQS#0
12
DDR_B_DQS0
14 16
DDR_B_D6
18
DDR_B_D7
20 22
DDR_B_D12
24
DDR_B_D13
26 28 30
DIMM_DRAMRST#
32 34
DDR_B_D14
36
DDR_B_D15
38 40
DDR_B_D20
42
DDR_B_D21
44 46 48 50
DDR_B_D22
52
DDR_B_D23
54 56
DDR_B_D28
58
DDR_B_D29
60 62
DDR_B_DQS#3
64
DDR_B_DQS3
66 68
DDR_B_D30
70
DDR_B_D31
72
74
DDRB_CKE1_DIMMB
76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
DDR_B_MA15 DDR_B_MA14
DDR_B_MA11 DDR_B_MA7
DDR_B_MA6 DDR_B_MA4
DDR_B_MA2 DDR_B_MA0
SB_CLK_DDR1 SB_CLK_DDR#1
DDR_B_BS1 DDR_B_RAS#
DDRB_CS0_DIMMB# SB_ODT0
SB_ODT1
+VREF_CB
DDR_B_D36 DDR_B_D37
DDR_B_D38 DDR_B_D39
DDR_B_D44 DDR_B_D45
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D46 DDR_B_D47
DDR_B_D52 DDR_B_D53
DDR_B_D54 DDR_B_D55
DDR_B_D60 DDR_B_D61
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D62 DDR_B_D63
D_CK_SDATA D_CK_SCLK
A15 A14
A11
A7
A6 A4
A2 A0
S0#
NC
DIMM_2 Reverse H:4.0mm
B
DIMM_DRAMRST# <11,6>
DDRB_CKE1_DIMMB <6>
SB_CLK_DDR1 <6> SB_CLK_DDR#1 <6>
DDR_B_BS1 <6> DDR_B_RAS# <6>
DDRB_CS0_DIMMB# <6> SB_ODT0 <6>
SB_ODT1 <6>
D_CK_SDATA <11,14>
+0.75VS
D_CK_SCLK <11,14>
Channel B
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Issued Date
Issued Date
Issued Date
C
D
+1.5V
12
R65
R65 1K_0402_1%
1K_0402_1%
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K C129
0.1U_0402_16V4Z
C129
0.1U_0402_16V4Z
C136
C136
1
2
12
R66
1
2
R66 1K_0402_1%
1K_0402_1%
Compal Secret Data
Compal Secret Data
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
0.1
0.1
12 4 5Friday, August 10, 2012
12 4 5Friday, August 10, 2012
E
12 4 5Friday, August 10, 2012
0.1
A
<13,18,28,29,30>
RTCRST close RAM door J1
12
1
R74
+RTCVCC
R75 20K_0402_5%R75 20K_0402_5%
R76 20K_0402_5%R76 20K_0402_5%
1 1
+RTCVCC
R78 1M_0402_5%R78 1M_0402_5%
R79 330K_0402_5%R79 330K_040 2_5%
*
C163
C163
1U_0603_10V6K
1U_0603_10V6K
1 2
1 2
C164
C164
1U_0603_10V6K
1U_0603_10V6K
1 2
1 2
INTVRMEN
H
Integrated VRM enable
L
Integrated VRM disable
R74 0_0603_5%@
0_0603_5%@
2
PCH_RTCRST#
PCH_SRTCRST#
12
1
R77
R77 0_0603_5%@
0_0603_5%@
2
SM_INTRUDER#
PCH_INTVRMEN
(INTVRMEN should always be pull high.)
+3VS
1 2
R82 1K_0402_5%@R82 1K_0402_5%@
HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature
LOW= Disable (Default internal PD)
*
2 2
+VCCSUS3_3
HDA_SDO
HDA_SDO<29>
SPI_WP1#_R
ME debug mode,this signal has a weak internal PD
Low = Disabled (Default)
*
High = Enabled [Flash Descriptor Security Overide]
+VCCSUS3_3
R87 1K_0402_5%R87 1K_0402_5%
This signal has a weak internal pull-down
On Die PLL VR Select is supplied by
1.5V when sampled high
*
1.8V when sampled low Needs to be pulled High for Huron River platfrom
HDA_BITCLK_AUDIO<3 1>
3 3
HDA_SYNC_AUDIO<31>
HDA_RST_AUDIO#<31>
HDA_SDOUT_AUDIO<3 1>
SPI_HOLD1#_R < 28>
PCH_SPI_MOSI_1_R<28>
PCH_SPI_MISO_1_R<28>
PCH_SPI_CS0#_1_R<28>
PCH_SPI_CLK_1_R<28>
SPI_WP1#_R
4 4
1 2
R107 10 M_0402_5%R107 10M_0402_5%
1 2
32.768KHZ_12.5PF_1TJF125DP1A000D
32.768KHZ_12.5PF_1TJF125DP1A000D
18P_0402_50V8J
18P_0402_50V8J
1
C167
C167
2
R84
R84
1K_0402_5%
1K_0402_5%
@
@
4.7K_0402_5%
4.7K_0402_5%
12
R88
R88 33_0402_5%
33_0402_5%
1 2
R89
R89 33_0402_5%
33_0402_5%
1 2
R92
R92 33_0402_5%
33_0402_5%
1 2
R95
R95 33_0402_5%
33_0402_5%
1 2
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
0_0402_5% DEG @
1K_0402_5% CRM@
1K_0402_5% CRM@
Y1
Y1
12
R83
0_0402_5%
0_0402_5%
R149
HDA_SYNC_PCH
R559
R559
1 2
R558
R558
1 2
R557
R557
1 2
R556
R556
1 2
R555
R555
1 2
R554
R554
1 2
PCH_RTCX1
PCH_RTCX2
1
C168
C168 18P_0402_50V8J
18P_0402_50V8J
2
A
PCH_SPKR
HDA_SDOUT_PCH
12
MIM@R83
MIM@
12
CRM@R149
CRM@
HDA_BITCLK_PCH
HDA_SYNC_PCH_R
HDA_RST_PCH#
HDA_SDOUT_PCH
SPI_HOLD1#
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
PCH_SPI_CS0#_1
PCH_SPI_CLK_1
SPI_WP1#
11/30 Add (EMI request)
HDA_BITCLK_AUDIO
1
C467
C467
22P_0402_50V8J
22P_0402_50V8J
2
@
@
Prevent back drive issue.
+5VS
G
G
2
Q4
Q4 BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
13
HDA_SYNC_PCH
D
S
D
S
R90
R90
1 2
0_0402_5%@
12
+BIOS_SPI
12/7 Change symbol of U18 from SA00000XT00 to SA000041O00
0_0402_5%@
R93
R93 1M_0402_5%
1M_0402_5%
PCH_SPI_CLK_2
PCH_SPI_CLK_1
PCH_SPI_CS0#_1
PCH_SPI_CS1#_2 PCH_SPI_CS1#
PCH_SPI_MOSI_2 PCH_SPI_MOSI_1
PCH_SPI_MISO_1
R105 33_0402_5%R105 3 3_0402_5%
PCH_SPI_MISO_2
R106 33_0402_5%R106 3 3_0402_5%
1 2
R109 3.3K_0402_5%MIM@R109 3.3K_0402_5%MIM@
1 2
R108 3.3K_0402_5%R108 3.3K_0402_ 5%
SPI ROM FOR ME (4MB) Footprint 200mil
+3VS +3VS
R111
R111
1 2
3.3K_0402_5%
3.3K_0402_5%
SPI ROM FOR ME (1MB) Footprint 200mil
B
U16
U16
BD82HM70
BD82HM70
HM70@
HM70@
SA00005MQ20
PCH_SPKR<31>
HDA_SDIN0<31>
R96
R96
12
33_0402_5%
33_0402_5%
R98
R98
12
33_0402_5%
33_0402_5%
R100
R100
12
33_0402_5%
33_0402_5%
R101
R101
12
33_0402_5%
33_0402_5%
R103
R103
12
33_0402_5%
33_0402_5%
12
33_0402_5%
33_0402_5%
R104
R104
12
12
PCH_SPI_CS1#_2 PCH_SPI_MISO_2
B
3/7 Add
R91
R91
51_0402_5%
51_0402_5%
T9PAD @T9PAD @
T10PAD @T10PAD @
T11PAD @T11PAD @
PCH_SPI_CS0#_1 SPI_WP1# SPI_HOLD1#
U18
1
CS#
2
SO
3
WP#
4
GND
MX25L8006EM2I-12G_SO8
MX25L8006EM2I-12G_SO8
SA000041O00
SA000041O00
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_BITCLK_PCH
HDA_SYNC_PCH
PCH_SPKR
HDA_RST_PCH#
HDA_SDIN0
HDA_SDOUT_PCH
12
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_MOSI
PCH_SPI_MISO
U17
1
CS#
3
WP#
7
HOLD#
4
GND
MX25L3206EM2I-12G_SO8
MX25L3206EM2I-12G_SO8
SA000041P00
SA000041P00
1M@U18
1M@
VCC
HOLD#
SCLK
SI
+3VS
8 7
SPI_HOLD2#
6
PCH_SPI_CLK_2SPI_WP2#
5
PCH_SPI_MOSI_2
U16
U16
5/23 Add
BD82NM70
BD82NM70
NM70@
NM70@
SA00005WU20
U16A
U16A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
COUGARPOINT_FCBGA989HM77@
COUGARPOINT_FCBGA989HM77@
+BIOS_SPI +3VS
4M@U17
4M@
8
VCC
6
SCLK
5
SI
2
SO
R560
R560
1 2
RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2
PCH_SPI_CLK_1 PCH_SPI_MOSI_1 PCH_SPI_MISO_1
R112
R112
1 2
3.3K_0402_5%
3.3K_0402_5%
C
D
+RTCBATT
20mil
1
D1
D1 BAS40-04_SOT23-3
+RTCVCC
20mil
1
C165
C165
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C38
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
0_0402_5%MIM@
0_0402_5%MIM@
D23
CRM@D23
CRM@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SERIRQ
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA1RXN
SATA 6G
SATA 6G
SATA1RXP SATA1TXN SATA1TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
Reserve for EMI
PCH_SPI_CLK
PCH_SPI_CLK_1
PCH_SPI_CLK_2
Issued Date
Issued Date
Issued Date
C
LPC_AD0
A38
LPC_AD1
B37
LPC_AD2
C37
LPC_AD3
D36
LPC_FRAME#
E36 K36
PCH_GPIO23
V5
SERIRQ
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
12/1 Del
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11
L=500mil S=15mil
Y10
SATA_COMP
AB12
L=500mil S=15mil
AB13
SATA3_COMP
AH1
RBIAS_SATA3
P3
PCH_SATALED#
V14
PCH_GPIO21
P1
PCH_GPIO19
1 2
R11033_0402_5% @ R11033_0402_5% @
22P_0402_50V8J
1 2
1 2
22P_0402_50V8J
R46633_0402_5% @ R46633_0402_5% @
R46733_0402_5% @ R46733_0402_5% @
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
LPC_AD0 <29,3 0> LPC_AD1 <29,3 0> LPC_AD2 <29,3 0> LPC_AD3 <29,3 0>
LPC_FRAME# <29,30>
SERIRQ <29 ,30>
SATA_PRX_DTX_N0 <24>
SATA_PRX_DTX_P0 <24> SATA_PTX_DRX_N0 <24> SATA_PTX_DRX_P0 <24>
HM70 not support SATA for port1/port3
1 2
R94 37.4 _0402_1%R94 37.4_0402_1%
1 2
R97 49.9 _0402_1%R97 49.9_0402_1%
1 2
R99 750_ 0402_1%R99 750_040 2_1%
C166
C166 10P_0402_50V8J
10P_0402_50V8J
1 2
@
@
1 2
@
@
22P_0402_50V8J
22P_0402_50V8J
1 2
@
@
11/30 Add
C465
C465
C466
C466
Compal Secret Data
Compal Secret Data
Compal Secret Data
+1.05VS_VTT
+1.05VS_VTT
No use PU 10K +3VS
GPIO19 has internal Pull up
Deciphered Date
Deciphered Date
Deciphered Date
BAS40-04_SOT23-3
2
3
HDD1
U17
U17
MX25L6406EM2I-12G_SO8
MX25L6406EM2I-12G_SO8
8M@
8M@
SA00004G600
D
+CHGRTC
20mil
3/26 Add
E
SERIRQ
PCH_SATALED#
10K_0402_5%
10K_0402_5%
PCH_GPIO23
1K_0402_5%
1K_0402_5%
R80 10K_0402_5%R80 10K_0402_5%
R81 10K_0402_5%R81 10K_0402_5%
+3VS
12
10K_0402_5%
12
10K_0402_5%
PCH_GPIO21
10K_0402_5% @
10K_0402_5% @
R102
R102
4.7K_0402_5%
4.7K_0402_5%
R230
R230
R234
R234
@
@
PCH_GPIO19
R86
R86
+3VS
12
12
+3VS
12
R85
R85
1 2
12
+3VS
Debug Port DG 1.2 PU 4.7K +3VS
Boot BIOS Strap
Boot BIOS
GPIO51
LPC
Reserved
-
SPI
*
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/9) SATA,HDA,SPI, LPC, XDP
PCH (1/9) SATA,HDA,SPI, LPC, XDP
PCH (1/9) SATA,HDA,SPI, LPC, XDP
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
GPIO19 0 0 0 1 1 1
E
1 0
13 45Friday, August 10, 2012
13 45Friday, August 10, 2012
13 45Friday, August 10, 2012
0.1
0.1
0.1
A
PCIE_PRX_DTX_N2<27>
WLAN
1 1
PCIE LAN
+3VS
R121 10K_0402_5%R121 10K_0402_5%
R123 10K_0402_5%R123 10K_0402_5%
+VCCSUS3_3
R124 10K_0402_5%R124 10K_0402_5%
R126 10K_0402_5%@R126 10K_0402_5%@
R127 10K_0402_5%R127 10K_0402_5%
R128 10K_0402_5%R128 10K_0402_5%
R129 10K_0402_5%R129 10K_0402_5%
R130 10K_0402_5%R130 10K_0402_5%
R142 10K_0402_5%R142 10K_0402_5%
2 2
WLAN
No use PU 10K +3VS
PCIE_PRX_DTX_P2<27> PCIE_PTX_C_DRX_N2<27> PCIE_PTX_C_DRX_P2<27>
PCIE_PRX_DTX_N3<25>
PCIE_PRX_DTX_P3<25> PCIE_PTX_C_DRX_N3<25> PCIE_PTX_C_DRX_P3<25>
12
12
12
12
12
12
12
12
12
CLK_PCIE_MINI1#<27> CLK_PCIE_MINI1<27>
MINI1_CLKREQ#<27>
MINI1_CLKREQ#
PCH_GPIO20
PCH_GPIO73
LAN_CLKREQ#
PCH_GPIO26
PCH_GPIO44
PCH_GPIO45
PCH_GPIO46
PCH_GPIO56
1 2
C170 0.1U_0402_16V7KC170 0.1U_0402_16V7K
1 2
C171 0.1U_0402_16V7KC171 0.1U_0402_16V7K
1 2
C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K
1 2
C174 0.1U_0402_16V7KC174 0.1U_0402_16V7K
HM70 not support PCIE port 5-8
No use PU 10K +3VALW
No use PU 10K +3VS
PCIE LAN
No use PU 10K +3VALW
CLK_PCIE_LAN#<25> CLK_PCIE_LAN<25>
LAN_CLKREQ#<25>
No use PU 10K +3VALW
3 3
No use PU 10K +3VALW
No use PU 10K +3VALW
No use PU 10K +3VALW
B
PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2
PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3
PCH_GPIO73
MINI1_CLKREQ#
PCH_GPIO20
LAN_CLKREQ#
PCH_GPIO26
PCH_GPIO44
PCH_GPIO56
PCH_GPIO45
PCH_GPIO46
U16B
U16B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GP IO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GP IO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GP IO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GP IO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GP IO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GP IO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GP IO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GP IO46
AK14
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AK13
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
SMBUSController
SMBUSController
SML1ALERT# / PC HHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
CLKOUT_DP_N / C LKOUT_BCLK1_N
CLKOUT_DP_P / C LKOUT_BCLK1_P
C
SMBALERT# / GP IO11
SMBCLK
SMBDATA
SML0ALERT# / GP IO60
SML0CLK
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO7 5
CL_CLK1
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKIN_SATA_N / CKS SCD_N
CLKIN_SATA_P / CKS SCD_P
FLEX CLOCKS
FLEX CLOCKS
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_DMI2_N CLKIN_DMI2_P
CLKIN_DOT_96N CLKIN_DOT_96P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / G PIO64
CLKOUTFLEX1 / G PIO65
CLKOUTFLEX2 / G PIO66
CLKOUTFLEX3 / G PIO67
E12
SMB_ALERT#
H14
PCH_SMBCLK
C9
PCH_SMBDATA
A12
RST_GATE
C8
G12
C13
PCH_GPIO74
E14
PCH_SML1CLK
M16
PCH_SML1DATA
M7
T11
P10
M10
PCH_GPIO47
AB37 AB38
AV22
CLK_CPU_DMI#
AU22
CLK_CPU_DMI
AM12
CLK_CPU_DPLL#
AM13
CLK_CPU_DPLL
BF18
CLK_BUF_CPU_DMI#
BE18
CLK_BUF_CPU_DMI
BJ30
CLKIN_GND1#
BG30
CLKIN_GND1
G24
CLK_BUF_DREF_96M#
E24
CLK_BUF_DREF_96M
AK7
CLK_BUF_PCIE_SATA#
AK5
CLK_BUF_PCIE_SATA
K45
CLK_BUF_ICH_14M
H45
CLK_PCI_LPBACK
V47
XTAL25_IN
V49
XTAL25_OUT
W=12mil S=15mil
Y47
XCLK_RCOMP
K43
CLK_FLEX0
F47
CLK_FLEX1
H47
CLK_FLEX2
K49
CLK_FLEX3
SMB_ALERT# <29>
PCH_SMBCLK <27,30>
PCH_SMBDATA <27,30>
RST_GATE <6>
DDR,WLAN,SMBUS
No use PU 10K +3VALWS3 reduse
No use PU 10K +3VALW
S3 reduse
No use PU 10K +3VALW
No use PU 10K +3VALW
CLK_CPU_DMI# <5> CLK_CPU_DMI <5>
CLK_CPU_DPLL# <5> CLK_CPU_DPLL <5>
1 2
R131 10K_0402_5 %R131 10K_0402_5%
1 2
R132 10K_0402_5 %R132 10K_0402_5%
1 2
R133 10K_0402_5 %R133 10K_0402_5%
1 2
R134 10K_0402_5 %R134 10K_0402_5%
1 2
R135 10K_0402_5 %R135 10K_0402_5%
1 2
R136 10K_0402_5 %R136 10K_0402_5%
1 2
R137 10K_0402_5 %R137 10K_0402_5%
1 2
R138 10K_0402_5 %R138 10K_0402_5%
1 2
R139 10K_0402_5 %R139 10K_0402_5%
12
R140
@R140
@
33_0402_5%
33_0402_5%
Reserve for EMI please close to PCH
R141
R141
90.9_0402_1%
90.9_0402_1%
1 2
@
@
PAD
PAD
T12
T12
@
@
PAD
PAD
T13
T13
@
@
PAD
PAD
T14
T14
@
@
PAD
PAD
T33
T33
D
PU 2.2K +3VALW
EC-PCH SMBUS
PU 2.2K +3VALW
120MHz for eDP.
1 2
C175 22P_0402_50V8J@C175 22P_0402_50V8J@
+1.05VS_VTT
SMB_ALERT#
PCH_SMBCLK
PCH_SMBDATA
RST_GATE
PCH_GPIO74
PCH_SML1CLK
PCH_SML1DATA
PCH_GPIO47
6 1
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
PCH_SMBCLK
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
PCH_SML1DATA
PCH_SML1CLK
Pull down 10K ohm for using internal Clock
XTAL25_IN
XTAL25_OUT
12P_0402_50V8J
12P_0402_50V8J
6 1
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
CLK_PCI_LPBACK <17>
1
C176
C176
2
1 2
R113 10K_0402_5%R113 10K_0402_5%
1 2
R114 2.2K_0402_5%R 114 2.2K_0402_5%
1 2
R115 2.2K_0402_5%R 115 2.2K_0402_5%
1 2
R116 1K_0402_5%R116 1K_0402_5%
1 2
R117 10K_0402_5%R117 10K_0402_5%
1 2
R118 2.2K_0402_5%R 118 2.2K_0402_5%
1 2
R119 2.2K_0402_5%R 119 2.2K_0402_5%
1 2
R120 10K_0402_5%R120 10K_0402_5%
+3VS
2
Q5A
Q5A
3 4
Q5B
Q5B
+3VS
2
Q6A
Q6A
3 4
1 2
R144 1M_0402_5%R1 44 1M_0402_5%
25MHZ_10PF_7V25000014
25MHZ_10PF_7V25000014
3
3
GND
Q6B
Q6B
5
4
Y2
Y2
For DDR , TP
R122
R122
4.7K_0402_5%
4.7K_0402_5%
1 2
D_CK_SDATAPCH_SMBDATA
R125
R125
4.7K_0402_5%
4.7K_0402_5%
1 2
D_CK_SCLK
Pull up at EC side.
EC_SMB_DA2
5
EC_SMB_CK2
1
GND
2
1
E
+3VS
+3VS
1
C177
C177 12P_0402_50V8J
12P_0402_50V8J
2
+VCCSUS3_3
D_CK_SDATA <11,12>
D_CK_SCLK <11,12>
EC_SMB_DA2 <29>
EC_SMB_CK2 <29>
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PCH (2/9) PCIE, SMBUS, CLK
PCH (2/9) PCIE, SMBUS, CLK
PCH (2/9) PCIE, SMBUS, CLK
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
14 4 5Friday, August 10, 2012
14 4 5Friday, August 10, 2012
14 4 5Friday, August 10, 2012
0.1
0.1
0.1
A
+3VALW_PCH
R151 10K_0402_5 %R151 10K_0402_5 %
+VCCSUS3_3
1 1
R153 10K_0402_5 %R153 10K_0402_5 %
R154 10K_0402_5 %R154 10K_0402_5 %
R155 10K_0402_5 %R155 10K_0402_5 %
R157 200_0402_5 %R15 7 200_0402_5 %
R159 10K_0402_5 %R159 10K_0402_5 %
12
12
12
12
12
Follow Tacoma 1.0
12
not support Deep S4,S5 can be left unconnected. Check list1.5 P.81
2 2
PCH_ACIN
SUSWARN#_R
PCH_GPIO72
RI#
PM_DRAM_PW RGD
PCH_RSMRST#
SUS_PWR_DN_AC K
SUSACK#<29>
XDP_DBRESET#<28,5>
not support AMT APWROK can mux with PWROK (check list1.5 P.47)
PM_DRAM_PW RGD<5>
PCH_RSMRST#<29>
SUS_PWR_DN_AC K<29>
SUSWARN#<29>
1/11 Add "ACPRESENT" signal. (follow Q5LJ1)
R177
R177
ACPRESENT<29>
1 2
0_0402_5%
0_0402_5%
PCH_ACIN
PBTN_OUT#<29>
ACIN<29,33,36,37>
No use PU 10K +3VALW
3 3
Ring Indicator CRB1.0 PU 10K +3VALW
B
DMI_CTX_PRX_N0<4> DMI_CTX_PRX_N1<4> DMI_CTX_PRX_N2<4> DMI_CTX_PRX_N3<4>
DMI_CTX_PRX_P0<4 > DMI_CTX_PRX_P1<4 > DMI_CTX_PRX_P2<4 > DMI_CTX_PRX_P3<4 >
DMI_CRX_PTX_N0<4> DMI_CRX_PTX_N1<4> DMI_CRX_PTX_N2<4> DMI_CRX_PTX_N3<4>
DMI_CRX_PTX_P0<4 > DMI_CRX_PTX_P1<4 > DMI_CRX_PTX_P2<4 > DMI_CRX_PTX_P3<4 >
+1.05VS_VTT
L=500mil S=15mil
1 2
R160 49.9_0402_1 %R160 49.9_0402_1%
1 2
R161 750_0402_1%R161 7 50_0402_1%
4mil width and place within 500mil of the PCH
R178 0_040 2_5%S3@R178 0_0402_5%S3@
SUSACK#
R163 0_0 402_5%
R163 0_0 402_5%
R164 0_0 402_5%R164 0_0 402_5%
PCH_PWROK
R166 0_0402_5%R166 0_0402_5%
1 2
R179 0_040 2_5%S3@R179 0_0402_5%S3@
1 2
DS3@
DS3@
R196 0_040 2_5%
R196 0_040 2_5%
1 2
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_IRCOMP
DMI2RBIAS
1 2
1 2
DS3@
DS3@
1 2
1 2
D2
RB751V-40_SOD3 23-2
RB751V-40_SOD3 23-2
PM_DRAM_PW RGD
PCH_RSMRST#
@D2
@
XDP_DBRESET#_R
SYS_PWROK
PCH_PWROK_R
PBTN_OUT#
PCH_ACIN
SUSACK#_R
SUSACK#_R
SUSWARN#_R
PCH_GPIO72
RI#
C
U16C
U16C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN# / SUS_PWR_DN_ACK / GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
DMI
FDI
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
AW16
AV12
BC10
AV14
BB10
A18
DSWODVREN
R483
E22
R482 0_0402_5%DS3@R482 0_0402_ 5%DS3 @
B9
PCH_PCIE_WAKE #
N3
CLKRUN#
G8
SUS_STAT#
N14
SUSCLK
D10
PM_SLP_S5#
H4
PM_SLP_S4#
F4
PM_SLP_S3#
G10
SLP_A#
G16
SLP_SUS#
AP14
K14
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
0_0402_5%
0_0402_5%
1 2
S3@R483
S3@
1 2
H_PM_SYNC
PCH_GPIO29
D
PCH_RSMRST#
T34 PAD@T34 PAD@
T35 PAD@T35 PAD@
T36 PAD@T36 PAD@
FDI_CTX_PRX_N0 <4> FDI_CTX_PRX_N1 <4> FDI_CTX_PRX_N2 <4> FDI_CTX_PRX_N3 <4> FDI_CTX_PRX_N4 <4> FDI_CTX_PRX_N5 <4> FDI_CTX_PRX_N6 <4> FDI_CTX_PRX_N7 <4>
FDI_CTX_PRX_P0 < 4> FDI_CTX_PRX_P1 < 4> FDI_CTX_PRX_P2 < 4> FDI_CTX_PRX_P3 < 4> FDI_CTX_PRX_P4 < 4> FDI_CTX_PRX_P5 < 4> FDI_CTX_PRX_P6 < 4> FDI_CTX_PRX_P7 < 4>
FDI_INT <4>
FDI_FSYNC0 <4>
FDI_FSYNC1 <4>
FDI_LSYNC0 <4>
FDI_LSYNC1 <4>
PCH_DPWROK < 29>
CLKRUN# <30>
@
@
T15 PAD
T15 PAD
SUSCLK <2 9>
PM_SLP_S5# <29>
PM_SLP_S4# <29>
PM_SLP_S3# <29>
T16 PAD@T16 PAD@
SLP_SUS# <29 >
H_PM_SYNC <5>
No use PU 10K +3VALW
DSWODVREN
DSWODVREN - On Die DSW VR Enable
H
Enable internal DSW +1.05VS
*
L
Disable
Must always PU at +RTCVCC
PCH_PCIE_WAKE #
PCH_GPIO29
CLKRUN#
not support Deep S4,S5 DPWROK mux with RSMRST# check list1.5 P.50
PCH_PCIE_WAKE # <25,27>
No use PU 10K +3VS
Can be left NC when IAMT is not support on the platfrom
not support Deep S4,S5 can NC PCH EDS1.5 P.75
E
1 2
1 2
1 2
12
12
12
R165
R165 100K_0402_ 5%
100K_0402_ 5%
@
@
R150 330K_0402_5%R150 330K_0402_5%
R152 330K_0402_5%@R152 330K_0402_5%@
R156 10K_0402_5%R156 10K_0402_5%
R158 10K_0402_5%@R158 10K_0402_5%@
R162 8.2K_0402_5%R162 8.2K_0402_5%
PCH_DPWROK
+RTCVCC
+VCCSUS3_3
+3VS
tell PCH all power ok but cpu core
PCH_PWROK<2 9>
R167
R167 10K_0402_5 %
10K_0402_5 %
VGATE<41>
12
4 4
A
+3VS
5
U19
U19
2
P
B
1
A
G
MC74VHC1G08DFT2 G_SC70-5
MC74VHC1G08DFT2 G_SC70-5
3
Y
4
ALL power OK
SYS_PWROK
B
12
R168
R168 10K_0402_5 %
10K_0402_5 %
SYS_PWROK <5>
1
C178
C178
@
@
0.047U_0402 _16V7K
0.047U_0402 _16V7K
2
Security Classification
Security Classification
Security Classification
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.
2012/03/21 2013/03/21
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (3/9) DMI,FDI,PM
PCH (3/9) DMI,FDI,PM
PCH (3/9) DMI,FDI,PM
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
15 45Friday, August 1 0, 2012
15 45Friday, August 1 0, 2012
15 45Friday, August 1 0, 2012
E
0.1
0.1
0.1
A
UMA Panel Backlight ON/OFF
ENBKL<29>
R169 0_0402_5%R169 0_0402_5%
12
IGPU_BKLT_ENENBKL
PD 100K at EC side
+3VS
1 1
1 2
R170 2.2K_0402_5%LVDS@R170 2.2K_0402_5%LVDS@
1 2
R172 2.2K_0402_5%LVDS@R172 2.2K_0402_5%LVDS@
Change to eDP only
CTRL_CLK
CTRL_DATA
UMA LVDS DDC
1 2
R174 2.2K_0402_5%LVDS@R17 4 2.2K_0402_5%LVD S@
1 2
R175 2.2K_0402_5%LVDS@R17 5 2.2K_0402_5%LVD S@
PCH_LCD_CLK
PCH_LCD_DATA
Check list1.5 P.60 disable Graphics ALL Can NC but DAC_IREF still need PD
LVDS disable: DATA/Clock/Control an NC VCC_TX_LVDS,VCCA_LVDS PD to GND
2 2
+3VS
1 2
R484 2.2K_0402_5%R484 2.2K_0402_5%
1 2
R485 2.2K_0402_5%R485 2.2K_0402_5%
1 2
R486 150_0402_1%R486 150_0402_1%
1 2
R487 150_0402_1%R487 150_0402_1%
1 2
R488 150_0402_1%R488 150_0402_1%
3 3
PCH_CRT_CLK PCH_CRT_DATA
PCH_CRT_B PCH_CRT_G PCH_CRT_R
B
DIS only can NC
UM77 not support LVDS/CRT
PCH_ENVDD<22>
DPST_PWM<22>
PCH_LCD_CLK<22> PCH_LCD_DATA<22>
L=500mil S=30mil
2.37K_0402_1%
2.37K_0402_1%
R171
R171
W=10mil S=30mil
R173
R173 0_0402_5%
0_0402_5%
PCH_TXCLK-<22> PCH_TXCLK+<22>
PCH_TXOUT0-<22> PCH_TXOUT1-<22> PCH_TXOUT2-<22>
PCH_TXOUT0+<22> PCH_TXOUT1+<22> PCH_TXOUT2+<22>
PCH_CRT_B<24> PCH_CRT_G<24> PCH_CRT_R< 24>
PCH_CRT_CLK<24> PCH_CRT_DATA<24>
PCH_CRT_HSYNC<24> PCH_CRT_VSYNC< 24>
IGPU_BKLT_EN
12
12
PCH_TXCLK­PCH_TXCLK+
PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-
PCH_TXOUT0+ PCH_TXOUT1+ PCH_TXOUT2+
PCH_CRT_B PCH_CRT_G PCH_CRT_R
PCH_CRT_CLK PCH_CRT_DATA
PCH_CRT_HSYNC PCH_CRT_VSYNC
R176
R176
1K_0402_0.5%
1K_0402_0.5%
C
CTRL_CLK CTRL_DATA
LVDS_IBG
LVD_VREF
CRT_IREF
CRT_IRTN
12
12
R531
R531 FCM1005KF-301T01 0402
FCM1005KF-301T01 0402
U16D
U16D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
COUGARPOIN T_FCBGA989
COUGARPOIN T_FCBGA989
D
HM77@
HM77@
AP43 AP45
AM42 AM40
AP39 AP40
SDVO_CTRLDATA strap pull high at level shift page
P38
SDVO_SCLK
M39
SDVO_SDATA
AT49 AT47 AT40
PCH_DPB_HPD
AV42
PCH_DPB_N0
AV40
PCH_DPB_P0
AV45
PCH_DPB_N1
AV46
PCH_DPB_P1
AU48
PCH_DPB_N2
AU47
PCH_DPB_P2
AV47
PCH_DPB_N3
AV49
PCH_DPB_P3
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
SDVO_SCLK < 23> SDVO_SDATA <23>
PCH_DPB_HPD <23>
PCH_DPB_N0 < 23> PCH_DPB_P0 <23> PCH_DPB_N1 < 23> PCH_DPB_P1 <23> PCH_DPB_N2 < 23> PCH_DPB_P2 <23> PCH_DPB_N3 < 23> PCH_DPB_P3 <23>
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_INTN SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
E
HDMI D2
HDMI D1
HDMI D0
HDMI CLK
4 4
Security Classification
Security Classification
Security Classification
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PCH (4/9) LVDS,CRT,DP,HDMI
PCH (4/9) LVDS,CRT,DP,HDMI
PCH (4/9) LVDS,CRT,DP,HDMI
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
16 45Friday, August 10, 2012
16 45Friday, August 10, 2012
16 45Friday, August 10, 2012
E
0.1
0.1
0.1
A
+3VS
1 1
+3VS
12/6 Add R469~R480
12 12 12 12
12 12 12 12
12 12
12
12 12
1 2
R181 8.2K_0402_5%R181 8.2K_0402_5%
1 2
@
@
R182 8.2K_0402_5%
R182 8.2K_0402_5%
R4698.2K_0402_5% R4698.2K_0402_5% R4708.2K_0402_5% R4708.2K_0402_5% R4718.2K_0402_5% R4718.2K_0402_5% R4728.2K_0402_5% R4728.2K_0402_5%
R4738.2K_0402_5% R4738.2K_0402_5% R4748.2K_0402_5% R4748.2K_0402_5% R4758.2K_0402_5% R4758.2K_0402_5% R4768.2K_0402_5% R4768.2K_0402_5%
R4778.2K_0402_5% R4778.2K_0402_5% R4788.2K_0402_5% R4788.2K_0402_5%
R4808.2K_0402_5% R4808.2K_0402_5%
R5238.2K_0402_5% R5238.2K_0402_5%
R18010K_0402_5% R18010K_0402_5%
PCI_PIRQC# PCI_PIRQB# PCI_PIRQA# PCI_PIRQD#
PCH_GPIO55 PCH_GPIO53 PCH_GPIO52 PCH_GPIO5
PCH_GPIO51 PCH_GPIO2
PCH_GPIO4
PCH_GPIO3 PCH_GPIO54
PCH_GPIO50
PCH_USB3_RX2_N<28>
PCH_USB3_RX2_P<28>
USB3.0
2 2
Only GPIO function
3 3
11/30 Add (EMI request)
4 4
Boot BIOS Strap
GPIO51GPIO19
Bit11
GNT1#/ GPIO51
Internal PH
CR Check list 1.5 only use for GPIO No use PU +3VS
CR Check list 1.5 only use for GPIO
@
@
22P_0402_50V8J
22P_0402_50V8J
@
@
22P_0402_50V8J
22P_0402_50V8J
@
@
22P_0402_50V8J
22P_0402_50V8J
PLT_RST#
Bit10
0 1
1
0
1 1
00
PH(Internal PH),
C469
C469
12
CLK_PCI_LPC
C474
C474
12
CLK_PCI_LPBACK
C482
C482
12
CLK_PCI_TPM
A
Boot BIOS Destination
Reserved
PCI
SPI
LPC
GPIO PU +3VS
CLK_PCI_LPBACK<14> CLK_PCI_LPC<29> CLK_PCI_TPM<30>
MC74VHC1G08DFT2G_SC70-5
MC74VHC1G08DFT2G_SC70-5
*
R194
R194
0_0402_5%
0_0402_5%
12
@
@
+3VS
5
U20
U20
2
P
B
Y
1
A
G
3
PCH_USB3_TX2_N<28>
PCH_USB3_TX2_P<28>
PCI Interrupt Requests
CLK_PCI_LPBACK CLK_PCI_LPC CLK_PCI_TPM
4
12
R195
R195
100K_0402_5%
100K_0402_5%
R191 22_0402_5%R191 22_0402_5% R192 22_0402_5%R192 22_0402_5% R193 22_0402_5%R193 22_0402_5%
B
PCH_USB3_RX2_N
PCH_USB3_RX2_P
PCH_USB3_TX2_N
PCH_USB3_TX2_P
PCH_GPIO2<30>
T17PAD @T17PAD @
PLT_RST#<5>
1 2 1 2 1 2
T18PAD @T18PAD @ T19PAD @T19PAD @
PLT_RST_BUF# <25,27,29,30>
B
C
U16E
U16E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
RSVD
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCH_GPIO50 PCH_GPIO52 PCH_GPIO54
PCH_GPIO53 PCH_GPIO55
PCH_GPIO2 PCH_GPIO3 PCH_GPIO4 PCH_GPIO5
PLT_RST#
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4 USB_OC7#
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
RSVD
PCI
PCI
NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NVRAM
NVRAM
NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15
NV_RE#_WRB0 NV_RE#_WRB1
NV_WE#_CK0 NV_WE#_CK1
USB
USB
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_ALE NV_CLE
NV_RCOMP
NV_RB#
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N
USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
C
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AY1
AV10
AT8
AY5 BA2
AT12 BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
D
DF_TVS
USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3
USB20_N1 <28> USB20_P1 <28> USB20_N2 <28> USB20_P2 <28> USB20_N3 <28> USB20_P3 <28>
USB3 (Left side)
USB2 (Left side2)
USB2 (Left side1)
HM70 not support USB2.0 for port 4-7 &12 &13
USB20_N8 USB20_P8
USB20_N10 USB20_P10
USBRBIAS
USB20_N8 <27> USB20_P8 <27>
USB20_N10 <22> USB20_P10 <22>
1 2
R189 22.6_0402_1%R189 22.6_0402_1%
Mini Card (WLAN)
CMOS Camera (LVDS)
L=500mil S=15mil
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6#
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
USB_OC0# <28> USB_OC1# <28>
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
EHCI 1
EHCI 2
E
DMI,FDI Termination Voltage
DF_TVS
Set to Vcc when HIGH
Set to Vss when LOW
*Note:457511 Rev 1.3-p.20
HR CPU NC
HR&CR co-lay CPU PU
CR Check list P.89 PU 2.2K series 1K
+1.8VS
12
R183
R183
2.2K_0402_5%
2.2K_0402_5%
DF_TVS
R184 1K_0402_5%R184 1K_0402_5%
12
H_SNB_IVB# <5>
CLOSE TO THE BRANCHING POINT
+VCCSUS3_3
USB_OC0#PCH_GPIO51
USB_OC7#
USB_OC5#
USB_OC6#
USB_OC1#
USB_OC4#
USB_OC3#
USB_OC2#
Title
Title
Title
PCH (5/9) PCI, USB, NVRAM
PCH (5/9) PCI, USB, NVRAM
PCH (5/9) PCI, USB, NVRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
Date: Sheet of
Date: Sheet of
Date: Sheet of
12
R185 10K_0402_5%R185 10K_0402_5%
12
R186 10K_0402_5%R186 10K_0402_5%
12
R187 10K_0402_5%R187 10K_0402_5%
12
R188 10K_0402_5%R188 10K_0402_5%
12
R197 10K_0402_5%R197 10K_0402_5%
12
R208 10K_0402_5%R208 10K_0402_5%
12
R215 10K_0402_5%R215 10K_0402_5%
12
R217 10K_0402_5%R217 10K_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
E
0.1
0.1
17 45Friday, August 10, 2012
17 45Friday, August 10, 2012
17 45Friday, August 10, 2012
0.1
A
B
C
D
E
HDA_SYNC PH(PLL =+1.5VS)
GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
H
On-Die PLL voltage regulator enable
*
L
On-Die PLL Voltage Regulator disable
+VCCSUS3_3
1 1
Deep S4,S5 wake event signal RTC alarm,Power BTN,GPIO27 PCH_GPIO27 (Have internal Pull-High) Deep S4,S5 wake event signal
2 2
3 3
12
R202
R202
4.7K_0402_5%
4.7K_0402_5%
PCH_GPIO28
R205
R205
@
@
1K_0402_5%
1K_0402_5%
1 2
Debug Port DG 1.2 PU 4.7K +3VALW_PCH
1 2
R209 10K_0402_5%@R209 10K_0402_5%@
R211 200K_0402_5%R211 200 K_0402_5%
+3VALW_PCH
R214 1K_0402_5%@R214 1K_0402_5%@
SATA2GP/GPIO36 & SATA3GP/GPIO37 Sampled at Rising edge of PWROK. Weak internal pull-down. (weak internal pull-down is disabled after PLTRST# de-asserts) NOTE: This signal should NOT be pulled high when strap is sampled
+3VS
1 2
R216 10K_0402_5%R216 10K_0402_5%
1 2
R218 10K_0402_5%R218 10K_0402_5%
1 2
R219 10K_0402_5%R219 10K_0402_5%
1 2
R220 10K_0402_5%R220 10K_0402_5%
1 2
R221 10K_0402_5%R221 10K_0402_5%
1 2
R522 10K_0402_5%R522 10K_0402_5%
12
1 2
PCH_GPIO36
EC_SMI#
PCH_GPIO0
PCH_GPIO1
PCH_GPIO6
PCH_GPIO16
PCH_GPIO17
PCH_GPIO38
PCH_GPIO27
12/13 Add
1 2
R222 10K_0402_5%R222 10K_0402_5%
1 2
R223 10K_0402_5%R223 10K_0402_5%
1 2
R225 10K_0402_5%R225 10K_0402_5%
+VCCSUS3_3
1 2
R227 10K_0402_5%R227 10K_0402_5%
1 2
R228 1K_0402_5%R228 1K_040 2_5%
1 2
R232 10K_0402_5%R232 10K_0402_5%
4 4
GPIO24 Unmultiplexed NOTE: GPIO24 configuration register bits are not cleared by CF9h reset event. CRB1.0 PU 10K to +3VALW
PCH_GPIO34
PCH_GPIO48
PCH_GPIO49
PCH_GPIO12
EC_LID_OUT#
PCH_GPIO57
A
Fan Tachometer Inputs TACH1~7 only on server can insted to GPIO
No use PU 10K +3VS
No use PU 10K +3VS
No use PU 10K +3VS
No use PU 10K +3VS
No use PU 10K +3VALW
No use PU +3VALW
No use PU +3VALW
No use PU +3VS
No use PU +3VS
No use PU 10K +3VS
DEV_MODE<28,29>
RAM flag
EC_SCI#< 29>
EC_SMI#<29>
PCH_GPIO12<30>
EC_LID_OUT#<29> GATEA20 <29>
CRM@
CRM@
1 2
DDR3/DDR3LNo use PU +3VALW
No use PD 10K to GND
No use PU 10K +3VALW
No use PU 10K +3VS
No use can NC
Can't PU
Can't PU
BT ON/OFF
T20PAD @T20PAD @
T21PAD @T21PAD @
No use PU 10K +3VS
No use PU 10K +3VS
RAM flag
No use PU 10K +3VS
SATA5GP&TEMP_ALERT# CRB PU 10K +3VS
No use PU +3VALW
+VCCSUS3_3
1 2
R224 10K_0402_5%R224 10K_0402_5%
1 2
R226 10K_0402_5%@R226 10K_0402_5%@
GPIO36/GPIO37 is Strap functionality that requires internal pull down to be sampled at rising PWROK. When uses as SATA2GP/SATA3GP for mechanical presence detect
-use a external pull up 150K-200K ohm to Vcc3_3 When used as GP input
-ensure GPI is not driven high during strap sampling window When Unused as GPIO or SATA*GP
-use 8.2K-10K pull-down check list page 47
PCH_GPIO24
B
PCH_GPIO0
PCH_GPIO1
PCH_GPIO6
EC_SCI#
EC_SMI#
PCH_GPIO12
EC_LID_OUT#
PCH_GPIO16
PCH_GPIO17
R2390_0402_5%
R2390_0402_5%
PCH_GPIO22
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO34
PCH_GPIO35
PCH_GPIO36
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO48
PCH_GPIO49
PCH_GPIO57
9/15 Layout request remove Test point They will route by itself
U16F
U16F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
C
11/21 EDP@->POP
LVDS/eDP
LVDS eDP
GPIO
GPIO
CPU/MISC
CPU/MISC
NCTF
NCTF
PCH_GPIO71 REC_MODE SPI_WP1#_RPCH
GPIO71
1 0
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
NC_1
NC_2
NC_3
NC_4
NC_5
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
+3VS +3VS +3VS
12
R199
R199
10K_0402_5%
10K_0402_5%
R198
R198
10K_0402_5%
10K_0402_5%
LVDS@
LVDS@
R201
R201
10K_0402_5%
10K_0402_5%
EDP@
EDP@
PCH_GPIO68
REC_MODE
SPI_WP1#_RPCH
PCH_GPIO71
PCH_PECI_R
EC_KBRST#
PCH_THRMTRIP#_R
CRM@
CRM@
R203
R203
10K_0402_5%
10K_0402_5%
MIM@
MIM@
1 2
PCH_GPIO68 < 27>
+3VS
1 2
@
R2070_0402_5%@R2070_0402_5%
1 2
R210 390_0402_5%R210 390_0402_5%
INIT3_3V
This signal has weak internal PU, can't pull low,leave NC
TS_VSS1~4 PD to GND
9/15 Layout request remove Test point They will route by itself
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
12
100K_0402_5%
100K_0402_5%
1 2
D32
RB751V-40_SOD323-2
RB751V-40_SOD323-2
R206
R206
10K_0402_5%
10K_0402_5%
D
12
R200
R200
CRM@
CRM@
R204
R204
10K_0402_5%
10K_0402_5%
MIM@
MIM@
1 2
12
CRM@D 32
CRM@
12
H_PECI <29,5>
EC_KBRST# <29>
H_CPUPWRGD <5>
H_THRMTRIP#
Checklist1.5 P.69
SPI_WP1#_R <13 ,28,29,30>
PECI CPU-EC
CTRL+ALT+DEL
non CPU power ok
H_THRMTRIP# <5>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
130c shut down
+3VS+3VS
EC_KBRST#
PCH_GPIO68
+3VS +3VS
12
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (6/9) GPIO, CPU, MISC
PCH (6/9) GPIO, CPU, MISC
PCH (6/9) GPIO, CPU, MISC
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
1 2
R212 10K_0402_5%R212 10K_0402_5%
1 2
R213 10K_0402_5%R213 10K_0402_5%
R229
R229 10K_0402_5%
10K_0402_5%
PCH_GPIO39 PCH _GPIO22
R233
R233 10K_0402_5%
10K_0402_5%
@
@
12
R231
R231 10K_0402_5%
10K_0402_5%
12
R235
R235
10K_0402_5%
10K_0402_5%
@
@
18 45Friday, August 10, 2012
18 45Friday, August 10, 2012
E
18 45Friday, August 10, 2012
0.1
0.1
0.1
A
+1.05VS_VTT
C179
10U_0603_6.3V6M
C179
10U_0603_6.3V6M
C180
1U_0402_6.3V6K
C180
1U_0402_6.3V6K
C181
1U_0402_6.3V6K
C181
1U_0402_6.3V6K
C182
1U_0402_6.3V6K
C182
1
1
2
1 1
2
1U_0402_6.3V6K
1
1
2
2
Place Near AA23
+1.05VS_VTT
T22PAD @T22PAD @
+VCCAPLLEXP
On-Die PLL Voltage Regulator
H
On-Die PLL voltage regulator enable
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA
2 2
3 3
On-Die PLL Voltage Regulator
H enable
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA
4 4
+1.05VS_VTT
C190
10U_0603_6.3V6M
C190
10U_0603_6.3V6M
1
2
Place Near AN16,AN21,AN33
+3VS
Place Near BH29
On-Die PLL voltage regulator
1
2
C191
1U_0402_6.3V6K
C191
1U_0402_6.3V6K
C192
1U_0402_6.3V6K
C192
1U_0402_6.3V6K
1
1
2
2
1
C196
C196
0.1U_0402_16V7K
0.1U_0402_16V7K
2
PAD @
PAD @
T23
T23
C194
1U_0402_6.3V6K
C194
1U_0402_6.3V6K
C193
1U_0402_6.3V6K
C193
1U_0402_6.3V6K
1
2
+1.05VS_VCCAPLL_FDI
+1.05VS_VTT
Trace 20mil
+1.5VS
1
C198
C198 1U_0402_6.3V6K
1U_0402_6.3V6K
2
Near AU20
U16G
U16G
1730mA
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
3799mA
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VCCFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
B
POWER
POWER
VCC CORE
VCC CORE
60mA
VCCIO
VCCIO
FDI
FDI
63mA
CRTLVDS
CRTLVDS
1mA
178mA
47mA
DMI
DMI
190mA
NAND / SPI HVCMOS
NAND / SPI HVCMOS
10mA
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCIO[1]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCSPI
C
Thermal Senser share with VCCADAC power rail so can't remove this power
+VCCADAC+1.05VS_VTT
+3VS
0.01U_0402_16V7K
0.01U_0402_16V7K
12
+3VS
1
2
+1.05VS_VTT
1
2
+1.8VS
1
2
1
C199
C199 1U_0402_6.3V6K
1U_0402_6.3V6K
2
Place Near U48
1
1
C183
C183
2
2
R237
R237 0_0402_5%
0_0402_5%
EDP@
EDP@
Place Near AM37
1
LVDS@
LVDS@
C186
C186
2
0.01U_0402_16V7K
0.01U_0402_16V7K
Place Near V33
C189
C189
0.1U_0402_16V7K
0.1U_0402_16V7K
C195
C195 1U_0402_6.3V6K
1U_0402_6.3V6K
place near AT20
C197
C197
0.1U_0402_16V7K
0.1U_0402_16V7K
place near AG16
C184
C184
0.1U_0402_16V7K
0.1U_0402_16V7K
1121 EDP@->POP
1
LVDS@
LVDS@
C187
C187
0.01U_0402_16V7K
0.01U_0402_16V7K
2
+1.5VS
1
2
0921 LVDS@->POP
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCA_LVDS
1/10 Add
+3VS
C483
C483
1
@
@
2
C185
C185 10U_0603_6.3V6M
10U_0603_6.3V6M
1121 LVDS@ ->@
LVDS@
LVDS@
1 2
R236 0_0805_5%
R236 0_0805_5%
0.01U_0402_16V7K
0.01U_0402_16V7K
1121 LVDS@ ->@
0.1UH_MLF1608DR10KT_10%_1608
0.1UH_MLF1608DR10KT_10%_1608
12
R238
R238 0_0402_5%
0_0402_5%
EDP@
EDP@
1
LVDS@
LVDS@
C188
C188 22U_0805_6.3V6M
22U_0805_6.3V6M
2
+VCCTX_LVDS
1121 EDP@->POP
I/O Buffer Voltage
Internal PLL and VRM(+1.5VS)
DMI buffer logic
Core Well I/O Buffer
VccDFTERM should PH +1.8VS or +3VS
For SPI control logi
D
MBK1608221YZF_2P
MBK1608221YZF_2P
1
C484
C484 22U_0805_6.3V6M
22U_0805_6.3V6M
@
@
2
L2
L2
12
LVDS@
LVDS@
L1
L1
+3VS
12
+1.8VS
0.1uH inductor, 200mA
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC
VccADPLLA
VccADPLLB
VccCore
VccDMI
VccIO 3.799
VccASW 0.803
VccSPI 0.01
VccDSW 0.003
Voltage
1.05
5
5
3.3
3.3
1.05
1.05
1.05
1.05
1.05
1.05
3.3
3.3
1.8 0.19VccpNAND
VccRTC 6 uA
VccSus3_3
3.3
3.3
3.3 / 1.5VccSusHDA
VccVRM 1.8 / 1.5 0.16
VccCLKDMI
VccSSC 0.095
VccDIFFCLKN 0.055
VccALVDS
VccTX_LVDS 0.06
1.05
1.05
1.05
3.3
1.8
S0 Iccmax Current(A)
0.002
0.001
0.001
0.178
0.063
0.075
0.075
1.73
0.047
0.065
0.01
0.02
0.001
E
Processor I/F
PCH Core Well Reference Voltage
Suspend Well Reference Voltag
I/O Buffer Voltage
Display DAC Analog Power. This power is supplied by the core well.
Display PLL A power
Display PLL B power
Internal Logic Voltage
DMI Buffer Voltage
Core Well I/O buffers
1.05 V Supply for Intel R Management Engine and Integrated LAN
3.3 V Supply for SPI Controller Logic
3.3v supply for Deep S4/S5 well
1.8V power supply for DF_TVS
Battery Voltage
Suspend Well I/O Buffer Voltage
High Definition Audio Controller Suspend Voltage
1.8 V Internal PLL and VRMs (1.8 V for Desktop)
DMI Clock Buffer Voltage
Spread Modulators Power Supply
Differential Clock Buffers Power Supply
Analog power supply for LVDS (Mobile Only) Analog power supply for LVDS (Mobile Only)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PCH (7/9) PWR
PCH (7/9) PWR
PCH (7/9) PWR
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
19 45Friday, August 10, 2012
19 45Friday, August 10, 2012
19 45Friday, August 10, 2012
0.1
0.1
0.1
A
+3VS
L3
L3
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1 2
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1
C200
C200
+3VS_VCC_CLKF33
1
2
Near T38
C201
1U_0402_6.3V6K
C201
1U_0402_6.3V6K
1
2
GPIO28
+1.05V analog internal clock PLL Can NC
Not support Deep S4,S5 connect to +3VALW
suppied by internal
1.05V VR must NC
On-Die PLL Voltage Regulator
H
On-Die PLL voltage regulator enable
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA
+1.05VS_VTT
2 2
3 3
4 4
L4
L4
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1 2
1 2
L5
L5
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
1
+
+
C216
C216 330U_D2_2V_Y
330U_D2_2V_Y
@
@
2
SGA20331E10 330U 2V H1.9 9mohm POLY
+1.05VS_VTT
C223
C223
1
1U_0402_6.3V6K
1U_0402_6.3V6K
Place
2
near AF17
suppied by internal
1.05V VR Must NC
isolation between SSC (AG33) and DIFFCLKN(AF33,AF34,AG34) 18mil width(DIFFCLKN) 10mil (SSC)
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
C224
C224
1
1U_0402_6.3V6K
1U_0402_6.3V6K
2
A
Place near AG33
C210
1U_0402_6.3V6K
C210
1U_0402_6.3V6K
1
2
C217
1U_0402_6.3V6K
C217
1U_0402_6.3V6K
1
2
Near BD47
Near BF47
+1.05VS_VTT
1
2
+3VALW_PCH
R242 0_0402_5%
R242 0_0402_5%
C225
C225 1U_0402_6.3V6K
1U_0402_6.3V6K
Place near AF33, AF34,AG34
1 2
+VCCDSW3_3
Near M6
C221 0.1U_0402_16V7KC221 0.1U_0402_16V7K
Near V16
+1.05VS_VTT
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
Place near BJ8
B
+1.05VS_VTT
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
C229
0.1U_0402_16V7K
C229
0.1U_0402_16V7K
C228
C228
1
2
B
T26PAD @T26PAD @
T27PAD @T27PAD @
1
2
C211
C211
1
2
Near AA19
12
T30PAD @T30PAD @
C230
0.1U_0402_16V7K
C230
0.1U_0402_16V7K
1
2
+VCCACLK
T24PAD @T24PAD @
+VCCDSW3_3
1
C202
C202
0.1U_0402_16V7K
0.1U_0402_16V7K
2
Near T16
+PCH_VCCDSW
+3VS_VCC_CLKF33
+VCCAPLL_CPY_PCH
+1.05VS_VTT
T25PAD @T25PAD @
C209
22U_0805_6.3V6M
C209
22U_0805_6.3V6M
C208
22U_0805_6.3V6M
C208
22U_0805_6.3V6M
1
2
C212
1U_0402_6.3V6K
C212
1U_0402_6.3V6K
C213
1U_0402_6.3V6K
C213
1U_0402_6.3V6K
1
2
+VCCRTCEXT
+1.5VS
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+1.05VS_VTT
12
C226 0.1U_0402_16V7KC226 0.1U _0402_16V7K
+1.05VM_VCCSUS
+RTCVCC
0.1U_0402_16V7K
0.1U_0402_16V7K
C231
1U_0402_6.3V6K
C231
1U_0402_6.3V6K
1
1
2
2
Near A22
+VCCSUS1
+VCCSST
C232
C232
0.1U_0402_16V7K
0.1U_0402_16V7K
1
2
U16J
U16J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCIO[8]
AF34
VCCIO[9]
AG34
VCCIO[11]
AG33
VCCIO[10]
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
C233
C233
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
55mA
2mA
POWER
POWER
3mA
803mA
75mA 75mA
95mA
C
VCC3_3 = 178mA detal waiting for newest spec
VCCDMI = 47mA detal waiting for newest spec
+1.05VS_VTT
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
T23
T24
V23
V24
P24
T26
M26
AN23
+VCCA_USBSUS
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
+1.05VS_VTT
T21
V21
T19
P32
VCCSUS3_3[7]
65mA
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
1mA
VCCSUS3_3[1]
1mA
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
SATA USB
CPURTC
CPURTC
VCCSUSHDA
10mA
HDA
HDA
1
2
1
2
+1.05VS_VTT
+PCH_V5REF_SUS
+PCH_V5REF_RUN
+1.05VS_VTT
+VCCSATAPLL
+1.05VS_VTT
+VCCSUS3_3
C204
C204 1U_0402_6.3V6K
1U_0402_6.3V6K
Near N26
C206
C206
0.1U_0402_16V7K
0.1U_0402_16V7K
T28
@ T28
@
PAD
PAD
+VCCSUS3_3
1
C215
C215 1U_0402_6.3V6K
1U_0402_6.3V6K
2
Near N20
1
C218
C218
0.1U_0402_16V7K
0.1U_0402_16V7K
Place near
2
AJ2
Near AH13,AH14,AF13
1
C222
C222 1U_0402_6.3V6K
1U_0402_6.3V6K
2
T29 PAD@ T29 PAD@
Near AC16
1
C227
C227 1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
C234
C234
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
D
+3VALW
AP2301GN-HF_SOT23-3
AP2301GN-HF_SOT23-3
1K_0402_5%
1K_0402_5%
PCH_PWR_EN#
+VCCSUS3_3
1
C203
C203
0.1U_0402_16V7K
0.1U_0402_16V7K
Near T24Near T23
2
RB751V-40_SOD323-2
RB751V-40_SOD323-2
Near M26
1 2
C207
C207
0.1U_0402_16V7K
0.1U_0402_16V7K
suppied by internal
1.05V VR Must NC
+VCCSUS3_3
1
C219
C219
0.1U_0402_16V7K
0.1U_0402_16V7K
Place near
2
AA16,W16
+1.5VS
JUMP_43X39
JUMP_43X39
J13
112
3 1
Q68
DS3@Q68
DS3@
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1 2
12
C499
R552
R552
C499
For Deep S3 turn off +V5REF_SUS,+VCCSUS3_3
+VCCSUS3_3
D3
D3
1 2
+3VS
1
C220
C220
0.1U_0402_16V7K
0.1U_0402_16V7K
Place near
2
T34
GPIO28
On-Die PLL Voltage Regulator
H
On-Die PLL voltage regulator enable
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA
Need +3VALW and 0.1U close PCH
Near P32
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
E
@J13
@
2
+VCCSUS3_3
0.1U_0402_16V7K
0.1U_0402_16V7K
12
C279
C279
1
2
PCH_PWR_EN#<25,33>
+5VREF_SUS
12
R243
R243
100_0402_5%
100_0402_5%
20mil
R288
20K_0402_5%
R288
20K_0402_5%
RB751V-40_SOD323-2
RB751V-40_SOD323-2
+5VALW
AP2301GN-HF_SOT23-3
AP2301GN-HF_SOT23-3
R568
R568
1K_0402_5%
1K_0402_5%
+3VS +5VS
D4
D4
1 2
1
C214
C214
1U_0603_10V6K
1U_0603_10V6K
2
R240 0_0603_5%
R240 0_0603_5%
3 1
Q8
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1 2
12
C500
C500
12
R244
R244 100_0402_5%
100_0402_5%
Near P34
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/9) PWR
PCH (8/9) PWR
PCH (8/9) PWR
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
DS3@Q8
DS3@
S3@
S3@
20 45Friday, August 10, 2012
20 45Friday, August 10, 2012
20 45Friday, August 10, 2012
12
+5VREF_SUS
C205
0.1U_0402_16V7K
C205
0.1U_0402_16V7K
1
2
R241
20K_0402_5%
R241
20K_0402_5%
12
0.1
0.1
0.1
A
1 1
2 2
3 3
4 4
U16H
U16H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
B
U16I
U16I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
COUGARPOINT_FCBGA989
COUGARPOINT_FCBGA989
HM77@
HM77@
C
H46
VSS[259]
K18
VSS[260]
K26
VSS[261]
K39
VSS[262]
K46
VSS[263]
K7
VSS[264]
L18
VSS[265]
L2
VSS[266]
L20
VSS[267]
L26
VSS[268]
L28
VSS[269]
L36
VSS[270]
L48
VSS[271]
M12
VSS[272]
P16
VSS[273]
M18
VSS[274]
M22
VSS[275]
M24
VSS[276]
M30
VSS[277]
M32
VSS[278]
M34
VSS[279]
M38
VSS[280]
M4
VSS[281]
M42
VSS[282]
M46
VSS[283]
M8
VSS[284]
N18
VSS[285]
P30
VSS[286]
N47
VSS[287]
P11
VSS[288]
P18
VSS[289]
T33
VSS[290]
P40
VSS[291]
P43
VSS[292]
P47
VSS[293]
P7
VSS[294]
R2
VSS[295]
R48
VSS[296]
T12
VSS[297]
T31
VSS[298]
T37
VSS[299]
T4
VSS[300]
W34
VSS[301]
T46
VSS[302]
T47
VSS[303]
T8
VSS[304]
V11
VSS[305]
V17
VSS[306]
V26
VSS[307]
V27
VSS[308]
V29
VSS[309]
V31
VSS[310]
V36
VSS[311]
V39
VSS[312]
V43
VSS[313]
V7
VSS[314]
W17
VSS[315]
W19
VSS[316]
W2
VSS[317]
W27
VSS[318]
W48
VSS[319]
Y12
VSS[320]
Y38
VSS[321]
Y4
VSS[322]
Y42
VSS[323]
Y46
VSS[324]
Y8
VSS[325]
BG29
VSS[328]
N24
VSS[329]
AJ3
VSS[330]
AD47
VSS[331]
B43
VSS[333]
BE10
VSS[334]
BG41
VSS[335]
G14
VSS[337]
H16
VSS[338]
T36
VSS[340]
BG22
VSS[342]
BG24
VSS[343]
C22
VSS[344]
AP13
VSS[345]
M14
VSS[346]
AP3
VSS[347]
AP1
VSS[348]
BE16
VSS[349]
BC16
VSS[350]
BG28
VSS[351]
BJ28
VSS[352]
D
E
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
PCH (9/9) VSS
PCH (9/9) VSS
PCH (9/9) VSS
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
21 45Friday, August 10, 2012
21 45Friday, August 10, 2012
21 45Friday, August 10, 2012
0.1
0.1
0.1
A
B
C
D
E
LCD POWER CIRCUIT
+LCDVDD
+3VALW
12
R245
R245
300_0603_5%
300_0603_5%
1 1
DMN66D0LDW-7_SOT 363-6
DMN66D0LDW-7_SOT 363-6
PCH_ENVDD<16>
2 2
Q9A
Q9A
R248
R248
100K_0402_5%
100K_0402_5%
DPST_PWM<16>
12
R246
R246 10K_0402_5%
61
12
R249 100K_0402_5%
R249 100K_0402_5%
10K_0402_5%
2
34
DMN66D0LDW-7_SOT 363-6
DMN66D0LDW-7_SOT 363-6
5
Q9B
Q9B
1 2
@
@
1K_0402_5%
1K_0402_5%
R247
R247
0.047U_0402_16V7K
0.047U_0402_16V7K
12
C238
C238
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
U22
@U22
@
1
OE#
2
IN
3
GND
74AHC1G125GW_SOT 353-5
74AHC1G125GW_SOT 353-5
1 2
R250 0_04 02_5%R250 0_0402_5 %
+3VS
W=60mils
1
C235
C235
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
3
S
S
2
Q10
Q10
G
G
AO3419L_SOT23-3
AO3419L_SOT23-3
D
VCC
OUT
C239
C239
5
4
D
1
1
2
INVTPWM
+LCDVDD
+3VS
W=60mils
1
C240
C240
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12/13 Add
INVTPWM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R525
R525
1 2
10K_0402_5%
10K_0402_5%
C247
C247
1
2
W=60mils
680P_0402_50V7K
680P_0402_50V7K
+LCDVDD+3VS
1
2
+LED_VOUT B+
FBMA-L11-201209-221LMA30T_08 05
FBMA-L11-201209-221LMA30T_08 05
FBMA-L11-201209-221LMA30T_08 05
FBMA-L11-201209-221LMA30T_08 05
1
1
C237
2
C237 68P_0402_50V8J
68P_0402_50V8J
2
1
2
C236
C236
1
C248
C248
10U_0603_6.3V6M
10U_0603_6.3V6M
2
L6
L6
L7
L7
@
@
PCH_TXCLK+<16> PCH_TXCLK-<16 >
PCH_TXOUT2+<16> PCH_TXOUT2-<16>
PCH_TXOUT1+<16> PCH_TXOUT1-<16>
PCH_TXOUT0+<16> PCH_TXOUT0-<16>
PCH_LCD_DATA<16> PCH_LCD_CLK<16>
BKOFF#< 29>
C249
C249
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Place closed to JLVDS1
W=60mils
12
12
SM010014520 3000ma 220ohm@100mhz DCR 0.04
C471 220P_0402_50V7KC471 220P_0402_50V7K
R489 10K_0402 _5%R489 10K_0402 _5%
R454 0_0402 _5%LVDS@R454 0_040 2_5%LVDS@ R455 0_0402 _5%LVDS@R455 0_040 2_5%LVDS@
R456 0_0402 _5%LVDS@R456 0_040 2_5%LVDS@ R457 0_0402 _5%LVDS@R457 0_040 2_5%LVDS@
R458 0_0402 _5%LVDS@R458 0_040 2_5%LVDS@ R459 0_0402 _5%LVDS@R459 0_040 2_5%LVDS@
R460 0_0402 _5%LVDS@R460 0_040 2_5%LVDS@ R461 0_0402 _5%LVDS@R461 0_040 2_5%LVDS@
R462 0_0402 _5%LVDS@R462 0_040 2_5%LVDS@ R463 0_0402 _5%LVDS@R463 0_040 2_5%LVDS@
1 2
1 2
Camera
+CAM_VCC
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
LCD/LED PANEL Conn.
JLVDS1
JLVDS1
1
USB20_P10_R USB20_N10_R
EDP_HPD
PCH_TXCLK+_R PCH_TXCLK-_R
PCH_TXOUT2+_R PCH_TXOUT2-_R
PCH_TXOUT1+_R PCH_TXOUT1-_R
PCH_TXOUT0+_R PCH_TXOUT0-_R
PCH_LCD_DATA_R PCH_LCD_CLK_R
+3VS
+LCDVDD
+LED_VOUT
W=60mils
BKOFF# INVTPWM
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
STARC_107K30-00000 1-G2_30P
STARC_107K30-00000 1-G2_30P
CONN@
CONN@
SP010011S00
11/29 Modify.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
GND1 GND2 GND3 GND4 GND5 GND6
31 32 33 34 35 36
1 2
EDP_HPD#<4>
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
3 3
Q11
Q11
EDP@
EDP@
13
D
D
2
EDP_HPD
G
G
S
S
12
R251
R251
100K_0402_5%
100K_0402_5%
EDP@
EDP@
eDP
EDP_AUXN<4> EDP_AUXP<4>
EDP_TXP0<4> EDP_TXN0<4>
EDP_TXP1<4> EDP_TXN1<4>
Camera
USB20_P10<17>
USB20_N10<17>
4 4
Security Classification
Security Classification
Security Classification
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/03/21 2013/03/21
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+3VS
1 2
R453 0_06 03_5%R453 0_0603_5 %
C241 0.1U_ 0402_16V7KEDP@ C241 0.1U _0402_16V7KEDP@
1 2
C242 0.1U_ 0402_16V7KEDP@ C242 0.1U _0402_16V7KEDP@
1 2
C243 0.1U_ 0402_16V7KEDP@ C243 0.1U _0402_16V7KEDP@
1 2
C244 0.1U_ 0402_16V7KEDP@ C244 0.1U _0402_16V7KEDP@
1 2
C245 0.1U_ 0402_16V7KEDP@ C245 0.1U _0402_16V7KEDP@
1 2
C246 0.1U_ 0402_16V7KEDP@ C246 0.1U _0402_16V7KEDP@
D5
D5
1
L30ESDL5V0C3-2
L30ESDL5V0C3-2
1 2
R252 0_0402 _5%R252 0_0402 _5%
L8
2
2
3
3
WCM2012F2SF-670T0 4_0805
WCM2012F2SF-670T0 4_0805
1 2
R253 0_0402 _5%R253 0_0402 _5%
D
3
USB20_P10_R
2
USB20_N10_R
11/29 Modify D5(ESD request)
@L8
@
1
1
4
4
+CAM_VCC
Title
Title
Title
Size Docume nt Number Rev
Size Docume nt Number Rev
Size Docume nt Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
PCH_LCD_DATA_R PCH_LCD_CLK_R
PCH_TXOUT1+_R PCH_TXOUT1-_R
PCH_TXOUT2+_R PCH_TXOUT2-_R
USB20_P10_R
USB20_N10_R
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LVDS&eDP
LVDS&eDP
LVDS&eDP
E
0.1
0.1
0.1
22 45Friday, August 10, 2012
22 45Friday, August 10, 2012
22 45Friday, August 10, 2012
A
R255
R255
0_0603_5%
0_0603_5%
1 2
@
@
1 2
1 2
2
3
D6
D6
RB491D-YS_SOT23-3
RB491D-YS_SOT23-3
C251 0.1U_0402_16V7KC251 0.1U_0402_16V7K C252 0.1U_0402_16V7KC252 0.1U_0402_16V7K
C253 0.1U_0402_16V7KC253 0.1U_0402_16V7K C254 0.1U_0402_16V7KC254 0.1U_0402_16V7K
C255 0.1U_0402_16V7KC255 0.1U_0402_16V7K C256 0.1U_0402_16V7KC256 0.1U_0402_16V7K
C257 0.1U_0402_16V7KC257 0.1U_0402_16V7K C258 0.1U_0402_16V7KC258 0.1U_0402_16V7K
SDVO_SCLK
SDVO_SDATA
1
+HDMI_5V
SDVO_SCLK
SDVO_SDATA
+5VS
1 1
PCH_DPB_N0<16> PCH_DPB_P0<16>
PCH_DPB_N1<16> PCH_DPB_P1<16>
PCH_DPB_N2<16> PCH_DPB_P2<16>
PCH_DPB_N3<16> PCH_DPB_P3<16>
2 2
3 3
+3VS
R273 2.2K_0402_5%R273 2.2K_0402_5%
R274 2.2K_0402_5%R274 2.2K_0402_5%
SDVO_SCLK<16>
SDVO_SDATA<16>
W=40mils
F1
F1
1.1A_6V_SMD1812P110TF
1.1A_6V_SMD1812P110TF
+3VS
5
Q13B
Q13B DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
+HDMI_5V_OUT
21
12 12
12 12
12 12
12 12
RB751V-40_SOD323-2
RB751V-40_SOD323-2
2.2K_0402_5%
2.2K_0402_5%
2
61
Q13A
Q13A DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
34
1
2
Place closed to JHDMI1
4 4
B
C250
C250
0.1U_0402_16V4Z
0.1U_0402_16V4Z
HDMI_TX2­HDMI_TX2+
HDMI_TX1­HDMI_TX1+
HDMI_TX0­HDMI_TX0+
HDMI_CLK­HDMI_CLK+
+HDMI_5V_OUT
D7
D7
1 2
R275
R275
1 2
3/1 Add (ESD request)
R276
R276
2.2K_0402_5%
2.2K_0402_5%
1 2
HDMI_SCLK
HDMI_SDATA
PCH_DPB_HPD<16>
RF request
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C260
C260 47P_0402_50V8J
47P_0402_50V8J
@
@
2
C261
C261 47P_0402_50V8J@
47P_0402_50V8J@
12
R262
R262
1M_0402_5%
1M_0402_5%
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
+3VS
1
1
C493
2
C493
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C492
C492
@
@
C
+3VS
2
Q12A
Q12A
100K_0402_5%
100K_0402_5%
D
E
SM070001310 400ma 90ohm@100mhz DCR 0.3
1 2
R254 0_0402_5%@R254 0_04 02_5%@
GND GND GND GND
3
2
3
2
3
2
3
2
+3VS
3
2
3
2
3
2
3
2
HDMI_GND
20 21 22 23
4
L9
L9 WCM-2012-900T_0805
WCM-2012-900T_0805
HDMI_CLK-
HDMI_TX0+
L10
L10 WCM-2012-900T_0805
WCM-2012-900T_0805
HDMI_TX0-
HDMI_TX1+
L11
L11 WCM-2012-900T_0805
WCM-2012-900T_0805
HDMI_TX1-
L12
L12 WCM-2012-900T_0805
WCM-2012-900T_0805
HDMI_TX2-
HDMI_TX2­HDMI_TX2+
61
12
R269
R269
HDMI_HPD<28>
HDMI_HPD
1
C259
C259
220P_0402_50V7K
220P_0402_50V7K
2
1 2
R293
R293
+HDMI_5V_OUT
HDMI_TX1­HDMI_TX1+
HDMI_TX0­HDMI_TX0+
HDMI_CLK­HDMI_CLK+
0_0402_5%
0_0402_5%
HDMI_SDATA HDMI_SCLK
HDMI_R_CK-
HDMI_R_CK+ HDMI_R_D0-
HDMI_R_D0+ HDMI_R_D1-
HDMI_R_D1+ HDMI_R_D2-
HDMI_R_D2+
R264 680_0402_5%R264 680_0402_5% R265 680_0402_5%R265 680_0402_5%
R266 680_0402_5%R266 680_0402_5% R267 680_0402_5%R267 680_0402_5%
R268 680_0402_5%R268 680_0402_5% R270 680_0402_5%R270 680_0402_5%
R271 680_0402_5%R271 680_0402_5% R272 680_0402_5%R272 680_0402_5%
4
1
1
1 2
R256 0_0402_5%
R256 0_0402_5%
@
@
1 2
R257 0_0402_5%@R257 0_04 02_5%@
4
4
1
1
1 2
R258 0_0402_5%
R258 0_0402_5%
@
@
1 2
R259 0_0402_5%@R259 0_04 02_5%@
4
4
1
1
1 2
R260 0_0402_5%
R260 0_0402_5%
R261 0_0402_5%@R261 0_0402_5%@
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
HDMI connector
@
@
1 2
4
4
1
1
1 2
R263 0_0402_5%
R263 0_0402_5%
@
@
JHDMI1
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_G ND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
HONGL_13-13201904CP_19P
HONGL_13-13201904CP_19P
CONN@
CONN@
DC232001000
HDMI_R_CK+HDMI_CLK+
HDMI_R_CK-
HDMI_R_D0+
HDMI_R_D0-
HDMI_R_D1+
HDMI_R_D1-
HDMI_R_D2+HDMI_TX2+
HDMI_R_D2-
34
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
5
Q12B
Q12B
11/29 Modify.
Security Classification
Security Classification
Security Classification
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
HDMI Conn
HDMI Conn
HDMI Conn
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
23 45Friday, August 10, 2012
23 45Friday, August 10, 2012
23 45Friday, August 10, 2012
E
0.1
0.1
0.1
A
B
C
D
E
2
3
@
@
D9
D9
L30ESDL5V0C3-2
L30ESDL5V0C3-2
1
2
2.2P_0402_50V8C
2.2P_0402_50V8C
C269
C269
1
1 2
0_0603_5%
0_0603_5%
1 2
0_0603_5%
0_0603_5%
1 1
PCH_CRT_R<16>
PCH_CRT_G<16>
PCH_CRT_B<16>
2 2
PCH_CRT_HSYNC<16>
PCH_CRT_VSYNC<16>
PCH_CRT_R
PCH_CRT_G
PCH_CRT_B
PCH_CRT_HSYNC
PCH_CRT_VSYNC
12
12
R277
R277 150_0402_1%
150_0402_1%
C273 0.1U_0402_16V4ZC273 0.1U_0402_16V4Z
R281
R281
33_0402_5%
33_0402_5%
R282
R282
33_0402_5%
33_0402_5%
R278
R278
150_0402_1%
150_0402_1%
1 2
12
CRT_HSYNC
12
CRT_VSYNC
12
R279
R279 150_0402_1%
150_0402_1%
+CRT_VCC
C278 0.1U_0402_16V4ZC278 0.1U_0402_16V4Z
10P_0402_50V8J
10P_0402_50V8J
1
C263
C263
@
@
@
@
2
1
5
U23
U23
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
3
1 2
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
1
1
C264
C264
C265
C265
@
@
2
2
4
+CRT_VCC
CRB1.0 use 47ohm@100Mhz Bead
1 2
L130_0603_5% L130_0603_5%
1 2
L150_0603_5% L150_0603_5%
1 2
L170_0603_5% L170_0603_5%
1
2
R280 10K_0402_5%R280 10K_0402_5%
5
P
A2Y
G
3
12
CRT_HSYNC_1
1
U24
U24
4
OE#
CRT_VSYNC_1
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
2.2P_0402_50V8C
2.2P_0402_50V8C
CRT_R_1
CRT_G_1
CRT_B_1
C266
C266
L14
L14
FBMA-L10-160808-600LMT 0603
FBMA-L10-160808-600LMT 0603
1 2
L16
L16
FBMA-L10-160808-600LMT 0603
FBMA-L10-160808-600LMT 0603
1 2
L18
L18
FBMA-L10-160808-600LMT 0603
FBMA-L10-160808-600LMT 0603
1 2
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
1
1
2
C268
C268
C267
C267
2
HDD Board Conn
JHDD1
3 3
+5VS_HDD
SATA_PTX_DRX_P0<13> SATA_PTX_DRX_N0<13>
SATA_PTX_DRX_P0 SA TA_PTX_C_DRX_P0 SATA_PTX_DRX_N0
1 2
C281 0.01U_0402_16V7KC281 0.01U_0402_16V7K
1 2
C282 0.01U_0402_16V7KC282 0.01U_0402_16V7K
SATA_PRX_DTX_N0<13> SATA_PRX_DTX_P0<13>
+5VS_HDD+5VS
J2
@J2
@
2
112
JUMP_43X79
JUMP_43X79
SATA_PTX_C_DRX_N0
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0
+3VS
JHDD1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
GND
12
12
GND
ACES_85201-1205N
ACES_85201-1205N
CONN@
CONN@
SP01000E400
13 14
3
1
2.2P_0402_50V8C
2.2P_0402_50V8C
1
C270
C270
2
2
@
@
D10
D10
L30ESDL5V0C3-2
L30ESDL5V0C3-2
2.2P_0402_50V8C
2.2P_0402_50V8C
1
2
L19
L19
L20
L20
C274
C274
10P_0402_50V8J
10P_0402_50V8J
CRT_R_2
CRT_G_2
CRT_B_2
C271
C271
@
@
CRT_HSYNC_2
CRT_VSYNC_2
1
2
+5VS
CH491DPT_SOT23-3
CH491DPT_SOT23-3
1
C275
C275 10P_0402_50V8J
10P_0402_50V8J
2
@
@
PCH_CRT_DATA<16>
PCH_CRT_CLK<16>
+R_CRT_VCC
D11
D11
2 1
W=40mils
1.1A_6V_SMD1812P110TF
1.1A_6V_SMD1812P110TF
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C272
C272
100P_0402_50V8J
100P_0402_50V8J
2
1
2
C276
C276
68P_0402_50V8J
68P_0402_50V8J
PCH_CRT_DATA
PCH_CRT_CLK
F2
F2
21
1
C262
C262
2
PAD
PAD
@T31
@
@T32
@
PAD
PAD
DSUB_12
DSUB_15
1
C277
C277 68P_0402_50V8J
68P_0402_50V8J
2
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
+CRT_VCC
W=40mils
CRT Connector
12/30 Modify.
6
JCRT1.11
T31
JCRT1.5
T32
5
Q15B
Q15B
+3VS
11
1 7
12
2 8
13
3 9
14
4 10 15
5
DC060004W00
12
R283
R283
2.2K_0402_5%
2.2K_0402_5%
2
61
Q15A
Q15A DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
34
JCRT1
JCRT1
16
G
G
17
G
G
CONTECK_80435-5K1-152
CONTECK_80435-5K1-152
CONN@
CONN@
D-SUB
+CRT_VCC
12
R284
R284
2.2K_0402_5%
2.2K_0402_5%
DSUB_12
DSUB_15
100mils
C488
1000P_0402_50V7K
C488
1000P_0402_50V7K
C487
0.1U_0402_16V4Z
C487
0.1U_0402_16V4Z
C486
1U_0603_10V6K
C486
1U_0603_10V6K
1
1
C485
C485
10U_0805_10V4Z
10U_0805_10V4Z
4 4
2
2
1
1
2
2
3/29 Add (EMI request)
+3VS
1
C502
C502
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
CRT&HDD Connector
CRT&HDD Connector
CRT&HDD Connector
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
24 45Friday, August 10, 2012
24 45Friday, August 10, 2012
24 45Friday, August 10, 2012
0.1
0.1
0.1
A
+1.2V_LAN
+VDDO_CR
1/3 Add(Broadcom request)
1
1
C477
C477
C296
C296
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
C289
C289
C301
C301
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
R289 0_0402_5%R289 0_0402_5%
1 2
R290 4.7K_0402_5%R290 4.7K_0402_5%
1 2
R291 0_0402_5%@R291 0_0402_5%@
1 2
R292 0_0402_5%R292 0_0402_5%
1 2
R295 56_0402_5%R295 56_0402_5%
1 2
R296 56_0402_5%R296 56_0402_5%
1 2
R298 56_0402_5%R298 56_0402_5%
1 2
R299 56_0402_5%R299 56_0402_5%
+3VS
+3V_LAN
R314
R314 200_0402_1%
200_0402_1%
LAN_CLKREQ#<14>
C317
C317 15P_0402_50V8J
15P_0402_50V8J
SPROM_DOUT (EEDATA)
01
C478
C478
1
2
1 2 1 2
1
1 1
2 2
3 3
4 4
1
C291
C291
C290
C290
2
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PCH_PWR_EN#<20,33>
LAN_PWR_EN#<29>
1 2
C303 0.1U_0402_16V4ZC303 0.1U _0402_16V4Z
1
1
C292
C292
C288
C288
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VALW +3V_LAN
AO3419L_SOT23-3
AO3419L_SOT23-3
1 2
R548
@R548
@
0_0402_5%
0_0402_5%
1 2
R549
R549
1K_0402_5%
1K_0402_5%
PLT_RST_BUF# CR_DETECT
C316
C316
15P_0402_50V8J
15P_0402_50V8J
C293
C293
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
1 2
10K_0402_5%
10K_0402_5%
1
1
2
1
C294
C294
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R285
R285
Q37
Q37
R569
R569
@
@
PCIE_PRX_DTX_P3<14>
PCIE_PRX_DTX_N3<14> PCIE_PTX_C_DRX_P3<14> PCIE_PTX_C_DRX_N3<14>
25MHZ_10PF_7V25000014
25MHZ_10PF_7V25000014
Y3
Y3
1
GND
2
1
2
C295
C295
0_0805_5%@
0_0805_5%@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CR_DATA0<26> CR_DATA1<26> CR_DATA2<26> CR_DATA3<26>
GND
On chip
AT24C02
1
2
123
DGS
DGS
1
2
4
C299
C299
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C498
C498
0.1U_0402_16V4Z
0.1U_0402_16V4Z
EC_PME#<27,29>
+3V_LAN
PCH_PCIE_WAKE#<15,27>
PLT_RST_BUF#<17,27,29,30> CLK_PCIE_LAN<14> CLK_PCIE_LAN#<14>
3
LAN_XTALO
3
R02 Modify
1
C300
C300
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CR_DATA0 CR_DATA1 CR_DATA2 CR_DATA3
LAN_XTALI LAN_XTALO_R
12
1
2
SPROM_CLK (EECLK)
1 1
B
+1.2V_LAN
1
2
+3V_LAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+LAN_AVDDL
+LAN_GPHYPLLVDDL
+LAN_PCIEPLLVDD
PCIE_PRX_C_DTX_P3
C305.1U_0402_16V7K C305.1U_0402_16V7K
PCIE_PRX_C_DTX_N3
C308.1U_0402_16V7K C308.1U_0402_16V7K
LAN_PME#
CR_DATA0_R CR_DATA1_R CR_DATA2_R CR_DATA3_R
1 2
R310 1K_0402_5%R310 1K_0402_5%
1 2
R311 4.7K_0402_5%R311 4.7K_0402_5%
1 2
R312 4.7K_0402_5%R312 4.7K_0402_5%
LAN_XTALO_R LAN_XTALI
1 2
R550
R550
1 2
10K_0402_5%
10K_0402_5%
+3V_LAN
@
@
R316
R316
1 2
1 2
LAN_RDAC
4.7K_0402_5%
4.7K_0402_5%
R318
R318
4.7K_0402_5%
4.7K_0402_5%
R315 1.24K_0402_1%R315 1. 24K_0402_1%
+3V_LAN
SPROM_CLK SPROM_DOUT
U25
U25
20
VDDO_CR
35
VDDC
61
VDDC
7
VDDO
56
VDDO
62
VDDO
39
AVDDL
45
AVDDL
51
AVDDL
36
GPHY_PLLVDDL
32
PCIE_PLLVDDL
29
PCIE_PLLVDDL
28
PCIE_TXD_P
27
PCIE_TXD_N
33
PCIE_RXD_P
34
PCIE_RXD_N
3
WAKE#
11
PREST#
31
PCIE_REFCLK_P
30
PCIE_REFCLK_N
25
CR_DATA0
24
CR_DATA1
23
CR_DATA2
22
CR_DATA3
52
CR_DATA4
53
CR_DATA5
54
CR_DATA6
55
CR_DATA7
58
VMAIN_PRSNT
6
TEST1
10
TEST2
4
LOW_PWR
19
XTALO
18
XTALI
15mil
38
RDAC
12
CLK_REQ#
BCM57785XA0KMLG_QFN68_8X8
BCM57785XA0KMLG_QFN68_8X8
R317
R317
1 2
4.7K_0402_5%
4.7K_0402_5%
R319
R319
@
@
4.7K_0402_5%
4.7K_0402_5%
1 2
GND PLANE
69
@
@
1 2
C320 0.1U_0402_16V4Z
C320 0.1U_0402_16V4Z
U26
@U26
@ 8 7 6 5
AT24C04BN-SH-T_SO8
AT24C04BN-SH-T_SO8
SA00004QG00
SA00004QG00
1
A0
VCC
2
A1
WP
3
A2
SCL
4
GND
SDA
BIASVDDH
XTALVDDH
AVDDH AVDDH
TRD3_N TRD3_P
TRD2_N TRD2_P
TRD1_N TRD1_P
TRD0_N TRD0_P
SO_LINKLED#
SCLK_SPD1000LED#
SPD100LED#_SERIALDO
TRAFFICLED#_SERIALDI
GPIO1_LR_OUT
GPIO_0
SI_EEDATA
CS#_EECLK
SD_DETECT/XD_WE#
SR_DISABLE/XD_DETECT#
MS_INS#/XD_CE#
GPIO2_MEDIA_SENSE/XD_RE#
CR_WP#/XD_WP#
CR_LED_CR_BUS_PWR/XD_ALE
CR_CLK/XD_RY_BY#
CR_CMD_XD_CLE
SR_LX
SR_VFB
SR_VDDP
SR_VDD
C
37
17
48 42
49 50
47 46
43 44
41 40
65
66
2
67
8
5
64 63
1
68
59
9
57
60
21
26
40mil
16
13
40mil
15 14
PLACE NEXT P14
+LAN_BIASVDDH
+LAN_XTALVDDH
+LAN_AVDDH
LAN_MIDI3­LAN_MIDI3+
LAN_MIDI2­LAN_MIDI2+
LAN_MIDI1­LAN_MIDI1+
LAN_MIDI0­LAN_MIDI0+
+VDDO_CR_R
SPROM_DOUT SPROM_CLK
CR_WP#_R
CR_CLK_R
CR_CMD_R
+1.2V_LAN_OUT
4.7UH_PG031B-4R7MS_1.1A_20%
4.7UH_PG031B-4R7MS_1.1A_20%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C312
C312
2
LAN_MIDI3- <26> LAN_MIDI3+ <26>
LAN_MIDI2- <26> LAN_MIDI2+ <26>
LAN_MIDI1- <26> LAN_MIDI1+ <26>
LAN_MIDI0- <26> LAN_MIDI0+ <26>
LAN_LINK# <26>
12
R286 0_0402_5%R286 0_0402_5%
1 2
R287 0_0603_5%R287 0_0603_5%
CR_DETECT <26,28>
<EMI>
<EMI>
1 2
1 2
L24
L24
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
12
C310
C310
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
C313
C313
2
1
2
R303 0_0402_5%R303 0_0402_5%
R306 0_0402_5%R306 0_0402_5%
R307 33_0402_5%
R307 33_0402_5%
R308 33_0402_5%R308 33_0402_5%
40mil
CR_WP#
CR_PWR_ENCR_PWR_EN_R
CR_CLK
CR_CMD
1
2
C311
C311 10U_0603_6.3V6M
10U_0603_6.3V6M
R02 Modify
+VDDO_CR
+1.2V_LAN
+3V_LAN
D
LAN_ACTIVITY# <26>
CR_WP# <26>
CR_PWR_EN <26>
CR_CMD <26>
+3V_LAN
C297
C297
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
20mil
+LAN_XTALVDDH
20mil
+LAN_BIASVDDH
20mil
+LAN_AVDDH
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CR_CLK <26>
EMI Request...2010/07/27
20mil
+LAN_PCIEPLLVDD
1
C314
C314
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
20mil
+LAN_GPHYPLLVDDL
C318
C318
20mil
+LAN_AVDDL
C321
C321
2
1
2
1
2
60mil
1
1
C298
C298
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L21
L21
1 2
1
BLM18AG601SN1D_2P
C302
C302
C304
C304
1
C306
C306
C307
C307
2
SM010005500 500ma 600ohm@100mhz DCR 0.38
L25
L25
1 2
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
1
C315
C315
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
L26
L26
1 2
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
1
C319
C319
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
L27
L27
1 2
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
1
C322
C322
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
BLM18AG601SN1D_2P
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
L22
L22
1
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
L23
L23
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
For EMI request
<EMI>
<EMI>
1 2
1 2
C309
C309
1 2
10P_0402_50V8J
10P_0402_50V8J
+1.2V_LAN
+1.2V_LAN
+1.2V_LAN
E
+3V_LAN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
LAN Boardcom 57785
LAN Boardcom 57785
LAN Boardcom 57785
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
25 45Friday, August 10, 2012
25 45Friday, August 10, 2012
25 45Friday, August 10, 2012
0.1
0.1
0.1
A
BOTHHAND: S X'FORM_ GST5009-D LF LAN, SP050006B00 TIMAG:S X'FORM_ IH-160 LAN , SP050006F00
LAN_MIDI3+<25> LAN_MIDI3-<25>
LAN_MIDI2-<25> LAN_MIDI2+<25>
1 1
LAN_MIDI1+<25> LAN_MIDI1-<25>
LAN_MIDI0-<25> LAN_MIDI0+<25>
LAN_MIDI3+ LAN_MIDI3-
LAN_MIDI2­LAN_MIDI2+
LAN_MIDI1+ LAN_MIDI1-
LAN_MIDI0­LAN_MIDI0+
1
C325
C325
C326
C326
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C327
C327
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
TL1
TL1
1
TCT1
MCT1
2
TD1+
MX1+
3
TD1-
MX1-
4
TCT2
MCT2
5
TD2+
MX2+
6
TD2-
MX2-
7
TCT3
MCT3
8
TD3+
MX3+
9
TD3-
MX3-
10
TCT4
MCT4
11
TD4+
MX4+
12
TD4-
MX4-
350UH_IH-160
350UH_IH-160
SP050006F00
SP050006F00
1
C328
C328
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Place close to TCT pin
MCT3 MCT2 MCT1 MCT0
2 2
3/1 Add (ESD request)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C494
C494
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
C495
C495
@
@
2
1
C496
C496
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
B
24
MCT3
23 22
21
MCT2
20 19
18
MCT1
17 16
15
MCT0
14 13
12
12
R322
R322
R321
R321
75_0603_1%
75_0603_1%
RJ45_MIDI3+
RJ45_MIDI3-
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI1-
RJ45_MIDI0-
RJ45_MIDI0+
L30ESDL5V0C3-2
12
75_0603_1%
75_0603_1%
RJ45_GND
R324
R324
75_0603_1%
75_0603_1%
L30ESDL5V0C3-2
75_0603_1%
75_0603_1%
12
R323
R323
D12
D12
@
@
LAN_ACTIVITY#
LAN_LINK#
2
3
1
11/30 Modify(EMI Request)
@
@
@
@
JP1
JP1
JP2
LANGND
JP2
1 2
1 2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
1 2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
@
@
@
@
JP4
JP4
JP3
JP3
1 2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4/16 ESD reuqest
C505
C505
C
LAN Connector
D
E
C474,C475 and D14 ME interefer,do not pop!!
68P_0402_50V8J
68P_0402_50V8J
12
@
@
C330
C330
LAN_ACTIVITY#<25>
+3V_LAN
+3V_LAN
@
@
1
2
@
@
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z C506
C506
2
LAN_LINK#<25>
R320 1K_0402_5%R320 1K_040 2_5%
RJ45_GND LANGND
40mil
12
R325 1K_0402_5%R325 1 K_0402_5%
12
1
J3
J3
1
JUMP_43X39
JUMP_43X39
@
@
2
2
1
2
C329
C329
220P_0402_50V7K
220P_0402_50V7K
LAN_LINK#
1
C323
C323
2
220P_0402_50V7K
220P_0402_50V7K
C331 10P_0402_50V8JC331 10P_0402_50V8J
LAN_ACTIVITY#
C324 68P_0402_50V8J
C324 68P_0402_50V8J
@
@
12
R04 modify for EMI
1 2
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI1-
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
EMI Request
1
C332
2
@ C332
@
100P_0402_50V8J
100P_0402_50V8J
L28
L28
1 2
100UH_SSC0301101MCF_0.18A_20%
100UH_SSC0301101MCF_0.18A_20%
JRJ1
JRJ1
10
LED-(Y)
9
LED+(Y)
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
12
LED-(G)
11
LED+(G)
SANTA_130452-A
SANTA_130452-A
CONN@
CONN@
DC234005S00
12/21 Modify
R03 Modify
RJ45_GND
D13
D13
L30ESDL5V0C3-2
L30ESDL5V0C3-2
14
SHLD2
13
SHLD1
40mil
2
3
1
R04 modify
Card Reader Connector
JREAD1
JREAD1
3
CMD
4
VSS
5
VDD
6
CLK
7
VSS
8
DAT0
9
DAT1
1
DAT2
2
CD/DAT3
10
WP SW
11
CD SW
12
GND SW
13
GND SW
T-SOL_156-1000302601_11P
T-SOL_156-1000302601_11P
CONN@
CONN@
SP07000TF00
12/23 Modify(2in1 CARD READER) (
@
@
B
R04 modify
+5VS +5VS +5VALW
1
C334
C334
C333
C333
2
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
GND GND
2.85mm)
1
2
14 15
1
C335
C335
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VALW
12
R327
R327
300_0603_5%
300_0603_5%
13
D
D
CR_PWR_EN<25>
2/25 Change symbol of Q16 from SB000009080 to SB00000EN00
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2
G
G
Q16
Q16
S
2N7002K_SOT23-3
2N7002K_SOT23-3
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
S
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
C339
C339
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Deciphered Date
Deciphered Date
Deciphered Date
12
CR_CMD
CR_CLK_CONN
CR_DATA0 CR_DATA1 CR_DATA2 CR_DATA3
CR_WP#
12
R591 0_0402_5%R591 0_0402_5%
+SDPWR_MMC PWR
3 3
<EMI>
<EMI>
4 4
3/1 Add (EMI request)
CR_CLK<25>
C489
C489
1 2
@
@
10P_0402_50V8J
10P_0402_50V8J
R547
R547
33_0402_5%
33_0402_5%
@<EMI>
@<EMI>
A
CR_CMD<25>
R570 0_0402_5%R570 0_0402_5%
CR_DATA0<25> CR_DATA1<25> CR_DATA2<25> CR_DATA3<25>
CR_WP#< 25> CR_DETECT<25,28>
12
CR_CLK_CONNCR_CLK_C
U27
U27
1 2
4
D
GND VIN VIN3VOUT EN
+VDDO_CR
1 2
0_0805_5%
0_0805_5%
8
VOUT
7
VOUT
6 5
FLG
EPAD
AP2301MPG-13_MSOP8
AP2301MPG-13_MSOP8
9
@
@
R326
R326
+SDPWR_MMC PWR
40mil
1
C336
C336
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1
C338
C338
C337
C337
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Card Reader
Card Reader
Card Reader
Custom
Custom
Custom
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
0.1
0.1
26 45Friday, August 10, 2012
26 45Friday, August 10, 2012
26 45Friday, August 10, 2012
0.1
A
B
C
D
E
MINI CARD(Wireless LAN)
+3VS_WLAN
1 2
R333 4.7K_0402_5%R333 4.7K_0402_5%
1 2
R545 4.7K_0402_5%
R545 4.7K_0402_5%
1 1
2 2
E51TXD_P80DATA< 29> E51RXD_P80CLK<29>
AC@
AC@
PCH_PCIE_WAKE#_R
DISASSOCIATE#
WLAN_PME#_EC<29>
PCH_PCIE_WAKE#<15,25>
MINI1_CLKREQ#<14>
CLK_PCIE_MINI1#<14> CLK_PCIE_MINI1<14>
PCIE_PRX_DTX_N2<1 4> PCIE_PRX_DTX_P2<14>
PCIE_PTX_C_DRX_N2<14> PCIE_PTX_C_DRX_P2<14>
R342
R342
100K_0402_5%
100K_0402_5%
+3VS_WLAN
1 2
R349 4.7K_0402_5%@R349 4.7K_0402_5%@
WLAN_PME#<29>
EC_PME#<25,29>
+3VS_WLAN
R340 0_0402_5%R340 0_0402_5% R341 0_0402_5%R341 0_0402_5%
12
12
R541
R541 1K_0402_5%
1K_0402_5%
BT@
BT@
BT_CTRL
E51RXD_P80CLK_R
1 2 1 2
60mil
J4
@J4
@
2
112
JUMP_43X79
JUMP_43X79
+3VALW
J5
@J5
@
2
112
JUMP_43X79
JUMP_43X79
1 2
PCH_PCIE_WAKE#_R
CRM@
CRM@
R350 0_0402_5%
R350 0_0402_5%
1 2
MIM@
MIM@
R330 0_0402_5%
R330 0_0402_5%
1 2
@
@
R331 0_0402_5%
R331 0_0402_5%
1 2
@
@
R332 0_0402_5%
R332 0_0402_5%
D31
D31
12
RB751V-40_SOD323-2
RB751V-40_SOD323-2
E51TXD_P80DATA_R E51RXD_P80CLK_R
1
C341
C341
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
JMINI1
JMINI1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
GND2
PLAST_SSM010-52-B-K
PLAST_SSM010-52-B-K
CONN@
CONN@
SP07000QC00
11/29 Modify
+1.5VS+3VS_WLAN+3VS +3VS_WLAN
1
2
C342
C342
1
C343
C343
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C344
C344
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
1
C345
C345
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C346
C346
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
WLAN&BT Combo module circuits
BT on module Enable
BT on module Disable
Mini Card Power Rating
BT_CTRL
3VSWLAN_GATE3VSW LAN_GATE_R
BT_ON#
BT_ON#<29>
Q17
Q17 AO3419L_SOT23-3
AO3419L_SOT23-3
3
AC@
AC@
2
12
2N7002K_SOT23-3
2N7002K_SOT23-3
+1.5VS +3VS_WLAN
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
WL_OFF# PLT_RST_BUF#
MINI1_SMBCLK MINI1_SMBDATA
DISASSOCIATE#
WLAN_ON<29>
USB20_N8 <17> USB20_P8 <17>
+3VALW
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
R337 0_0402_5%@R337 0_0402_5%@
1 2
R338 0_0402_5%@R338 0_0402_5%@
AC@
AC@
1 2
R334 100K_0402_5%
R334 100K_0402_5%
R339
R339
1K_0402_5%
1K_0402_5%
1 2
AC@
AC@
C348
C348
AC@
AC@
12
WL_OFF# <29>
PLT_RST_BUF# <17,25,29,30>
PCH_SMBCLK <14,30> PCH_SMBDATA <14,30>
DISASSOCIATE# <29>
AC@
AC@
1 2
R335 1K_0402_5%
R335 1K_0402_5%
13
D
D
2
Q18
Q18
G
2N7002K_SOT23-3
G
2N7002K_SOT23-3
AC@
AC@
S
S
+3VS_WLAN+3VALW
1
DGS
DGS
40mil(1A)
C347
C347
0.1U_0402_16V7K
0.1U_0402_16V7K
AC@
AC@
Q19
Q19
H
L
D
D
S
S
2
G
G
R336
R336 470_0603_5%
470_0603_5%
@
@
1 2
3VSWLAN_R
13
2
G
G
@
@
L
H
BT_CTRL
13
D
D
Q38
Q38 2N7002K_SOT23-3
2N7002K_SOT23-3
BT@
BT@
S
S
3VSWLAN_GATE
3 3
+3VALW_EC
C504
C504
0.1U_0603_25V7K
0.1U_0603_25V7K
CRM@
CRM@
2
1
U41
U41
KSO14_SWITCHED<30>
KSI2_SWITCHED<30>
4 4
3
9
VCC
1Z
2Z
GND
PAD
6
11
2
1Y1
5
1Y0
4
1S
10
2Y1
7
F3_BTN
2Y0
8
ON/OFF
2S
CRM@
CRM@
NX3L4684TK_MO-229-10_3X3
NX3L4684TK_MO-229-10_3X3
KSO14 <29,30>
ON/OFF <29,30>
KSI2 <28,29,30>
ON/OFF
F3_BTN
U40
U40
2
3
4
PWR_BT N#
BTN_A
BTN_B
1
C503
C503
0.1U_0603_25V7K
0.1U_0603_25V7K
1
VDD
EC_RST#
EC_ENTERING_RW
EC_IN_RW
GND
PAD
SLG4N059VTR_TDFN8_2X2CRM@
SLG4N059VTR_TDFN8_2X2CRM@
5
9
SA00005HG00
CRM@
CRM@
8
6
7
+3VALW_EC
1
2
PCH_GPIO68_R
1 2
R589
R589
R577 0_0402_5%
R577 0_0402_5%
0_0402_5%CRM@
0_0402_5%CRM@
EC_ENTERING_RW <29>
CRM@
CRM@
1 2
EC_RST# <28,29>
PCH_GPIO68 <18>
5/17 update SA00005HN00
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
MINI CARD (WLAN)/Holeless RST
MINI CARD (WLAN)/Holeless RST
MINI CARD (WLAN)/Holeless RST
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
27 4 5Friday, August 10, 2012
27 4 5Friday, August 10, 2012
27 4 5Friday, August 10, 2012
0.1
0.1
0.1
A
Debug Board
JDB1
JDB1
1
1
3
1 1
2 2
PCH_SPI_C S0#_1_R<13> PCH_SPI_M ISO_1_R<13> SPI_HOLD1 #_R < 13>
EC_SPICLK<29> EC_SPICS# /FSEL#_R < 29>
EC_SO_S PI_SI_R1<29> EC_SI_SPI_SO _R1 <29>
CR_DETE CT<25,26 >
EC UART_ TXD<29>
HDMI_HPD<23> SPI_WP 1#_R <13,18 ,29,30>
XDP_DBR ESET#<15,5> KSI0 <29,30 >
R593 0 _0402_5%DEG @R593 0_040 2_5%DEG@
DEV_MOD E<18 ,29> LID_SW#_R <30>
KSI2<27,29 ,30> KSO3 <29,30>
KSO4<29,30>
R592
R592
1 2
+EC_SPI
1 2
0_0402_ 5%DEG@
0_0402_ 5%DEG@
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
G151G2
E&T_100 1K-F50C-05R
E&T_100 1K-F50C-05R
CONN@
CONN@
B
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
1 2
R590 0 _0402_5%DEG @R590 0_040 2_5%DEG@
+3VALW _EC
PCH_SPI_C LK_1_R <13> PCH_SPI_M OSI_1_R <13>
+BIOS_SPI
EC_RST# < 27,29>
ON/OFFBT N# <3 0>
REC_MOD E_L <29> EC UART_ RXD <29 >
KSO9 <29,30>
C
3/29 Add (EMI request)
USB20_N 3<1 7>
USB20_P 3<17>
USB20_P 2<17>
USB20_N 2<1 7>
R571
R571 0_0402_ 5%
0_0402_ 5%
1 2
@
@
2
2
3
3
WCM-2 012-900T_4P
WCM-2 012-900T_4P
@
@
1 2
R574
R574
0_0402_ 5%
0_0402_ 5%
R572
R572 0_0402_ 5%
0_0402_ 5%
1 2
@
@
2
2
3
3
WCM-2 012-900T_4P
WCM-2 012-900T_4P
@
@
1 2
R573
R573
0_0402_ 5%
0_0402_ 5%
D
SM070000K00
L32
L32
1
USB20_N 3_2
1
4
USB20_P 3_2
4
L33
L33
1
USB20_P 2_2
1
4
USB20_N 2_2
4
SM070000K00
3/1 Add (ESD request)
C497
C497
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
+3VALW
E
IO Board
JIO1
JIO1
22
G2
21
G1
USB20_P 3_2
+5VALW
+5VS
USB20_N 3_2 USB20_P 2_2 USB20_N 2_2
HP_RIGHT HP_LEFT COM_MIC HP_PLUG # INT_MIC_R
USB2.0 USB2.0
USB_OC1 #<17>
USB_ON#<29>
HP_RIGHT<31> HP_LEFT<31> COM_MIC<31>
HP_PLUG #<31>
INT_MIC_R<3 1>
1
2
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CONN@
CONN@
ACES_85 201-2005N
ACES_85 201-2005N
SP010011U00
USB3.0
3/29 Add (ESD request)
For ESD request
D15
D15
U3RXDN2
3 3
U3RXDP2
U3TXDN2
1
1
1
2
2
2
4
4
4
5
3
3
3
8
8
L05ESDL 5V0NA-4 SLP251 0P8
L05ESDL 5V0NA-4 SLP251 0P8
SM070000S80 WCM2012F2SF-670T04 67ohm
PCH_USB 3_TX2_P<17>
PCH_USB 3_TX2_N<17>
SM070000S80 WCM2012F2SF-670T04 67ohm
4 4
PCH_USB 3_RX2_P<1 7>
PCH_USB 3_RX2_N<17>
C349 0.1U_0402 _16V7K
C349 0.1U_0402 _16V7K
C350 0.1U_0402 _16V7K
C350 0.1U_0402 _16V7K
A
9
U3RXDN2
8
U3RXDP2
7
U3TXDN2
6
U3TXDP2U3TXDP2
@
@
R343 0_040 2_5%@R34 3 0_04 02_5%@
PCH_USB 3_TX2_N_C U3TXDN2
R345 0_040 2_5%@R34 5 0_04 02_5%@
R346 0_040 2_5%@R34 6 0_04 02_5%@
PCH_USB 3_RX2_P U3RXDP2
PCH_USB 3_RX2_N
R347 0_040 2_5%@R34 7 0_04 02_5%@
USB3@
USB3@
USB3@
USB3@
10
10
9
9
7
7
65
65
12
12
+5VALW
1
C501
C501
0.1U_040 2_16V4Z@
0.1U_040 2_16V4Z@
2
1 2
L29
3
2
WCM2 012F2SF-670T0 4_0805
WCM2 012F2SF-670T0 4_0805
L30
3
2
WCM2 012F2SF-670T0 4_0805
WCM2 012F2SF-670T0 4_0805
3
2
1 2
1 2
3
2
1 2
USB3@L29
USB3@
USB3@L30
USB3@
4
4
1
1
4
4
1
1
0.01U_04 02_16V7K
0.01U_04 02_16V7K
U3TXDP2PCH_USB 3_TX2_P_C
U3RXDN2
B
+5VALW + USB3_VCCA
C351
C351
1 2
USB_ON#
USB20_N 1<1 7>
USB20_P 1<17>
U28
U28
1
GND
VOUT
2
VOUT
VIN VIN3VOUT
4
FLG
EN
G547I2P81 U_MSOP8
G547I2P81 U_MSOP8
R348 0_040 2_5%
R348 0_040 2_5%
USB20_P 1
SM070001310 WCM2012F2SF-900T04 90ohm
R351 0_040 2_5%
R351 0_040 2_5%
W=60mils
8 7 6 5
1
C352
C352
0.1U_040 2_16V4Z@
0.1U_040 2_16V4Z@
2
1 2
@
@
L31
L31
3
3
2
2
WCM-2 012-900T_0805
WCM-2 012-900T_0805
1 2
@
@
4
4
1
1
R344
R344 0_0402_ 5%
0_0402_ 5%
1 2
U2DN1_LUSB20_N 1
U2DP1_L
USB_OC0 # <17>
W=100mils
C353
C353
150U 6.3V _M
150U 6.3V _M
For USB2.0 ESD request
D16
D16
1
I/O1
2
U2DP1_L U2DN1_L
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
REF1
I/O23I/O3
AZC099-0 4S_SOT23
AZC099-0 4S_SOT23
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
C
I/O4
REF2
6
5
+USB3_V CCA
4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
+
+
2
U2DN1_L U2DP1_L
U3RXDN2 U3RXDP2
U3TXDN2 U3TXDP2
D
+USB3_V CCA
C354
470P_0402_50V7K
C354
470P_0402_50V7K
2
1
USB3.0 Conn.
JUSB1
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7
GND-DRAIN
8
StdA-SSTX-
9
StdA-SSTX+
LOTES_A USB0015-P001A
LOTES_A USB0015-P001A
CONN@
CONN@
DC23300AI00
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
10
GND
11
GND
12
GND
13
GND
IO Board & USB3.0
IO Board & USB3.0
IO Board & USB3.0
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
28 45Friday, August 10, 201 2
28 45Friday, August 10, 201 2
28 45Friday, August 10, 201 2
E
0.1
0.1
0.1
A
C358
C358
22P_0402_50V8J
22P_0402_50V8J
12
@
@
+3VALW_EC
1 1
+3VALW_EC
R372 2.2K_0402_5%R372 2.2K_0402_5%
R368 2.2K_0402_5%R368 2.2K_0402_5%
+3VALW
R369 100K_0402_5%@R369 100K _0402_5%@
+3VS
R373 2.2K_0402_5%R373 2.2K_0402_5%
R375 2.2K_0402_5%R375 2.2K_0402_5%
R376 10K_0402_5%R376 10K_0402_5%
C368 0.01U_0402_16V 7K
2 2
C368 0.01U_0402_16V 7K
EC UART_TXD<28>
EC UART_RXD<28>
R361 33_0402_5%
R361 33_0402_5%
R365 47K_0402_5%R365 47K_0402_5%
C366 0.1U_0402_16V4ZC 366 0.1U_0402_16V4Z
EC_RST#<27,28>
1 2
1 2
1 2
1 2
1 2
1 2
1 2
@
@
32.768KHZ_12.5PF_9H03200019
32.768KHZ_12.5PF_9H03200019
EC_XCLK1 EC_XC LK0
1
C370
C370 15P_0402_50V8J@
15P_0402_50V8J@
2
@
@
12
12
PU at LAN side
ESD request
X1
X1
12
@
@
15P_0402_50V8J @
15P_0402_50V8J @
1 2
R563
R563
DEG@
DEG@
1 2
R564
R564
12
DEG@
DEG@
C371
C371
CLK_PCI_LPC
EC_RST#
EC_SMB_DA1
EC_SMB_CK1
EC_PME#
EC_SMB_CK2
EC_SMB_DA2
EC_SCI#
PLT_RST_BUF#
1
2
E51TXD_P80DATA
0_0402_5%
0_0402_5%
E51RXD_P80CLK
0_0402_5%
0_0402_5%
1/11 Add "ACPRESENT" signal. (follow Q5LJ1)
3 3
+3VALW
R389
R389 100K_0402_5%
100K_0402_5%
Ra
1 2
AD_BID0
12
R392
EVT@ R392
EVT@
0_0402_5%
0_0402_5%
Rb
EC_SPOK<35>
Board ID
Analog Board ID definition, Please see page 3.
1
C374
C374
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+3VALW
1 2
R359 0_0603_5%R359 0_0603_5%
+3VLP
EC_RST#
@
@
1 2
R362 0_0603_5%
R362 0_0603_5%
GATEA20<18>
EC_KBRST#<18>
SERIRQ<13,30>
LPC_FRAME#<13,30>
LPC_AD3<13,30> LPC_AD2<13,30> LPC_AD1<13,30> LPC_AD0<13,30>
CLK_PCI_LPC<17> PLT_RST_BUF#<17,25,27,30>
EC_SCI#<18> WLAN_ON<27>
C475
C475
@
@
12
EC_KBRST#
180P_0402_50V8J
180P_0402_50V8J
12/22 Add(ESD request)
KSI[0..7]<27,28,30>
KSO[0..15]<27,28,30>
U30
U30
KB932QF-A0_LQFP128
KB932QF-A0_LQFP128
932@
932@
KSI[0..7]
KSO[0..15]
4/11 Modify
SA000055I00
EC_SMB_CK1<35,36> EC_SMB_DA1<35,36> EC_SMB_CK2<14> EC_SMB_DA2<14>
PM_SLP_S3#<15> PM_SLP_S5#<15> EC_SMI#<18> SUSWARN#<15>
SUS_PWR_DN_AC K<15>
ACPRESENT<15>
EC_SPOK EC_SPOK_R
R392
R392
8.2K_0402_5%
8.2K_0402_5%
DVT@
DVT@
1 2
R542 0_0402_5%CRM @R542 0_0402_5%CRM@
SUSCLK<15>
5/22 Add
FAN_SPEED1<32> EC_PME#<25,27> E51TXD_P80DATA< 27> E51RXD_P80CLK<27>
PWR_SUSP_LED#<30> WL_OFF#<27>
1 2
R388 0_0402_5%R388 0_040 2_5%
R390 100K_0402_5%R390 100K_0402_5%
C373 20P_0402_50V8C 373 20P_0402_50V8
SD028820180
R392
R392
18K_0402_5%
18K_0402_5%
PVT@
PVT@
SPOK<35,37>
5/22 Add
EC_DPWROK
100K_0402_5%
100K_0402_5%
@
@
+3VALW
4 4
Ra
Rb
R393
R393 100K_0402_5%
100K_0402_5%
I57@
I57@
1 2
12
R394
R394 0_0402_5%
0_0402_5%
CP3@
CP3@
Project ID
Analog Board ID definition, Please see page 3.
AD_PID0
1
C377
C377
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
2
SD028180280
A
C359
0.1U_0402_16V4Z
C359
0.1U_0402_16V4Z
1
2
GATEA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
CLK_PCI_LPC PLT_RST_BUF# EC_RST# EC_SCI# WLAN_ON
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
PM_SLP_S3# PM_SLP_S5# EC_SMI# SUSWARN#
EC_DPWROK
FAN_SPEED1 EC_PME# E51TXD_P80DATA E51RXD_P80CLK 9012_PCH_PWROK PWR_SUSP_LED#
WL_OFF#
12
1 2
12
R395
R395
B
C360
0.1U_0402_16V4Z
C360
0.1U_0402_16V4Z
1
2
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_XCLK1 EC_XCLK0
+3VALW+3VALW
5
U32
U32
2
B
1
A
@
@
3
1 2
R544 0_0402_5%DS3@R544 0_0402_5%DS3@
B
+3VALW_EC
C361
0.1U_0402_16V4Z
C361
0.1U_0402_16V4Z
C362
0.1U_0402_16V4Z
C362
0.1U_0402_16V4Z
1000P_0402_50V7K
1
2
122 123
P
Y
G
MC74VHC1G08DFT2G_SC70-5
MC74VHC1G08DFT2G_SC70-5
1000P_0402_50V7K
1
2
2
1
U30
U30
1
GATEA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ
4
LPC_FRAME#
5
LPC_AD3
7
LPC_AD2
8
LPC_AD1
10
LPC & MISC
LPC & MISC
LPC_AD0
12
CLK_PCI_EC
13
PCIRST#/GPIO05
37
EC_RST#
20
EC_SCII#/GPIO0E
38
GPIO1D
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
77
EC_SMB_CK1/GPIO44
78
EC_SMB_DA1/GPIO45
79
EC_SMB_CK2/GPIO46
80
EC_SMB_DA2/GPIO47
6
PM_SLP_S3#/GPIO04
14
PM_SLP_S5#/GPIO07
15
EC_SMI#/GPIO08
16
GPIO0A
17
GPIO0B
18
GPIO0C
19
GPIO0D
25
EC_INVT_PW M/GPIO11
28
FAN_SPEED1/GPIO14
29
EC_PME#/GPIO15
30
EC_TX/GPIO16
31
EC_RX/GPIO17
32
PCH_PW ROK/GPIO18
34
SUSP_LED#/GPIO19
36
NUM_LED#/GPIO1A
XCLKI/GPIO5D XCLKO/GPIO5E
9012@
9012@
1
C376
C376
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
2
4
L34
L34
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
1 2
C364
1000P_0402_50V7K
C364
1000P_0402_50V7K
C363
C363
2
1
9
22
33
96
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
PWM Output
PWM Output
DA Output
DA Output
PS2 Interface
PS2 Interface
Int. K/B
Int. K/B Matrix
Matrix
SPI Device Interface
SPI Device Interface
SPI Flash ROM
SPI Flash ROM
SM Bus
SM Bus
GPIO
GPIO
GND/GND
GND/GND
11
24
35
EC_SI_SPI_SO_R1<28>
+EC_SPI
PCH_DPWROK <15>
+EC_VCCA
+EC_VCCA
+EC_VCC
67
111
125
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
AD Input
AD Input
CPU1.5V_S3_GATE/G PXIOA00
GPIO
GPIO
GND/GND
GND/GND
GND0
94
113
EC_SPICS#/FSEL#_R<28>
BEEP#/GPIO10
EC_VDD/AVCC
ACOFF/GPIO13
BATT_TEMP/GPIO38
ADP_I/GPIO3A
DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
CHGVADJ/GPIO3F
EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F
WOL_EN /GPXIOA01
HDA_SDO/GPXIOA02
VCIN0_PH/GPXIOD00
SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A
ENBKL/GPIO40
PECI_KB930/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO 52
CAPS_LED#/GPIO53
PWR_LED #/GPIO54
BATT_LOW _LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59
EC_RSMRST#/GPXIO A03 EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA 05
H_PROCHOT#_EC/G PXIOA06
VCOUT0_PH/GPXIOA0 7
GPO
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APW ROK/GPXIOA10
SA_PGOOD/GPXIOA 11
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
GPI
GPI
LID_SW#/G PXIOD04
SUSP#/GPXIOD05
PECI_KB9012/GPXIOD07
AGND/AGND
KB9012QF-A3_LQFP128_14X14
KB9012QF-A3_LQFP128_14X14
69
20mil
ECAGND
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
1 2
R588 0_0402_5%DEG@R588 0_0402_5%DEG@
1 2
R397 4.7K_0402_5%@R397 4.7K_0402_5%@
SPI_WP1#_R
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
1
C365
C365
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
ECAGND
IMON/GPIO43
IREF/GPIO3E
SPIDI/GPIO5B
GPXIOD06
GPIO0F
GPIO12
GPIO39
GPIO3B
GPIO42
V18R
L35
L35
EC_SPICS#/FSEL#_R EC_SI_SPI_SO_R
R584
R584
1 2
1K_0402_5%
1K_0402_5%
932@
932@
ECAGND <35>
21 23 26 27
63 64 65 66 75 76
68 70 71 72
83 84 85 86 87 88
97 98 99 109
119 120 126 128
73 74 89 90 91 92 93 95 121 127
100 101 102 103 104 105 106 107 108
110 112 114 115 116 117
SPI_WP1#_R_1
118
124
12
KB932&9012 Co-Layout Item
Issued Date
Issued Date
Issued Date
C
D
1/10 Add
SMB_ALERT#<14> SMB_ALERT#_R <30>
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
DISASSOCIATE# BEEP#
BT_ON#
BATT_TEMP WLAN_PME#_EC ADP_I AD_BID0 AD_PID0 ENBKL
SUSACK# EN_DFAN1 WLAN_PME# LAN_PWR_EN#
EC_MUTE# USB_ON# SLP_SUS# EAPD TP_CLK TP_DATA
EC_ENTERING_RW
EC_RST_GATE HDA_SDO VCIN0_PH_R
EC_SI_SPI_SO EC_SO_SPI_SI EC_SPICLK_R EC_SPICS#/FSEL#
REC_MODE_L_R 930_PECI FSTCHG BATT_AMB_LED# DEV_MODE_R PWR_LED# BATT_BLUE_LED# SYSON VR_ON PM_SLP_S4#
PCH_RSMRST# EC_LID_OUT# VCIN1_PROCHOT_R H_PROCHOT#_EC GPXIOA07 BKOFF# PBTN_OUT# PCH_PWR_EN SA_PGOOD
EC_ACIN EC_ON ON/OFF LID_SW# SUSP#
9012_PECI
+V18R
1
C372
C372
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
+3VALW_EC +EC _SPI
SPI_WP#
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
12
C367 100P_0402_50V8JC367 100P_0402_50V8J
WLAN_PME#_EC <27>
HDA_SDO <13>
1 2
R146 49.9_0402_1%932@R146 49.9_0402_1%932@
1 2
R147 49.9_0402_1%932@R147 49.9_0402_1%932@
1 2
R148 49.9_0402_1%932@R148 49.9_0402_1%932@
1 2
R143 49.9_0402_1%
R143 49.9_0402_1%
1 2
R562 0_0402_5%
R562 0_0402_5%
CRM@
CRM@
1 2
R565 0_0402_5%@R565 0_0402_5%@
1 2
0_0402_5%@
0_0402_5%@
R585
R585
932@
932@
12
D20
D20
RB751V-40_SOD323-2
RB751V-40_SOD323-2
U31
U31
1
/CS
2
DO_IO1
3
/WP
4
DIO_IO0
GND
W25X20BVSNIG_SO8
W25X20BVSNIG_SO8
SA00003GM10
SA00003GM10 932@
932@
+3VS
2
6 1
Q20A
Q20A
DISASSOCIATE# <27> BEEP# <31>
BT_ON# <27>
ENBKL <16>
SUSACK# <15> EN_DFAN1 <32> WLAN_PME# <27 > LAN_PWR_EN# <25>
EC_MUTE# <31> USB_ON# <28> SLP_SUS# <15>
EAPD <31> TP_CLK <30> TP_DATA <30>
EC_ENTERING_RW <27>
EC_RST_GATE <6>
932@
932@
FSTCHG <36>
BATT_AMB_LED# <30>
BATT_BLUE_LED# < 30>
SYSON <33,38>
VR_ON <41>
PM_SLP_S4# <15>
PCH_RSMRST# <15>
EC_LID_OUT# <18>
BKOFF# <22>
PBTN_OUT# <15>
PCH_PWR_EN <33>
SA_PGOOD <39>
EC_ON <30,37>
ON/OFF <27,30>
LID_SW# <30>
VCC
/HOLD
CLK
KB932 use 256KB ROM
KB9012 Embedded 128KB ROM
Compal Secret Data
Compal Secret Data
Compal Secret Data
ECAGND
BATT_TEMP <35>
ADP_I <35,36>
EC_SPICS#/FSEL#_R
SUSP# <33,36,38,39,40> SPI_WP1#_R <13,18,28,30>
KSO1
KSO2
+EC_SPI
8 7
SPI_HOLD#
6
EC_SPICLK
5
EC_SO_SPI_SI_R
Deciphered Date
Deciphered Date
Deciphered Date
EC_SI_SPI_SO_R EC_SO_SPI_SI_R
EC_SPICLK
REC_MODE_L <28>
DEV_MODE <18,28> PWR_LED# <30>
ENBKL
R399 47K_0402_5%932@R399 47K_0402_5%932@
R398 47K_0402_5%932@R398 47K_0402_5%932@
932@
932@
1 2
C378
C378
R396 4.7K_0402_5%932@R396 4.7K_0402_5%932@
1 2
11/15 Power modify
+3VALW_EC
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0_0402_5% DEG@
0_0402_5% DEG@
D
R524
R524
10K_0402_5%
10K_0402_5%
1 2
1 2
LID_SW#
TP_CLK
TP_DATA
EC_MUTE#
EC_ENTERING_RW
VR_HOT<41> H_PROCHOT# <35,5>
H_PROCHOT#_EC< 35>
Latest design guide suggest change to 74LVC1G06.
EC_ACIN
C369 100P_0402_ 50V8JC369 100P_0402_50V8J
KB932&9012 Co-Layout Item
EC_SPICLK <28>
100K_0402_5%
100K_0402_5%
12
R385
R385
@
@
12
12
R600
R600
+EC_VCC
Pin 111 is a power source for HW operation of KB9012. So, power plan will be different between KB930 and KB9012.
930_PECI
9012_PECI
Pin74(KB932),Pin118(KB9012) are with different PECI pin location, so HW must co-layout for it. Please make sure which EC pin will be connected to PECI circuit.
9012_PCH_PWROK
GPXIOA07
12
R386
R386
10K_0402_5%
10K_0402_5%
@
@
+3VALW_EC
EC_SO_SPI_SI_R1 <28>
R378 0_0402_5%CRM@R378 0_0402_5%CRM@
R379 0_0402_5%MIM@R379 0_0402_5%MIM@
R380 43_0402_1%
R380 43_0402_1%
R381 43_0402_1%
R381 43_0402_1%
R382 0_0402_5%
R382 0_0402_5%
R383 0_0402_5%
R383 0_0402_5%
R384 0_0402_5%
R384 0_0402_5%
Pin104 This co-layouted circuit is for power fail function of KB932 and KB9012.At KB932, PCH_PWROK will be connected to pin 104. At KB9012,PCH_PWROK will be connected to pin 32, and VCOUT0_PH will be connected to pin 104.
VCIN0_PH_R
VCIN1_PROCHOT_R
Near EC pin for power noise.
+EC_SPI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
1 2
R360 100K_0402_5%R360 100K_0402_5%
1 2
R579 100K_0402_5%
R579 100K_0402_5%
@
@
1 2
R363 4.7K_0402_5%R 363 4.7K_0402_ 5%
1 2
R364 4.7K_0402_5%R 364 4.7K_0402_ 5%
1 2
R366 10K_0402_5%@R366 10K_0402_5%@
1 2
R578 10K_0402_5%@R578 10K_0402_5%@
R371
R371
0_0402_5%
0_0402_5%
12
12
12
12
12
12
5
2
C409
C409 100P_0402_50V8J
100P_0402_50V8J
1
<BOM Structure>
<BOM Structure>
2
C423
C423 100P_0402_50V8J
100P_0402_50V8J
1
<BOM Structure>
<BOM Structure>
E
H_PROCHOT#_EC
9012@
9012@
R374 200K_0402_5%
R374 200K_0402_5%
932@
932@
R377 200K_0402_5%
R377 200K_0402_5%
D19
D19
12
RB751V-40_SOD323-2
RB751V-40_SOD323-2
12
1 2
1 2
1 2
932@
932@
1 2
9012@
9012@
9012@
9012@
932@
932@
9012@
9012@
1 2
R387 0_0402_5%9012@R387 0_0402_5%9012@
1 2
R391 0_0402_5%9012@R391 0_0402_5%9012@
SA_PGOOD ADP_I
2
C385
C385 100P_0402_50V8J
100P_0402_50V8J
1
<BOM Structure>
<BOM Structure>
EC_SMB_DA1 EC_SMB_CK1
2
C421
C421 100P_0402_50V8J
100P_0402_50V8J
1
<BOM Structure>
<BOM Structure>
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
EC ENE-KB9012/KB932
EC ENE-KB9012/KB932
EC ENE-KB9012/KB932
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
+3VALW +3VLP
+3VS
+3VS
34
Q20B
Q20B
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
+3VLP
+3VALW
ACIN <15,33,36,37>
+3VALW
+3VLP
H_PECI <18,5>
PCH_PWROK <15>
MAINPWON <35,37>
2
1
+EC_VCC
1
2
29 4 5Friday, August 10, 2012
29 4 5Friday, August 10, 2012
29 4 5Friday, August 10, 2012
VCIN0_PH <35>
VCIN1_PROCHOT <35>
ON/OFF
C410
C410 100P_0402_50V8J
100P_0402_50V8J
@
@
C375
C375
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
0.1
0.1
0.1
A
<13,18
JKB1
JKB1
KSI0 KSI1
KSI2_SW ITCHED
KSO0 KSO1 KSO2 KSI3 KSO3 KSO4 KSO5 KSO6
1 1
KSO7 KSO8 KSI4 KSO9 KSI5 KSI6 KSO10 KSO11 KSI7 KSO12 KSO13
KSO14_S WITCHED
KSO15
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
GND1
26
GND2
ACES_85 208-24071
ACES_85 208-24071
CONN@
CONN@
SP01000RY00
KSI2_SW ITCHED
KSO14_S WITCHED
KB Conn.
1 2
1 2
KSO14_S WITCHED
KSO15
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI[0..7]
KSO[0..15]
R575
R575
MIM@
MIM@
R576
R576
MIM@
MIM@
C381 100P_ 0402_50V8JC381 100P_ 0402_50V8J
C382 100P_ 0402_50V8JC382 100P_ 0402_50V8J
C383 100P_ 0402_50V8JC383 100P_ 0402_50V8J
C384 100P_ 0402_50V8JC384 100P_ 0402_50V8J
C386 100P_ 0402_50V8JC386 100P_ 0402_50V8J
C387 100P_ 0402_50V8JC387 100P_ 0402_50V8J
C388 100P_ 0402_50V8JC388 100P_ 0402_50V8J
C389 100P_ 0402_50V8JC389 100P_ 0402_50V8J
KSI[0..7] <27,2 8,29>
KSO[0..15] <27,2 8,29>
KSI2_SW ITCHED <27>
0_0402_ 5%
0_0402_ 5%
0_0402_ 5%
0_0402_ 5%
KSO14_S WITCHED <27>
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12/30 Modify.
KSI7
KSO9
2 2
KSI3
KSO8
KSO0
KSI5
KSI6
KSI2_SW ITCHED
1 2
C390 100P_ 0402_50V8JC390 100P_ 0402_50V8J
1 2
C392 100P_ 0402_50V8JC392 100P_ 0402_50V8J
1 2
C394 100P_ 0402_50V8JC394 100P_ 0402_50V8J
1 2
C396 100P_ 0402_50V8JC396 100P_ 0402_50V8J
1 2
C400 100P_ 0402_50V8JC400 100P_ 0402_50V8J
1 2
C398 100P_ 0402_50V8JC398 100P_ 0402_50V8J
1 2
C402 100P_ 0402_50V8JC402 100P_ 0402_50V8J
1 2
100P_04 02_50V8J
100P_04 02_50V8J
C404
C404
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
ON/OFF BTN
ON/OFF<27,29 ,30>
ON/OFFBT N#<28>
5
6
G
G
G
G
3 3
2
1
SW4
SW4 EVQPLMA 15_4P
EVQPLMA 15_4P
4
3
EC_ON<2 9,37>
ON/OFFBT N#
1
BAV70W _SOT323-3
BAV70W _SOT323-3
LID_SW #_R
SSM3K70 02F_SC59-3
SSM3K70 02F_SC59-3
10K_040 2_5%
10K_040 2_5%
EC_ON
R490
R490
932@
932@
D22
D22
2
G
G
100K_04 02_5%
100K_04 02_5%
2
3
13
D
D
S
S
1 2
51ON#
2
1 2
C391 100P_ 0402_50V8JC391 100P_ 0402_50V8J
1 2
C393 100P_ 0402_50V8JC393 100P_ 0402_50V8J
1 2
C395 100P_ 0402_50V8JC395 100P_ 0402_50V8J
1 2
C397 100P_ 0402_50V8JC397 100P_ 0402_50V8J
1 2
C401 100P_ 0402_50V8JC401 100P_ 0402_50V8J
1 2
C399 100P_ 0402_50V8JC399 100P_ 0402_50V8J
1 2
C403 100P_ 0402_50V8JC403 100P_ 0402_50V8J
1 2
C405 100P_ 0402_50V8JC405 100P_ 0402_50V8J
+3VALW +3VLP
100K_04 02_5%
1 2
D
D
Q7
Q7 2N7002K _SOT23-3
2N7002K _SOT23-3
932@
932@
S
S
100K_04 02_5% R409
R409
9012@
9012@
1 2
51ON# <34 >
@
@
G
G
ON/OFF
Q22
Q22
R408
R408
932@
932@
13
For power button ESD request
D30
@D30
4 4
ON/OFFBT N#
12/22 Modify.
A
@
2
1
3
L30ESD2 4VC3-2_SOT23-3
L30ESD2 4VC3-2_SOT23-3
B
KSI2 <27,28 ,29>
KSO14 <27,29>
ON/OFF <27,29,3 0>
B
TPM
C481
@C 481
@
22P_040 2_50V8J
22P_040 2_50V8J
TP Conn.
PCH_GPIO2<1 7>
PCH_GPIO1 2<18>
TP_CLK TP_DATA
2
3
@
@
1
AZ5125-0 2S.R7G_SOT23-3
AZ5125-0 2S.R7G_SOT23-3
Power LED
D21
D21
CLKRUN#<15> PLT_RST _BUF#<17,25,27 ,29>
12
R546
@R 546
@
33_0402 _5%
33_0402 _5%
D26
CRM@D26
RB751V-4 0_SOD323-2
RB751V-4 0_SOD323-2
CRM@
SMB_ALE RT#_R< 29>
PCH_SMB CLK<14,27 > PCH_SMB DATA<14 ,27>
+3VALW
12
12
TP_DATA<29> TP_CLK<29>
100P_04 02_50V8J
100P_04 02_50V8J
C
+3VS
CLK_PCI_T PM_R_2
+VCCSUS 3_3
1 2
R599 0_0402_5 %
R599 0_0402_5 %
CRM@
CRM@
R594 0_040 2_5%@R59 4 0_04 02_5%@ R595 0_040 2_5%C RM@R5 95 0_0 402_5%CRM@ R596 0_040 2_5%C RM@R5 96 0_0 402_5%CRM@
C408
C408
CLKRUN# PLT_RST _BUF#
+3VS
1 2 1 2 1 2
1
1
C407
C407 100P_04 02_50V8J
100P_04 02_50V8J
2
2
JTPM2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
FOX_NQT 510166-LOAO-7F
FOX_NQT 510166-LOAO-7F
R597
R597
12
MIM@
MIM@
0_0402_ 5%
0_0402_ 5%
12
CRM@
CRM@
R598 0_04 02_5%
R598 0_04 02_5%
+3V_TP
CONN@JTPM 2
CONN@
+3V_TP
12
1
C406
C406
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
+3VS +3VS
12
R540
R540
BTB@
BTB@
10K_040 2_5%
10K_040 2_5%
LPC_PD#
R543
R543 10K_040 2_5%
10K_040 2_5%
JTP1
JTP1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND
10
GND
ACES_87 151-0807G
ACES_87 151-0807G
CONN@
CONN@
D
LPC_AD3 LPC_AD2
CLK_PCI_T PM_R_2
LPC_FRA ME# LPC_AD1 LPC_AD0 LPC_PD# SERIRQ
Lid
Kill SW
Switch(Hall Effect Switch)
+3VS+ 3VALW
(BLUE)
12
12
51_0402 _5%
51_0402 _5%
51_0402 _5%
R567
R567
51_0402 _5% R528
R528
@
@
21
LED1
LED1 HT-191NB 5-A168_BLUE
HT-191NB 5-A168_BLUE
LED Board
PWR_ LED#
10mil
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PWR_ LED# <29,30>
Compal Secret Data
Compal Secret Data
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
LPC_AD3 <13,29> LPC_AD2 <13,29>
LPC_FRA ME# <13,29> LPC_AD1 <13,29> LPC_AD0 <13,29>
SERIRQ <13,29>
+3VALW
LID_SW #< 29>
LID_SW #_R<28>
E
R145
R145
1 2
R566
R566
1 2
1K_0402 _1%
1K_0402 _1%
CRM@
CRM@
R553
R553
1 2
0_0402_ 5%
0_0402_ 5%
CRM@
CRM@
LID_SW #
RB751V-4 0_SOD323-2
RB751V-4 0_SOD323-2
LID_SW #_R
PWR_ LED#<29 ,30> PWR_ SUSP_LED#<29> BATT_BL UE_LED#<29> BATT_AM B_LED#<29>
CLK_PCI_T PM
10K_040 2_5%
10K_040 2_5%
CRM@
CRM@
1 2
R583
R583
0_0402_ 5%
0_0402_ 5%
R526
R526
47K_040 2_5%
47K_040 2_5%
D29
D29
12
C473
C473
10P_040 2_50V8J
10P_040 2_50V8J
PWR_LED# PWR_SUSP_ LED# BATT_BLUE_LED# BATT_AMB_LED#
0_0402_ 5%BTB @
0_0402_ 5%BTB @
R586
R586
@
@
2
0_0402_ 5%
0_0402_ 5%
12
1
2
12
3
S
S
G
G
D
D
1
R580
R580 0_0402_ 5%
0_0402_ 5%
@
@
1 2
1 2
+3VALW +3VLP
R581
R581
1 2
2
3
OUTPUT
1
+3VALW
CLK_PCI_T PM <17>
+EC_SPI
12
R587
R587 10K_040 2_5%
10K_040 2_5%
@
@
Q14
Q14 AO3419L _SOT23-3
AO3419L _SOT23-3
@
@
JP5
CONN@JP 5
CONN@
3
1
G1
4
2
G2
ACES_87 212-02G0
ACES_87 212-02G0
R582
R582 0_0402_ 5%
0_0402_ 5%
@
@
1 2
2
U39
U39
C472
C472
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
VDD
1
GND
AH180W G-7_SC59-3
AH180W G-7_SC59-3
JLED1
JLED1
1
1
2
2
3
3
4
4
5
5
G1
6
6
G2
ACES_51 524-0060N-001
ACES_51 524-0060N-001
CONN@
CONN@
7 8
SPI_WP 1#_R
SP010014M10
01/12 Change to ACES_51524-0060N-001 .
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
TP/IO Port/ KB CONN/TPM
TP/IO Port/ KB CONN/TPM
TP/IO Port/ KB CONN/TPM
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
30 45Friday, August 10, 20 12
30 45Friday, August 10, 20 12
30 45Friday, August 10, 20 12
E
0.1
0.1
0.1
A
B
C
D
E
+5VS
60mil 40mil
1
C411
C411
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
1 1
2
J6
J6
2
112
JUMP_43X39
JUMP_43X39
@
@
(output = 300 mA)
SM010014520 3000ma 220ohm@100mhz DCR 0.04
L36
L36
+VDDA
FBMA-L11-20 1209-221LMA30T_08 05
FBMA-L11-20 1209-221LMA30T_08 05
12
10U_0805_10 V4Z
10U_0805_10 V4Z
C414
C414
SM010030010 200ma 120ohm@100mhz DCR 0.2
1 2
L38
L38
+VDDA
BLM18AG121SN 1D_2P
COM_MIC<28>
BLM18AG121SN 1D_2P
INT_MIC_R
R464 1K_0402_5 %R464 1K_0 402_5%
COM_MIC
R420 1K_0402_5 %R420 1K_0 402_5%
C419
C419
10U_0805_10 V4Z
10U_0805_10 V4Z
12
INT_MIC
12
COM_MIC_R
2 2
Internal MIC
Combo MIC
External MIC
Place near codec
Internal MIC
External MIC
Place near pin28
12 12
3 3
HP_PLUG# <28>
R429 39 .2K_0402_1%R429 39 .2K_0402_1%
MIC2JD
4 4
R430 20 K_0402_1%R430 20K_0402 _1%
J7
J7 JUMP_43X39
JUMP_43X39
2
112
@
@
J9
J9 JUMP_43X39
JUMP_43X39
2
112
@
@
J11
J11 JUMP_43X39
JUMP_43X39
2
112
@
@
GNDAGND GND GNDA
A
+VDDA
4.75V
1
2
1
C422
C422
2
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
1 2
C461
C461
C462
C462
1 2
C426
C426
1 2
C425
C425
1 2
1
C427
C427
2.2U_0603_6 .3V6K
2.2U_0603_6 .3V6K
2
+MIC2_VREFO
+INTMIC_VREFO
1 2
R431 0_0402_5%R431 0_0402_5%
2
2
2
40mil
1U_0603_10V 6K
1U_0603_10V 6K
1U_0603_10V 6K
1U_0603_10V 6K
4.7U_0603_6 .3V6K
4.7U_0603_6 .3V6K
4.7U_0603_6 .3V6K
4.7U_0603_6 .3V6K
10U_0603_6. 3V6M
10U_0603_6. 3V6M
12
1 2
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
1
C415
C415
2
Place near Pin39
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
1
2
Place near Pin25, 38
12
C463
C463 1000P_0402_ 50V7K
1000P_0402_ 50V7K
Combo MIC
C431
C431
R428 20K_040 2_1%R428 20K_0402_1 %
C432 2 .2U_0603_6.3V6KC432 2.2U_0603 _6.3V6K
1 2
EAPD<29>
J8
J8 JUMP_43X39
JUMP_43X39
112
@
@
J10
J10 JUMP_43X39
JUMP_43X39
112
@
@
J12
J12 JUMP_43X39
JUMP_43X39
112
@
@
12
BEEP#< 29>
PCH_SPKR<13>
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
1
C416
C416
2
R413
R413 47K_0402_5%
47K_0402_5%
R414
R414 47K_0402_5%
47K_0402_5%
+PVDD_HDA
Place near Pin46
+AVDD_HDA
1
C424
C424
2
LINE2_C_L
LINE2_C_R
MIC2_C_L
MIC2_C_R
SENSE_AHP_PLUG# SENSE_B
20mil
38
U34
U34
14
LINE2_L
15
LINE2_R
16
MIC2_L
17
MIC2_R
23
LINE1_L
24
LINE1_R
21
MIC1_L
22
MIC1_R
35
CBN
36
CBP
29
MIC2_VREFO
10mil
30
MIC1_VREFO_R
10mil
31
MIC1_VREFO_L
10mil
28
LDD_CAP
19
JDREF
JDREF
34
CPVEE MONO_IN
CPVEE
10mil
13
SENSE A
18
SENSE B
47
EAPD
48
SPDIFO
7
DVSS
49
GND
DGND
39
AVDD125AVDD2
PVDD1
68mA 600mA
ALC271X-VB6-CG _QFN48_6X6
ALC271X-VB6-CG _QFN48_6X6
B
BEEP#_R
12
100P_0402_5 0V8J
100P_0402_5 0V8J
HD Audio Codec
20mil
PVDD2
GPIO0/DMIC_DATA
1
DVDD
35mA
SPK_OUT_L+
SPK_OUT_L-
SPK_OUT_R+
SPK_OUT_R-
HPOUT_L
HPOUT_R
SDATA_IN
SDATA_OUT
GPIO1/DMIC_CLK
MONO_OUT
46
9
DVDD_IO
SYNC
RESET#
BCLK
PCBEEP
AVSS2
VREF
AVSS1 PVSS2 PVSS1
C413
C413
PD#
1
2
1 2
+3VS_DVDD
1
C417
C417
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
2
Place near Pin1, 9
40
41
45
44
32
33
8
HDA_SDIN0_AUDIO
5
10
11
HDA_RST_AUDIO#
6
2
3
4
12
20 37
27
CODEC_VREF
10mil
26 43 42
1 2
C412 1U_0402_6.3V6KC412 1U_ 0402_6.3V6K
C412 need to close U34.12
R415
R415
4.7K_0402_5%
4.7K_0402_5%
MONO_IN
SM010030010 200ma 120ohm@100mhz DCR 0.2
10U_0603_6. 3V6M
10U_0603_6. 3V6M
1
C418
C418
2
0.1U_0402_1 6V4Z
0.1U_0402_1 6V4Z
SPKL+
SPKL-
SPKR+
SPKR-
HP_LEFT
HP_RIGHT
HDA_SDOUT_AUDIO <13>
HDA_SYNC_AUDIO <13 >
HDA_BITCLK_AUDIO <13>
1 2
@
@
R427 0_040 2_5%
R427 0_040 2_5%
C420
C420
1 2
1
2
HP_LEFT <28>
HP_RIGHT <28>
R422
R422
1 2
33_0402_5%
33_0402_5%
HDA_RST_AUDIO# <13>
@
@
C430
C430 22P_0402_50 V8J
22P_0402_50 V8J
L37
L37
1 2
BLM18AG121SN 1D_2P
BLM18AG121SN 1D_2P
For EMI
EC_MUTE# <29>
C433 0.1U_0402_1 6V4ZC4 33 0.1U_0 402_16V4Z
1 2
C434 2.2U_0603_6 .3V6KC434 2.2U_060 3_6.3V6K
1 2
1 2
C435 10U_0603_6. 3V6M
C435 10U_0603_6. 3V6M
@
@
Place next pin27
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+3VS
HDA_SDIN0 <13>
1 2
SPKR+
R411 0_0603_5 %R411 0_0 603_5% R412 0_0603_5 %R412 0_0 603_5%
1 2
SPKR-
AZ5125-02S.R 7G_SOT23-3
AZ5125-02S.R 7G_SOT23-3
1 2
SPKL+
R416 0_0603 _5%R416 0 _0603_5% R417 0_0603 _5%R417 0 _0603_5%
1 2
reseve for EMI
HDA_RST_AUDIO#
0.1U_0402_1 6V7K
0.1U_0402_1 6V7K
Compal Secret Data
Compal Secret Data
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
R424
R424
4.7K_0402_5%
4.7K_0402_5%
C429
C429
Deciphered Date
Deciphered Date
Deciphered Date
+3VS
12
@
@
1
@
@
2
D
40mil
40mil
10K_0402_5%
10K_0402_5%
220P_0402_5 0V7K
220P_0402_5 0V7K
EAPD
MIC2JD
Q23
Q23
BSS138_NL_SOT23 -3
BSS138_NL_SOT23 -3
2
3
D24
D24
1
2
3
D25
D25 AZ5125-02S.R 7G_SOT23-3
AZ5125-02S.R 7G_SOT23-3
1
+INTMIC_VREFO
12
R465
R465
15mil
INT_MIC_R
1
C464
C464
2
281@
281@
1 2
R421 0_0402_5%
R421 0_0402_5%
13
D
D
2
G
G
S
S
10U_0603_6. 3V6M
10U_0603_6. 3V6M
SPK_R+ SPK_R-
SPK_L+ SPK_L-SPKL-
R425
R425 22K_0402_5%
22K_0402_5%
MIC2JD_R
1 2
1
C428
C428
2
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
Date: Sheet of
Date: Sheet of
Date: Sheet of
Int. Speaker Conn.
JSPK1
JSPK1
SPK_L+ SPK_L­SPK_R+ SPK_R-
1/4 Modify SPK Pin define
INT_MIC_R <28>
+MIC2_VREFO
12
R423
R423
2.2K_0402_5%
2.2K_0402_5%
COM_MIC
R426
R426 22K_0402_5%
22K_0402_5%
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
HD Audio Codec ALC271X
HD Audio Codec ALC271X
HD Audio Codec ALC271X
1
1
2
2
3
3
4
4
ACES_88266-04 001
ACES_88266-04 001
CONN@
CONN@
31 45Friday, August 10, 201 2
31 45Friday, August 10, 201 2
E
31 45Friday, August 10, 201 2
5
G1
6
G2
0.1
0.1
0.1
FAN1 Conn
FAN_SPEED1<29>
+3VS
12
R433
R433 10K_0402_5%
10K_0402_5%
12
C439
C439 1000P_0402_50V7K
1000P_0402_50V7K
40mil
+5VS
12
@
@
1000P_0402_50V7K
1000P_0402_50V7K
+VCC_FAN1 FAN_SPEED1
D27
D27
1SS355_SOD323-2
1SS355_SOD323-2
D28
D28
BAS16_SOT23-3
BAS16_SOT23-3
@
@
1 2
C437
C437 10U_0805_10V4Z
10U_0805_10V4Z
1 2
C438
C438
1 2
JFAN1
JFAN1
1
1
2
2
3
3
4
GND
5
GND
ACES_85204-0300N
ACES_85204-0300N
CONN@
CONN@
SP02000JR00
2/3 Modify.
H2
H2
H_2P5
H_2P5
@
@
H7
H7
H_2P5
H_2P5
@
@
H12
H12
H_3P8
H_3P8
@
@
H16
H16
H_3P6
H_3P6
@
@
H3
H3
H_2P5
H_2P5
1
@
@
H8
H8
H_2P5
H_2P5
1
@
@
H13
H13
H_3P8
H_3P8
1
@
@
H17
H17
H_3P0N
H_3P0N
1
@
@
1
1
1
1
H4
H4
H_2P5
H_2P5
1
@
@
H9
H9
H_2P5
H_2P5
1
@
@
H14
H14
H_3P8
H_3P8
1
@
@
H18
H18
H_3P2X3P7N
H_3P2X3P7N
1
@
@
H5
H5
H_2P5
H_2P5
1
@
@
H10
H10
H_2P5
H_2P5
1
@
@
H15
H15
H_3P8
H_3P8
1
@
@
H19
H19
H_3P2X3P5N
H_3P2X3P5N
1
@
@
H6
H6
H_2P5
H_2P5
@
@
H11
H11
H_2P5
H_2P5
@
@
1
1
CPU support plate
12/1 Add
EN_DFAN1<29>
+VCC_FAN1
R432 300_0402_5%R432 300_0402_5%
12
+5VS
1
C470
C470
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C436
C436
1 2
U33
U33
1
EN
2 3 4
GND
VIN
GND
VOUT
GND
VSET
GND
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
10U_0805_10V4Z
10U_0805_10V4Z
8 7 6 5
FD1
FD1
@
@
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FD3
FD3
@
@
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Compal Secret Data
Compal Secret Data
Compal Secret Data
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Deciphered Date
Deciphered Date
Deciphered Date
FD2
FD2
@
@
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FD4
FD4
@
@
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Screw Hole
FAN & Screw Hole
FAN & Screw Hole
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
32 45Friday, August 10, 2012
32 45Friday, August 10, 2012
32 45Friday, August 10, 2012
0.1
0.1
0.1
A
B
C
D
E
+5VALW TO +5VS
+5VALW
U35
U35 AO4478L_SO8
AO4478L_SO8
8
C440
4.7U_0603_10V6K
C440
4.7U_0603_10V6K
1
20mil
2
+VSB
R436
R436 20K_0402_1%
20K_0402_1%
DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
C449
4.7U_0603_6.3V6K
C449
4.7U_0603_6.3V6K
2
1 1
1
2 2
20mil
+VSB
7
C441
4.7U_0603_10V6K
C441
4.7U_0603_10V6K
5
1
2
12
10mil
4
5VS_GATE
34
Q24B
Q24B
5
SUSP
+3VALW TO +3VS
+3VALW
U37
U37 AO4478L_SO8
AO4478L_SO8
8 7
C450
4.7U_0603_6.3V6K
C450
4.7U_0603_6.3V6K
2
5
1
R442
R442
47K_0402_5%
47K_0402_5%
4
12
3VS_GATE
10mil
34
5
SUSP
Q27B
DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
C459
4.7U_0603_6.3V6K
C459
4.7U_0603_6.3V6K
2
1
3 3
C455
0.1U_0402_16V4Z
C455
0.1U_0402_16V4Z
C454
4.7U_0603_6.3V6K
C454
4.7U_0603_6.3V6K
1
2
2
1
20mil 10mil
+VSB
DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
Q27B
+1.5V to +1.5VS
+1.5V
U38
U38 AO4478L_SO8
AO4478L_SO8
8 7
C456
0.1U_0402_16V4Z
C456
0.1U_0402_16V4Z
5
1
2
12
R447
R447 200K_0402_5 %
200K_0402_5 %
5
SUSP
Q29B
Q29B
ACIN<15,29,36 ,37>
ACIN
34
4
1.5VS_GATE
2
G
G
@
@
1 2 36
1 2 36
1 2 36
12
510K_0402_5%@R448
510K_0402_5%
@
13
D
D
Q30
Q30 2N7002K_SOT23 -3
2N7002K_SOT23 -3
S
S
1
C447
C447
0.1U_0603_2 5V7K
0.1U_0603_2 5V7K
2
1
C453
C453
0.1U_0603_2 5V7K
0.1U_0603_2 5V7K
2
1
R448
2
+5VS
C460
C460
0.1U_0603_2 5V7K
0.1U_0603_2 5V7K
C442
4.7U_0603_10V6K
C442
4.7U_0603_10V6K
C443
C443
1U_0603_10V6K
1U_0603_10V6K
1
1
2
2
+3VS
C451
4.7U_0603_6.3V6K
C451
4.7U_0603_6.3V6K
2
1
1
2
+1.5VS
C457
4.7U_0603_6.3V6K
C457
4.7U_0603_6.3V6K
2
1
DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
R434
R434
470_0603_5 %
470_0603_5 %
1 2
+5VS_R
61
2
SUSP
Q24A
Q24A DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
C452
1U_0402_6.3V6K
C452
1U_0402_6.3V6K
R441
R441 470_0603_5 %
470_0603_5 %
1 2
+3VS_R
61
Q27A
Q27A DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
1
C458
1U_0402_6.3V6K
C458
1U_0402_6.3V6K
2
1 2
+1.5VS_R
61
Q29A
Q29A
2
SUSP
R445
R445 470_0603_5 %
470_0603_5 %
2
SUSP
+3VALW to +3VALW_PCH(PCH AUX Power)
+3VALW
0_0603_5%
0_0603_5%
R630
R630
12
20mil
+3VALW_PCH
C445
4.7U_0603_6.3V6K
C445
4.7U_0603_6.3V6K
2
1
+5VALW
R435
R435 100K_0402_5 %
100K_0402_5 %
1 2
10K_0402_5%
10K_0402_5%
SYSON#
SYSON
R443
R443
PCH_PWR_EN#
R446
R446
SUSP
2
G
G
12
R439
R439
2
G
G
12
R444
R444
100K_0402_5 %
100K_0402_5 %
2
G
G
12
+5VALW
1 2
13
+5VALW
D
D
S
S
13
D
D
Q35
Q35 2N7002K_SOT23 -3
2N7002K_SOT23 -3
S
S
R440
R440 100K_0402_5 %
100K_0402_5 %
@
@
Q36
Q36 2N7002K_SOT23 -3
2N7002K_SOT23 -3
@
@
1 2
13
D
D
Q28
Q28 2N7002K_SOT23 -3
2N7002K_SOT23 -3
S
S
SUSP<38,39 ,40>
SUSP#<29, 36,38,39,40>
SYSON<29,38>
100K_0402_5 %
100K_0402_5 %
PCH_PWR_EN#<20,25>
PCH_PWR_EN<29>
100K_0402_5 %
100K_0402_5 %
+1.05VS_VTT
12
R449
R449 22_0603_5%
22_0603_5%
+0.75VS_R
13
D
D
2
G
G
Q31
Q31
S
4 4
S
2N7002K_SOT23 -3
2N7002K_SOT23 -3
A
1 2
13
D
D
S
S
R450
R450 470_0603_5 %
470_0603_5 %
2
G
G
Q32
Q32 2N7002K_SOT23 -3
2N7002K_SOT23 -3
+1.8VS +1.5V+0.75VS
1 2
+1.8VS_R +1.5 V_R+1.05VS_VTT_R
13
D
D
S
S
R451
R451 470_0603_5 %
470_0603_5 %
2
G
G
Q33
Q33 2N7002K_SOT23 -3
2N7002K_SOT23 -3
B
1 2
13
D
D
@
@
S
S
R452
R452
470_0603_5 %@
470_0603_5 %@
2
SYSON#SUSPSUSPSUSP
G
G
Q34
Q34 2N7002K_SOT23 -3
2N7002K_SOT23 -3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DC Interface
DC Interface
DC Interface
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
CHROME M/B LA-8943P Schematic
E
33 45Friday, August 10, 201 2
33 45Friday, August 10, 201 2
33 45Friday, August 10, 201 2
0.1
0.1
0.1
5
PJP1
PJP1
4
6
4
GND
3
5
3
GND
2
2
1
1
ACES 88266-04001
ACES 88266-04001
CONN@
D D
CONN@
DCJK_IN
PC10330P_0 402_50V7K PC10330P_0402_50V7K
PC14470P_0 402_50V7K PC14470P_0402_50V7K
12
12
12
PC3
PC3 1000P_0402_50V7K
1000P_0402_50V7K
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
12
PC4
PC4
100P_0402_50V8J
100P_0402_50V8J
932@ PD4
932@
LL4148_LL34-2
LL4148_LL34-2
BATT+
100K_0402_1%
+RTCBATT
100K_0402_1%
@ PR11
@
22K_0402_1%
22K_0402_1%
C C
51ON#<30>
PR2
PBJ1
@PBJ1
@
- +
ML1220T13RE
ML1220T13RE
12
PR1
PR1
560_0603_5%
560_0603_5%
1 2
PR2
560_0603_5%
560_0603_5%
1 2
PL1
PL1
PD4
PR10
@ PR10
@
PR11
1 2
12
4
12
12
PC5
PC5
100P_0402_50V8J
100P_0402_50V8J
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
N1
12
PC302
@PC302
@
0.22U_0603_25V7K
0.22U_0603_25V7K
DVT remove
VIN
12
PJ13
PJ13
@JUMP_43X39
@JUMP_43X39
112
PQ16
@ PQ16
@
2
PC6
PC6
1000P_0402_50V7K
1000P_0402_50V7K
2
13
12
PC301
@PC301
@
0.1U_0603_25V7K
0.1U_0603_25V7K
VS
3
+3VALWP +3VALW
PC1
@
PC1
@
1000P_0402_50V7K
1000P_0402_50V7K
+5VALWP +5VALW
PC7
PC7
1000P_0402_50V7K
1000P_0402_50V7K
PC9
@
PC9
@
1000P_0402_50V7K
1000P_0402_50V7K
PC11
@
PC11
@
1000P_0402_50V7K
1000P_0402_50V7K
PC13
@
PC13
@
1000P_0402_50V7K
1000P_0402_50V7K
@
@
+1.5VP
12
12
12
12
@ JUMP_43X118
@ JUMP_43X118
12
@ JUMP_43X118
@ JUMP_43X118
@ JUMP_43X118
@ JUMP_43X118
2
PJ1 @
PJ1 @
2
112
JUMP_43X118
JUMP_43X118
PJ3
PJ3
2
112
@ JUMP_43X118
@ JUMP_43X118
PJ6
PJ6
2
112
PJ9
PJ9
2
112
@ JUMP_43X118
@ JUMP_43X118
PJ11
PJ11
2
112
PJ12
PJ12
2
112
1
+0.75VSP
@
@
PC2
PC2
1000P_0402_50V7K
1000P_0402_50V7K
PC8
@
PC8
@
1000P_0402_50V7K
1000P_0402_50V7K
+1.8VS+1.8VSP
+1.5V
+1.05VS_VTT+1.05VSP
+VSBP
PC12
@
PC12
@
1000P_0402_50V7K
1000P_0402_50V7K
12
12
12
PJ2
PJ2
112
JUMP_43X79
JUMP_43X79
@
@
PJ4
PJ4
2
112
@ JUMP_43X118
@ JUMP_43X118
PJ10
PJ10
@JUMP_43X39
@JUMP_43X39
112
2
2
+0.75VS
+VCCSA+VCCSAP
+VSB
PR3
PR3
0_0402_5%
0_0402_5%
+CHGRTC
B B
A A
1 2
5
+3VLP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/03/21
2012/03/21
2012/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/03/21
2013/03/21
2013/03/21
Compal Electronics, Inc.
Title
Title
Title
PWR DCIN / Pre-charge
PWR DCIN / Pre-charge
PWR DCIN / Pre-charge
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
Date: Sheet of
Friday, August 10, 2012
Date: Sheet of
Friday, August 10, 2012
Date: Sheet of
Friday, August 10, 2012
1
34
46
34
46
34
46
0.1Custom
0.1Custom
0.1Custom
5
footprint :SUYIN_200275MR008G15QZR_8P-T PN:DC040007N10 SOCKET BATT C200275MR008G15QZR 8P W/FORK
@
@
PJP2
PJP2
D D
C C
B B
10
GND
9
GND
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
SUYIN_200275GR008G16MZR
SUYIN_200275GR008G16MZR
EC_SMDA EC_SMCA TH BI+
100K_0402_1%
100K_0402_1%
SPOK<29,37>
EC_SPOK<29>
PR72
PR72
<40,41>
VMB
12
PC66
PC66 1000P_0402_50V7K
1000P_0402_50V7K
VL
1 2
1 2
PJ5 @
PJ5 @
2
JUMP_43X118
JUMP_43X118
PR73
PR73 1K_0402_5%
1K_0402_5%
<40,41>
2
G
G
PC71
PC71
1U_0402_6.3V6K
1U_0402_6.3V6K
BATT+
12
PC67
PC67
0.01U_0402_25V7K
0.01U_0402_25V7K
B+
PR71
PR71
22K_0402_1%
22K_0402_1%
1 2
13
D
D
PQ20
PQ20 2N7002KW 1N SOT323-3
2N7002KW 1N SOT323-3
S
S
12
112
12
4
PR58
PR58 100_0402_1%
12
PR60
PR60 1K_0402_5%
1K_0402_5%
100_0402_1%
100_0402_1%
12
PR65
PR65 1K_0402_1%
1K_0402_1%
PR59
PR59
6.49K_0402_1%
6.49K_0402_1%
6.49K_0402_1%
6.49K_0402_1%
1 2
PR62
PR62
PR111
PR111
932@
932@
@
@
12
12
100_0402_1%
1 2
EC_SMB_DA1 <29,36>
EC_SMB_CK1 <29,36>
+3VALW
+3VLP
BATT_TEMP <29>
H_PROCHOT#<29,5>
2N7002KW_SOT323-3
2N7002KW_SOT323-3
PQ19 BSS84LT1G_SOT23-3
PQ19 BSS84LT1G_SOT23-3
S
S
D
D
13
G
G
12
PR70
PR70
PC68
PC68
100K_0402_1%
100K_0402_1%
2
0.22U_0603_25V7K
0.22U_0603_25V7K
12
PC69
PC69
0.1U_0603_25V7K
0.1U_0603_25V7K
+VSBP
932@
932@
3
+3VLP
12
PC65
PC65
0.1U_0603_25V7K
0.1U_0603_25V7K
MAINPWON
+3VLP
+3VS
12
12
1 2
PR110 100K_0402_1%
100K_0402_1%
PR105
PR105 0_0402_5%
0_0402_5%
9012@
9012@
PQ32
PQ32
PR67 100K_0402_1%
100K_0402_1%
13
D
D
S
S
932@PR67
932@
2
G
G
H_PROCHOT#_EC<29>
VL
12
PR64
PR64
@
@
100K_0402_1%
100K_0402_1%
@PR110
@
ECAGND<29>
PH1 under CPU bottom side : CPU thermal protection at 92 degree C Recovery at 56 degree C
2
Adaptor protection
Adaptor Throttling point ADP_IADP_I Recovery point
40W 1.126V42.88W
33.2W 0.874V
+EC_VCCA
9012@
9012@
PR78
PR78
12
12
12.4K_0402_1%
1 2
932@ PR68
932@
12
1.91K_0402_1%
1.91K_0402_1%
12.4K_0402_1%
VCIN0_PH <29>
PR68
21.5K_0402_1%
21.5K_0402_1%
PU3
932@
PU3
932@
1
VCC
2
GND
3
~OT1
~OT24RHYST2
G718TM1U_SOT23-8
G718TM1U_SOT23-8
100K_0402_1%_NCP15WF104F03R C
100K_0402_1%_NCP15WF104F03R C
TMSNS1
RHYST1
TMSNS2
932@
932@
9012@
9012@
8
932@
932@
7
9.76K_0402_1%
9.76K_0402_1%
6
5
PR80
PR80
0_0402_5%
0_0402_5%
1 2
PR81
PR81
0_0402_5%
0_0402_5%
1 2
932@
932@
PR66
PR66
PR61
PR61
PH1
PH1
12
1
ADP_I <29,36>
932@PR63
932@
9012@
5.62K +-1% 0402
5.62K +-1% 0402
12
PR63 590_0402_1%
590_0402_1%
PR63
9012@ PR63
VCIN1_PROCHOT <29>
12
PR79
PR79 10K_0402_1%
10K_0402_1%
SD034100280 10K OHM
+3VALW
12
PC70
@ PC70
@
0.1U_0603_25V7K
0.1U_0603_25V7K
VL
PU4
@PU4
@
PR76@
PR76@
100K_0402_1%
100K_0402_1%
MAINPWON<29,37>
1 2
1
VCC
TMSNS1
2
GND
RHYST1
3
OT1
TMSNS2
4
RHYST2
OT2
G718TM1U_SOT23-8
G718TM1U_SOT23-8
12
PR74
@PR74
@
10K_0402_1%
10K_0402_1%
8
7
6
5
100K_0402_1%_NCP15WF104F03R C
100K_0402_1%_NCP15WF104F03R C
PH2_R
@
@
PR77
PR77
47K_0402_1%
47K_0402_1%
PH2
@
PH2
@
PR75
@
PR75
@
10K_0402_1%
10K_0402_1%
1 2
12
12
For 65W adapter==>action 70W , Recovery 54W
A A
5
4
For 90W adapter==>action 97W , Recovery 75W
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/03/21
2012/03/21
2012/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2013/03/21
2013/03/21
2013/03/21
2
Compal Electronics, Inc.
Title
Title
Title
PWR-BATTERY CONN/OTP
PWR-BATTERY CONN/OTP
PWR-BATTERY CONN/OTP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
Friday, August 10, 2012
Friday, August 10, 2012
Friday, August 10, 2012
1
35
35
35
46
46
46
0.1
0.1
0.1
A
for reverse input protection
13
D
D
PQ4
PQ4
2
G
G
2N7002K W 1N SOT323 -3
2N7002K W 1N SOT323 -3
S
P1
12
PR15
PR15
@
@
0_0402_5%
0_0402_5%
13
D
D
S
S
S
SIS412DN-T 1-GE3_POWE RPAK8-5
SIS412DN-T 1-GE3_POWE RPAK8-5
12
PC15
PC15
0.1U_0402_25V6
0.1U_0402_25V6
12
12
PR18
PR18
4.12K_0603_1%
4.12K_0603_1%
ACDET
12
12
1
2
PQ11
PQ11 2N7002K W 1N SOT323 -3
2N7002K W 1N SOT323 -3
3
PQ6
PQ6
1 2 3
4
BTB_GAT E
PR19
PR19
4.12K_0603_1%
4.12K_0603_1%
ACIN<15,29,33,37>
PR34
PR34
2M_0402_1%
2M_0402_1%
PR36
PR36
2M_0402_1%
2M_0402_1%
PQ10
PQ10 PDTC115EU_SOT323 -3
PDTC115EU_SOT323 -3
change PR14 from 0.02 to 0.025 for ADP_I setting
P2
5
1 2
PC26
PC26
0.1U_0402_25V6
0.1U_0402_25V6
12
PC29
PC29
0.1U_0402_25V6
0.1U_0402_25V6
BQ24725_CMSRC
BQ24725_ACDRV
PR29
PR29
+3VLP
1 2
10K_0402_1%
10K_0402_1%
1 2
1K_0402_1%
1K_0402_1%
VIN
1 2
280K_0402_1%
280K_0402_1%
PR12
PR12
1 2
1M_0402_5%
1 1
1M_0402_5%
VIN
PQ5
PQ5
SIS412DN-T 1-GE3_POWE RPAK8-5
SIS412DN-T 1-GE3_POWE RPAK8-5
5
1 2 3
PR13
PR13
1 2
3M_0402_5%
3M_0402_5%
4
12
PC24
PC24
2200P_0402_50V 7K
2200P_0402_50V 7K
VIN
2 2
PR22
@P R22
@
3.3_1206 _5%
3.3_1206 _5%
12
12
PR24
@P R24
@
3.3_1206 _5%
3.3_1206 _5%
12
PC32
PC32
2.2U_080 5_25V6K
@
2.2U_080 5_25V6K
@
3 3
1.Change PR33 to 280K 0.1%
2.Chagee PR35 and PR36 to 0.1%.
3.Change PC30 to 1000P.
4.Add PR52,PR70,PR72,PQ17,PQ21.
5.Add GPIO pin,need check HW/EC.
6.Chanrge PR31 to 1K.
PR38
PR38
100K_0402_1%
4 4
FSTCHG<29>
SUSP#
100K_0402_1%
PC147
PC147
100P_0402_50V8J
100P_0402_50V8J
1 2
2
G
G
12
A
PR30
PR30
PR32
PR32
1
2
BQ24725_ACN
BQ24725_ACP
12
PC42
PC42
1000P_0402_50V 7K
1000P_0402_50V 7K
B
PR14
9012@ P R14
9012@
0.02_120 6_1%
0.02_120 6_1%
PR14
932@ PR14
932@
0.025_12 06_1%
0.025_12 06_1%
12
0.1U_0402_25V6
0.1U_0402_25V6
B+
4
3
VIN
2
3
PD5
PD5
BAS40CW H_SOT323-3
BAS40CW H_SOT323-3
1
PC28
PC28
12
PR20
PR20
PC30
PC30
1 2
1U_0603_25V6K
1U_0603_25V6K
BQ24725_VCC
19
20
PU1
PU1
21
PAD
VCC
1
ACN
2
ACP
BQ24725ARGRR _VQFN2 0_3P5X3P5
BQ24725ARGRR _VQFN2 0_3P5X3P5
3
CMSRC
4
ACDRV
5
ACOK
12
PC16
PC16
330P_0402_50V7 K
330P_0402_50V7 K
0.047U_0402_25V7 K
0.047U_0402_25V7 K
PC27
PC27
1 2
10_1206_1%
10_1206_1%
BQ24725_LX
DH_CHG
18
HIDRV
PHASE
PL2
PL2
1UH_NRS 4018T1R0NDGJ _3.2A_30%
1UH_NRS 4018T1R0NDGJ _3.2A_30%
1 2
12
PC20
PC20
470P_0402_50V7 K
470P_0402_50V7 K
12
12
PR21
PR21
2.2_0603_5%
2.2_0603_5%
12
DH_CHG
PD6
PD6 RB751V-40_SOD323-2
RB751V-40_SOD323-2
PC31
PC31
16
REGN LODRV
GND
SRN
BATDRV
1 2
1U_0603_25V6K
1U_0603_25V6K
15
14
13
SRP
12
11
DL_CHG
SRP
SRN
BQ24725_BATDRV
BQ24725_BST
17
BTST
12
PC18
PC18
10U_0805_25V6K
10U_0805_25V6K
10_0603_5%
10_0603_5%
1 2
6.8_0603_5%
6.8_0603_5%
1 2
PC19
PC19
PR23
PR23
1_0603_5%
1_0603_5%
1 2
PR27
PR27
PR28
PR28
ACDET6IOUT7SDA8SCL9ILIM
10
ACDET=
2.4 ~3.15 V Vin=20.55~18.6V
12
PR35
PR35
154K_0402_1%
154K_0402_1%
ACDET
BQ24725 _ILIMT
12
PR33
PR33
100K_0402_1%
100K_0402_1%
12
12
PR37
PR37
PC43
PC43
66.5K_0402_1%
66.5K_0402_1%
100P_0402_50V8 J
100P_0402_50V8 J
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
PR39
PR39
0_0402_5%
0_0402_5%
1 2
12
12
@
@
0.1U_0402_25V6
0.1U_0402_25V6
2012/03/ 21
2012/03/ 21
2012/03/ 21
PC44
PC44
PR31
PR31
1 2
316K_0402_1%
316K_0402_1%
PC41
PC41
0.01U_0402_25V7K
0.01U_0402_25V7K
12
PC149
PC149
@
@
100P_0402_50V8J
100P_0402_50V8J
ADP_I <2 9,35>
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
12
12
PC22
PC22
330P_0402_50V7 K
330P_0402_50V7 K
10U_0805_25V6K
10U_0805_25V6K
4
4
CSOP1
CSON1
+3VALW
12
PC148
PC148
@
@
100P_0402_50V8J
100P_0402_50V8J
Deciphered Date
Deciphered Date
Deciphered Date
C
CHG_B+
12
PC23
PC23
2200P_0402_50V 7K
2200P_0402_50V 7K
5
123
BQ24725_LX CHG
5
123
12
PC40
PC40
0.1U_0402_25V6
0.1U_0402_25V6
PC17470P_0402_50V7K PC17470P_0402_5 0V7K
SIS412DN-T 1-GE3_POWE RPAK8-5
SIS412DN-T 1-GE3_POWE RPAK8-5
PL3
PL3
1 2
1 2
PR17
PR17
4.12K_0603_1%
4.12K_0603_1%
BQ24725_BATDRV
PQ8
PQ8
SIS412DN-T 1-GE3_POWE RPAK8-5
SIS412DN-T 1-GE3_POWE RPAK8-5
10UH_FDSD0630-H-100 M-P3_3.8A_20%
10UH_FDSD0630-H-100 M-P3_3.8A_20%
12
PR26
PR26
4.7_1206_5%
PQ9
PQ9
4.7_1206_5%
12
PC39
PC39
SIS412DN-T1-GE3_POWERPAK8-5
SIS412DN-T1-GE3_POWERPAK8-5
680P_0402_50V7 K
680P_0402_50V7 K
EC_SMB_ CK1 <29,35>
EC_SMB_ DA1 <29,35>
2013/03/ 21
2013/03/ 21
2013/03/ 21
D
B+
PQ7
PQ7
CSOP1
12
5
PR25
PR25
0.01_120 6_1%
0.01_120 6_1%
1
2
PC35
PC35
0.1U_0402_25V6
0.1U_0402_25V6
4
12
4
3
12
PC121
PC121
0.1U_0402_25V6
0.1U_0402_25V6
1 2 3
BATT_GA TE
CSON1
12
PC38
PC38
0.1U_0402_25V6
0.1U_0402_25V6
12
PC114
PC114
PC113
PC113
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
12
12
PC25
PC25
0.01U_0402_50V7K
0.01U_0402_50V7K
12
PC33
PC33
12
12
@
@
PR16
PR16
12
10U_0805_25V6K
10U_0805_25V6K
PC117
PC117
PC115
PC115
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0_0402_5%
0_0402_5%
BATT+
12
PC36
PC36
PC34
PC34
2200P_0402_50V 7K
2200P_0402_50V 7K
10U_0805_25V6K
10U_0805_25V6K
12
PC63
PC63
Compal Electronics, Inc.
Title
Title
Title
PWR DCIN / Pre-charge
PWR DCIN / Pre-charge
PWR DCIN / Pre-charge
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
Friday, August 10, 20 12
Friday, August 10, 20 12
Friday, August 10, 20 12
D
36
36
36
46
46
46
12
PC37
PC37
0.01U_0402_50V7K
0.01U_0402_50V7K
BATT+
12
PC48
PC48
330P_0402_50V7 K
330P_0402_50V7 K
470P_0402_50V7 K
470P_0402_50V7 K
0.1
0.1
0.1
5
4
3
2
1
+3VLP
PC85
@ PC85
@
100P_04 02_50V8J
100P_04 02_50V8J
1 2
PR40
EN_3V
13.7K_04 02_1%
13.7K_04 02_1%
1 2
20K_040 2_1%
20K_040 2_1%
1 2
LX_3V
BST_3V
UG_3V
LG_3V
PR51
PR40
VFB=2V
PR42
PR42
12
PR44
PR44
95.3K_0402_1%
95.3K_0402_1%
CS2
5
PU2
PU2
CS2
6
EN2
7
PGOOD
8
TPS5122 5CRUKR_QFN20 _3X3
TPS5122 5CRUKR_QFN20 _3X3
SW2
9
VBST2
10
DRVH2
DRVL211VIN12VREG513VO114DRVL1
PR52
PR52
1 2
2.2_0603 _1%
2.2_0603 _1%
PC61
PC61
1U_0603_25V6K
1U_0603_25V6K
2012/03/ 21 20 13/03/21
2012/03/ 21 20 13/03/21
2012/03/ 21 20 13/03/21
3
D D
RT8243_B+
PL4
PL4
HCB2012 KF-121T50_080 5
HCB2012 KF-121T50_080 5
B+
C C
B B
A A
VIN
ACIN
2
1 2
932@ PD11
932@
LL4148_ LL34-2
LL4148_ LL34-2
VL
13
12
PC46
PC46
PC47
PC47
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K
0.1U_0603_25V7K
+3VALWP
PD11
12
PR109
932@ PR109
932@
1M_0402 _1%
1M_0402 _1%
1 2
2
VS
G
G
PQ22
932@ PQ22
932@
PDTC115 EUA_SC70-3
PDTC115 EUA_SC70-3
5
12
PC49
PC49
PC57
PC57
220U_6.3 V_M
220U_6.3 V_M
PR82
932@ PR82
932@
887K_04 02_1%
887K_04 02_1%
1 2
PR55
@P R55
@
0_0402_ 5%
0_0402_ 5%
1 2
VS
61
D
D
932@
932@
S
S
DMN66D0 LDW-7_SOT3 63-6
DMN66D0 LDW-7_SOT3 63-6
12
2200P_0402_50V7K
2200P_0402_50V7K
PL5
4.7UH_VMPI0703AR-4R7M-Z01_5 .5A_20%
4.7UH_VMPI0703AR-4R7M-Z01_5 .5A_20%
1
+
+
2
PL5
1 2
Rds=13.5m(min) = 16.5m(max)
12
PR48
PR48
4.7_1206_5%
4.7_1206_5%
12
PC58
PC58
680P_0402_50V7K
680P_0402_50V7K
PR69 2.2 K_0402_5%
PR69 2.2 K_0402_5%
EC_ON<29,30>
MAINPWON<29,35>
932@
932@
PR53 0_ 0402_5%
PR53 0_ 0402_5%
1 2
PR108
932@ PR108
932@
412K_04 02_1%
412K_04 02_1%
PQ35A
PQ35A
1 2
12
PR107
PR107
932@
932@
10K_0402_1%
10K_0402_1%
34
D
D
5
G
G
PQ35B
932@
PQ35B
932@
DMN66D0 LDW-7_SOT3 63-6
DMN66D0 LDW-7_SOT3 63-6
S
S
5
PQ12
PQ12
SIS412DN-T 1-GE3_POWE RPAK8-5
SIS412DN-T 1-GE3_POWE RPAK8-5
4
123
5
PQ14
PQ14 SI7716ADN -T1-GE3_POW ERPAK8-5
SI7716ADN -T1-GE3_POW ERPAK8-5
4
123
EN_5V
EN_3V
9012@
9012@
12
12
PR54 0_ 0402_5%PR54 0_0402_ 5%
12
PR56
100K_0402_1%
100K_0402_1%
932@ PR56
932@
4
PR51 0_ 0402_5%PR51 0_0402_ 5%
1 2
PR50 0_ 0402_5%PR50 0_0402_ 5%
1 2
EN_5V3V
12
PC64
PC64
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
SPOK<29,35>
PR46
PR46
1 2
1 2
2.2_0603 _5%
2.2_0603 _5%
PC55
PC55
0.1U_060 3_25V7K
0.1U_060 3_25V7K
EN Rising=1.6~0.3V
+3.3VALWP Ipeak=5.6A ; 1.2Ipeak=6.72A; Imax=3.92A f=375KHz, L=4.7UH Rdson=13~16m ohm 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=1.48/2=0.74A Vlimit=10*10^-6*150Kohm/10=0.15V Ilimit=0.15/(16m*1.2)~0.15/(13m)=7.82A~11.53A Iocp=7.7A (8.536A>8.4A -> ok)
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
FB_3V
4
12
VFB2
PC52
PC52
1 2
1U_0603 _10V6K
1U_0603 _10V6K
3
VREG3
12
PC62
PC62
PC99
@P C99
@
100P_04 02_50V8J
100P_04 02_50V8J
1 2
PR41
PR41
30.9K_04 02_1%
30.9K_04 02_1%
1 2
VFB=2V
PR43
PR43
20K_040 2_1%
20K_040 2_1%
1 2
FB_5V
PR45
PR45
1 2
118K_0402_1%
118K_0402_1%
CS1
1
2
21
CS1
PAD
VFB1
VBST1
DRVH1
15
EN1
VCLK
SW1
20
19
18
17
16
+5VALWP
VLRT8243_B+
1U_0603_10V6K
1U_0603_10V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
EN_5V
LX_5V
2.2_0603 _5%
2.2_0603 _5%
1 2
BST_5V
UG_5V
RT8243_ B+
12
12
PC51
PC51
PC50
PC50
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC56
PC56
PR47
PR47
0.1U_060 3_25V7K
0.1U_060 3_25V7K
1 2
LG_5V
SI7716ADN -T1-GE3_POW ERPAK8-5
SI7716ADN -T1-GE3_POW ERPAK8-5
(1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=355KHZ (+3VALWP)
+5VALWP Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A f=300KHz, L=4.7UH,Rentrip=154k ohm Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.63/2=0.815A Vlimit=10*10^-6*154Kohm/10=0.15V Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A Iocp=14.2A
2
12
12
PC54
PC54
PC53
PC53
0.1U_0603_25V7K
0.1U_0603_25V7K
2200P_0402_50V7K
2200P_0402_50V7K
Rds=13.5m(min) = 16.5m(max)
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
PQ13
PQ13
PQ15
PQ15
4
4
SIS412DN-T 1-GE3_POWE RPAK8-5
SIS412DN-T 1-GE3_POWE RPAK8-5
123
4.7UH_VMPI0703AR-4R7M-Z01_5 .5A_20%
4.7UH_VMPI0703AR-4R7M-Z01_5 .5A_20%
5
123
12
12
PL6
PL6
1 2
PR49
@ PR49
@
4.7_1206_5%
4.7_1206_5%
PC60
@ PC60
@
680P_0402_50V7K
680P_0402_50V7K
ESR=17m ohmESR=17m ohm
Compal Electronics, Inc.
3VALWP/5VALWP
3VALWP/5VALWP
3VALWP/5VALWP
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
1
37 46Friday, August 10, 20 12
37 46Friday, August 10, 20 12
37 46Friday, August 10, 20 12
1
+
2
+5VALWP
PC59 220U_6.3V_M+PC59 220U_6.3V_M
0.1
0.1
0.1
A
1 1
+0.75VSP
12
PC97
PC97
10U_0805_25V6K
10U_0805_25V6K
2 2
+VTT_REFP
PR173
PR173
680K_0402_1%
680K_0402_1%
SUSP#<29,33,36,39,40>
1 2
SYSON<29,33>
0.1U_0402_16V7K
0.1U_0402_16V7K
3 3
SUSP<33,39,40>
12
PC73
PC73
+1.5VP
12
PC98
PC98
0.033U_0402_16V7K
0.033U_0402_16V7K
12
PC325
PC325
PQ31
PQ31
2
G
G
10U_0805_25V6K
10U_0805_25V6K
13
D
D
S
S
Output Cap PAD
PR171
PR171
0_0402_5%
0_0402_5%
1 2
PC96
@ PC96
@
0.1U_0402_16V7K
0.1U_0402_16V7K
2N7002KW_S OT323-3
2N7002KW_S OT323-3
21
1
2
3
4
5
10K_0402_1%
10K_0402_1%
B
+1.5VP
PJ15
PJ15
JUMP_43X79
JUMP_43X79
20
PU8
PU8
VTT
PAD
VTTGND
VTTSNS
GND
RT8207MZQW _WQFN20_3X3
RT8207MZQW _WQFN20_3X3
VTTREF
VDDQ
FB
6
12
FB_1.5V
12
PR169
PR169
1
1
2
2
LDO_IN
UG_1.5V
BST_1.5V
18
17
19
BOOT
UGATE
VLDOIN
S5
S3
TON
8
7
9
S3_1.5V
S5_1.5V
1.5V_TON
PR95
PR95
10.5K_0402_1%
10.5K_0402_1%
PC100
PC100
100P_0402_50V8J
100P_0402_50V8J
1 2
FB=0.75V To GND = 1.5V To VDD = 1.35V
PR96
PR96
0_0603_5%
0_0603_5%
1 2
LX_1.5V
16
PHASE
LGATE
PGND
CS
VDDP
VDD
PGOOD
10
PR172
PR172
887K_0402_1%
887K_0402_1%
12
BST_1.5V-1
15
LG_1.5V
14
13
1.5V_CS
12
11
VDD_1.5V
+3VALW
12
PR97
PR97
@
@
12
1.5V_B+
21.5K_0402_1%
21.5K_0402_1%
12
PC77
PC77
1U_0603_10V6K
1U_0603_10V6K
PGOOD_1.5V
10K_0402_5%
10K_0402_5%
PC76
PC76
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
PR170
PR170
12
12
1U_0603_10V6K
1U_0603_10V6K
PR174
PR174
5.1_0603_5%
5.1_0603_5%
PC78
PC78
5
4
4
SIS412DN-T1-GE3_POW ERPAK8-5
SIS412DN-T1-GE3_POW ERPAK8-5
123
5
123
SI7716ADN-T1-GE3_POW ERPAK8-5
SI7716ADN-T1-GE3_POW ERPAK8-5
Rds=13.5m(Typ)
16.5m(Max)
12
+5VALW
PQ29
PQ29
C
PQ30
PQ30
12
PR175
PR175
4.7_1206_5%
4.7_1206_5%
12
PC75
PC75
680P_0402_50V7K
680P_0402_50V7K
need change OCP setting
1.5V_B+
12
PC72
PC72
10U_0805_25V6K
10U_0805_25V6K
PL16
PL16
1 2
1.5UH +-20% PC MC063T- 9A
1.5UH +-20% PC MC063T- 9A
PJ18
PJ18
112
JUMP_43X79 @
JUMP_43X79 @
D
2
B+
+1.5VP
1
+
+
PC232
PC232
2
220U 2V Y D2 ESR15M
220U 2V Y D2 ESR15M
STATE S3 S5 1.5VP
S0
S3
S4/S5
Hi Hi
HiLo
Lo Lo
On
On
Off (Discharge)
4 4
VTT_REFP 0.75VSP
On
On
Off (Discharge)
On
Off (Hi-Z)
Off (Discharge)
Note: S3 - sleep ; S5 - power off
A
<Vo=1.5V> VFB=0.75V V=0.75*(1+10K/10.5K)=1.52V Fsw=286K to 200KHz
Cout ESR=17m ohm Rdson(max)=16.5 mohm Rdson(typ)=13.5 mohm. Ipeak=12 A, Imax=8.4A, Iocp=14.4A
Delta I=((Vin-Vo)*(Vo/Vin))/(L*Fsw)=2.195A =>1/2Delta I=1.099A
Iocpmax=((21.5K*11uA)/0.0135)+0.5 delta I= A Iocpmin=((21.5K*9uA)/(0.0165))+0.5 delta I=15.6A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PWR-+1.5VP
PWR-+1.5VP
PWR-+1.5VP
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
D
38 46Friday, August 10, 201 2
38 46Friday, August 10, 201 2
38 46Friday, August 10, 201 2
0.1
0.1
0.1
5
34
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
5
PQ34B
PR86
PR86
1 2
+1.8VSP
1
PC86
PC86
2
2200P_0402_50V7K
2200P_0402_50V7K
PQ34B
@
@
12
PC83
PC83
0.1U_0402_10V7K
0.1U_0402_10V7K
1UH +-20% VMPI0703AR-1R0M-Z01 11A
1UH +-20% VMPI0703AR-1R0M-Z01 11A
12
PC82
PC82
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC89
PC89
1 2
1 2
PC87
PC87
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6
0.1U_0402_25V6
SUSP<33,38,40>
D D
PJ17
PJ17
112
JUMP_43X79
JUMP_43X79
1 2
PR85 200K_0402_5%PR85 200K_0402_5%
1M_0402_5%
1M_0402_5%
2
SUSP#<29,33,36,38,40>
C C
+3VALW +VCCSAP
4
PU6
PU6
1
2
3
PL9
PL9
12
LX_1.8V
12
PC81
PC81
PR83
PR83
4.7_0603_5%
4.7_0603_5%
PC84
PC84
680P_0402_50V7K
680P_0402_50V7K
PC88
PC88
68P_0402_50V8J
68P_0402_50V8J
12
12
12
FB_VCCSA_IC
6
FB
EN
5
PG
GND
4
IN
LX
SY8032ABC_SOT23-6
SY8032ABC_SOT23-6
<BOM Structure>
<BOM Structure>
22U_0805_6.3V6M
22U_0805_6.3V6M
SY8037DDCC DFN 12P
SY8037DDCC DFN 12P
PU7
PU7
12
PVIN
PVIN
SVIN
FB
VOUT
VID1
LX
LX
LX
PG
EN
VID0
GND
13
11
10
9
8
7
PC79
PC79
1
2
3
4
5
6
FB_1.8VEN_1.8V
12
+VCCSA_PHASE+VCCSA_PWR_SRC
+VCCSA_EN
FB=0.6Volt
8032_IN
PR89
PR89
100K_0402_5%
100K_0402_5%
1 2
1 2
0_0402_5%
0_0402_5%
.1U_0402_16V7K
.1U_0402_16V7K
1 2
PR90
PR90
PC95
@PC95
@
3
PR84
PR84
20K_0402_1%
20K_0402_1%
PR87
PR87
10K_0402_1%
10K_0402_1%
+1.8VSP
12
12
SA_PGOOD <29>
+3VS
VCCPPWRGOOD <40>
12
PC80
PC80
68P_0402_50V8J
68P_0402_50V8J
PJ16
PJ16
112
JUMP_43X79
JUMP_43X79
@
@
1.8VSP Ipeak=1.24A Vout=0.6*(1+(20K/10K))=1.8V
2
+3VALW
PL10
PL10
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
12
@
@
PR88
PR88
4.7_0603_5%
4.7_0603_5%
12
PC94
@ PC94
@
680P_0402_50V7K
680P_0402_50V7K
2
12
PC90
PC90
PC91
PC91
1 2
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC93
PC93
PC92
PC92
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_50V7K
2200P_0402_50V7K
1
PC146
PC146
@
@
12
PC145
PC145 100P_0402_50V8J
100P_0402_50V8J
@
@
12
PR91
PR91
1K_0402_5%
1K_0402_5%
100P_0402_50V8J
100P_0402_50V8J
PR92
PR92
1K_0402_5%
1K_0402_5%
B B
FB_VCCSA
12
12
H_VCCSA_VID0 <9>
The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.
H_VCCSA_VID1 <9>
PR93
PR93
100_0402_1%
100_0402_1%
PR94
PR94
0_0402_5%
0_0402_5%
12
12
VCCSA_SENSE <9>
VID [0] VID[1] VCCSA Vout(ULV only)
+VCC_SAP TDC 4.2A Peak Current 6 A
A A
5
4
3
OCP current 7.2 A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
0 0 0.9V 0 1 0.85V 1 0 0.775V 1 1 0.75V
output voltage adjustable netw ork
Title
Title
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR +VCCSAP
PWR +VCCSAP
PWR +VCCSAP
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
1
39 46Friday, August 10, 2012
39 46Friday, August 10, 2012
39 46Friday, August 10, 2012
0.1
0.1
0.1
5
D D
4
3
1.05V_B+
2
PL11
PL11
HCB2012 KF-121T50_080 5
HCB2012 KF-121T50_080 5
12
1
B+
12
PC105
PC105
0.1U_040 2_25V6
0.1U_040 2_25V6
+1.05VSP
1
+
+
PC257
PC257
2
330U_D2_2V_Y_R9
330U_D2_2V_Y_R9
VCCIO_SEN SE < 8>
PC103
PC103
2200P_0402_50V7K
2200P_0402_50V7K
PC124
PC124
12
PC104
PC104
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
PR176
PR176
1 2
100_040 2_1%
100_040 2_1%
12
12
12
PC109
PC109
0.1U_0402_25V6
0.1U_0402_25V6
PC110 2200P_0402_50V7KPC110 2200P_0402_50V7K
12
C C
+1.05VSP
PR98
PR98 10K_040 2_1%
10K_040 2_1%
1 2
PR100 84.5K_ 0402_1%PR 100 8 4.5K_0402_1%
1.05V_EN
12
PR104
PR104
470K_04 02_1%
470K_04 02_1%
12
VCCPPW RGOOD<39>
12
0.1U_040 2_16V7K
0.1U_040 2_16V7K
61
2
10K_040 2_1%
10K_040 2_1%
PC107
PC107
VFB=0.7V
FB_1.05V
DMN66D0 LDW-7_SOT3 63-6
DMN66D0 LDW-7_SOT3 63-6
PQ34A
PQ34A
@
@
12
PR106
PR106
PR101
PR101
330K_04 02_1%
330K_04 02_1%
SUSP<33 ,38,39>
1 2
PR103
@P R103
@
30K_040 2_5%
30K_040 2_5%
SUSP#
B B
<Vo=1.05V> VFB=0.75V V=0.704*(1+4.02K/10K)=1.052V Fsw=290KHz
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. Ipeak=15.6A, Imax=10.92A, Iocp=18.72A
A A
PU9
PU9
1
PGOOD
12
2
TRIP
3
EN
4
VFB
5
TST
TPS5121 2DSCR_SON10_ 3X3
TPS5121 2DSCR_SON10_ 3X3
VBST
DRVH
V5IN
DRVL
10
BST_1.05 V BST _1.05V-1
9
UG_1.05V
8
LX_1.05V
SW
7
6
LG_1.05V
11
TP
PR99
PR99
2.2_0603 _5%
2.2_0603 _5%
1 2
+5VALW
12
PC111
PC111
4.7U_080 5_10V6K
4.7U_080 5_10V6K
PC106
PC106
0.1U_060 3_25V7K
0.1U_060 3_25V7K
1 2
AO4456_ SO8
AO4456_ SO8
Rds=4.5m(min)- 5.6m(Max)
PQ24
PQ24
4
578
5
PQ23
PQ23
123
SIS412DN-T1-GE3_POWERPAK8-5
SIS412DN-T1-GE3_POWERPAK8-5
3 6
241
1 2
1000P_0 402_50V7K
1000P_0 402_50V7K
PC122
PC122
<BOM Struc ture>
<BOM Struc ture>
1UH +-20% VMPI0703AR-11A
1UH +-20% VMPI0703AR-11A
12
4.7_1206 _5%
4.7_1206 _5%
12
680P_06 03_50V7K
680P_06 03_50V7K
1 2
PC101
PC101
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL12
PL12
1 2
PR102
PR102
PC112
PC112
PR1884.99K_ 0402_1% PR 1884.99 K_0402_1%
1 2
1.2K_040 2_1%
1.2K_040 2_1% PR186
PR186
12
PC102
PC102
4.7U_0805_25V6-K
4.7U_0805_25V6-K
12
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=2.06A
Iocpmax=((15K*11uA)/0.0045)+1.665A=23.54A Iocpmin=((15K*9uA)/(0.0056*1.3))+1.665A=19A Iocp=A
5
4
Security Class ification
Security Class ification
Security Class ification
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/03/ 21 2013/03/ 21
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PWR +1.05VS_VCCPP/+0.75VSP
PWR +1.05VS_VCCPP/+0.75VSP
PWR +1.05VS_VCCPP/+0.75VSP
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
40 46Friday, August 10, 20 12
40 46Friday, August 10, 20 12
40 46Friday, August 10, 20 12
1
0.1
0.1
0.1
A
1 1
2 2
VR_ON<29>
SVID_CLK<8>
SVID_ALERT#<8>
SVID_DATA<8>
SVID_DATA
SVID_CLK
SVID_ALERT#
12
12
12
PC163
PC163
PC144
PC144
PC161
PC161
@
@
@
@
@
@
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
VR_HOT<29>
@ PC263
@
47P_0402_50V8J
47P_0402_50V8J
PC263
12
+1.05VS_VTT
3 3
PC162
PC162
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
3.83K_0402_1%
3.83K_0402_1%
PR165 0_0402_5%PR165 0_0402_5%
12
PC260
PC260
12
1.91K_0402_1%
1.91K_0402_1%
PR158
PR158
1 2
1 2
PR203
PR203
2K_0402_1%
2K_0402_1%
PR183
PR183
499_0402_1%
499_0402_1%
PR189
PR189
local sense revese HW
10K_0402_1%_ERTJ0EG103FA
10K_0402_1%_ERTJ0EG103FA
VSUMG-
12
PC137
PC137
PR141
PR141
.1U_0402_16V7K
.1U_0402_16V7K
VSUMG+
PR152
PR152
61.9K_0402_1%
61.9K_0402_1%
PR156
PR156
PR168
PR168
PR200
PR200
@
@
@
@
0_0402_5%
0_0402_5%
1 2
1 2
1 2
130_0402_1%
130_0402_1%
12
PC126
@PC126
@
0.1U_0402_16V7K
0.1U_0402_16V7K
42.2K_0402_1%
42.2K_0402_1%
12
68P_0402_50V8J
68P_0402_50V8J
12
150P_0402_50V8J
150P_0402_50V8J
12
PR190
PR190
137K_0402_1%
137K_0402_1%
local sense revese HW
VCCSENSE<8>
VSSSENSE<8>
4 4
local sense revese HW
B
PH6
PH6
1 2
PR142
PR142
1 2
11K_0402_1%
11K_0402_1%
1 2
2.61K_0402_1%
2.61K_0402_1%
12
12
PH4
PH4
470KB_0402_5%_ERTJ0EV474J
470KB_0402_5%_ERTJ0EV474J
+5VS
PR160
PR160
54.9_0402_1%
54.9_0402_1%
1 2
75_0402_5%
75_0402_5%
12
12
PH5
PH5 470KB_0402_5%_ERTJ0EV474J
470KB_0402_5%_ERTJ0EV474J
12
PR177
PR177
12
PC170
PC170
12
PC264
PC264
12
12
PR139
PR139
PC140
PC140
PC141
PC141
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
NTCG
SVID_CLK
SVID_ALERT#
SVID_DATA
1 2
PR196
PR196 0_0402_5%
0_0402_5%
+5VS
PR201
PR201
61.9K_0402_1%
61.9K_0402_1%
PR204
PR204
3.83K_0402_1%
3.83K_0402_1%
PC265
@PC265
@
330P_0402_50V7K
330P_0402_50V7K
PC262
PC262
0.01UF_0402_25V7K
0.01UF_0402_25V7K
PC142
PC142
2200P_0402_50V7K
2200P_0402_50V7K
1 2
649 +-1% 0402
649 +-1% 0402
1 2
430_0402_1%
430_0402_1%
12
0.022U_0402_25V7K
0.022U_0402_25V7K
PU13
PU13
1
2
3
4
5
6
7
8
1 2
PR197
@PR197
@
0_0402_5%
0_0402_5%
12
12
VCC_GFXSENSE<9>
VSS_GFXSENSE<9>
PR135
PR135
12
30
31
32
33
PAD
ISUMPG
ISUMNG
NTCG
VR_ON
SCLK
ISL95833HRTZ-T_TQFN32_4X4
ISL95833HRTZ-T_TQFN32_4X4
ALERT#
SDA
VR_HOT#
NTC
ISEN2
ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1
C
12
PC125
@ PC125
@
1000P_0402_50V7K
1000P_0402_50V7K
PC127
PC127
0.01UF_0402_25V7K
0.01UF_0402_25V7K
PC133
PC133
68P_0402_50V8J
68P_0402_50V8J
12
PC136
PC136
150P_0402_50V8J
150P_0402_50V8J
12
12
PR136
PR136
137K_0402_1%
137K_0402_1%
12
PR143
PR143
33.2K_0402_1%
33.2K_0402_1%
+3VS
12
PR147 1.91K_0402_1%PR147 1.91K_0402_1%
25
26
27
28
29
FBG
RTNG
BOOTG
COMPG
UGATEG
PGOODG
PHASEG
LGATEG
LGATE1
PHASE1
UGATE1
16
PR202 1.91K_0402_1%PR202 1.91K_0402_1%
12
PR187
PR187
PR146
PR146
649 +-1% 0402
649 +-1% 0402
1 2
12
PC143
PC143
2200P_0402_50V7K
2200P_0402_50V7K
VCCP
PWM2
324_0402_1%
324_0402_1%
BOOTA_GFX
UGA_GFX
PHASEA_GFX
LGA_GFX
24
23
22
21
VDD
PR185 1.91K_0402_1%@ PR185 1. 91K_0402_1%@
20
19
LG1_CPU
18
PHASE1_CPU
17
UG1_CPU
BOOT_CPU
12
12
PC169
PC169
1 2
0.068U_0402_16V7K
0.068U_0402_16V7K
PC134
PC134
470P_0402_50V7K
470P_0402_50V7K
12
499_0402_1%
499_0402_1%
PR140
PR140
2.55K_0402_1%
2.55K_0402_1%
12
PC258
PC258
1 2
1U_0603_10V6K
1U_0603_10V6K
VGATE <15>
+3VS
12
PC259
PC259
0.1U_0603_25V7K
0.1U_0603_25V7K PR184 11K_0402_1%PR184 11K_0402_1%
1 2
12
PR134
PR134
12
12
PR205
PR205 2K_0402_1%
2K_0402_1%
12
PC194
PC194 470P_0402_50V7K
470P_0402_50V7K
+5VS
PR162
PR162
1_0603_5%
1_0603_5%
PR159
PR159
0_0603_5%
0_0603_5%
12
VSUM+
12
PR180
PR180
2.61K_0402_1%
2.61K_0402_1%
12
PH3
PH3
10K_0402_1%_ERTJ0EG103FA
10K_0402_1%_ERTJ0EG103FA
VSUM-
12
PC266
PC266
.1U_0402_16V7K
.1U_0402_16V7K
PC261
PC261
UGA_GFX
PHASEA_GFX
0.1U_0603_25V7K
0.1U_0603_25V7K
BOOTA_GFX
PR182 2.2_0603_5%PR182 2.2_0603_5%
LGA_GFX
12
12
1U_0603_10V6K
1U_0603_10V6K
PR179 0_0603_5%PR179 0_0603_5%
12
UG1_CPU-1UG1_CPU
PHASE1_CPU
PR181
PR181
PC171
BOOT_CPU
LG1_CPU
2.2_0603_5%
2.2_0603_5%
PC171
0.1U_0603_25V7K
0.1U_0603_25V7K
12
Close Phase 1 choke
12
D
5
4
PQ27
PQ27
MDV1525URH
MDV1525URH
123
5
PC183
PC183
12
12
4
PQ28
PQ28
123
MDU1511RH_POWERDFN56-8-5
MDU1511RH_POWERDFN56-8-5
+GFX_CORE Load line = -3.9m ohm
0.22uH DCR= 0.97+-5% m ohm
+CPU_B+
5
PQ25
PQ25
@PQ26
@
4
4
PQ26
MDU1516URH_POWERDFN56-8-5
MDU1516URH_POWERDFN56-8-5
123
5
4
LG1_CPU
123
MDU1511RH_POWERDFN56-8-5
MDU1511RH_POWERDFN56-8-5
+CPU_CORE Load line= -2.9 mohm
0.22uH DCR= 1.1~1.3 m ohm
12
12
12
PC118
PC118
5
12
12
PC130
PC130
10U_0805_25V6K
10U_0805_25V6K
PR154
PR154
4.7_0603_5%
4.7_0603_5%
PC135
PC135
680P_0402_50V7K
680P_0402_50V7K
12
PC119
PC119
10U_0805_25V6K
10U_0805_25V6K
PQ33
PQ33
123
MDU1511RH_POWERDFN56-8-5
MDU1511RH_POWERDFN56-8-5
PC131
PC131
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
12
+GFX_B+
PL17
PL17
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
PC132
PC132
1 2
0.1U_0402_25V6
0.1U_0402_25V6
0.22UH 20% FDUE0640J-H-R22M=P3 25A
0.22UH 20% FDUE0640J-H-R22M=P3 25A
SH00000O200
PR130
PR130
3.65K_0402_1%
3.65K_0402_1%
1 2
VSUMG+
1
+
+
PC120
PC120
1 2
2
0.1U_0402_25V6
0.1U_0402_25V6
0.22UH_PCMB104T-R22MS_35A_20%
0.22UH_PCMB104T-R22MS_35A_20%
PR128
PR128
4.7_0603_5%
4.7_0603_5%
3.65K_0402_1%
3.65K_0402_1%
1 2
PC123
PC123
680P_0402_50V7K
680P_0402_50V7K
VSUM+
VSUM-
E
12
1
+
+
PC160
PC160
2
33U_25V_M
33U_25V_M
PL15
PL15
12
1 2
VSUMG-
PR138
PR138 1_0402_5%
1_0402_5%
B+
+VGFX_CORE
GT2 Iccmax=29A Max Istep=13A PS1 current=20A TDP=18.3A
PL18
PL18
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
12
PC21
PC21
470P_0402_50V7K
470P_0402_50V7K
+CPU_CORE
12
PR137
PR137 1_0402_5%
1_0402_5%
1 2
PR129
PR129
12
12
PC45
PC45
PC116
PC116
33U_25V_M
33U_25V_M
330P_0402_50V7K
330P_0402_50V7K
PL14
PL14
ICCMAX=33A I tdc=15.8~ 20 (Tdc-up)A PS1=20A Max Istep=28A
B+
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU/GFX_CORE
CPU/GFX_CORE
CPU/GFX_CORE
CHROME M/B LA-8942P Schem atic
CHROME M/B LA-8942P Schem atic
CHROME M/B LA-8942P Schem atic
E
41 46F riday, August 10, 2012
41 46F riday, August 10, 2012
41 46F riday, August 10, 2012
0.1
0.1
0.1
5
4
3
2
1
+VGFX_C ORE
+CPU_CO RE
CR PDDG Rev 0.95
D D
Mid-Frequency Decoupling
µF
6x22
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC165
PC165
PC164
PC164
1
1
2
1
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC166
PC166
1
2
PC168
PC168
PC167
PC167
1
2
+VGFX_C ORE
22U_0805_6.3V6M
22U_0805_6.3V6M
PC172
PC172
1
2
Mid-Frequency Decoupling 12x22µF
12
PC154
22U_0805_6.3V6M
PC154
PC153
22U_0805_6.3V6M
PC153
PC150
22U_0805_6.3V6M
PC150
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC151
PC151
1
2
22U_0805_6.3V6M
PC152
PC152
1
2
22U_0805_6.3V6M
1
2
PC155
22U_0805_6.3V6M
PC155
22U_0805_6.3V6M
1
2
PC156
22U_0805_6.3V6M
PC156
22U_0805_6.3V6M
1
2
PC157
22U_0805_6.3V6M
PC157
22U_0805_6.3V6M
1
2
PC234
22U_0805_6.3V6M
PC234
22U_0805_6.3V6M
1
1
2
2
PC158
22U_0805_6.3V6M
PC158
22U_0805_6.3V6M
PC233
22U_0805_6.3V6M
PC233
22U_0805_6.3V6M
1
2
PC159
22U_0805_6.3V6M
PC159
22U_0805_6.3V6M
1
2
PC173
PC173
10U_0603_6.3V6M
10U_0603_6.3V6M
Low-Frequency
PC184
Decoupling 3x330 µF 9m
C C
PC186
2.2U_0402_6.3V6M
PC186
2.2U_0402_6.3V6M
1
2
PC187
2.2U_0402_6.3V6M
PC187
2.2U_0402_6.3V6M
1
2
1
+
+
PC179
PC179
2
330U_D2_2V_Y
330U_D2_2V_Y
PC189
2.2U_0402_6.3V6M
PC189
2.2U_0402_6.3V6M
PC188
2.2U_0402_6.3V6M
PC188
2.2U_0402_6.3V6M
1
1
2
2
@
@
1
PC180
PC180
2
1
2
1
+
+
PC181
PC181
330U_D2_2V_Y
330U_D2_2V_Y
PC190
2.2U_0402_6.3V6M
PC190
2.2U_0402_6.3V6M
1
2
1
+
+
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+
+
PC182
PC182
2
330U_D2_2V_Y
330U_D2_2V_Y
PC191
PC191
330U_D2_2V_Y
330U_D2_2V_Y
PC192
2.2U_0402_6.3V6M
PC192
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
2.2U_0402_6.3V6M
1
2
+CPU_CO RE
PC108
470P_0402_50V7 K
PC108
470P_0402_50V7 K
PC74
330P_0402_50V7 K
PC74
330P_0402_50V7 K
PC193
PC193
12
12
PC184
330U_D2_2V_Y
330U_D2_2V_Y
12
PC175
PC175
PC174
PC174
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
+
+
+
+
2
2
PC185
PC185
330U_D2_2V_Y
330U_D2_2V_Y
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC205
PC205
PC204
PC204
1
1
2
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC219
PC219
1
1
12
12
PC177
PC177
PC176
PC176
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
Low-Frequency Decoupling 2x330 µF 9m
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC206
PC206
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC220
PC220
1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC208
PC208
PC207
PC207
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC222
PC222
PC221
PC221
1
12
12
10U_0603_6.3V6M
10U_0603_6.3V6M
PC209
PC209
1
2
PC223
PC223
1
Mid-Frequency Decoupling
PC178
PC178
6x10µF 0603
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
High-Frequency Decoupling 11x1
µF
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
PC196
2.2U_0402_6.3V6M
PC196
2.2U_0402_6.3V6M
PC195
2.2U_0402_6.3V6M
PC195
2.2U_0402_6.3V6M
1
1
2
B B
+1.05VS_ VTT
1
2
2
High-Frequency Decoupling 27x1µF
1U_0402_6.3V6K
1U_0402_6.3V6K
PC254
PC254
1
1
2
2
A A
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC240
PC240
PC239
PC239
1U_0402_6.3V6K
1U_0402_6.3V6K
PC253
PC253
PC238
PC238
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC252
PC252
PC251
PC251
1
1
2
2
5
2.2U_0402_6.3V6M
PC197
2.2U_0402_6.3V6M
PC197
2.2U_0402_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
PC237
PC237
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC249
PC249
1
2
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC236
PC236
PC231
PC231
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC248
PC248
PC250
PC250
1
1
2
2
PC200
2.2U_0402_6.3V6M
PC200
2.2U_0402_6.3V6M
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC230
PC230
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC246
PC246
1
2
PC201
2.2U_0402_6.3V6M
PC201
2.2U_0402_6.3V6M
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC235
PC235
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC247
PC247
1
2
PC202
2.2U_0402_6.3V6M
PC202
2.2U_0402_6.3V6M
1
High-Frequency Decoupling 16x2.2µF
2
+1.05VS_ VTT
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC229
PC229
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC245
PC245
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC228
PC228
PC226
PC226
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC241
PC241
PC243
PC243
1
1
2
2
4
1U_0402_6.3V6K
PC225
PC225
PC227
PC227
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC244
PC244
PC242
PC242
1
2
12
PC224
PC224
10U_0603_6.3V6M
10U_0603_6.3V6M
1
+
+
Low-Frequency
PC203
PC203
Decoupling 1x330 µF 9m
2
330U_D2_2V_Y
330U_D2_2V_Y
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
12
PC217
PC217
PC218
PC218
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
PC216
PC216
10U_0603_6.3V6M
10U_0603_6.3V6M
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
2012/03/ 21 2013/03/ 21
3
Mid-Frequency Decoupling 10x10µF
12
12
PC214
PC214
PC215
PC215
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
PC199
2.2U_0402_6.3V6M
PC199
2.2U_0402_6.3V6M
PC198
2.2U_0402_6.3V6M
PC198
2
12
PC212
PC212
PC213
PC213
10U_0603_6.3V6M
10U_0603_6.3V6M
Deciphered Date
Deciphered Date
Deciphered Date
12
PC211
PC211
10U_0603_6.3V6M
10U_0603_6.3V6M
2
2
12
12
PC210
PC210
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PWR - PROCESSOR DECOUPLING
PWR - PROCESSOR DECOUPLING
PWR - PROCESSOR DECOUPLING
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
42 46Friday, August 10, 20 12
42 46Friday, August 10, 20 12
42 46Friday, August 10, 20 12
1
0.1
0.1
0.1
5
4
3
2
Version change list (P.I.R. List) Page 1 of 1
for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
1
D D
Modify DCIN/Pre-change power circuit 34
0.1 2012/4/5
2
3
0.1 2012/4/5Modify CHARGER 36 EVT
Add PC301 330P_0402_50V7K, PC302 470P_0402_50V7K for EMI solution
35Modify Battery CONN/OTP power circuit EVT
2012/4/50.1 Add PR80 0ohm to GND for BOM control
EVT
(9012 AGND)
Add PC16,PC63 330P_0402_50V7K, PC20, PC48 470P_0402_50V7K, PC113, PC114, PC115, PC117, PC121 0.1U_0402_25V6 PR26 4.7_1206_5%, PC39 680P_0402_50V7K for EMI solution
Add Snubber PR48 4.7_1206_5%,
4
5
C C
Modify 3VALWP/5VALWP power circuit 0.1 2012/4/537
Modify 1.5VP/0.75VSP power circuit 0.1 2012/4/538
6
7
8
9
PC58 680P_0402_50V7K for EMI solution
Add Snubber PR175 4.7_1206_5%, PC75 680P_0402_50V7K for EMI solution
Delete PR105 5.1K_0402_1%; PR178 0_0402_5%, Add PR188 4.99K_0402_1%; PR186 1.2K_0402_1%,
400.1Modify 1.05VS power circuit
PC122 1000P_0402_50V7K; PC124 0.1U_0402_25V6 for improve load response
Add PC45 330P_0402_50V7K, PC21 470P_0402_50V7K for EMI solution Add PC169 0.047I_0402_25V7K,
410.1Modify CPU/GFX_CORE power circuit
change PR187 from 523 to 348_0402_1% change PR135 from 412 to 430_0402_1%
change PL14 from 0.22U_PCMB104T-R22MS_35A_20% to 0.22UH MMD-10RCZ-R22M-28A (from H=3 to H=4) change PR201, PR152 from 27.4K to 61.9K_0402_1%, change PH4,PH5 470K_0402_5%(from Thinking to Panasonic) thermal issue
Add PC74 330P_0402_50V7K, PC108 470P_0402_50V7K for EMI solution
EVT
EVT
2012/4/5 EVT
EVT2012/4/5
EVT2012/4/5410.1Modify CPU/GFX_CORE power circuit
EVT2012/4/5420.1Modify PROCESSOR DECOUPLING power circuit
B B
10
11
12
13
Modify 3VALWP/5VALWP power circuit 0.1 2012/4/2637
0.1 2012/4/5Modify DCIN/Pre-change power circuit 34
0.1
0.1 2012/4/2635Modify Battery CONN/OTP power circuit EVT
Sawp PC10 and PC301; Sawp PC14 and PC302
Add PR105 0ohm to GND for BOM control (9012 H_PROCHOT#_EC) change PR61 from 21K to 21.5K and PR66 from 9.53K to 9.76K for 92 throttling and 56C recovery
Delete PR78 and add PR61, PR63 for EC932, change PR66 from 9.53kohm to 9.76k ohm, OTP setting 92C thermal protection, 56C recovery
Change PR56 from 402K to 100K for 3V/5V enable setting,
EVT
2012/4/18Modify Battery CONN/OTP power circuit 35 EVT
EVT
Add PR53 for 3V/5V enable setting.
14
A A
15
5
Modify CPU/GFX_CORE power circuit 0.1 41
Modify CHARGER 0.1 2012/5/236
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
change PR187 from 348 to 324 for OCP 40A fine tune, change PC169 from 0.047U to 0.068U (RC match)
change PC22 from 0.1U_0402_25V6 to 330P_0402_50V7K
Compal Secret Data
Compal Secret Data
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/4/26 EVT
EVT
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PIR1 (PWR)
PIR1 (PWR)
PIR1 (PWR)
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
43 46Friday, August 10, 201 2
43 46Friday, August 10, 201 2
43 46Friday, August 10, 201 2
1
0.1
0.1
0.1
5
4
3
2
1
Version change list (P.I.R. List)
Page 1 of 1 for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
D D
1
2
3
Modify Prochot# setting from KB9012 to G718(EVT MEMO introction)
0.2 35
Modify Battery CONN/OTP power circuit Modify 3VALWP/5VALWP power circuit 37
0.2 35Modify Battery CONN/OTP power circuit
Remove PQ16 PC302 PR10 PR11
0.2
4
0.2
5
C C
6
7
Modify 3v5v EN pin voltage (from 4.9V to 4.524V) for EN pin rating.
Modify 3v5v EN pin voltage for EN pin rating.
0.3 35 Change PR82 from 1000K to 887K.
change PR63 from 2.26K to 590 ohm, PR68 from 9.1 to 1.91K From 46.2W~38W to 42.8W~33.2W
Sawp PR81 and PR82 location leverage Mimic winsows
Add PR111 between 3VLP and battery connect TH for EC932
Remove 51ON# RC, BATT+ to VS switch
34
Remove PR64 35MAINPWON double pull high.
Change PR108 from 316K to 412K.350.2
2012/5/7 EVT
2012/5/1735DVT0.2
2012/5/23 DVT
2012/5/23
2012/5/23
2012/5/23
2012/7/9 PVT
8
9
B B
10
11
12
13
14
A A
15
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PIR1 (PWR)
PIR1 (PWR)
PIR1 (PWR)
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
44 46Friday, August 10, 201 2
44 46Friday, August 10, 201 2
44 46Friday, August 10, 201 2
1
0.1
0.1
0.1
5
4
3
2
1
VR_ON
D D
ADAPTER
BATTERY
B+
SYSON
SUSP#
SUSP#
(PU13) RT8167BGQW
Page 41WQFN40
(PU8) RT8207MZQW
WQFN20
(PU9) TPS51212DSCR
Page 38
+CPU_CORE
+VGFX_CORE
+1.5V
+0.75VS
+1.05VSP
SUSP
PJ11 & PJ12
(U38) AO4478L_SO8
+1.05VS_VTT
Page 33
+1.5VS
J1
+1.5V_CPU_VDDQ
SON10 Page 40
VCCPPWRGOOD
CHARGER
EC_ON
MAINPWON
C C
+LED_VOUT
+5VALW
SUSP
(U35) AO4478L
SOP8 Page 33
+5VS
SYSON#
(U28)
G547I2P81U
MSOP8 SOT23-3
+USB3_VCCA
(PU7) SY8037DCC
DFN12 Page 39
(PU2) RT8243BZQW
WQFN20 Page 37
PCH_PWR_EN#
(Q8)
AP2301GN-HF
Page 20
+5VREF_SUS
PCH_PWR_EN#
(Q68) AP2301GN-HF
SOT23-3
+VCCSUS3_3
+VCCSAP
Page 20
R285
+3V_LAN
PJ4
PCH_PWR_EN#
Q37
+VCCSA
R359
+3VALW_EC
+3VALW
R630
+3VALW_PCH
SUSP
WLAN_ON
(U37) AO4478L +3VS_WLAN
SOP8 Page 33
+3VS
CR_PWR_EN
(U27) AP2301MPG
MSOP8 Page 26
+SDPWR_MMCPWR
B B
+CRT_VCC
+HDMI_5V_OUT
+5VS_HDD
(U34)
(U25) BCM57785
+1.2V_LAN
J4
R453
+DVDD_AUDIO
+3VS_WLAN
+CAM_VCC
PCH_ENVDD
(Q10) AO3419L
SO23-3 Page 22
+LCDVDD
+VDDA ALC271X-VB6
TPM (U33) APL5607KI-TRG
TP
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Title
Title
Title
Power Rail
Power Rail
Power Rail
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
45 46Friday, August 10, 2012
45 46Friday, August 10, 2012
45 46Friday, August 10, 2012
0.1
0.1
0.1
5
4
3
2
1
D D
AC MODE
BATT MODE
C C
B B
A1
VIN
BATT
B1
V
V
PU1
B3
51ON#
A2
B+
B2
PQ17
V
VV
PU2
V
B+
EC_ON
V
B4
A5
A4
ON/OFF
A3
+3VALW
+5VALW
B7
B6
B5
V
V
A5
B7 2
V
EC
U30
V
2
PCH_PWR_EN#
9012_PCH_PWROK
4
PCH_RSMRST#
5
PBTN_OUT#
PM_SLP_S3# PM_SLP_S4# PM_SLP_S5# PM_SLP_A#
V
PM_SLP_SUS#
SYSON
SUSP#,SUSP
2
10
6
7 SYSON#
8
Q68,+VCCDSW3_3
V
Q8,+5VREF_SUS
+VCCDSW3_3
3
+5VREF_SUS
V
V
V
PCH
U16
V V
PU8
V
+1.5VP
U35
V
+5VS
U37
V
+3VS
U38
V
+1.5VS
13
PM_DRAM_PWRGD
14
H_CPUPWRGD
15
PLT_RST#
SYS_PWROK
VV
U2
V
CPU
UCPU1
V
V
PCH_PWROK
V V
U19
11
VGATE
PU6
VV
+1.8VS
SUSP#,SUSP
VR_ON
Issued Date
Issued Date
Issued Date
VCCPPWRGOOD
9
3
PU9
V
+1.05VSP
A A
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
PU8
V
+0.75VSP
PU7 +VCCSAP
PU10 +CPU_CORE
V
+VGFX_CORE
Compal Secret Data
Compal Secret Data
2012/03/21 2013/03/21
2012/03/21 2013/03/21
2012/03/21 2013/03/21
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Power sequence
Power sequence
Power sequence
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
CHROME M/B LA-8942P Schematic
1
46 46Friday, August 10, 2012
46 46Friday, August 10, 2012
46 46Friday, August 10, 2012
0.1
0.1
0.1
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