COMPAL LA-8868P Schematics

A

1 1

B

C

D

E

VBLE4 / VBLE5

2 2

Eureka

LA-8868P SchematicREV 1.0

3 3

AMD Brazos 2.0 / Zacate APU / Hudson-M3L FCH

2012-07-12 Rev 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

147Saturday, September 07, 2013

E

B

of

A

B

C

D

E

CRT

Two DIMM/One Channel

page 20

1 1

LVDS Conn.

page 19

HDMI Conn.

page 21

AMD Zacate APU

FT1 BGA 413-Ball 19mm x 19mm

PCIE-Express 4X 5GHz

page 5,6,7,8

x4 UMI Gen. 1

2.5GT/s per lane

VGA (DDR3)

ATI Seymour XTX S3 64bit with 1GB

2 2

page 11~18

Hudson M3L

(A38M)

BGA 656-Ball 23mm x 23mm

HDMI Conn.

page 21

LCD Conn. CRT

RJ45

USB PORT 3.0 x2(Left)

USB3.0 port 0,1

RTL8105E-VB 10/100M RTL811F Giga

page 20page 19

PCIe port 0

page 28

PCIe 1x

page 36page 36

1.5V 2.5GHz(250MB/s)

USB3.0x2

page 22~26

1.5V DDRIII 800MHZ

Memory BUS(DDRIII)

1.5V DDRIII 1066

USB2.0x6

5V 480MHz

PCIe 1x

1.5V 2.5GHz(250MB/s)

SATA port 0

5V 3GHz(300MB/s)

SATA port 1

5V 3GHz(300MB/s)

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB PORT 2.0 x2(Right)

USB port 0,1

USB PORT 2.0 x2(Left)

USB port 10, 11

2IN1

RTS5129

USB port 7

Int. Camera

USB port 5

PCIeMini Card WiMax

USB port 8

page 29

PCIeMini Card WLAN

PCIe port 1

page 29

SATA HDD

SATA ODD

page 27

page 28

page 32

page 19

page9,10

Daughter board

3 3

3.3V 33 MHz

LPC BUS

HD Audio

3.3V/1.5V 24MHz

HDA Codec

ALC259-GR

page 31

SPK Conn

page 31

JCRIO (HP & MIC)

page 32

RTC CKT.

Power On/Off CKT.

RUSB+Power/B LS-8865P

page 27

TPM

page 32

Debug Port

page 34

JTP (Touch Pad)

page 35

ENE KB9012

page 33

Int.KBD

page 34

Audio+CR/B LS-8864P

DC/DC Interface CKT.

4 4

Power Circuit DC/DC

A

ODD/B LS-8862P

TP/B LS-8863P

page 32

page 27

page 35

Daughter board

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

247Saturday, September 07, 2013

E

of

B

A

B

C

D

E

DESIGN CURRENT 0.1A

B+

1 1

RT8205LZQW

SUSP

N-CHANNEL SI4800BDY

SUSP#

Y8032ABC

FCH_PWR_EN

SY8036LDBC

SUSP

N-CHANNEL

FDS6676AS-SO8

ODD_PWR

A03413-SOT23

DESIGN CURRENT 0.1A DESIGN CURRENT 4A

DESIGN CURRENT 6.5A

DESIGN CURRENT 1.5A

DESIGN CURRENT 2.6A

DESIGN CURRENT 1.2A

DESIGN CURRENT 3.8A

+3VL +5VL +5VALW

+5VS

+5VS_ODD

+1.8VS

+1.1VALW

+1.1VS

SUSP#

2 2

APL5916KAI-TRL

DESIGN CURRENT 2.5A

DESIGN CURRENT 1.7A

+1.05VS

+3VALW

SUSP

N-CHANNEL SI4800BDY

LCD_ENVDD

P-CHANNEL

AO-3413

WLAN_PWR#

P-CHANNEL

VR_ON

3 3

RT8870AZQW

AO-3413

SYSON

N-CHANNEL SI4800BDY

SUSP

RT8207MZQW

DESIGN CURRENT 4A

DESIGN CURRENT 2.0A

DESIGN CURRENT 500mA

DESIGN CURRENT 11A

DESIGN CURRENT 10A

DESIGN CURRENT 7A

DESIGN CURRENT 5A

+3VS

+LCD_VDD

+3V_LAN

+APU_CORE

+APU_CORE_NB

+1.5V

+1.5VS

SUSP#

APL5930KAI-TRG

DESIGN CURRENT 3A

+1.0VS

DESIGN CURRENT 1.5A

SUSP#

DESIGN CURRENT 21.6A

TPS51518RUK

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+0.75VS

+VGA_CORE

C

Compal Secret Data

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

SCHEMATIC, MB A8868

4019K4

347Saturday, September 07, 2013

of

E

of

B

A

Voltage Rails

O MEANS ON X MEANS OFF

B

C

D

E

Symbol Note :

: means Digital Ground : means Analog Ground

1 1

State

power plane

B+ +3VL +5VL

+RTCVCC

+3VALW

+1.5V+5VALW

+1.1VALW

+5VS +3VS +2.5VS +1.8VS +1.5VS +1.1VS +0.9VS +0.75VS

+NB_CORE +VDDNB +CPU_CORE_0

GSENSOR@ : means just reserve for G sensor

part 1STGSENSOR@ : means just reserve 1st G sensor IC

@ : means just reserve , no build K625R3@ : means just for 1.5G CPU K125R3@ : means just for 1.7G CPU K325R3@ : means just for 1.3G CPU K625R1@ : means just for 1.5G CPU K125R1@ : means just for 1.7G CPU K325R1@ : means just for 1.3G CPU

M@ : means just reserve for

13.3 control

S@ : means just reserve for 11.6 control

1ST@ : means just reserve 1st G sensor IC

2ND@ : means just reserve 2nd G sensor IC 2NDGSENSOR@ : means just reserve 2nd G sensor IC

S0

2 2

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O O O O O

X

SB SM Bus1 Address

O O O O

X

O

XX X

SB SM Bus2 Address

OO OO

X

NOSIDE@ : means just reserve NOSIDE

SIDE@ : means just reserve SIDE

port

RS880MR1@ : means just for RS880MR1

RS880MR3@ : means just for RS880MR3

SB820MR1@ : means just for SB820MR1 SB820MR3@ : means just for SB820MR3

HEX

A0 H

D2 H

0001 011X bSmart Battery

Address

1010 0000 b 1010 0100 bA4 H 1101 0010 b

PowerPower

+3VS

DevicePower

+3VALW

WLAN/WIMAX

EC SM Bus2 Address

Device

G-Sensor

B

HEX Address

98 H

1001 100X bCPU_ADM1032-1

SMBUS Control Table

V

Deciphered Date

CPU THERMAL SENSOR

SODIMM 0

V

D

SOURCE

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 LCD_EDID_CLK LCD_EDID_DATA HDMICLK HDMIDAT SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/05/18 2013/10/05

KB926

APU FT1

FCH M1

BATT

Compal Secret Data

CLK GEN

WLAN WWAN

LCD DDC ROM

HDMI DDC ROM

APU

V

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

447Saturday, September 07, 2013

E

B

of

Power

3 3

+3VS +3VS +3VS

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 Clock Generator

EC SM Bus1 Address

Device Address Address

+3VL +3VS

4 4

HEX HEX

16 H

A

B

C

D

E

PCIE_CTX_GRX_P[3..0]<11> PCIE_CTX_GRX_N[3..0]<11>

PCIE_CRX_GTX_P[3..0]<11> PCIE_CRX_GTX_N[3..0]<11>

1 1

2 2

PCIE_CTX_GRX_P[3..0] PCIE_CTX_GRX_N[3..0]

PCIE_CRX_GTX_P[3..0] PCIE_CRX_GTX_N[3..0]

+1.05VS

1 2

R1

2K_0402_1%

UMI_RX0P<22> UMI_RX0N<22>

UMI_RX1P<22> UMI_RX1N<22>

UMI_RX2P<22> UMI_RX2N<22>

UMI_RX3P<22> UMI_RX3N<22>

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1

PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2

PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3

DIS@

U1A

E1R1@

AA6

P_GPP_RXP0

Y6

P_GPP_RXN0

AB4

P_GPP_RXP1

AC4

P_GPP_RXN1

AA1

P_GPP_RXP2

AA2

P_GPP_RXN2

Y4

P_GPP_RXP3

Y3

P_GPP_RXN3

Y14

P_ZVDD_10

AA12

P_UMI_RXP0

Y12

P_UMI_RXN0

AA10

P_UMI_RXP1

Y10

P_UMI_RXN1

AB10

P_UMI_RXP2

AC10

P_UMI_RXN2

AC7

P_UMI_RXP3

AB7

P_UMI_RXN3

S IC E SERIES EME450GBB22GVA 1.65G BGA

PCIE I/F

UMI I/F

P_GPP_TXP0 P_GPP_TXN0

P_GPP_TXP1 P_GPP_TXN1

P_GPP_TXP2 P_GPP_TXN2

P_GPP_TXP3 P_GPP_TXN3

P_ZVSS

P_UMI_TXP0 P_UMI_TXN0

P_UMI_TXP1 P_UMI_TXN1

P_UMI_TXP2 P_UMI_TXN2

P_UMI_TXP3 P_UMI_TXN3

AB6

PCIE_CTX_C_GRX_P0

AC6

PCIE_CTX_C_GRX_N0

AB3

PCIE_CTX_C_GRX_P1

AC3

PCIE_CTX_C_GRX_N1

Y1

PCIE_CTX_C_GRX_P2

Y2

PCIE_CTX_C_GRX_N2

V3

PCIE_CTX_C_GRX_P3

V4

PCIE_CTX_C_GRX_N3

AA14

P_ZVSSP_ZVDD_10

AB12

UMI_TX0P_C

AC12

UMI_TX0N_C

AC11

UMI_TX1P_C

AB11

UMI_TX1N_C

AA8

UMI_TX2P_C

Y8

UMI_TX2N_C

AB8

UMI_TX3P_C

AC8

UMI_TX3N_C

1 2

C518 0.1U_0402_16V7KDIS@

1 2

C519 0.1U_0402_16V7KDIS@

1 2

C520 0.1U_0402_16V7KDIS@

1 2

C521 0.1U_0402_16V7KDIS@

1 2

C522 0.1U_0402_16V7KDIS@

1 2

C523 0.1U_0402_16V7KDIS@

1 2

C524 0.1U_0402_16V7KDIS@

1 2

C525 0.1U_0402_16V7KDIS@

1 2

R2

DIS@

1.27K_0402_1%

1 2

C2 0.1U_0402_16V7K

1 2

C1 0.1U_0402_16V7K

1 2

C4 0.1U_0402_16V7K

1 2

C3 0.1U_0402_16V7K

1 2

C5 0.1U_0402_16V7K

1 2

C6 0.1U_0402_16V7K

1 2

C8 0.1U_0402_16V7K

1 2

C7 0.1U_0402_16V7K

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1

PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2

PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3

UMI_TX0P <22> UMI_TX0N <22>

UMI_TX1P <22> UMI_TX1N <22>

UMI_TX2P <22> UMI_TX2N <22>

UMI_TX3P <22> UMI_TX3N <22>

To FCHFrom FCH

FAN Control Circuit

+5VS

1A

3 3

EN_DFAN1<33>

4 4

A

+FAN

10mil

1

C36 10U_0805_10V6K

2

B

10U_0805_10V6K

U3

1

EN

GND

2

VIN

GND

3

VOUT

GND

4

VSET

GND

APL5607KI-TRG_SO8

8 7 6 5

+FAN

2

C18

C20 1000P_0402_50V7K @

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

JFAN

@

1

2

3

4

GND

5

GND

ACES_85204-0300N

R63 10K_0402_5%

12

+3VS

1

C19

0.01U_0402_25V7K @

2

2012/05/18 2013/10/05

FAN_SPEED1 <33>

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

547Saturday, September 07, 2013

E

B

of

1

A A

DDR_A_BS#0<9,10> DDR_A_BS#1<9,10> DDR_A_BS#2<9,10>

B B

DDR_A_CLK0<9> DDR_A_CLK#0<9> DDR_A_CLK1<9> DDR_A_CLK#1<9> DDR_B_CLK2<10> DDR_B_CLK#2<10> DDR_B_CLK3<10>

+1.5V

1 2

R4 1K_0402_5%

C C

MA_EVENT_L

8/6 Add C78 for ESD request

DDR_RST#

1

C78

180P_0402_50V8J

2

DDR_B_CLK#3<10>

DDR_RST#<9,10> MA_EVENT_L<9,10>

DDR_CKE0_DIMMA<9,10> DDR_CKE1_DIMMA<9,10>

DDR_A_ODT0<9> DDR_A_ODT1<9> DDR_B_ODT0<10> DDR_B_ODT1<10>

DDR_CS0_DIMMA#<9> DDR_CS1_DIMMA#<9> DDR_CS0_DIMMB#<10> DDR_CS1_DIMMB#<10>

DDR_A_RAS#<9,10> DDR_A_CAS#<9,10> DDR_A_WE#<9,10>

2

U1E

E1R1@

M_ADD0 M_ADD1 M_ADD2 M_ADD3 M_ADD4 M_ADD5 M_ADD6 M_ADD7 M_ADD8 M_ADD9 M_ADD10 M_ADD11 M_ADD12 M_ADD13 M_ADD14 M_ADD15

M_BANK0 M_BANK1 M_BANK2

M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7

M_DQS_H0 M_DQS_L0 M_DQS_H1 M_DQS_L1 M_DQS_H2 M_DQS_L2 M_DQS_H3 M_DQS_L3 M_DQS_H4 M_DQS_L4 M_DQS_H5 M_DQS_L5 M_DQS_H6 M_DQS_L6 M_DQS_H7 M_DQS_L7

M_CLK_H0 M_CLK_L0 M_CLK_H1 M_CLK_L1 M_CLK_H2 M_CLK_L2 M_CLK_H3 M_CLK_L3

M_RESET_L M_EVENT_L

M_CKE0 M_CKE1

M0_ODT0 M0_ODT1 M1_ODT0 M1_ODT1

M0_CS_L0 M0_CS_L1 M1_CS_L0 M1_CS_L1

M_RAS_L M_CAS_L M_WE_L

S IC E SERIES EME450GBB22GVA 1.65G BGA

DDR SYSTEM MEMORY

M_ZVDDIO_MEM_S

AB20 AA16

AC20 AC21 AB16 AC16

R17 H19 J17 H18 H17 G17 H15 G18 F19 E19 T19 F17 E18

W17

E16 G15

R18 T18 F16

D15 B19 D21 H22 P23 V23

A16 B16 B20 A20 E23 E22 J22 J23 R22 P22

W22

V22

M17 M16 M19 M18

N18 N19 L18 L17

L23 N17

F15 E15

W19

V15 U19

W15

T17

W16

U17 V16

U18 V19 V17

DDR_A_MA0<9,10> DDR_A_MA1<9,10> DDR_A_MA2<9,10> DDR_A_MA3<9,10> DDR_A_MA4<9,10> DDR_A_MA5<9,10> DDR_A_MA6<9,10> DDR_A_MA7<9,10> DDR_A_MA8<9,10> DDR_A_MA9<9,10> DDR_A_MA10<9,10> DDR_A_MA11<9,10> DDR_A_MA12<9,10> DDR_A_MA13<9,10> DDR_A_MA14<9,10> DDR_A_MA15<9,10>

DDR_A_DM0<9,10> DDR_A_DM1<9,10> DDR_A_DM2<9,10> DDR_A_DM3<9,10> DDR_A_DM4<9,10> DDR_A_DM5<9,10> DDR_A_DM6<9,10> DDR_A_DM7<9,10>

DDR_A_DQS0<9,10>

DDR_A_DQS#0<9,10>

DDR_A_DQS1<9,10>

DDR_A_DQS#1<9,10>

DDR_A_DQS2<9,10>

DDR_A_DQS#2<9,10>

DDR_A_DQS3<9,10>

DDR_A_DQS#3<9,10>

DDR_A_DQS4<9,10>

DDR_A_DQS#4<9,10>

DDR_A_DQS5<9,10>

DDR_A_DQS#5<9,10>

DDR_A_DQS6<9,10>

DDR_A_DQS#6<9,10>

DDR_A_DQS7<9,10>

DDR_A_DQS#7<9,10>

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1 DDR_A_CLK#1 DDR_B_CLK2 DDR_B_CLK#2 DDR_B_CLK3 DDR_B_CLK#3

DDR_RST# MA_EVENT_L

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB# DDR_CS1_DIMMB#

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7

M_DATA8

M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15

M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23

M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39

M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47

M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55

M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63

M_VREF

3

B14 A15 A17 D18 A14 C14 C16 D16

C18 A19 B21 D20 A18 B18 A21 C20

C23 D23 F23 F22 C22 D22 F20 F21

H21 H23 K22 K21 G23 H20 K20 K23

N23 P21 T20 T23 M20 P20 R23 T22

V20 V21 Y23 Y22 T21 U23 W23 Y21

Y20 AB22 AC19 AA18 AA23 AA20 AB19 Y18

AC17 Y16 AB14 AC14 AC18 AB18 AB15 AC15

M23

M22

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

M_ZVDDIO_MEM_S

DDR_A_D0 <9,10> DDR_A_D1 <9,10> DDR_A_D2 <9,10> DDR_A_D3 <9,10> DDR_A_D4 <9,10> DDR_A_D5 <9,10> DDR_A_D6 <9,10> DDR_A_D7 <9,10>

DDR_A_D8 <9,10> DDR_A_D9 <9,10> DDR_A_D10 <9,10> DDR_A_D11 <9,10> DDR_A_D12 <9,10> DDR_A_D13 <9,10> DDR_A_D14 <9,10> DDR_A_D15 <9,10>

DDR_A_D16 <9,10> DDR_A_D17 <9,10> DDR_A_D18 <9,10> DDR_A_D19 <9,10> DDR_A_D20 <9,10> DDR_A_D21 <9,10> DDR_A_D22 <9,10> DDR_A_D23 <9,10>

DDR_A_D24 <9,10> DDR_A_D25 <9,10> DDR_A_D26 <9,10> DDR_A_D27 <9,10> DDR_A_D28 <9,10> DDR_A_D29 <9,10> DDR_A_D30 <9,10> DDR_A_D31 <9,10>

DDR_A_D32 <9,10> DDR_A_D33 <9,10> DDR_A_D34 <9,10> DDR_A_D35 <9,10> DDR_A_D36 <9,10> DDR_A_D37 <9,10> DDR_A_D38 <9,10> DDR_A_D39 <9,10>

DDR_A_D40 <9,10> DDR_A_D41 <9,10> DDR_A_D42 <9,10> DDR_A_D43 <9,10> DDR_A_D44 <9,10> DDR_A_D45 <9,10> DDR_A_D46 <9,10> DDR_A_D47 <9,10>

DDR_A_D48 <9,10> DDR_A_D49 <9,10> DDR_A_D50 <9,10> DDR_A_D51 <9,10> DDR_A_D52 <9,10> DDR_A_D53 <9,10> DDR_A_D54 <9,10> DDR_A_D55 <9,10>

DDR_A_D56 <9,10> DDR_A_D57 <9,10> DDR_A_D58 <9,10> DDR_A_D59 <9,10> DDR_A_D60 <9,10> DDR_A_D61 <9,10> DDR_A_D62 <9,10> DDR_A_D63 <9,10>

1 2

R6 39.2_0402_1%

+1.5V

4

C13

1000P_0402_25V8J

1

2

15 mil

+MEM_VREF

1

C14

0.1U_0402_16V7K

2

+1.5V

1 2

R5 1K_0402_1%

R7 1K_0402_1%

5

Close to CPU within 1"

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

5

of

647Saturday, September 07, 2013

B

5

4

3

2

1

+1.8VS

1 2

R10 1K_0402_5%

1 2

R23 1K_0402_5%

1 2

R24 300_0402_5%

1 2

R22 300_0402_5%

D D

R26 510_0402_1% R25 1K_0402_5%

1 2 1 2

APU_RST#

APU_PWRGD

C103 100P_0402_50V8J@

C104 100P_0402_50V8J@

1 2

12/13 For debug if layout cross mote

+3VS

1 2

R16 1K_0402_5%

1 2

R17 1K_0402_5%

C C

1 2

R19 1K_0402_5%

1 2

R31 1K_0402_5%

APU_SVC APU_SVD APU_RST# APU_PWRGD TEST_25_L TEST36

APU_ALERT# APU_PROCHOT# APU_SIC APU_SID

Check

TO EC

APU_VDDNB_RUN_FB_H<43> APU_VDD0_RUN_FB_H<43>

UMA_HDMI_TX2+<21> UMA_HDMI_TX2-<21>

UMA_HDMI_TX1+<21> UMA_HDMI_TX1-<21>

UMA_HDMI_TX0+<21> UMA_HDMI_TX0-<21>

UMA_HDMI_TXC+<21> UMA_HDMI_TXC-<21>

UMA_TXOUT2+<19>

UMA_TXOUT2-<19>

UMA_TXOUT1+<19>

UMA_TXOUT1-<19>

UMA_TXOUT0+<19>

UMA_TXOUT0-<19>

UMA_TXCLK+<19>

UMA_TXCLK-<19>

APU_CLK<22> APU_CLK#<22>

APU_DISP_CLK<22> APU_DISP_CLK#<22>

APU_SVC<43>

EC_SMB_CK2<18,33> EC_SMB_DA2<18,33>

H_PROCHOT#<22,33>

APU_VDD0_RUN_FB_L<43> APU_VDDNB_RUN_FB_L<43>

T13PAD

APU_SVD<43>

R809 0_0402_5% R810 0_0402_5%

APU_RST#<22> APU_PWRGD<22,43>

1 2

@

R34 0_0402_5%

1 2

R931 0_0402_5%

1 2

R932 0_0402_5%

1 2

@

1 2

@

APU_SVC APU_SVD

APU_SIC APU_SID

APU_RST# APU_PWRGD

APU_PROCHOT# APU_THERMTRIP#_R APU_ALERT#

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

VDDIO_MEM_S_SENSE

9/26 Add R931 R932 for AMD common design

U1B

E1R1@

A8

TDP1_TXP0

B8

TDP1_TXN0

B9

TDP1_TXP1

A9

TDP1_TXN1

D10

TDP1_TXP2

C10

TDP1_TXN2

A10

TDP1_TXP3

B10

TDP1_TXN3

B5

LTDP0_TXP0

A5

LTDP0_TXN0

D6

LTDP0_TXP1

C6

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

D8

LTDP0_TXP3

C8

LTDP0_TXN3

V2

CLKIN_H

V1

CLKIN_L

D2

DISP_CLKIN_H

D1

DISP_CLKIN_L

J1

SVC

J2

SVD

P3

SIC

P4

SID

T3

RESET_L

T4

PWROK

U1

PROCHOT_L

U2

THERMTRIP_L

T2

ALERT_L

N2

TDI

N1

TDO

P1

TCK

P2

TMS

M4

TRST_L

M3

DBRDY

M1

DBREQ_L

F4

VDDCR_NB_SENSE

G1

VDDCR_CPU_SENSE

F3

VDDIO_MEM_S_SENSE

F1

VSS_SENSE

B4

RSVD_1

W11

RSVD_2

V5

RSVD_3

S IC E SERIES EME450GBB22GVA 1.65G BGA SA00005DX00

DISPLAYPORT 1

DISPLAYPORT 0

CLK

SER

JTAG CTRL

DP MISC

VGA DAC

TEST

DP_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

TDP1_AUXP TDP1_AUXN

TDP1_HPD

LTDP0_AUXP LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_REDB

DAC_GREEN

DAC_GREENB

DAC_BLUE

DAC_BLUEB

DAC_HSYNC DAC_VSYNC

DAC_SCL

DAC_SDA

DAC_ZVSS

TEST4 TEST5

TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19

TEST25_H

TEST25_L

TEST28_H

TEST28_L

TEST31

TEST33_H

TEST33_L

TEST34_H

TEST34_L

TEST35 TEST36 TEST37

TEST38

DMAACTIVE_L

H3 G2

H2 H1

B2 C2

C1 A3

B3 D3 C12

D13 A12 B12 A13 B13

E1 E2

F2 D4

D12 R1

R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5

K3 T1

DP_ZVSS

UMA_HDMI_CLK UMA_HDMI_DATA

LCD_EDID_CLK LCD_EDID_DATA

UMA_CRT_CLK UMA_CRT_DATA

DAC_ZVSS

TEST_18 TEST_19 TEST25_H TEST_25_L TEST28_H TEST28_L TEST31 TEST33_H TEST33_L TEST34_H TEST34_L TEST35 TEST36 TEST37

1 2

R20 150_0402_1%UMA@

UMA_ENBKL <19> UMA_ENVDD <19> UMA_PWM <19>

UMA_HDMI_CLK <21>

UMA_HDMI_DATA <21>

UMA_HDMI_HPD <21>

UMA_EDID_CLK <19> UMA_EDID_DATA <19>

1 2

R12 100K_0402_5%UMA@

UMA_CRT_R <20> UMA_CRT_G <20> UMA_CRT_B <20>

UMA_CRT_HSYNC <20> UMA_CRT_VSYNC <20>

UMA_CRT_CLK <20> UMA_CRT_DATA <20>

1 2

R30 499_0402_1%UMA@

T3

PAD

T4

PAD

T5

PAD

T6

PAD

T7

PAD

PAD PAD

PAD

1 2

R40 1K_0402_5%

1 2

R33 1K_0402_5%

1 2

R35 1K_0402_5%

1 2

R36 510_0402_1%

T9 T8 T10

1 2

C15 0.1U_0402_16V4Z

1 2

C16 0.1U_0402_16V4Z T11 T12

T15

DMA_ACTIVE# <22>

1 2

R37 51_0402_1%

1 2

R38 51_0402_1%

1 2

R39 1K_0402_5%@

1 2

R283 1K_0402_5%

+1.8VS

UMA_ENBKL UMA_CRT_R UMA_CRT_G UMA_CRT_B

UMA_CRT_CLK UMA_CRT_DATA UMA_EDID_CLK UMA_EDID_DATA UMA_HDMI_CLK UMA_HDMI_DATA

12/22 Change R510, R511,R515,R516 to 2k that meet AMD check list

+1.8VS

1 2

R933 100K_0402_5%UMA@

1 2

R407 150_0402_1%UMA@

1 2

R408 150_0402_1%UMA@

1 2

R409 150_0402_1%UMA@

+3VS

12

R834.7K_0402_5% UMA@

12

R824.7K_0402_5% UMA@

12

R5102K_0402_1% UMA@

12

R5112K_0402_1% UMA@

12

R5152K_0402_1% UMA@

12

R5162K_0402_1% UMA@

B B

+1.8VS

1 2

R44 1K_0402_5%

1 2

R45 1K_0402_5%

1 2

R46 1K_0402_5%

1 2

R47 1K_0402_5%

1 2

R48 1K_0402_5%

APU_TRST#

A A

R846 0_0402_5%@ R847 10K_0402_5%@ R848 10K_0402_5%@ R849 10K_0402_5%@

AMD HDT Debug Conn

APU_TRST# APU_TCK APU_TMS APU_TDI APU_DBREQ#

+1.8VS

JHDT

1 3 5

12 12 12 12

5

7

9 11 13 15 17 19

SAMTE_ASP-136446-07-B @

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

APU_TCK APU_TMS APU_TDI APU_TDO APU_PWRGD_R APU_RST#_R APU_DBRDY APU_DBREQ# J108_PLLTST0 J108_PLLTST1

1 2

R854 0_0402_5%@

1 2

R853 0_0402_5%@

To close APU side

1 2

R851 0_0402_5%@

1 2

R852 0_0402_5%@

4

APU_PWRGD APU_RST#

TEST_19 TEST_18

R41

1K_0402_5%

APU_THERMTRIP#_R

12/22 PCH side has internal pull up +3VLAW_PCH, so need to level shift

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

+3VS

12

10K_0402_5% R926

1 2

B

2

Q39

E

3 1

C

MMBT3904_NL_SOT23-3

1 2

R927 0_0402_5%

@

2

H_THERMTRIP# <24>

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

of

747Saturday, September 07, 2013

B

A

U1C

E1R1@

VDDCR_CPU_1 VDDCR_CPU_2 VDDCR_CPU_3 VDDCR_CPU_4 VDDCR_CPU_5 VDDCR_CPU_6 VDDCR_CPU_7 VDDCR_CPU_8 VDDCR_CPU_9 VDDCR_CPU_10 VDDCR_CPU_11 VDDCR_CPU_12 VDDCR_CPU_13 VDDCR_CPU_14 VDDCR_CPU_15

VDDCR_NB_1 VDDCR_NB_2 VDDCR_NB_3 VDDCR_NB_4 VDDCR_NB_5 VDDCR_NB_6 VDDCR_NB_7 VDDCR_NB_8 VDDCR_NB_9 VDDCR_NB_10 VDDCR_NB_11 VDDCR_NB_12 VDDCR_NB_13 VDDCR_NB_14 VDDCR_NB_15 VDDCR_NB_16 VDDCR_NB_17 VDDCR_NB_18 VDDCR_NB_19 VDDCR_NB_20 VDDCR_NB_21 VDDCR_NB_22

VDDIO_MEM_S_1 VDDIO_MEM_S_2 VDDIO_MEM_S_3 VDDIO_MEM_S_4 VDDIO_MEM_S_5 VDDIO_MEM_S_6 VDDIO_MEM_S_7 VDDIO_MEM_S_8 VDDIO_MEM_S_9 VDDIO_MEM_S_10 VDDIO_MEM_S_11

S IC E SERIES EME450GBB22GVA 1.65G BGA

W18

E5 E6 F5

F7 G6 G8 H5 H7

J6

J8

L7 M6 M8 N7 R8

E8

E11 E13

F9

F12 G11 G13

H9

H12 K11 K13 L10 L12 L14 M11 M12 M13 N10 N12 N14 P11 P13

G16 G19 E17

J16 L16 L19 N16 R16 R19

U16

+APU_CORE

11000mA

1 1

+APU_VDDNB

10000mA

2 2

+1.5V

2000mA

TSense/PLL/DP/PCIE/IO

VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6

CPU CORE

VDD_18_7

DAC

VDD_18_DAC

GPU AND NB CORE

POWER

DIS PLL

VDDPL_10

PCIE/IO/DDR3 Phy

VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4

DDR3

DP Phy/IO

VDD_33

B

600mA

U8 W8 U6 U9 W6 T7 V7

0.1U_0402_16V7K

1

C75

@

2

180P_0402_50V8J

C23

1

C24

2

1U_0402_6.3V6K

1

2

NOTE-->VDD_18+VDD_18_DAC=600mA NOTE-->VDDPL_10+VDD_10=2500mA

W9

U11

U13 W13 V12 T12

A4

180P_0402_50V8J

2500mA

500mA

0.1U_0402_16V7K

1

C76

@

2

180P_0402_50V8J

1

C77

@

2

0.1U_0402_16V7K

1

C94

@

2

180P_0402_50V8J

1

C40

2

1U_0402_6.3V6K

1

C28

C29

2

1U_0402_6.3V6K

1

C31

C30

2

0.1U_0402_16V7K

1

C35

C34

2

0.1U_0402_16V7K

+3VS

1

C41 1U_0402_6.3V6K

2

+1.8VS_DAC

1

2

1

2

1

2

1U_0402_6.3V6K

C25

1 2

FBMA-L11-201209-221LMA30T_0805

10U_0603_6.3V6M

+1.05VS_VDDPL

C32

1U_0402_6.3V6K

C99

1

C26

2

1U_0402_6.3V6K

L2

1

10U_0603_6.3V6M

2

1

C37

2

1U_0402_6.3V6K

1

C21

2

+1.8VS

FBMA-L11-201209-221LMA30T_0805

10U_0603_6.3V6M

1

C38

2

C

+1.8VS_VDD

FBMA-L11-201209-221LMA30T_0805

1

C22

10U_0603_6.3V6M

2

L3

1 2

+1.05VS_VDD

FBMA-L11-201209-221LMA30T_0805

1

C39

10U_0603_6.3V6M

2

L1

1 2

L4

1 2

+1.8VS

+1.05VS

D

U1D

E1R1@

A7

VSS_1

B7

VSS_2

B11

VSS_3

B17

VSS_4

B22

VSS_5

C4

VSS_6

D5

VSS_7

D7

VSS_8

D9

VSS_9

D11

VSS_10

D14

VSS_11

B15

VSS_12

D17

VSS_13

D19

VSS_14

E7

VSS_15

E9

VSS_16

E12

VSS_17

E20

VSS_18

F8

VSS_19

F11

VSS_20

F13

VSS_21

G4

VSS_22

G5

VSS_23

G7

VSS_24

G9

VSS_25

G12

VSS_26

G20

VSS_27

G22

VSS_28

H6

VSS_29

H11

VSS_30

H13

VSS_31

J4

VSS_32

J5

VSS_33

J7

VSS_34

J20

VSS_35

K10

VSS_36

K14

VSS_37

L4

VSS_38

L6

VSS_39

L8

VSS_40

L11

VSS_41

L13

VSS_42

L20

VSS_43

L22

VSS_44

M7

VSS_45

N4

VSS_46

N6

VSS_47

N8

VSS_48

N11

VSS_49

S IC E SERIES EME450GBB22GVA 1.65G BGA

GND

VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97

VSSBG_DAC

N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11

E

+1.5V

1

10U_0603_6.3V6M

0.1U_0402_16V7K

C61

0.1U_0402_16V7K

C85

2

+1.5V

1

C96

2

+1.5V

1

2

3 3

4 4

1

C86

2

10U_0603_6.3V6M

0.1U_0402_16V7K 1

C97

2

1

C60

@

2

0.1U_0402_16V7K

A

1U_0402_6.3V6K

1

C87

2

180P_0402_50V8J

1

C98

2

0.1U_0402_16V7K

180P_0402_50V8J

1

@

C100

2

C89

1U_0402_6.3V6K

C90

C101

@

180P_0402_50V8J

1U_0402_6.3V6K

1

C92

2

1

C91

2

180P_0402_50V8J

1

@

2

1

C93

2

1U_0402_6.3V6K

1

2

1

2

Add for EMI request on DVT

+1.5V

B

C95

1U_0402_6.3V6K

1

0.1U_0402_16V7K

2

C102

1

180P_0402_50V8J

2

1

C105

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

E

B

of

847Saturday, September 07, 2013

5

+1.5V

+VREF_DQA

1

C626

2

D D

DDR_A_DQS#1<6,10> DDR_A_DQS1<6,10>

DDR_A_DQS#2<6,10> DDR_A_DQS2<6,10>

+3VS

C464

DDR_CKE0_DIMMA<6,10>

DDR_CS1_DIMMA#<6>

DDR_A_DQS#4<6,10> DDR_A_DQS4<6,10>

DDR_A_DQS#6<6,10> DDR_A_DQS6<6,10>

C C

B B

A A

2.2U_0603_10V6K

1

C627

2

0.1U_0402_16V4Z

DDR_A_BS#2<6,10>

DDR_A_CLK0<6> DDR_A_CLK#0<6>

DDR_A_BS#0<6,10>

DDR_A_WE#<6,10>

DDR_A_CAS#<6,10>

1

12

C647

2

5

1000P_0402_50V7K

0.1U_0402_16V4Z

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59

R445 10K_0402_5%

1 2

12

R446 10K_0402_5%

JDDR3L

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0102

@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

VSS24

DQ30 DQ31

VSS26

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA SCL

VTT2

4

+1.5V

2 4

DDR_A_D4

6

DDR_A_D5 8 10 12 14 16

DDR_A_D6 18

DDR_A_D7 20 22

DDR_A_D12 24

DDR_A_D13 26 28

DDR_A_DM1 30 32 34

DDR_A_D14 36

DDR_A_D15 38 40

DDR_A_D20 42

DDR_A_D21 44 46

DDR_A_DM2 48 50

DDR_A_D22 52

DDR_A_D23 54 56

DDR_A_D28 58

DDR_A_D29 60 62 64 66 68

DDR_A_D30 70

DDR_A_D31 72

74 76 78

A15 A14

A11

A7 A6

A4 A2

A0

BA1

S0#

G2

DDR_A_MA15 80

DDR_A_MA14 82 84

DDR_A_MA11 86

DDR_A_MA7 88 90

DDR_A_MA6 92

DDR_A_MA4 94 96

DDR_A_MA2 98

DDR_A_MA0 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61

DDR_A_D62 DDR_A_D63

+0.75VS

4

DDR3 SO-DIMM A Standard Type

DDR_A_DQS#0 <6,10> DDR_A_DQS0 <6,10>

DDR_RST# <6,10>

DDR_A_DQS#3 <6,10> DDR_A_DQS3 <6,10>

DDR_CKE1_DIMMA <6,10>

DDR_A_CLK1 <6> DDR_A_CLK#1 <6>

DDR_A_BS#1 <6,10> DDR_A_RAS# <6,10>

DDR_CS0_DIMMA# <6> DDR_A_ODT0 <6>

DDR_A_ODT1 <6>

1

C669

2

0.1U_0402_16V4Z

DDR_A_DQS#5 <6,10> DDR_A_DQS5 <6,10>

DDR_A_DQS#7 <6,10> DDR_A_DQS7 <6,10>

MA_EVENT_L <6,10>

FCH_SDATA0 <10,24,29> FCH_SCLK0 <10,24,29>

H=4.0mm

1000P_0402_50V7K

3

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

+1.5V

2

C628

1

0.1U_0402_16V4Z

+VREF_CAA

1

C670

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

0.1U_0402_16V4Z 2

C629

1

DDR_A_D[0..63] <6,10>

DDR_A_MA[0..15] <6,10>

DDR_A_DM[0..7] <6,10>

0.1U_0402_16V4Z

2

C630

1

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

2

C631

1

0.1U_0402_16V4Z

2

1

2

0.1U_0402_16V4Z

C632

2

1

+1.5V

R440 1K_0402_1%

C633

0.1U_0402_16V4Z

+VREF_DQA

0.1U_0402_16V4Z

2

C634

@

1

2

C635

@

1

0.1U_0402_16V4Z

1 2

R442 1K_0402_1%

1 2

CRB 0.1u X1 4.7u X1

+0.75VS

2

C641

Place near JDIMML

1

C642

1

2

0.1U_0402_16V4Z

Title

SCHEMATIC, MB A8868

Size Document Number Rev

Custom

4019K4

Date: Sheet

2

C636

@

1

4.7U_0603_6.3V6K

+VREF_CAA

0.1U_0402_16V4Z 2

C637

@

1

0.1U_0402_16V4Z

CRB 100U X2

1

2

C638

@

1

+1.5V

1

+1.5V

R441 1K_0402_1%

1 2

R443 1K_0402_1%

1 2

0.1U_0402_16V4Z 2

C639

@

1

+

C643 330U_B2_2.5VM_R15M <BOM Structure>

2

947Saturday, September 07, 2013

B

of

5

4

3

2

1

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

+1.5V

2 4

DDR_A_D4

6

DDR_A_D5 8 10 12 14 16

DDR_A_D6 18

DDR_A_D7 20 22

DDR_A_D12 24

DDR_A_D13 26 28

DDR_A_DM1 30 32 34

DDR_A_D14 36

DDR_A_D15 38 40

DDR_A_D20 42

DDR_A_D21 44 46

DDR_A_DM2 48 50

DDR_A_D22 52

DDR_A_D23 54 56

DDR_A_D28 58

DDR_A_D29 60 62 64 66 68

DDR_A_D30 70

DDR_A_D31 72

74 76 78

A15 A14

A11

A7 A6

A4 A2

A0

S0#

G2

DDR_A_MA15 80

DDR_A_MA14 82 84

DDR_A_MA11 86

DDR_A_MA7 88 90

DDR_A_MA6 92

DDR_A_MA4 94 96

DDR_A_MA2 98

DDR_A_MA0 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61

DDR_A_D62 DDR_A_D63

4

+0.75VS

DDR_A_DQS#0 <6,9> DDR_A_DQS0 <6,9>

DDR_RST# <6,9>

DDR_A_DQS#3 <6,9> DDR_A_DQS3 <6,9>

DDR3 SO-DIMM B Standard Type

DDR_CKE1_DIMMA <6,9>

DDR_B_CLK3 <6> DDR_B_CLK#3 <6>

DDR_A_BS#1 <6,9> DDR_A_RAS# <6,9>

DDR_CS0_DIMMB# <6>

DDR_B_ODT1 <6>

1

C665

2

0.1U_0402_16V4Z

DDR_A_DQS#5 <6,9> DDR_A_DQS5 <6,9>

DDR_A_DQS#7 <6,9> DDR_A_DQS7 <6,9>

MA_EVENT_L <6,9>

FCH_SDATA0 <9,24,29> FCH_SCLK0 <9,24,29>

H=8.0mm

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

+1.5V

1

+

C199 330U_B2_2.5VM_R15M @

2

+VREF_CAB

1

C666

2

1000P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

DDR_A_D[0..63] <6,9>

DDR_A_MA[0..15] <6,9>

DDR_A_DM[0..7] <6,9>

+1.5V

0.1U_0402_16V4Z 2

2

1

0.1U_0402_16V4Z

C650

C651

1

0.1U_0402_16V4Z

CRB 0.1u X1 4,7uX1

+0.75VS

2

C663

1

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

C664

2

C652

1

2

4.7U_0603_6.3V6K

2

0.1U_0402_16V4Z 2

C653

1

0.1U_0402_16V4Z

+VREF_DQB

2

C654

1

+1.5V

R444 1K_0402_1%

1 2

R447 1K_0402_1%

1 2

2

C655

0.1U_0402_16V4Z

1

Title

SCHEMATIC, MB A8868

Size Document Number Rev

Custom

4019K4

Date: Sheet

+VREF_CAB

+1.5V

R450 1K_0402_1%

1 2

R451 1K_0402_1%

1 2

of

10 47Saturday, September 07, 2013

1

B

+1.5V

+VREF_DQB

1

C649

C648

D D

C C

B B

+3VS

A A

2

0.1U_0402_16V4Z

DDR_A_DQS#1<6,9> DDR_A_DQS1<6,9>

DDR_A_DQS#2<6,9> DDR_A_DQS2<6,9>

DDR_CKE0_DIMMA<6,9>

DDR_A_BS#2<6,9>

DDR_B_CLK2<6> DDR_B_CLK#2<6>

DDR_A_BS#0<6,9>

DDR_A_WE#<6,9>

DDR_A_CAS#<6,9> DDR_B_ODT0 <6>

DDR_CS1_DIMMB#<6>

DDR_A_DQS#4<6,9> DDR_A_DQS4<6,9>

DDR_A_DQS#6<6,9> DDR_A_DQS6<6,9>

1 2

R84 4.7K_0402_5%

+3VS

2.2U_0603_10V6K

C667

12

1

2

1000P_0402_50V7K

1

C668

2

0.1U_0402_16V4Z

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59

1 2

R449

10K_0402_5%

Check SMB address

5

JDDR3H

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0102

@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16 VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

VSS24

DQ30 DQ31

VSS26

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30 VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42 VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

5

4

3

2

1

PCIE_CRX_GTX_P[3..0] PCIE_CRX_GTX_N[3..0]

AH30

PCIE_CRX_C_GTX_P0

AG31

PCIE_CRX_C_GTX_N0

AG29

PCIE_CRX_C_GTX_P1

AF28

PCIE_CRX_C_GTX_N1 PCIE_CRX_GTX_N1

AF27

PCIE_CRX_C_GTX_P2

AF26

PCIE_CRX_C_GTX_N2

AD27

PCIE_CRX_C_GTX_P3

AD26

PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_N3

AC25 AB25

Y23 Y24

AB27 AB26

Y27 Y26

W24 W23

V27 U26

U24 U23

T26 T27

T24 T23

P27 P26

P24 P23

M27 N26

Y22 AA22

1 2

RV1 1.27K_0402_1%DIS@

1 2

RV2 2K_0402_1%DIS@

PCIE_CRX_GTX_P[3..0] <5> PCIE_CRX_GTX_N[3..0] <5>

12

CV10.1U_0402_16V7K DIS@

12

CV20.1U_0402_16V7K DIS@

12

CV30.1U_0402_16V7K

12

CV40.1U_0402_16V7K DIS@

12

CV50.1U_0402_16V7K

12

CV60.1U_0402_16V7K DIS@

12

CV70.1U_0402_16V7K

12

CV80.1U_0402_16V7K DIS@

+1.0VS

DIS@

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P1

PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2

PCIE_CRX_GTX_P3

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1

PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2

PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3

1 2

PCIE_CTX_GRX_P[3..0] PCIE_CTX_GRX_N[3..0]

PCIE_CTX_GRX_P[3..0]<5> PCIE_CTX_GRX_N[3..0]<5>

D D

C C

B B

CLK_PCIE_VGA<22> CLK_PCIE_VGA#<22>

RV133 10K_0402_5%DIS@

APU_PCIE_RST#<22,29,30,32>

UV1A

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

PCIE_RX8P

U31

PCIE_RX8N

U29

PCIE_RX9P

T28

PCIE_RX9N

T30

PCIE_RX10P

R31

PCIE_RX10N

R29

PCIE_RX11P

P28

PCIE_RX11N

P30

PCIE_RX12P

N31

PCIE_RX12N

N29

PCIE_RX13P

M28

PCIE_RX13N

M30

PCIE_RX14P

L31

PCIE_RX14N

L29

PCIE_RX15P

K30

PCIE_RX15N

CLOCK

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

N10

PWRGOOD

AL27

PERSTB

2160809024A11SEYMOU_FCBGA631 SEYMOURR1@

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

A A

Security Classification

2012/05/18 2013/10/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/05/18 2013/10/05

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

of

11 47Saturday, September 07, 2013

of

11 47Saturday, September 07, 2013

of

11 47Saturday, September 07, 2013

B

5

D D

+1.8VS

LV8

12

DIS@

+1.0VS

BLM18PG121SN1D_0603

1 2

RV27 0_0402_5%

+DPLL_PVDD

1

CV42 1U_0402_6.3V4Z DIS@

2

+DPLL_VDDC

1

DIS@ CV45

2

1U_0402_6.3V4Z

+1.8VS

@

XTALINXTALOUT

CV103

@

18P_0402_50V8J

10U_0603_6.3V6M

1

DIS@ CV54

2

LV10

DIS@

@

+1.8VS

RV20

499_0402_1%

DIS@

BLM18PG121SN1D_0603

LV7

DIS@

10U_0603_6.3V6M

1U_0402_6.3V4Z

12

VGA_EDID_CLK<19> VGA_EDID_DATA<19>

12

VGA_X1<29>

BLM18PG121SN1D_0603

+3VS

12 12

12 12 12 12

12 12 12

0.1U_0402_16V4Z

1

DIS@ CV40

2

0.1U_0402_16V4Z

1

CV43

2

1M_0402_5%

2 1

RV3010K_0402_5% RV13110K_0402_5% RV3210K_0402_5%DIS@ RV3310K_0402_5%@

RV3510K_0402_5%@ RV3110K_0402_5%@ RV14210K_0402_5%@

RV1710K_0402_5%DIS@

1

CV41 DIS@

2

1

CV44 DIS@

2

RV97

YV1

@

5

VGA_EDID_CLK VGA_EDID_DATA

VGA_PWRSEL0 VGA_PWRSEL1 THERM#_VGA CLKREQ_PEG#_R

GENERIC_C GPU_SMB_DA2 GPU_SMB_CK2

VGA_ENBKL

RV139 4.7K_0402_5%DIS@ RV140 4.7K_0402_5%DIS@

+3VS

C C

1 2

CLKREQ_PEG#<24>

B B

BLM18PG121SN1D_0603

+1.8VS

+1.0VS

A A

12

LV3

DIS@

10U_0603_6.3V6M

BLM18PG121SN1D_0603

12

LV5

DIS@

10U_0603_6.3V6M

@

18P_0402_50V8J

27MHZ_16PF_X5H027000FG1H

CV94

VRAM_ID1<18> VRAM_ID0<18>

0.1U_0402_16V4Z 1

1

DIS@

CV53

CV55

2

0.1U_0402_16V4Z

1

DIS@ CV6110U_0603_6.3V6M

2

LCD

GPU_GPIO0<18> GPU_GPIO1<18>

GPU_GPIO2<18> GPU_SMB_DA2<18> GPU_SMB_CK2<18>

VGA_ENBKL<19>

SOUT_GPIO8<18>

SIN_GPIO9<18>

GPU_GPIO11<18>

GPU_GPIO12<18>

GPU_GPIO13<18> VGA_PWRSEL0<45>

THERM#_VGA<18>

VGA_PWRSEL1<45>

ROMSE_GPIO22<18>

1U_0402_6.3V4Z

VGA_HDMI_HPD<21>

1

DIS@

CV59

CV60

2

VGA_EDID_CLK VGA_EDID_DATA

GPU_SMB_DA2 GPU_SMB_CK2

VGA_ENBKL

VGA_PWRSEL0 THERM#_VGA

VGA_PWRSEL1

CLKREQ_PEG#_R

12

DIS@

RV19 10K_0402_5%

12

RV21

249_0402_1%

DIS@

Check voltage level

1 2

DIS@

RV28 0_0402_5%

GPU_THERMAL_D+<18> GPU_THERMAL_D-<18>

12

0.1U_0402_16V4Z

1

DIS@ CV50

2

1

DIS@

CV52 1U_0402_6.3V4Z

CV51

DIS@

2

Need to check

+DPC_VDD18

+DPC_VDD10

0_0402_5% 1 2

RV143

DIS@

+VGA_VREF

1

CV49

0.1U_0402_16V4Z

2

DIS@

+TSVDD

4

TV15

TV11

TV14 TV9 TV12 TV13 TV10

TV18

GENERIC_C

+DPLL_PVDD

+DPLL_VDDC

XTALIN XTALOUT

4

UV1B

Y11

DVCLK

AE9

DVCNTL_0

L9

DVCNTL_1

N9

DVCNTL_2

AE8

DVDATA_12

AD9

DVDATA_11

AC10

DVDATA_10

AD7

DVDATA_9

AC8

DVDATA_8

AC7

DVDATA_7

AB9

DVDATA_6

AB8

DVDATA_5

AB7

DVDATA_4

AB4

DVDATA_3

AB2

DVDATA_2

Y8

DVDATA_1

Y7

DVDATA_0

W6

DPC_VDD18#3

V6

DP_VSSR#13

AC6

DPC_VDD18#1

AC5

DPC_VDD18#2

AA5

DPC_VDD10#1

AA6

DPC_VDD10#2

U1

DP_VSSR#14

W1

DP_VSSR#15

U3

DP_VSSR#16

Y6

DP_VSSR#17

AA1

DP_VSSR#18

I2C

R1

SCL

R3

SDA

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

GPIO_3_SMBDATA

U7

GPIO_4_SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16

R6

GPIO_17_THERMAL_INT

W10

GPIO_18_HPD3

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21_BB_EN

N8

GPIO_22_ROMCSB

N7

GPIO_23_CLKREQB

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

K7

TESTEN

AF24

TESTEN_LEGACY

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE_HPD4

AC14

HPD1

AB16

PX_EN

AC16

VREFG

PLL/CLOCK

AF14

75mA

DPLL_PVDD

AE14

DPLL_PVSS

AD14

125mA

DPLL_VDDC

AM28

XTALIN

AK28

XTALOUT

AC22

XO_IN

AB22

XO_IN2

THERMAL

T4

DPLUS

T2

DMINUS

R5

TS_FDO

AD17

TSVDD

AC17

TSVSS

20mA

2160809024A11SEYMOU_FCBGA631 SEYMOURR1@

DVO

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

DPC

TXCCP_DPC3P TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

DAC1

SEYMOUR/PARK

SWAPLOCKB/C

GENLK_V2SYNC

TSVSSQ/A2VSSQ

SWAPLOCKA/R2SET

DDC/AUX

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX5P

DDCDATA_AUX5N

DPC_CALR

HSYNC VSYNC

RSET AVDD

AVSSQ VDD1DI

VSS1DI

NC/R2

NC/R2B

NC/G2

NC/G2B

NC/B2

NC/B2B

NC/COMP

GENLK_CLK

NC/VDD2IDI NC/VSS2IDI

NC/A2VDD

NC/A2VDDQ

DDC1CLK

DDC1DATA

AUX1P AUX1N

DDC2CLK

DDC2DATA

AUX2P AUX2N

DDC6CLK

DDC6DATA

3

AF2

VGA_HDMI_CLK+

AF4

VGA_HDMI_CLK-

AG3

VGA_HDMI_TX0+

AG5

VGA_HDMI_TX0-

AH3

VGA_HDMI_TX1+

AH1

VGA_HDMI_TX1-

AK3

VGA_HDMI_TX2+

AK1

VGA_HDMI_TX2-

AK5 AM3

AK6 AM5

AJ7 AH6

AK8 AL7

V4 U5

W3 V2

Y4 W5

AA3 Y2

RV16

1 2

J8

150_0402_1%DIS@

RB/GB/BB: Grounded right away. MUST not be connected to AVSSQ.

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26 AJ27

AD22

RESET +AVDD_VGA

AG24

+AVDD_VGA

AE22 AE23

+VDD1DI

AD23

AM12 AK12

AL11 AJ11

AK10 AL9

AH12 AM10

NC/Y

AJ9

AL13

GENLK_CLK

AJ13

AD19 AC19

AE20 AE17 AE19

AG13

AE6

VGA_CRT_CLK

AE5

VGA_CRT_DATA

AD2 AD4

Follow HB uses DDC1 for CRT

AC11 AC13

AD13 AD11

AD20 AC20

AE16 AD16

AC1 AC3

3

VGA_HDMI_CLK+ <21> VGA_HDMI_CLK- <21>

VGA_HDMI_TX0+ <21> VGA_HDMI_TX0- <21>

VGA_HDMI_TX1+ <21> VGA_HDMI_TX1- <21>

VGA_HDMI_TX2+ <21> VGA_HDMI_TX2- <21>

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

1 2

RV18 499_0402_1%

VGA_HDMI_CLK VGA_HDMI_DATA

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VGA_CRT_R <20>

VGA_CRT_G <20>

VGA_CRT_B <20>

VGA_CRT_HSYNC <18,20> VGA_CRT_VSYNC <18,20>

DIS@

GENLK_CLK <18>

VGA_CRT_CLK <20> VGA_CRT_DATA <20>

VGA_HDMI_CLK <21> VGA_HDMI_DATA <21>

Issued Date

CRT

HDMI

2012/05/18 2013/10/05

2

Compal Secret Data

Deciphered Date

2

VGA_CRT_R VGA_CRT_G VGA_CRT_B

DIS@ CV33

1U_0402_6.3V4Z

+VDD1DI

DIS@ CV36

1U_0402_6.3V4Z

VGA_CRT_CLK VGA_CRT_DATA

VGA_HDMI_CLK VGA_HDMI_DATA

1 2

RV11 150_0402_1%

1 2

RV12 150_0402_1%

1 2

RV13 150_0402_1%

70mA

1

DIS@ CV35

2

0.1U_0402_16V4Z

45mA

1

DIS@ CV37

2

0.1U_0402_16V4Z

DIS@

RV134 4.7K_0402_5% RV135 4.7K_0402_5%

DIS@

RV144 4.7K_0402_5% RV145 4.7K_0402_5%

DIS@

1

DIS@ DIS@ DIS@

BLM18PG121SN1D_0603

12

+1.8VS

LV1

DIS@

1

DIS@ CV34

10U_0603_6.3V6M

2

BLM18PG121SN1D_0603

12

+1.8VS

LV2

1

DIS@ CV38 10U_0603_6.3V6M

2

DIS@

12 12

+3VS

Compal Electronics, Inc.

Title

SCHEMATIC, MB A8868

Size Document Number Rev

Date: Sheet

4019K4

1

B

of

12 47Saturday, September 07, 2013

of

12 47Saturday, September 07, 2013

of

12 47Saturday, September 07, 2013

UV1F

5

4

3

2

1

LVDS CONTROL

D D

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXOUT_U3P TXOUT_U3N

LVTMDP

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

C C

2160809024A11SEYMOU_FCBGA631 SEYMOURR1@

B B

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

TXOUT_L3P TXOUT_L3N

VARY_BL

DIGON

AB11 AB12

AH20 AJ19

AL21 AK20

AH22 AJ21

AL23 AK22

AK24 AJ23

AL15 AK14

AH16 AJ15

AL17 AK16

AH18 AJ17

AL19 AK18

VGA_PWM <19> VGA_ENVDD <19>

VGA_TZCLK+ <19> VGA_TZCLK- <19>

VGA_TZOUT0+ <19> VGA_TZOUT0- <19>

VGA_TZOUT1+ <19> VGA_TZOUT1- <19>

VGA_TZOUT2+ <19> VGA_TZOUT2- <19>

VGA_TXCLK+ <19> VGA_TXCLK- <19>

VGA_TXOUT0+ <19> VGA_TXOUT0- <19>

VGA_TXOUT1+ <19> VGA_TXOUT1- <19>

VGA_TXOUT2+ <19> VGA_TXOUT2- <19>

+1.8VS

LV16

BLM18PG121SN1D_0603

DIS@

+1.0VS

LV33

BLM18PG121SN1D_0603

DIS@

12

10U_0603_6.3V6M

1

CV92 DIS@

2

12

10U_0603_6.3V6M

1

CV168 DIS@

2

+1.8VS

LV15

BLM18PG121SN1D_0603

DIS@

+1.0VS

LV32

BLM18PG121SN1D_0603

DIS@

1

CV106 DIS@

2

1U_0402_6.3V4Z

1

CV169 DIS@

2

1U_0402_6.3V4Z

12

10U_0603_6.3V6M

1

2

12

10U_0603_6.3V6M

1

2

+1.8VS_DPAB

1

CV74

0.1U_0402_16V4Z

2

DIS@

+1.0VS_DPAB

1

CV167

0.1U_0402_16V4Z

2

DIS@

CV89 DIS@

1U_0402_6.3V4Z

CV165 DIS@

1U_0402_6.3V4Z

1

2

1

2

CV99 DIS@

CV166 DIS@

+1.8VS_DPEF

0.1U_0402_16V4Z

1

+1.0VS_DPEF

CV73 DIS@

2

0.1U_0402_16V4Z

1

CV164 DIS@

2

+1.8VS_DPEF

+1.0VS_DPEF

1 2

+1.8VS_DPEF

RV14

150_0402_1%

DIS@

UV1G

220mA

AG15

DPEF_VDD18#1

AG16

DPEF_VDD18#2

120mA

AG20

DPEF_VDD10#1

AG21

DPEF_VDD10#2

AG14

DP_VSSR#19

AH14

DP_VSSR#20

AM14

DP_VSSR#21

AM16

DP_VSSR#22

AM18

DP_VSSR#23

200mA

AF16

DPEF_VDD18#3

AG17

DPEF_VDD18#4

120mA

AF22

DPEF_VDD10#3

AG22

DPEF_VDD10#4

AF23

DP_VSSR#24

AG23

DP_VSSR#25

AM20

DP_VSSR#26

AM22

DP_VSSR#27

AM24

DP_VSSR#28

AF17

DPEF_CALR

20mA

AG18

DPEF_VDD18#5

AF19

DP_VSSR#29

20mA

AG19

DPEF_VDD18#6

AF20

DP_VSSR#30

2160809024A11SEYMOU_FCBGA631 SEYMOURR1@

DP PLL POWER

DP A/B POWERDP E/F POWER

130mA

DPAB_VDD18#1 DPAB_VDD18#2

110mA

DPAB_VDD10#1 DPAB_VDD10#2

DP_VSSR#1 DP_VSSR#2 DP_VSSR#3 DP_VSSR#4 DP_VSSR#5

130mA

DPAB_VDD18#3 DPAB_VDD18#4

110mA

DPAB_VDD10#3 DPAB_VDD10#4

DP_VSSR#6 DP_VSSR#7 DP_VSSR#8 DP_VSSR#9

DP_VSSR#10

DPAB_CALR

DPAB_VDD18#5

DP_VSSR#11

DPAB_VDD18#6

DP_VSSR#12

20mA

AE11 AF11

AF6 AF7

AE1 AE3 AG1 AG6 AH5

AE13 AF13

AF8 AF9

AF10 AG9 AH8 AM6 AM8

AE10

AG8 AG7

AG10 AG11

+1.8VS_DPAB

+1.0VS_DPAB

RV15

1 2

150_0402_1%

DIS@

+1.8VS_DPAB

+1.0VS_DPAB

+1.8VS_DPAB

A A

Security Classification

2012/05/18 2013/10/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/05/18 2013/10/05

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

of

13 47Saturday, September 07, 2013

of

13 47Saturday, September 07, 2013

of

13 47Saturday, September 07, 2013

B

5

+1.5VS

10U_0603_6.3V6M

1

2

+

CV78

330U_2.5V_M

DIS@

D D

C C

B B

LV30

12

+1.8VS

BLM18PG121SN1D_0603

10U_0603_6.3V6M

DIS@

2

1

10U_0603_6.3V6M

+1.8VS

1

CV276 DIS@

2

0.1U_0402_16V4Z

CV91 DIS@

+1.0VS

1

2

CV309

DIS@

4.7U_0603_6.3V6K

2

CV83

CV87

DIS@

1

10U_0603_6.3V6M

LV22

BLM18PG121SN1D_0603

DIS@

+3VS

+1.8VS

BLM18PG121SN1D_0603

0.1U_0402_16V4Z 1

CV303

DIS@

2

1U_0402_6.3V4Z

1

CV275

CV274

DIS@

2

4.7U_0603_6.3V6K

10U_0603_6.3V6M

2

1

1U_0402_6.3V4Z

2

CV162

DIS@

1

LV24

DIS@

12

+MPV18

1

1U_0402_6.3V4Z CV302 DIS@

2

4.7U_0603_6.3V6K

CV119

DIS@

1U_0402_6.3V4Z

12

1

2

12

BLM18PG121SN1D_0603

LV28

DIS@

1

CV308 DIS@

2

1U_0402_6.3V4Z

2

1

CV273 DIS@

1

2

1U_0402_6.3V4Z

2

CV123

DIS@

1

1U_0402_6.3V4Z

2

CV158

DIS@

1

0.1U_0402_16V4Z 1

CV172

DIS@

2

10U_0603_6.3V6M

4

1U_0402_6.3V4Z

2

CV102

CV98

DIS@

1

1U_0402_6.3V4Z

2

CV127 DIS@

1

0.1U_0402_16V4Z

2

CV152

DIS@

1

10U_0603_6.3V6M

1

CV173 DIS@ 1U_0402_6.3V4Z

2

1U_0402_6.3V4Z 1

CV189 DIS@

2

1U_0402_6.3V4Z

2

CV97 DIS@

1

1U_0402_6.3V4Z

CV131 DIS@

CV148

DIS@

1

CV190

DIS@

2

CV96 DIS@

1

1U_0402_6.3V4Z

2

CV135 DIS@

1

+VDDR4

+PCIE_VDDR

+MPV18

+SPV18

+SPV10

2

CV191 DIS@

1

0.1U_0402_16V4Z

CV95 DIS@

+VDD_CT

1.2A

17mA

75mA

120mA

3

UV1D

MEM I/O

H13

VDDR1#1

H16

VDDR1#2

H19

VDDR1#3

J10

VDDR1#4

J23

VDDR1#5

J24

VDDR1#6

J9

VDDR1#7

K10

VDDR1#8

K23

VDDR1#9

K24

VDDR1#10

K9

VDDR1#11

L11

VDDR1#12

L12

VDDR1#13

L13

VDDR1#14

L20

VDDR1#15

L21

VDDR1#16

L22

VDDR1#17

LEVEL TRANSLATION

AA20

VDD_CT#1

AA21

VDD_CT#2

AB20

VDD_CT#3

AB21

VDD_CT#4

I/O

AA17

VDDR3#1

AA18

VDDR3#2

AB17

VDDR3#3

AB18

VDDR3#4

V12

VDDR4#1

Y12

VDDR4#2

U12

VDDR4#3

AA11

NC#1

AA12

NC#2

V11

NC#3

U11

NC#4

MEM CLK

L17

NC_VDDRHA

L16

NC_VSSRHA

PLL

AM30

PCIE_VDDR

L8

NC_MPV18

H7

SPV18

H8

SPV10

J7

SPVSS

2160809024A11SEYMOU_FCBGA631 SEYMOURR1@

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

CORE

BIF_VDDC#1 BIF_VDDC#2

ISOLATED CORE I/O

AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26

L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

AA15

VDDC#1

N15

VDDC#2

N17

VDDC#3

R13

VDDC#4

R16

VDDC#5

R18

VDDC#6

Y21

VDDC#7

T12

VDDC#8

T15

VDDC#9

T17

VDDC#10

T20

VDDC#11

U13

VDDC#12

U16

VDDC#13

U18

VDDC#14

V21

POWER

VDDC#15

V15

VDDC#16

V17

VDDC#17

V20

VDDC#18

Y13

VDDC#19

Y16

VDDC#20

Y18

VDDC#21

M11

NC

M12

NC

R21 U21

M13

VDDCI#1

M15

VDDCI#2

M16

VDDCI#3

M17

VDDCI#4

M18

VDDCI#5

M20

VDDCI#6

M21

VDDCI#7

N20

VDDCI#8

500mA

2A

13A

+PCIE_VDDR

0.1U_0402_16V4Z 2

1

1U_0402_6.3V4Z

2

CV104 DIS@

1

1U_0402_6.3V4Z

2

CV101

CV105

DIS@

1

0.1U_0402_16V4Z

1U_0402_6.3V4Z

2

CV108 DIS@

1

1U_0402_6.3V4Z

2

CV82 DIS@

1

2

CV111 DIS@

1

1U_0402_6.3V4Z

2

CV86 DIS@

1

1U_0402_6.3V4Z

2

CV112 DIS@

1

2

CV90 DIS@

1

10U_0603_6.3V6M

2

CV113 DIS@

1

1U_0402_6.3V4Z

BLM18PG121SN1D_0603

2

CV77 DIS@

1

1U_0402_6.3V4Z

2

CV115 DIS@

1

+VGA_CORE

LV21

1 2

DIS@

+1.0VS

2

CV118 DIS@

1

10U_0603_6.3V6M

CV100 DIS@

1

+1.8VS

+VGA_CORE

LV31

12

+1.8VS

BLM18PG121SN1D_0603

DIS@

A A

0.1U_0402_16V4Z

1

CV277 DIS@

2

10U_0603_6.3V6M

5

1

2

CV305

DIS@

+SPV18

1

1U_0402_6.3V4Z CV306 DIS@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

14 47Saturday, September 07, 2013

1

B

of

5

UV1E

4

3

2

1

AA27

PCIE_VSS#1

AB24

PCIE_VSS#2

AB32

PCIE_VSS#3

AC24

PCIE_VSS#4

AC26

PCIE_VSS#5

AC27

PCIE_VSS#6

AD25

PCIE_VSS#7

AD32

PCIE_VSS#8

AE27

PCIE_VSS#9

AF32

D D

C C

AG27 AH32

W25 W26 W27

K28 K32

L27 M32 N25 N27

P25

P32 R27

T25

T32 U25 U27

V32

Y25

Y32

N11 N12 N13 N16 N18 N21

R12 R15 R17 R20

T13

T16

T18

T21 U15

U17 U20

V13

V16

V18

Y10

Y15

Y17

Y20 R11

T11

M6

P6 P9

T6

U9

PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31

GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86

GND

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55

A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6

A32 AM1 AM32

2160809024A11SEYMOU_FCBGA631

B B

A A

5

SEYMOURR1@

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

15 47Saturday, September 07, 2013

of

B

5

4

3

2

1

D D

C C

Close to pin K26

B B

Close to pin J26

RV41

40.2_0402_1% DIS@

RV43

100_0402_1%

DIS@

RV45

40.2_0402_1% DIS@

RV47

100_0402_1%

DIS@

+1.5VS

12

1

CV202

0.1U_0402_16V4Z

2

DIS@

1

CV204

0.1U_0402_16V4Z DIS@

2

+MVREFDA

+MVREFSA

MDA[0..63]<17>

Debug Only, for clock observation As short as possible

MDA[0..63]

@

RV57 51_0402_5% RV58 51_0402_5%@

12 12

+1.5VS

DIS@

1 2

RV48 240_0402_1%

1 2

RV52 240_0402_1%

DIS@

@

1 2

CV320 0.1U_0402_16V4Z

1 2

CV321 0.1U_0402_16V4Z@

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8

MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+MVREFDA +MVREFSA

DRAM_RST

UV1C

GDDR5/DDR3

K27

DQA0_0

J29

DQA0_1

H30

DQA0_2

H32

DQA0_3

G29

DQA0_4

F28

DQA0_5

F32

DQA0_6

F30

DQA0_7

C30

DQA0_8

F27

DQA0_9

A28

DQA0_10

C28

DQA0_11

E27

DQA0_12

G26

DQA0_13

D26

DQA0_14

F25

DQA0_15

A25

DQA0_16

C25

DQA0_17

E25

DQA0_18

D24

DQA0_19

E23

DQA0_20

F23

DQA0_21

D22

DQA0_22

F21

DQA0_23

E21

DQA0_24

D20

DQA0_25

F19

DQA0_26

A19

DQA0_27

D18

DQA0_28

F17

DQA0_29

A17

DQA0_30

C17

DQA0_31

E17

DQA1_0

D16

DQA1_1

F15

DQA1_2

A15

DQA1_3

D14

DQA1_4

F13

DQA1_5

A13

DQA1_6

C13

DQA1_7

E11

DQA1_8

A11

DQA1_9

C11

DQA1_10

F11

DQA1_11

A9

DQA1_12

C9

DQA1_13

F9

DQA1_14

D8

DQA1_15

E7

DQA1_16

A7

DQA1_17

C7

DQA1_18

F7

DQA1_19

A5

DQA1_20

E5

DQA1_21

C3

DQA1_22

E1

DQA1_23

G7

DQA1_24

G6

DQA1_25

G1

DQA1_26

G3

DQA1_27

J6

DQA1_28

J1

DQA1_29

J3

DQA1_30

J5

DQA1_31

K26

MVREFDA

J26

MVREFSA

J25

MEM_CALRN0

K25

MEM_CALRP0

L10

DRAM_RST

K8

CLKTESTA

L7

CLKTESTB

2160809024A11SEYMOU_FCBGA631 SEYMOURR1@

WCKA0B_0/DQMA0_1 WCKA0B_1/DQMA0_3 WCKA1B_0/DQMA1_1 WCKA1B_1/DQMA1_3

MEMORY INTERFACE

GDDR5/DDR3

MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4

MAA0_5/MAA_5 MAA0_6/MAA0_6 MAA0_7/MAA0_7

MAA1_0/MAA_8

MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12

MAA1_5/MAA_BA2 MAA1_6/MAA_BA0

MAA1_7/MAA_BA1 WCKA0_0/DQMA0_0 WCKA0_1/DQMA0_2 WCKA1_0/DQMA1_0 WCKA1_1/DQMA1_2

EDCA0_0/QSA0_0 EDCA0_1/QSA0_1 EDCA0_2/QSA0_2 EDCA0_3/QSA0_3 EDCA1_0/QSA1_0 EDCA1_1/QSA1_1 EDCA1_2/QSA1_2 EDCA1_3/QSA2_3

DDBIA0_0/QSA0_0B DDBIA0_1/QSA0_1B DDBIA0_2/QSA0_2B DDBIA0_3/QSA0_3B DDBIA1_0/QSA1_0B DDBIA1_1/QSA1_1B DDBIA1_2/QSA1_2B DDBIA1_3/QSA1_3B

ADBIA0/ODTA0 ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B RASA0B

RASA1B CASA0B

CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

GDDR5 / DDR3

MAA0_8/MAA_13

MAA1_8/RSVD

K17

MAA0

J20

MAA1

H23

MAA2

G23

MAA3

G24

MAA4

H24

MAA5

J19

MAA6

K19

MAA7

J14

MAA8

K14

MAA9

J11

MAA10

J13

MAA11

H11

MAA12

G11

A_BA2

J16

A_BA0

L15

A_BA1

E32

DQMA#0

E30

DQMA#1

A21

DQMA#2

C21

DQMA#3

E13

DQMA#4

D12

DQMA#5

E3

DQMA#6

F4

DQMA#7

H28

QSA0

C27

QSA1

A23

QSA2

E19

QSA3

E15

QSA4

D10

QSA5

D6

QSA6

G5

QSA7

H27

QSA#0

A27

QSA#1

C23

QSA#2

C19

QSA#3

C15

QSA#4

E9

QSA#5

C5

QSA#6

H4

QSA#7

L18 K16

H26 H25

G9 H9

G22 G17

G19 G16

H22 J22

G13 K13

K20 J17

G25 H10

G20 G14

MAA[13..0]

A_BA[2..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

MAA[13..0] <17>

A_BA[2..0] <17>

DQMA#[7..0] <17>

QSA[7..0] <17>

QSA#[7..0] <17>

ODTA0 <17> ODTA1 <17>

CLKA0 <17> CLKA0# <17>

CLKA1 <17> CLKA1# <17>

RASA0# <17> RASA1# <17>

CASA0# <17> CASA1# <17>

CSA0#_0 <17>

CSA1#_0 <17>

CKEA0 <17> CKEA1 <17>

WEA0# <17> WEA1# <17>

MAA13 <17>

A A

5

DRAM_RST

RV86 10_0402_5%

12

RV129

4.99K_0402_1% DIS@

Place all these components close to GPU (Within 25mm) and keep all component close to each other (within5mm) except Rser2

DIS@

1 2

1

CV62 120P_0402_50V8 DIS@

2

4

RV53 1 2 51_0402_5%

DIS@

DRAM_RST# <17>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

16 47Saturday, September 07, 2013

of

B

5

DRAM_RST#<16>

DIS@

1 2

RV81 56_0402_1%

1 2 RV82 56_0402_1% DIS@

1 2

DIS@

1 2

DIS@

MDA[0..63] MAA[13..0] DQMA#[7..0] QSA[7..0] QSA#[7..0] A_BA[2..0]

CLKA0<16> CLKA0#<16>

ODTA0<16> CSA0#_0<16> RASA0#<16> CASA0#<16> WEA0#<16>

243_0402_1%

RV61 DIS@

CV234

0.01U_0402_25V7K DIS@

CV252

0.01U_0402_25V7K DIS@

+VREFC_A1 +VREFD_A1

A_BA0 A_BA1 A_BA2

CLKA0 CLKA0# CKEA0

ODTA0 CSA0#_0 RASA0# CASA0# WEA0#

QSA0 QSA2

DQMA#0 DQMA#2

QSA#0 QSA#2

DRAM_RST#

12

MDA[0..63]<16>

MAA[13..0]<16>

DQMA#[7..0]<16>

QSA[7..0]<16> QSA#[7..0]<16> A_BA[2..0]<16>

D D

C C

CLKA0

CLKA0#

CLKA1

B B

CLKA1#

RV83 56_0402_1%

RV84 56_0402_1%

UV2

M8

VREFCA

H1

VREFDQ

N3

MAA0

A0

P7

MAA1

A1

P3

MAA2

A2

N2

MAA3

A3

P8

MAA4

A4

P2

MAA5

A5

R8

MAA6

A6

R2

MAA7

A7

T8

MAA8

A8

R3

MAA9

A9

L7

MAA10 MAA11 MAA12 MAA13 MAA13

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96 @

RV65

4.99K_0402_1% DIS@

RV73

4.99K_0402_1% DIS@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL SDRAM DDR3

+1.5VS +1.5VS +1.5VS +1.5VS

12

+VREFC_A1

12

1

CV209

0.1U_0402_16V4Z DIS@

2

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA4 MDA2 MDA1 MDA3 MDA5 MDA0 MDA7 MDA6

MDA18 MDA19 MDA21 MDA22 MDA20 MDA16 MDA17 MDA23

+1.5VS

4.99K_0402_1%

4

RV66 DIS@

RV76 DIS@

UV3

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

A_BA0 A_BA1 A_BA2

CLKA0 CLKA0# CKEA0

ODTA0 CSA0#_0 RASA0# CASA0# WEA0#

QSA1 QSA3

DQMA#1 DQMA#3

QSA#1 QSA#3

DRAM_RST#

DIS@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

SDRAM DDR3 K4W1G1646E-HC12_FBGA96 @

RV67

4.99K_0402_1% DIS@

RV77

4.99K_0402_1% DIS@

+VREFC_A2 +VREFD_A2

Group0

Group2

12

RV62 243_0402_1%

DIS@

12

+VREFD_A1 +VREFC_A2 +VREFD_A2

12

1

CV210

0.1U_0402_16V4Z 2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

12

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

1

CV207

0.1U_0402_16V4Z 2

DIS@

MDA10 MDA13 MDA8 MDA15 MDA11 MDA14 MDA9 MDA12

MDA28 MDA26 MDA29 MDA27 MDA30 MDA24 MDA31 MDA25

+1.5VS

4.99K_0402_1%

3

Group1

Group3

RV68 DIS@

RV78 DIS@

CLKA1<16> CLKA1#<16>CKEA0<16> CKEA1<16>

ODTA1<16> CSA1#_0<16> RASA1#<16> CASA1#<16> WEA1#<16>

12

RV63 243_0402_1%

DIS@

1

CV211

0.1U_0402_16V4Z 2

DIS@

2

UV4

+VREFC_A3 +VREFD_A3

12

4.99K_0402_1%

M8

VREFCA

H1

VREFDQ

N3

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12 MAA13 MAA13

A_BA0 A_BA1 A_BA2

CLKA1 CLKA1# CKEA1

ODTA1 CSA1#_0 RASA1# CASA1# WEA1#

QSA5 QSA4

DQMA#5 DQMA#4

QSA#5 QSA#4

DRAM_RST# DRAM_RST#

DIS@

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL SDRAM DDR3

K4W1G1646E-HC12_FBGA96

+1.5VS +1.5VS +1.5VS +1.5VS

@

12

RV69 DIS@

12

1

RV79

CV208

0.1U_0402_16V4Z 2

DIS@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

RV70

4.99K_0402_1% DIS@

RV74

4.99K_0402_1% DIS@

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

MDA40 MDA45 MDA41 MDA43 MDA42

Group5

MDA46 MDA44 MDA47

MDA34 MDA32 MDA38 MDA35 MDA37

Group4

MDA36 MDA39 MDA33

+1.5VS

RV64 243_0402_1%

DIS@

+VREFD_A3+VREFC_A3

1

CV212

0.1U_0402_16V4Z 2

DIS@

+VREFC_A4 +VREFD_A4

MAA10 MAA11 MAA12

A_BA0 A_BA1 A_BA2

CLKA1 CLKA1# CKEA1

ODTA1 CSA1#_0 RASA1# CASA1# WEA1#

QSA7 QSA6

DQMA#7 DQMA#6

QSA#7 QSA#6

12

RV71

4.99K_0402_1% DIS@

RV75

4.99K_0402_1% DIS@

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9

12

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

1 CV213

0.1U_0402_16V4Z

2

DIS@

UV5

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4W1G1646E-HC12_FBGA96 @

96-BALL SDRAM DDR3

4.99K_0402_1%

4.99K_0402_1% DIS@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

RV72 DIS@

RV80

1

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

MDA63 MDA58 MDA60 MDA59 MDA61

Group7

MDA56 MDA62 MDA57

MDA48 MDA52 MDA51 MDA54 MDA50

Group6

MDA55 MDA49 MDA53

+1.5VS

+VREFD_A4+VREFC_A4

1

CV214

0.1U_0402_16V4Z 2

DIS@

+1.5VS

1U_0402_6.3V4Z

1

CV215

CV231

DIS@

2

1U_0402_6.3V4Z +1.5VS

0.1U_0402_16V4Z

1

CV177

CV176

DIS@

2

0.1U_0402_16V4Z

A A

2

10U_0603_6.3V

2

CV284 DIS@

1

CV232 DIS@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

CV178 DIS@

2

0.1U_0402_16V4Z

+1.5VS

2

CV283 DIS@

1

10U_0603_6.3V

1U_0402_6.3V4Z

1

CV216 DIS@

2

1

CV182 DIS@

2

CV282 10U_0603_6.3V

1

DIS@

5

1

CV233 DIS@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

CV179 DIS@

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

CV235 DIS@

2

1

CV183 DIS@

2

0.1U_0402_16V4Z

1

CV236 DIS@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

CV181 DIS@

2

10U_0603_6.3V

1U_0402_6.3V4Z

1

2

1

2

CV246 DIS@

+1.5VS +1.5VS +1.5VS

CV253

CV184 DIS@

+1.5VS

DIS@

1

2

1U_0402_6.3V4Z +1.5VS

0.1U_0402_16V4Z

CV269

10U_0603_6.3V

DIS@

1U_0402_6.3V4Z

1

CV217 DIS@

2

0.1U_0402_16V4Z

1

CV248 DIS@

2

+1.5VS

1

2

4

1

CV218 DIS@

2

1U_0402_6.3V4Z

1

CV192 DIS@

2

0.1U_0402_16V4Z

10U_0603_6.3V

1U_0402_6.3V4Z

1

CV219 DIS@

2

0.1U_0402_16V4Z

1

CV193 DIS@

2

CV247 DIS@

1

CV220 DIS@

2

1U_0402_6.3V4Z

1

CV205 DIS@

2

0.1U_0402_16V4Z

+1.5VS

1

2

1U_0402_6.3V4Z

1

CV221 DIS@

2

0.1U_0402_16V4Z

1

CV194 DIS@

2

10U_0603_6.3V

1

CV222 DIS@

2

1U_0402_6.3V4Z

1

CV206 DIS@

2

0.1U_0402_16V4Z

+1.5VS

1

CV270 DIS@

2

1U_0402_6.3V4Z

1

CV223

CV249

DIS@

2

0.1U_0402_16V4Z 1

CV203

CV245

DIS@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1U_0402_6.3V4Z

1

CV224 DIS@

2

1U_0402_6.3V4Z

+1.5VS +1.5VS

0.1U_0402_16V4Z

1

CV260 DIS@

2

0.1U_0402_16V4Z

3

1U_0402_6.3V4Z

1

CV237

CV225

DIS@

2

1U_0402_6.3V4Z

1

CV244 DIS@

2

0.1U_0402_16V4Z

CV250 DIS@

1

2

2012/05/18 2013/10/05

1U_0402_6.3V4Z

1

CV226

CV238

DIS@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

CV251

CV257

DIS@

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

1

CV239 DIS@

2

1U_0402_6.3V4Z

1

CV258 DIS@

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

CV227 DIS@

2

1

CV256 DIS@

2

1

CV254

DIS@

2

0.1U_0402_16V4Z 1

CV259 DIS@

2

1U_0402_6.3V4Z

1

CV240 DIS@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

CV268 DIS@

2

0.1U_0402_16V4Z

Title

Size Document Number Rev

Date: Sheet

1U_0402_6.3V4Z

1

CV228 DIS@

2

1U_0402_6.3V4Z

1

CV261 DIS@

2

0.1U_0402_16V4Z

1

CV229

CV241

DIS@

2

1

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z 1

CV262

CV265

DIS@

2

0.1U_0402_16V4Z

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1U_0402_6.3V4Z

1

CV242 DIS@

2

0.1U_0402_16V4Z

1

CV263 DIS@

2

1

CV243 DIS@

2

1U_0402_6.3V4Z

1

CV266 DIS@

2

0.1U_0402_16V4Z

17 47Saturday, September 07, 2013

1U_0402_6.3V4Z

1

CV230 DIS@

2

0.1U_0402_16V4Z

1

CV264 DIS@

2

of

CV255

CV267 DIS@

DIS@

B

5

4

3

2

1

CONFIGURATION STRAPS

GPU STRAPS

GPU_GPIO0<12> GPU_GPIO1<12>

GPU_GPIO2<12>

D D

SOUT_GPIO8<12> SIN_GPIO9<12>

ROMSE_GPIO22<12>

GPU_GPIO11<12> GPU_GPIO12<12> GPU_GPIO13<12>

VGA_CRT_HSYNC<12,20> VGA_CRT_VSYNC<12,20>

GENLK_CLK<12>

RV109 10K_0402_5%@ RV110 10K_0402_5%@

RV111 10K_0402_5%@ RV125 10K_0402_5%@

RV113 10K_0402_5%@ RV114 10K_0402_5%@ RV115 10K_0402_5%

RV116 10K_0402_5%@ RV117 10K_0402_5%@

RV119 10K_0402_5%DIS@ RV118 10K_0402_5%DIS@

RV120 10K_0402_5%@

GPU by the system BIOS

GPIO22 = 0 (BIOS_ROM_EN = 0)

GPIO[13:11]

0 0 0 0 0 1

C C

0 1 0

MEMORY SIZE

128MB 256MB 64MB

GPIO22 = 1 (BIOS_ROM_EN = 1)

12 12

12 12 12

12 12

12

GPU by VBIOS

GPIO[13:11]

1 0 0

(M25P05A)

External VGA Thermal Sensor

For Internal Thermal Sensor

+3VS

GPU_THERMAL_D+<12>

GPU_THERMAL_D-<12>

B B

+1.8VS

1

@ CV304

0.1U_0402_16V4Z

2

1

@ CV307 2200P_0402_50V7K

2

UV12

@

1

VDD

2

D+

3

SDATA

ALERT#

DTHERM#4GND

ADM1032ARMZ-2REEL_MSOP8

SCLK

0_0402_5%

8 7 6 5

RV141

DIS@

1 2

RV138 0_0402_5%

DIS@

1 2

RV136 0_0402_5%

1 2

RV137 0_0402_5%

EC_SMB_CK2 <7,33> EC_SMB_DA2 <7,33>

DIS@ DIS@

THERM#_VGA <12>

+3VS

GPU_SMB_CK2 <12> GPU_SMB_DA2 <12>

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

Straps Name DESCRIPTION OF DEFAULT SETTINGSPin Name

TX_PWRS_ENB

TX_DEEMPH_EN

BIF_GEN2_EN_A

RESERVED RESERVED 0

RESERVED RESERVED 0 (Internal pulldown)

VGA_DIS GPIO_9_ROMSI SIN_GPIO9

BIOS_ROM_EN

CONFIG(2:0)

RESERVED 0

AUD[1] AUD[0]

GPIO0

GPIO1

GPIO2

GPIO_8_ROMSO

GPIO_21_BB_EN

GPIO_22_ROMCSB

GPIO[13:11]

GENLK_CLK

HSYNC VSYNC

GPU VRAM size Compal Part Number#

Net Name

GPU_GPIO0

GPU_GPIO1

GPU_GPIO2

SOUT_GPIO8

N.C

ROMSE_GPIO22

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

GENLK_CLK

VGA_CRT_HSYNC VGA_CRT_VSYNC

512M 64Mx16 (x4)

1G 128Mx16 (x4)

Transmitter Power Savings Enable 0: 50% Tx output swing 1: Full Tx output swing

PCI Express Transmitter De-emphasis Enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled

PCIE GNE2 ENABLED 0 = Advertises the PCIe device as 2.5 GT/s capable at power-on 1 = Advertises the PCIe device as 5.0 GT/s capable at power-on.

VGA Controller 0: VGA Controller capacity enabled 1: The device will not be recognized as the system’s VGA controller

Enable external BIOS ROM device 0 - Disable external BIOS ROM device 1 - Enable external BIOS ROM device

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT a) If BIOS_ROM_EN = 1, then Config[2:0] defines the ROM type b) If BIOS_ROM_EN = 0, then Config[2:0] defines the primary memory aperture size.

AUD[1:0]: 00 - No audio function; 01 - Audio for DisplayPort only; 10 - Audio for DisplayPort and HDMI if dongle is detected; 11 - Audio for both DisplayPort and HDMI.

Vendor Part Number#STRAPS

SAM K4W1G1646G-BC11

SAM K4W2G1646C-HC11

RECOMMENDED SETTINGS

5.0 GT/s capability will be controlled by software

SA00004GS00

SA000047Q00

0

0 (Enable)

0

0 0 1 (256M)

0 0

Seymour-S3

VRAM_ID[1:0]

DVDATA (1,0)

VRAM_ID 1,0

1 0

1 1

12

A A

5

RV123 10K_0402_5% @

RV127 10K_0402_5% @

12

RV122 10K_0402_5% @

12

RV126 10K_0402_5% @

VRAM_ID1 <12> VRAM_ID0 <12>

Need to check the VBIOS setting

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

18 47Saturday, September 07, 2013

of

B

A

B

C

D

E

F

G

H

UMA

R117

100K_0402_5%

2

5

R116 100K_0402_5%

1 2

LED_PWM

12

R234

+3VALW+LCD_VDD

4/23 Change R117 +3VS to +3VALW for LVDS power down sequence

12

+3VS

2

C265

0.047U_0402_25V7K

1 2

LCDPWR_GATE

R133

68K_0402_5%

34

Q1B 2N7002KDWH_SOT363-6

4/23 Change R110,R133,C265,C261 for LVDS power down sequence

USB20_N5_R

USB20_P5_R

C261

4700P_0402_25V7K

1

4

W=80mils

S

G

1

2

Q17

1 2

@

1

4

1 2

AO3413_SOT23

D

1 3

2

3

1

2

R78 0_0402_5%CAM@ L55

WCM-2012-900T_0805

R104 0_0402_5%CAM@

+LCD_VDD

1

2

3

Reserve for EMI request

Reserved for EHCI CRC errors

1 2

D17RB751V40_SC76-2

DIS@

UMA@

12

R3330_0402_5%

12

R3320_0402_5%

W=80mils

C260

0.1U_0402_10V7K

VGA_PWM <13>

UMA_PWM <7>

12

R73 300_0402_5% @

1

C300 10P_0402_50V8J @

2

USB20_N5 <24>

USB20_P5 <24>

1 2

UMA_TXOUT0+<7>

UMA_TXOUT0-<7>

UMA_TXOUT1+<7>

1 1

UMA_TXOUT1-<7>

UMA_TXOUT2+<7>

UMA_TXOUT2-<7> UMA_TXCLK+<7> UMA_TXCLK-<7>

UMA_EDID_CLK<7> UMA_EDID_DATA<7>

UMA_ENVDD<7>

UMA@

R309 0_0402_5%

1 2

UMA@

R289 0_0402_5%

1 2

UMA@

R293 0_0402_5%

1 2

UMA@

R291 0_0402_5%

1 2

UMA@

R305 0_0402_5%

1 2

UMA@

R287 0_0402_5%

1 2

UMA@

R304 0_0402_5%

1 2

UMA@

R303 0_0402_5%

1 2

UMA@

R308 0_0402_5%

1 2

UMA@

R307 0_0402_5%

1 2

UMA@

R358 0_0402_5%

1 2

UMA@

R359 0_0402_5%

DISCRETE

1 2

VGA_TXOUT0+<13> VGA_TXOUT0-<13>

2 2

VGA_TXOUT1+<13> VGA_TXOUT1-<13> VGA_TXOUT2+<13> VGA_TXOUT2-<13> VGA_TXCLK+<13>

VGA_TXCLK-<13>

VGA_EDID_CLK<12>

VGA_EDID_DATA<12>

VGA_ENVDD<13> VGA_ENBKL<12>

DIS@

R503 0_0402_5%

1 2

DIS@

R263 0_0402_5%

1 2

DIS@

R265 0_0402_5%

1 2

DIS@

R264 0_0402_5%

1 2

DIS@

R298 0_0402_5%

1 2

DIS@

R504 0_0402_5%

1 2

DIS@

R297 0_0402_5%

1 2

DIS@

R296 0_0402_5%

1 2

DIS@

R300 0_0402_5%

1 2

DIS@

R299 0_0402_5%

1 2

DIS@

R350 0_0402_5%

1 2

DIS@

R357 0_0402_5%

Close to LVDS Connector

1 2

VGA_TZOUT0+<13> VGA_TZOUT0-<13>

3 3

VGA_TZOUT1+<13> VGA_TZOUT1-<13> VGA_TZOUT2+<13> VGA_TZOUT2-<13> VGA_TZCLK+<13>

VGA_TZCLK-<13>

DIS@

R500 0_0402_5%

1 2

DIS@

R506 0_0402_5%

1 2

DIS@

R507 0_0402_5%

1 2

DIS@

R508 0_0402_5%

1 2

DIS@

R509 0_0402_5%

1 2

DIS@

R512 0_0402_5%

1 2

DIS@

R513 0_0402_5%

1 2

DIS@

R514 0_0402_5%

LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1LCD_TXOUT2+ LCD_TXOUT2LCD_TXCLK+

LCD_TXCLKLCD_EDID_CLK LCD_EDID_DATA

LCD_ENVDD EC_ENBKL

LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1LCD_TXOUT2+ LCD_TXOUT2LCD_TXCLK+

LCD_TXCLKLCD_EDID_CLK LCD_EDID_DATA

LCD_ENVDD

EC_ENBKL

LCD_TZOUT0+

LCD_TZOUT0-

LCD_TZOUT1+

LCD_TZOUT1-

LCD_TZOUT2+

LCD_TZOUT2-

LCD_TZCLK+

LCD_TZCLK-

EC_ENBKL <33>UMA_ENBKL<7>

4/23 Change R388 +3VS to +5VS

+5VS

JLVDS

@

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

31

25

GND1

32

26

GND2

33

27

GND3

34

28

GND4

35

29

GND5

36

30

GND6

STARC_107K30-000001-G2

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

+5VS_LVDS_CAM

CAM@

USB20_N5_R USB20_P5_R

INT_MIC_CLK INT_MIC_DATA

LCD_EDID_CLK LCD_EDID_DATA

LCD_TXOUT0LCD_TXOUT0+

LCD_TXOUT1LCD_TXOUT1+

LCD_TXOUT2LCD_TXOUT2+

LCD_TXCLKLCD_TXCLK+ LED_PWM BKOFF#_R

W=20mils

1 2

R388 0_0603_5%

1.5A

1 2

C270 47P_0402_50V8J

For RF

C256 47P_0402_50V8J

1 2

CAM@

0.1U_0402_10V7K 1 2

C257

D84 AZ5125-02S.R7G_SOT23-3

+3VS

2 3

D85 AZ5125-02S.R7G_SOT23-3

@

+LCD_INV

@

For RF

ACES_87036-1001-CP

@

4/23 Change R388 +3VS_LVDS_CAM to +5VS_LVDS_CAM

2

1

3

@

INT_MIC_CLK <31>

INT_MIC_DATA <31> 1

C252

0.1U_0402_10V7K

2

For RF

+LCD_INV

1

JLVDS1

12

GND

11

GND

10

9 8 7 6 5 4 3 2 1

@

LCD_TZOUT0-

9

LCD_TZOUT0+

8

LCD_TZOUT1-

7

LCD_TZOUT1+

6

LCD_TZOUT2-

5

LCD_TZOUT2+

4

LCD_TZCLK-

3

LCD_TZCLK+ 2 1

2N7002KDWH_SOT363-6

2A

1

C235

4.7U_0805_10V4Z

2

@

C258 47P_0402_50V8J

1 2

LCD_ENVDD

+LCD_VDD

R110

100_0805_5%

Q1A

47K_0402_5%

12

61

1.5A

+LCD_INV B+

1

C262

68P_0402_50V8J

4 4

A

B

C251

2

1

C281

@

2

0.1U_0402_25V6

C

L16

FBMA-L11-201209-221LMA30T_0805

1

C264

0.1U_0402_25V6 2

12

For EMI

1

C490

C489

@

2

0.1U_0402_25V6

BKOFF#_R

B+

1 2

D15 RB751V40_SC76-2

12

R122 10K_0402_5%

BKOFF# <33>

Reserve for LVDS panel

1

@

2

0.1U_0402_25V6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2012/05/18 2013/10/05

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

G

B

of

19 47Saturday, September 07, 2013

H

A

B

C

D

E

CRT CONNECTOR

If=1A

Remove D3~D5 on DVT

1 1

CRT_R CRT_G CRT_B

UMA

1 2

UMA_CRT_R<7> UMA_CRT_G<7> UMA_CRT_B<7>

UMA_CRT_HSYNC<7> UMA_CRT_VSYNC<7>

UMA_CRT_CLK<7> UMA_CRT_DATA<7>

2 2

Close to CRT Connector

UMA@

R221 0_0402_5%

1 2

UMA@

R222 0_0402_5%

1 2

UMA@

R223 0_0402_5%

1 2

UMA@

R224 0_0402_5%

1 2

UMA@

R235 0_0402_5%

1 2

UMA@

R238 0_0402_5%

1 2

UMA@

R285 0_0402_5%

CRT_R CRT_G

CRT_B CRT_HSYNC CRT_VSYNC

CRT_CLK

CRT_DATA

CRT_HSYNC

DISCRETE

1 2

VGA_CRT_R<12> VGA_CRT_G<12>

VGA_CRT_B<12> VGA_CRT_HSYNC<12,18> VGA_CRT_VSYNC<12,18>

VGA_CRT_CLK<12> VGA_CRT_DATA<12>

DIS@

R232 0_0402_5%

1 2

DIS@

R233 0_0402_5%

1 2

DIS@

R229 0_0402_5%

1 2

DIS@

R230 0_0402_5%

1 2

DIS@

R231 0_0402_5%

1 2

DIS@

R225 0_0402_5%

1 2

DIS@

R226 0_0402_5%

CRT_R CRT_G

CRT_B CRT_HSYNC CRT_VSYNC

CRT_CLK

CRT_DATA

CRT_VSYNC

R140

R141

R147

12

150_0402_1%

+CRT_VCC

1 2

C244 0.1U_0402_16V4Z

SN74AHCT1G125GW_SOT353-5

5

P

A2Y

G

3

1

4

OE#

U6

C241

150_0402_1%

1

C242

2

2.2P_0402_50V8C

0.1U_0402_16V4Z

Close to CRT Connector

3 3

1 2

L20 NBQ100505T-800Y_0402

1 2

L19 NBQ100505T-800Y_0402

1 2

L5 NBQ100505T-800Y_0402

1

C248

2

2.2P_0402_50V8C

+CRT_VCC

C268

1 2

SN74AHCT1G125GW_SOT353-5

1

C243

2

R150 10K_0402_5%

1

5

P

4

OE#

A2Y

G

U7

3

2.2P_0402_50V8C

1

C250

2

12

D_CRT_HSYNC

D_CRT_VSYNC

+3VS

2.2P_0402_50V8C

C249

1

2

2.2P_0402_50V8C

1 2

L18 10_0402_5%

1 2

L17 10_0402_5%

CRT_R_L CRT_G_L

CRT_B_L

+CRT_VCC

+5VS +CRT_VCC_R +CRT_VCC

D6

C245 @

1

2

C246 @

10P_0402_50V8J

2 3

RB491D_SOT23-3

+CRT_VCC

HSYNC

VSYNC

1

2

10P_0402_50V8J

1

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CRT_DDC_CLK

F1

21

0.5A_8V_KMC3S050RY

T75 PAD

T76 PAD

+CRT_VCC

CRT_G_L

CRT_DDC_CLK

+CRT_VCC

CRT_DDC_DAT

Reserve ESD for CRT connector on DVT

40 mils

C247

0.1U_0402_16V4Z @

11

12

13

14 10

15

6

5

4

6

5

4

1

2

JCRT

6 1

7 2

8

16

G

17

G

3 9

4

5

SUYIN_070546FR015S251ZR @

D98

@

I/O4

I/O2

VDD

GND

I/O3

I/O4

VDD

I/O3

I/O1

@

I/O2

GND

I/O1

AZC099-04S.R7G_SOT23-6

D97

AZC099-04S.R7G_SOT23-6

3

CRT_B_LCRT_R_L

2

1

3

HSYNC

2

1

VSYNC

R163

R153

1 2

1

C285

2

@

Deciphered Date

4.7K_0402_5%

CRT_DDC_CLK

C287 470P_0402_50V8J @

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

E

20 47Saturday, September 07, 2013

of

BCustom

4.7K_0402_5%

2

Q205A

CRT_CLK

CRT_DATA CRT_DDC_DAT

C288

33P_0402_50V8K

@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

5

Q205B

2N7002KDWH_SOT363-6

1

C286 33P_0402_50V8K

2

@

2012/05/18 2013/10/05

61

2N7002KDWH_SOT363-6

34

470P_0402_50V8J

Compal Secret Data

A

+3VS

IHDMI@

1 1

UMA_HDMI_CLK<7>

VGA_HDMI_CLK<12>

VGA_HDMI_DATA<12>

UMA_HDMI_DATA<7>

R438 0_0402_5%

12

R435 0_0402_5%

DHDMI@

12

R391 0_0402_5%

DHDMI@

12

R401 0_0402_5%

IHDMI@

12

2

3 1

SGD

HDMI@ Q27

BSH111_SOT23-3

4.7K_0402_5%

2

3 1

HDMI@

SGD

Q26

BSH111_SOT23-3

R184

HDMI@

DISCRETE

1 2

VGA_HDMI_CLK+<12> VGA_HDMI_CLK-<12>

2 2

VGA_HDMI_TX0+<12> VGA_HDMI_TX0-<12> VGA_HDMI_TX1+<12> VGA_HDMI_TX1-<12> VGA_HDMI_TX2+<12> VGA_HDMI_TX2-<12>

CV296 0.1U_0402_16V7K DHDMI@

1 2

CV293 0.1U_0402_16V7K DHDMI@

1 2

CV294 0.1U_0402_16V7K DHDMI@

1 2

CV297 0.1U_0402_16V7K DHDMI@

1 2

CV299 0.1U_0402_16V7K DHDMI@

1 2

CV298 0.1U_0402_16V7K DHDMI@

1 2

CV295 0.1U_0402_16V7K DHDMI@

1 2

CV300 0.1U_0402_16V7K DHDMI@

VGA_DVI_TXC+

VGA_DVI_TXCVGA_DVI_TXD0+

VGA_DVI_TXD0-

VGA_DVI_TXD1+

VGA_DVI_TXD1-

VGA_DVI_TXD2+

VGA_DVI_TXD2-

UMA

1 2

UMA_HDMI_TXC+<7>

3 3

4 4

UMA_HDMI_TXC-<7> UMA_HDMI_TX0+<7>

UMA_HDMI_TX0-<7>

UMA_HDMI_TX1+<7>

UMA_HDMI_TX1-<7>

UMA_HDMI_TX2+<7>

UMA_HDMI_TX2-<7>

+HDMI_5V_OUT

C838 0.1U_0402_16V7K IHDMI@

1 2

C837 0.1U_0402_16V7K IHDMI@

1 2

C843 0.1U_0402_16V7K IHDMI@

1 2

C844 0.1U_0402_16V7K IHDMI@

1 2

C841 0.1U_0402_16V7K IHDMI@

1 2

C842 0.1U_0402_16V7K IHDMI@

1 2

C839 0.1U_0402_16V7K IHDMI@

1 2

C840 0.1U_0402_16V7K IHDMI@

D96

HDMI_HPD_C

+5VS

6

5

4

AZC099-04S.R7G_SOT23-6

I/O4

VDD

I/O3

@

I/O2

GND

I/O1

Reserve ESD for HDMI conn. on DVT

A

3

2

1

VGA_DVI_TXC+

VGA_DVI_TXCVGA_DVI_TXD0+

VGA_DVI_TXD0-

VGA_DVI_TXD1+

VGA_DVI_TXD1-

VGA_DVI_TXD2+

VGA_DVI_TXD2-

HDMI_SDATA

HDMI_SCLK

+HDMI_5V_OUT

12

R185

4.7K_0402_5% HDMI@

HDMI_SCLK

HDMI_SDATA

B

D95

@

1

HDMI_R_D0+ HDMI_R_D0HDMI_R_D2+ HDMI_R_D2+ HDMI_R_D2-

HDMI_R_D1+ HDMI_R_D1HDMI_R_CK+

HDMI_R_CK-

B

1

2

4

4 5 3

3

8

AZ1045-04F_DFN2510P10E-10-9

D94

@

1

2

4

4 5 3

3

8

AZ1045-04F_DFN2510P10E-10-9

10 9 7 65

C

1 2

VGA_DVI_TXC-

VGA_DVI_TXD0-

VGA_DVI_TXD0+

VGA_DVI_TXD1- HDMI_R_D1-

VGA_DVI_TXD1+

VGA_DVI_TXD2-

VGA_DVI_TXD2+

9

HDMI_R_D0+

10

8

HDMI_R_D0-

9

7

6

HDMI_R_D2-

65

9

HDMI_R_D1+

8

HDMI_R_D1-

7

HDMI_R_CK+

6

HDMI_R_CK-

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IHDMI@

L8

1

4

WCM-2012-900T_0805

IHDMI@ IHDMI@

L9

1

4

WCM-2012-900T_0805

IHDMI@ IHDMI@

L10

1

4

WCM-2012-900T_0805

IHDMI@ IHDMI@

L11

1

4

WCM-2012-900T_0805

IHDMI@

HDMI_R_CK+ HDMI_R_CKHDMI_R_D1HDMI_R_D1+ HDMI_R_D0+ HDMI_R_D0HDMI_R_D2HDMI_R_D2+

C

R157 22_0402_5% DHDMI@

2

3

1 2

R173 22_0402_5%

1 2

R175 22_0402_5% DHDMI@

2

3

1 2

R180 22_0402_5%

1 2

R182 22_0402_5% DHDMI@

2

3

1 2

R183 22_0402_5%

1 2

R187 22_0402_5% DHDMI@

2

3

1 2

R188 22_0402_5%

1 2

HDMI@

R195 499_0402_1%

1 2

HDMI@

R197 499_0402_1%

1 2

HDMI@

R198 499_0402_1%

1 2

HDMI@

R201 499_0402_1%

1 2

HDMI@

R202 499_0402_1%

1 2

HDMI@

R203 499_0402_1%

1 2

HDMI@

R205 499_0402_1%

1 2

HDMI@

R206 499_0402_1%

+5VS

2012/05/18 2013/10/05

2

3

2

3

2

3

2

3

HDMI_R_CK-

HDMI_R_CK+VGA_DVI_TXC+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

13

D

Q6

2

2N7002_SOT23-3 HDMI@

G

S

Compal Secret Data

Deciphered Date

D

D53

2 1

PMEG2010AEH_SOD123

HDMI@

1

C202 560P_0402_50V7K @

2

+HDMI_5V_OUT_F

0.5A_8V_KMC3S050RY

F2

HDMI@

21

1

2

E

C259

0.1U_0402_16V4Z HDMI@

1

C216 560P_0402_50V7K @

2

4/23 Add C202 and C216 for EMI request

HDMI Connector

JHDMI

+HDMI_5V_OUT

+3VS +3VS

D

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0HDMI_R_D0+

HDMI_R_D1HDMI_R_D1+

HDMI_R_D2HDMI_R_D2+

C266

0.1U_0402_16V4Z HDMI@

IHDMI@

12

R571

2.2K_0402_5%

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

HONGL_13-13201904CP

+HDMI_5V_OUT

2

5

1

U10

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5 HDMI@

3

1 2

HDMI_HPD

IHDMI@

R4360_0402_5%

R190

100K_0402_5%

Title

Size Document Number Rev

Date: Sheet

@

20

GND

21

GND

22

GND

23

GND

R148 1 2 1K_0402_5%

HDMI@

100K_0402_5%

4

HDMI_HPD

DHDMI@

R392 0_0402_5%

@

1 2

Compal Electronics, Inc.

SCHEMATIC, MB A8868

R189

HDMI@

12

4019K4

HDMI_HPD_CHDMI_HPD_U

1 2

DHDMI@

1 2

2.2K_0402_5%

E

2

C267

0.1U_0402_16V4Z HDMI@

1

R572

21 47Saturday, September 07, 2013

+HDMI_5V_OUT+5VS

VGA_HDMI_HPD <12>UMA_HDMI_HPD<7>

BCustom

of

A

1 2

UMI_RX0P<5> UMI_RX0N<5> UMI_RX1P<5> UMI_RX1N<5> UMI_RX2P<5> UMI_RX2N<5> UMI_RX3P<5>

+VDDAN_11_PCIE

PCIE_FRX_C_LANTX_P0<30> PCIE_FRX_C_LANTX_N0<30> PCIE_FRX_WLANTX_P1<29> PCIE_FRX_WLANTX_N1<29>

+1.1VS_CKVDD

UMI_RX3N<5> UMI_TX0P<5>

UMI_TX0N<5> UMI_TX1P<5> UMI_TX1N<5> UMI_TX2P<5> UMI_TX2N<5> UMI_TX3P<5> UMI_TX3N<5>

1 1

LAN WLAN

2 2

PCIE_FTX_C_LANRX_P0<30> PCIE_FTX_C_LANRX_N0<30> PCIE_FTX_C_WLANRX_P1<29> PCIE_FTX_C_WLANRX_N1<29>

C147 0.1U_0402_16V7K

1 2

C148 0.1U_0402_16V7K

1 2

C149 0.1U_0402_16V7K

1 2

C150 0.1U_0402_16V7K

1 2

C151 0.1U_0402_16V7K

1 2

C152 0.1U_0402_16V7K

1 2

C153 0.1U_0402_16V7K

1 2

C154 0.1U_0402_16V7K

1 2

R94 590_0402_1%

1 2

R88 2K_0402_1%

1 2

C718 0.1U_0402_16V7K

1 2

C720 0.1U_0402_16V7K

1 2

C721 0.1U_0402_16V7K

1 2

C719 0.1U_0402_16V7K

1 2

R95 2K_0402_1%

SS

APU Display

APU_DISP_CLK<7> APU_DISP_CLK#<7>

NSS

APU

VGA

WLAN

SS

3 3

4 4

LAN

FCH_RTCX1_R<29>

C294 27P_0402_50V8J

25MHZ_20PF_7A25000012

C293 27P_0402_50V8J

C292 18P_0402_50V8J

C291 18P_0402_50V8J

A

APU_CLK<7>

APU_CLK#<7>

CLK_PCIE_VGA<11>

CLK_PCIE_VGA#<11>

CLK_PCIE_WLAN<29>

CLK_PCIE_WLAN#<29>

CLK_PCIE_LAN<30> CLK_PCIE_LAN#<30>

GCLK@

1 2

R240 0_0402_5%

Place close to Y2

GCLK@

FCH_X1_R<29>

4/23 Change R241 from GCLK@ to @ for USB30 wake issue

1 2

NOGCLK@

Y1

NOGCLK@

1 2

NOGCLK@

4/23 Change C294,C293,Y1,R242 to mount for USB30 wake issue

1 2

NOGCLK@

R245

20M_0402_5%

NOGCLK@

1 2

NOGCLK@

1 2

R241 0_0402_5%

Place close to Y1

12

R242 1M_0402_5% NOGCLK@

12

Y2

32.768KHZ_12.5P_1TJF125DP1A000D NOGCLK@

B

APU_PCIE_RST#_R LPC_RST#_R

UMI_RXP0_C UMI_RXN0_C UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C

PCIE_CALRP PCIE_CALRN

PCIE_FTX_LANRX_P0 PCIE_FTX_LANRX_N0 PCIE_FTX_WLANRX_P1 PCIE_FTX_WLANRX_N1

CLK_CALRN

Input from external clock generator NC for internal clock generator

32K_X1

25M_X1

25M_X2

32K_X1

32K_X2

B

U2A

AE2

PCIE_RST#

AD5

A_RST#

AE30

UMI_TX0P

AE32

UMI_TX0N

AD33

UMI_TX1P

AD31

UMI_TX1N

AD28

UMI_TX2P

AD29

UMI_TX2N

AC30

UMI_TX3P

AC32

UMI_TX3N

AB33

UMI_RX0P

AB31

UMI_RX0N

AB28

UMI_RX1P

AB29

UMI_RX1N

Y33

UMI_RX2P

Y31

UMI_RX2N

Y28

UMI_RX3P

Y29

UMI_RX3N

AF29

PCIE_CALRP

AF31

PCIE_CALRN

V33

GPP_TX0P

V31

GPP_TX0N

W30

GPP_TX1P

W32

GPP_TX1N

AB26

GPP_TX2P

AB27

GPP_TX2N

AA24

GPP_TX3P

AA23

GPP_TX3N

AA27

GPP_RX0P

AA26

GPP_RX0N

W27

GPP_RX1P

V27

GPP_RX1N

V26

GPP_RX2P

W26

GPP_RX2N

W24

GPP_RX3P

W23

GPP_RX3N

F27

CLK_CALRN

G30

PCIE_RCLKP

G28

PCIE_RCLKN

R26

DISP_CLKP

T26

DISP_CLKN

H33

DISP2_CLKP

H31

DISP2_CLKN

T24

APU_CLKP

T23

APU_CLKN

J30

SLT_GFX_CLKP

K29

SLT_GFX_CLKN

H27

GPP_CLK0P

H28

GPP_CLK0N

J27

GPP_CLK1P

K26

GPP_CLK1N

F33

GPP_CLK2P

F31

GPP_CLK2N

E33

GPP_CLK3P

E31

GPP_CLK3N

M23

GPP_CLK4P

M24

GPP_CLK4N

M27

GPP_CLK5P

M26

GPP_CLK5N

N25

GPP_CLK6P

N26

GPP_CLK6N

R23

GPP_CLK7P

R24

GPP_CLK7N

N27

GPP_CLK8P

R27

GPP_CLK8N

J26

14M_25M_48M_OSC

C31

25M_X1

C33

25M_X2

218-0755091 A13 HUDSON-M3L FCBGA 656P C38

M3LR1@

PCI EXPRESS INTERFACES

CLOCK GENERATOR

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

HUDSON-2

PCI CLKS

PCICLK4/14M_OSC/GPO39

PCI INTERFACE

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT2#/SD_LED/GPO45

GNT3#/CLK_REQ7#/GPIO46

LPCAPUS5 PLUS

LDRQ1#/CLK_REQ6#/GPIO49

C

D

AF3

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

REQ1#/GPIO40

GNT0#

GNT1#/GPO44

CLKRUN#

LOCK#

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ/GPIO48

DMA_ACTIVE#

PROCHOT#

APU_PG

LDT_STP#

APU_RST#

S5_CORE_EN

RTCCLK

INTRUDER_ALERT#

VDDBT_RTC_G

32K_X1

32K_X2

2012/05/18 2013/10/05

PCI_CLK0 AF1 AF5 AG2 AF6

AB5

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15

GPIO30 AE16

GPIO31 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

AF18 AE18 AC16 AD18

B25

LPC_CLK0 D25

LPC_CLK1 D27 C28 A26 A29 A31 B27 AE27 AE19

G25 E28

APU_PROCHOT#_R E26 G26 F26

H7 F1 F3 E6

G2

G4

Compal Secret Data

RTC_CLK_R

R261 0_0402_5%

+RTCVCC_R

32K_X1

32K_X2

Deciphered Date

1 2

0.1U_0402_16V4Z

1 2

R260 22_0402_5%

PCI_CLK1 <26> PCI_CLK3 <26>

PCI_CLK4 <26>

APU_PCIE_RST#_R

LPC_RST#_R

PCI_AD23 <26> PCI_AD24 <26> PCI_AD25 <26> PCI_AD26 <26> PCI_AD27 <26>

1 2

R243 0_0402_5%@

T16

T99

1 2

R558 22_0402_5%

1 2

R258 22_0402_5%

LPC_AD0 <32,33,34> LPC_AD1 <32,33,34> LPC_AD2 <32,33,34> LPC_AD3 <32,33,34> LPC_FRAME# <32,33,34>

SERIRQ <32,33>

1 2

@

R15 0_0402_5%

APU_PWRGD <7,43> APU_RST# <7>

T100

20 mils

1

C296

2

D

RTC_CLK <26,33>

4/23 Change R271 and add R277,R268,C305,+RTCBATT_D

1

C295 1U_0402_6.3V6K

2

CLK_PCI_TPM_FCH <32>

Strap

1 2

R247 33_0402_5%

C299

150P_0402_50V8J

1 2

R259 33_0402_5%

C298

150P_0402_50V8J

Strap

VGA_PWRGD <45>

CLK_PCI_EC <26,33> CLK_PCI_DDR <26,34>

S5_CORE_EN is for S5+ mode used to turn off +1.1VALW and +3VALW of FCH on S5+ mode

R271

1 2

120_0402_5%

+RTCVCC

1 2

120_0402_5%

12

JCMOS @

CMOS Setting Place under DDR Door

Title

Size Document Number Rev

Custom

Date: Sheet

E

PCIE_RST# is for PCIE devices on APU

1

2

R248 100K_0402_5% @

1 2

APU_PCIE_RST# <11,29,30,32>

A_RST# is for LPC devices

GPIO30

GPIO31

LPC_RST# <33,34>

1 2

R334 10K_0402_5%

1 2

R339 10K_0402_5%

UMA@

1

R257 100K_0402_5% @

2

1 2

@

1 2

R337 10K_0402_5%

1 2

R340 10K_0402_5%

DIS@

Function GPIO30 GPIO31 Discrete

UMA

+RTCVCC +RTCBATT

+RTCBATT

11

1

C269

2

0.1U_0402_10V7K

01

12

@

D14

RB751V-40_SOD323-2

D13 RB751V-40_SOD323-2

If use GCLK, please delete D14

DMA active. The FCH drives the DMA_ACTIVE# to APU to notify DMA activity. This will cause the APU to reestablish the UMI link quicker.

DMA_ACTIVE# <7> H_PROCHOT# <7,33>

+RTCBATT_D

R277

+RTCBATT_R

Compal Electronics, Inc.

R268

1 2

1K_0402_5%

1

C305

0.1U_0402_16V4Z

2

SCHEMATIC, MB A8868

4019K4

E

22 47Saturday, September 07, 2013

+3VS

+3VL

B

of

A

B

C

D

E

HDMI_EN#

U2B

1 1

HDD

ODD

2 2

SATA_FTX_DRX_P0<27> SATA_FTX_DRX_N0<27>

SATA_FRX_C_DTX_N0<27> SATA_FRX_C_DTX_P0<27>

SATA_FTX_DRX_P1<27> SATA_FTX_DRX_N1<27>

SATA_FRX_C_DTX_N1<27> SATA_FRX_C_DTX_P1<27>

FCH-M3L NC pin

To avoid LED flashing

+5VS

3 3

4 4

1 2

R448 10K_0402_5%

12

R454 20K_0402_5%

SATA_LED#

+AVDD_SATA

12

SATA_CALRP

R1281K_0402_1%

12

SATA_CALRN

R130931_0402_1%

SATA_LED#<35>

ODD_PWR<36>

R151 10K_0402_5%

R146 10K_0402_5%

R149 10K_0402_5%

R152 10K_0402_5%

SATA_LED#

1 2

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

T48

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

12/22 Follow the last Compal CRB board

218-0755091 A13 HUDSON-M3L FCBGA 656P C38

M3LR1@

A

B

HUDSON-2

SERIAL ATA

HW MONITOR

SD_CLK/SCLK_2/GPIO73

SD_CMD/SLOAD_2/GPIO74

SD_CD/GPIO75

SD_WP/GPIO76

SD_DATA0/SDATI_2/GPIO77

SD_DATA1/SDATO_2/GPIO78

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE_COL GBE_CRS

GBE_MDCK

GBE_MDIO

GBE_RXCLK

GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0

GBE_RXCTL/RXDV

GBE_RXERR

GBE_TXCLK

GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0

GBE_TXCTL/TXEN

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

SPI_DI/GPIO164

SPI_DO/GPIO163

SPI_CLK/GPIO162

SPI_CS1#/GPIO165

ROM_RST#/SPI_WP#/GPIO161

VGA_RED

VGA_GREEN

VGA_BLUE

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

VGA_DAC_RSET

AUX_VGA_CH_P

AUX_VGA_CH_N

AUXCAL

ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N

ML_VGA_HPD/GPIO229

VIN0/GPIO175 VIN1/GPIO176

VIN2/SDATI_1/GPIO177

VIN3/SDATO_1/GPIO178

VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC1 NC2 NC3 NC4 NC5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

(Internal 8.2K PU)

HDMI_EN#

SKU

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9

GBE_PHY_INTR

V6

FCH_SPI_MISO

V5

FCH_SPI_MOSI

V3

FCH_SPI_CLK

T6

FCH_SPI_CS1#

V1

FCH_SPI_WP#

L30

L32

M29

M28 N30

M33 N32

K31

V28 V29

U28 T31

T33 T29 T28 R32 R30 P29 P28

C29

N2

R137 10K_0402_5%

M3

R138 10K_0402_5%

L2

R145 10K_0402_5%

N4

R139 10K_0402_5%

P1

R142 10K_0402_5%

P3

SLP_CHG#

R143 10K_0402_5%

M1

R144 10K_0402_5%

M5

RF148 10K_0402_5%

AG16 AH10 A28

Need to enable internal

G27

pull down to leave

L4

unconnected

2012/05/18 2013/10/05

HL

Non-HDMI SKU

@

R455 1K_0402_1%

HDMI SKU

12

+3VALW_FCH

FCH_SPI_CLK FCH_SPI_CLK_R

1 2

R113 0_0402_5%

22P_0402_50V8J

FCH-M3L NC pin

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

Compal Secret Data

Deciphered Date

R112

R108

1 2

C161

@

D

FCH_SPI_CS1# FCH_SPI_MISO FCH_SPI_WP#

If an SPI ROM is shared between FCH and the Embedded Controller, a 10-k pull-up resistor to +3.3V_S5 is installed

+3VALW_FCH

from QMLE4

FCH_SPI_CS1#

Check

1 2

@

R115 10K_0402_5%

4MB SPI ROM & Non-shared ROM

VCC

HOLD#

SCLK

+3VALW_FCH

8 7

FCH_SPI_HOLD# 6 5

FCH_SPI_CLK_R FCH_SPI_MOSI

FCH_SPI_WP#

10K_0402_5%

FCH_SPI_HOLD#

10K_0402_5%

SA00003K800

U13

1

CS#

2

SO/SIO1

3

WP#

4

GND

W25Q32BVSSIG_SO8

SI/SIO0

Socket: SP07000F500/SP07000H900

5/17 Add R113 and reserve C161 for EMI request

GBE_PHY_INTR

SLP_CHG#<28>

SLP_CHG#

Title

Size Document Number Rev

Custom

Date: Sheet

1 2

R121 10K_0402_5%

1 2

@

R126 10K_0402_5%

C498

1 2

0.1U_0402_16V4Z

+3VALW_FCH

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

FCH_SPI_CLK_R

R111

33_0402_5%

@

C160

22P_0402_50V8J

@

+3VALW_FCH

E

12

B

of

23 47Saturday, September 07, 2013

A

+3VALW_FCH

1 1

2 2

12/22 Reserve R326,R327,R329 but AMD have internal pull down

+3VALW_FCH

R278 10K_0402_5%

3 3

4 4

R272 10K_0402_5% R276 10K_0402_5% R318 10K_0402_5% R319 10K_0402_5% R288 10K_0402_5% RF289 10K_0402_5%

+3VS

RF287 2.2K_0402_5% RF291 2.2K_0402_5% R292 8.2K_0402_5% R290 8.2K_0402_5% R320 10K_0402_5%

For FCH internal debug use (Internal 10K pull-down)

1 2

R179 2.2K_0402_5%@

1 2

R181 2.2K_0402_5%@

1 2

RF183 2.2K_0402_5%@

SM Bus 0-->S0 PWR domain==> SO-DIMM, WLAN SM Bus 1-->S5 PWR domain==> no use

12

R282 100K_0402_5%

1 2

@

R324 10K_0402_5%

1 2

@

R325 10K_0402_5%

1 2

@

R326 10K_0402_5%

1 2

@

R327 10K_0402_5%

1 2

@

R329 10K_0402_5%

Internal Pull-up

1 2

@

1 2

@ 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2

@ 1 2

Place R425 and C363 close to FCH for ESD

ODD_DA#_FCH ODD_DA#_Q

A

TEST0 TEST1 TEST2

EC_RSMRST# HDA_BITCLK AZ_SDIN0_HD AZ_SDIN1_HD AZ_SDIN2_HD AZ_SDIN3_HD

USB_OC1# is for left USB3.0 ports USB_OC0# is for right USB2.0 ports

AZ_BITCLK_HD<31> AZ_SDOUT_HD<31>

AZ_SDIN0_HD<31>

AZ_SYNC_HD<31>

H_THERMTRIP# EC_LID_OUT# FCH_PCIE_WAKE# USB_OC0# USB_OC1# FCH_SCLK1 FCH_SDATA1

12/22 SMBus Not Implemented use 10k pull up to +3VALW_PCH

FCH_SCLK0 FCH_SDATA0 CLKREQ_WLAN# CLKREQ_LAN# WD_PWRGD

1 2

@

R425 0_0402_5%

1

C363

0.1U_0402_16V4Z @

2

AZ_RST_HD#<31>

R312 10K_0402_5% @

1 2

6 1

2N7002KDWH_SOT363-6

Q32B in page14

+3VS

2

Q32A

B

PCIE_RST2 : Reset PCIE device on Hudson 3

EC_LID_OUT#<33> ODD_PLUGIN#<27>

SLP_S3#<33> SLP_S5#<33>

PBTN_OUT#<33>

FCH_PWRGD<33>

GATEA20<33> KB_RST#<33>

EC_SCI#<33> EC_SMI#<33>

FCH_PCIE_WAKE#<30>

H_THERMTRIP#<7>

EC_RSMRST#<33>

CLKREQ_LAN#<30>

FCH_SPKR<31> FCH_SCLK0<9,10,29> FCH_SDATA0<9,10,29>

CLKREQ_WLAN#<29>

LAN_EN<30>

CLKREQ_PEG#<12>

USB_OC1#<28> USB_OC0#<27>

1 2

R159 33_0402_5%

1 2

R160 33_0402_5%

1 2

R161 33_0402_5%

1 2

R162 33_0402_5%

+3VS+3VALW_FCH

R311 10K_0402_5%

1 2

ODD_DA# <27>

B

(GPIO189/GPIO190) QMLE4: Detect UMA/PX (GPIO191) QMLE4: PXS_RST# (GPIO192) QMLE4: PXS_PWREN

TEST0 TEST1 TEST2

FCH_PCIE_WAKE# H_THERMTRIP#

WD_PWRGD

ODD_DA#_FCH

T17

ODD_PLUGIN#

FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1

LAN_EN

CLKREQ_PEG#

T59 T58

T56 USB_OC1# USB_OC0#

HDA_BITCLK HDA_SDOUT AZ_SDIN0_HD AZ_SDIN1_HD AZ_SDIN2_HD AZ_SDIN3_HD HDA_SYNC HDA_RST#

T61

T19

C

U2D

AB6

PCIE_RST2#/PCI_PME#/GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3#/GBE_STAT1/GEVENT21#

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GOOD

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

LPC_PME#/GEVENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE#/GEVENT8#

V7

IR_RX1/GEVENT20#

R10

THRMTRIP#/SMBALERT#/GEVENT2#

AF19

WD_PWRGD

U2

RSMRST#

AG24

CLK_REQ4#/SATA_IS0#/GPIO64

AE24

CLK_REQ3#/SATA_IS1#/GPIO63

AE26

SMARTVOLT1/SATA_IS2#/GPIO50

AF22

CLK_REQ0#/SATA_IS3#/GPIO60

AH17

SATA_IS4#/FANOUT3/GPIO55

AG18

SATA_IS5#/FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2#/FANIN4/GPIO62

AG22

CLK_REQ1#/FANOUT4/GPIO61

J2

IR_LED#/LLB#/GPIO184

AG26

SMARTVOLT2/SHUTDOWN#/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO183

Y6

SPI_HOLD#/GBE_LED1/GEVENT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/GEVENT11#

AF25

CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB_OC7#/GEVENT18#

R8

USB_OC6#/IR_TX1/GEVENT6#

T1

USB_OC5#/IR_TX0/GEVENT17#

P6

USB_OC4#/IR_RX0/GEVENT16#

F5

USB_OC3#/AC_PRES/TDO/GEVENT15#

P5

USB_OC2#/TCK/GEVENT14#

J7

USB_OC1#/TDI/GEVENT13#

T8

USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2#/GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO190

D23

PS2M_DAT/GPIO191

C22

PS2M_CLK/GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/GPIO223

B17

KSO_15/GPIO224

A24

KSO_16/GPIO225

D17

KSO_17/GPIO226

218-0755091 A13 HUDSON-M3L FCBGA 656P C38

M3LR1@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

HUDSON-2

EMBEDDED CTRL

2012/05/18 2013/10/05

USBCLK/14M_25M_48M_OSC

USB MISCUSB 1.1USB 2.0USB 3.0

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

SCL3_LV/GPIO195

SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198

EC_PWM2/EC_TIMER2/WOL_EN/GPIO199

EC_PWM3/EC_TIMER3/GPIO200

Compal Secret Data

Deciphered Date

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P

USB_HSD13N

USB_HSD12P

USB_HSD12N

USB_HSD11P

USB_HSD11N

USB_HSD10P

USB_HSD10N

USB_HSD9P

USB_HSD9N

USB_HSD8P

USB_HSD8N

USB_HSD7P

USB_HSD7N

USB_HSD6P

USB_HSD6N

USB_HSD5P

USB_HSD5N

USB_HSD4P

USB_HSD4N

USB_HSD3P

USB_HSD3N

USB_HSD2P

USB_HSD2N

USB_HSD1P

USB_HSD1N

USB_HSD0P

USB_HSD0N

USBSS_CALRP

USBSS_CALRN

USB_SS_TX3P

USB_SS_TX3N USB_SS_RX3P

USB_SS_RX3N

USB_SS_TX2P

USB_SS_TX2N USB_SS_RX2P

USB_SS_RX2N

USB_SS_TX1P

USB_SS_TX1N USB_SS_RX1P

USB_SS_RX1N

USB_SS_TX0P

USB_SS_TX0N USB_SS_RX0P

USB_SS_RX0N

SCL2/GPIO193

SDA2/GPIO194

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

D

G8 B9 H1

H3 H6

H5 H10

G10 K10

J12 G12

F12 K12

K13 B11

D11 E10

F10 C10

A10 H9

G9 A8

C8 F8

E8 C6

A6 C5

A5 C1

C3 E1

E3 C16

A16 A14

C14 C12

A12 D15

B15 E14

F14 F15

G15 H13

G13 J16

H16 J15

K15

H19 G19 G22 G21 E22 H22 J22 H21

K21 K22 F22 F24 E24 B23 C24 F18

D

USB_RCOMP

1 2

R154 11.8K_0402_1%

FCH-M3L NC pin

USB20_P11 <28> USB20_N11 <28>

USB20_P10 <28> USB20_N10 <28>

FCH-M3L NC pin

USB20_P8 <29> USB20_N8 <29>

USB20_P7 <32> USB20_N7 <32>

USB20_P5 <19> USB20_N5 <19>

FCH-M3L NC pin

USB20_P1 <27> USB20_N1 <27>

USB20_P0 <27> USB20_N0 <27>

USBSS_CALRP USBSS_CALRN

1 2

R864 1K_0402_1%

1 2

R865 1K_0402_1%

FCH-M3L NC pin

USB30_TX1P USB30_TX1N

USB30_RX1P USB30_RX1N

USB30_TX0P USB30_TX0N

USB30_RX0P USB30_RX0N

1 2

R165 10K_0402_5%

1 2

R167 10K_0402_5%

1 2

R227 10K_0402_5%

1 2

R228 10K_0402_5%

EC_PWM2

USB30_TX1P <28> USB30_TX1N <28>

USB30_RX1P <28> USB30_RX1N <28>

USB30_TX0P <28> USB30_TX0N <28>

USB30_RX0P <28> USB30_RX0N <28>

Title

Size Document Number Rev

Custom

Date: Sheet

USB 3.0-Left2 USB 3.0-Left1

WLAN (BT) Cardreader

Int. Camera

+FCH_VDD_11_SSUSB_S

EC_PWM2 <26>

strap pin

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

E

Root

24 47Saturday, September 07, 2013

LP2

LP1

of

B

A

B

C

D

E

+3VS

1 1

del +VDDPL_33_MLDAC power plane

L22

1 2

MBK1608221YZF_2P

220 ohm

+VDDPL_33_SYS

C182

C181

2.2U_0402_6.3V6M

1

2

0.1U_0402_16V7K

1

2

+3VS

1 2

RF185 0_0603_5%

22U_0603_6.3V6M

C176

C178

1

2

+VDDPL_33_SYS

+VDDIO_33_PCIGP

0.1U_0402_16V7K

0.1U_0402_16V7K C187

1

2

C179

0.1U_0402_16V7K

1

2

demo board connect to GND

VDDPL_33_SSUSB_S For Hudson3 USB3.0 only For Hudson2, connect to GND

LDO_CAP: Internally generated 1.8V supply for the RGB outputs

del +FCH_VDDAN_33_DAC power plane

2 2

+3VALW_FCH

3 3

+3VS

4 4

L6

1 2

MBK1608221YZF_2P

220 ohm

L7

1 2

MBK1608221YZF_2P

220 ohm

L23

1 2

MBK1608221YZF_2P

220 ohm

L12

1 2

MBK1608221YZF_2P

220 ohm

+VDDPL_33_SSUSB_S

+VDDPL_33_USB_S

+VDDPL_33_PCIE

(Add 2.2uF?)

+VDDPL_33_SATA

(Add 2.2uF?) (Add 0.1uF?)

A

C198

C210

C200

2.2U_0402_6.3V6M 1

1

2

2.2U_0402_6.3V6M

C211

1

2

C218

1

2

C227

1

2

demo board connect to GND

+3VALW_FCH

FBMA-L11-201209-221LMA30T_0805

0.1U_0402_16V7K

+1.1VALW

MBK1608221YZF_2P

0.1U_0402_16V7K

+1.1VALW

MBK1608221YZF_2P

2.2U_0402_6.3V6M

+1.1VALW

FBMA-L11-201209-221LMA30T_0805

L25

42 ohm/4A

+VDDPL_33_USB_S +VDDPL_33_PCIE +VDDPL_33_SATA

L21

1 2

220 ohm/2A

Check Caps

L24

1 2

220 ohm

L13

1 2

220 ohm

(C223:10uF?)

+FCH_VDD_11_SSUSB_S

40mils

1 2

R199

0_0603_5%

1 2

12

R237

0_0603_5%

B

C212

C219

C223

10U_0603_6.3V6M

1

2

2.2U_0402_6.3V6M

1

2

10U_0603_6.3V6M

1

2

+VDDPL_33_SSUSB_S

@

1 2

C194 2.2U_0603_6.3V4Z

1 2

R196 0_0402_5%

+VDDAN_33_USB

10U_0603_6.3V6M

C214

1U_0402_6.3V6K

C213

1

2

C220

1

2

C224

1

2

C215

1U_0402_6.3V6K

1

2

+VDDAN_11_USB_S

C234

0.1U_0402_16V7K

0.1U_0402_16V7K 1

@

2

Add C234 follow AMD reccommandation 10/28

+VDDCR_11V_USB

0.1U_0402_16V7K

C225

0.1U_0402_16V7K

1

2

+VDDAN_11_SSUSB

C230

1U_0402_6.3V6K

1

2

+VDDCR_11_SSUSB

C238

10U_0603_6.3V6M

1

2

0.1U_0402_16V7K

1U_0402_6.3V6K

C229

C237

C231

C290

1

2

0.1U_0402_16V7K

1

2

C239

1

2

U2C

102mA

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

47mA

H24

VDDPL_33_SYS

20mA

V22

VDDPL_33_DAC

12mA

U22

VDDPL_33_ML

30mA

T22

VDDAN_33_DAC

11mA

L18

VDDPL_33_SSUSB_S

14mA

D7

VDDPL_33_USB_S

11mA

AH29

VDDPL_33_PCIE

12mA

AG28

VDDPL_33_SATA

M31

LDO_CAP

7mA

V21

VDDPL_11_DAC

226mA

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

470mA

G7

VDDAN_33_USB_S_1

H8

0.1U_0402_16V7K

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

140mA

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

42mA

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

282mA

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

424mA

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

218-0755091 A13 HUDSON-M3L FCBGA 656P C38

0.1U_0402_16V7K

C240

0.1U_0402_16V7K M3LR1@

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HUDSON-2

PCI/GPIO I/O

USB SS USB MAIN LINKGBE LAN

POWER

C

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8

CORE S0

VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9

VDDAN_11_SATA_10

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1 VDDCR_11_S_2

VDDPL_11_SYS_S

VDDAN_33_HWM_S

VDDIO_AZ_S

2012/05/18 2013/10/05

1007mA

C183 T14 T17

1

T20 U16 U18

2

V14 V17 V20 Y17

340mA

H26 J25

C189 K24 L22

1

M22 N21 N22

2

P22

1088mA

AB24 Y21 AE25

C195 AD24 AB23

1

AA22 AF26 AG27

2

1337mA

AA21 Y20 AB21

C203 AB22

AC22

1

AC21 AA20 AA18

2

AB20 AC19

59mA

N18 L19

C207 M18 V12

1

V13 Y12 Y13

2

W11

5mA

G24

C217

1

2

187mA

N20 M20

C221

1

2

70mA

J24

C226

1

2

12mA

M8

C232

1

@

2

26mA

AA4

Compal Secret Data

Deciphered Date

+VCC_VDDCR_11

0.1U_0402_16V7K

C184

1

2

+1.1VS_CKVDD

0.1U_0402_16V7K

C190

1

2

+VDDAN_11_PCIE

C196

0.1U_0402_16V7K 1

2

C204

0.1U_0402_16V7K 1

2

+VDDIO_33_S

C208

1U_0402_6.3V6K

1

2

+VDDXL_3.3V

2.2U_0402_6.3V6M

+VDDCR_1.1V

1U_0402_6.3V6K

C222

1

2

+VDDPL_11_SYS_S

2.2U_0402_6.3V6M

C228

1

2

+VDDAN_33_HWM

C233

2.2U_0402_6.3V6M 1

@

2

C185

1U_0402_6.3V6K

C177

C186

0.1U_0402_16V7K

1U_0402_6.3V6K

1

2

+1.1VS_CKVDD

C191

1U_0402_6.3V6K

C192

1U_0402_6.3V6K

1

2

+VDDAN_11_PCIE

C197

22U_0603_6.3V6M

1

2

+AVDD_SATA

C206

22U_0603_6.3V6M

C205

1U_0402_6.3V6K

1

2

C209

2.2U_0402_6.3V6M

1

(C207/C208=0.1uF?)

2

1

2

C193

1

2

(C197=>2.2uF//0.1uF//1uF)

RF195 0_0402_5%

(Add 0.1uF?)

1U_0402_6.3V6K

0.1U_0402_16V7K

1 2

RF198 0_0402_5%

R200 0_0402_5%

0.1U_0402_16V7K

+VDDIO_AZ

C236 2.2U_0402_6.3V6M

D

1 2

RF184 0_0805_5%

10U_0603_6.3V6M

(C117=>2.2uF// 22uF?)

42ohm @ 100MHz

1 2

RF187 0_0603_5%

22U_0603_6.3V6M

(C193=>2.2uF)

42ohm @ 100MHz

1 2

R191 0_0805_5%

42ohm @ 100MHz

1 2

R194 0_0805_5%

(Add 22uF & 0.1uF?)

1 2

L14

1 2

MBK1608221YZF_2P

220 ohm

1 2

RF197 0_0603_5%

L15

1 2

MBK1608221YZF_2P

220 ohm

1 2

+1.1VS

+3VALW_FCH

+VDDXL_3.3V Tie to +3.3V_S5 rail if USB3 Wake is supported; otherwise, tie to +3.3V_S0 rail. Hudson-2 designs: Tie to +3.3V_S0 rail.

+1.1VALW

+3VALW_FCH

AMD reply: VDDAN_33_HWM_S: Please connect it to +3.3V_S5 directly if HWM is not used.

+3VS

VDDIO_AZ_S should be tied to +3.3/1.5V_S5 rail if Wake on Ring is supported

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

25 47Saturday, September 07, 2013

E

of

B

5

4

3

2

1

U2E

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSAN_HWM VSSXL VSSPL_SYS

HUDSON-2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GROUND

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSPL_DAC VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

EFUSE

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

T21 L28 K33 N28

R6

A3

A33

B7

B13

D D

C C

B B

D13

E12 E16 E29

F11 F13 F16 F17 F19 F23 F25 F29

G16 G32 H12 H15 H29

J10 J13 J28 J32

K16 K27 K28

L12 L13 L15 L16

L21 M13 M16 M21 M25

N11 N13 N23 N24

P12

P18

P20

P21

P31

P33 R11

R25 R28

T11

T16

T18

K25 H25

D9 E5

F7 F9

G6

J6 J9

K7

L6

N6

R4

N8

STRAP PINS

PCI_CLK1

ALLOW

PULL

PCIE GEN2

HIGH

DEFAULT

FORCE

PULL

PCIE GEN1

LOW

PCI_CLK1<22> PCI_CLK3<22> PCI_CLK4<22> CLK_PCI_EC<22,33> CLK_PCI_DDR<22,34> EC_PWM2<24> RTC_CLK<22,33>

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAP

DEFAULT

12

@

PCI_CLK4 LPC_CLK0_EC

12

@

12

EC ENABLED

EC DISABLED

DEFAULT

+3VALW_FCH+3VS+3VS+3VS

R204 10K_0402_5%

R216 10K_0402_5%

NON_FUSION CLOCK MODE

FUSION CLOCK MODE

DEFAULT

RF202 10K_0402_5%12RF203 10K_0402_5%

12

@

R215 10K_0402_5%

R214 10K_0402_5%

12

@

12

+3VALW_FCH

RF205 10K_0402_5%

12

R217 10K_0402_5%

12

@

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLE

+3VALW_FCH

RF206 10K_0402_5%

12

@

R218 10K_0402_5%

12

EC_PWM2

LPC ROM

SPI ROM

DEFAULT

+3VALW_FCH

R207 10K_0402_5%

12

R219 2.2K_0402_5%

12

@

R208 10K_0402_5%

R220 2.2K_0402_5%

RTC_CLKLPC_CLK1

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

DEBUG STRAPS

FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PCI_AD27 PCI_AD26

@

R209 2.2K_0402_5%

12

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

PULL HIGH

PULL LOW

PCI_AD27<22> PCI_AD26<22> PCI_AD25<22> PCI_AD24<22> PCI_AD23<22>

USE PCI PLL

DEFAULT

BYPASS PCI PLL

PCI_AD25 PCI_AD24

USE FC PLL

BYPASS FC PLL

R210 2.2K_0402_5%

12

@

R211 2.2K_0402_5%

12

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

@

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULTDEFAULT

ENABLE PCI MEM BOOT

R212 2.2K_0402_5%

@

R213 2.2K_0402_5%

12

A A

218-0755091 A13 HUDSON-M3L FCBGA 656P C38

M3LR1@

5

Security Classification

2012/05/18 2013/10/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/05/18 2013/10/05

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

26 47Saturday, September 07, 2013

1

B

of

A

SATA HDD Conn.

JHDD

1 1

23 24

SUYIN_127043FB022G278ZR

SATA ODD Conn (for 15")

2 2

JODDB

ACES_88058-120N

3 3

GND GND

Reserved

@

1 2 3 4 5 6 7 8

9 10 11 12

@

GND RX+

RX-

GND

TX-

TX+

GND

3.3V

3.3V GND GND GND

5V 5V 5V

GND GND

12V 12V 12V

1 2 3 4 5 6 7 8 9 10 11 12 13 14

1 2

SATA_FTX_C_DRX_P0

3

SATA_FTX_C_DRX_N0 4 5

SATA_FRX_DTX_N0 6

SATA_FRX_DTX_P0 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_FTX_C_DRX_P1 SATA_FTX_C_DRX_N1

SATA_FRX_DTX_N1 SATA_FRX_DTX_P1

ODD_PLUGIN#

ODD_DA#

+5VS_ODD

Close to JHDD

1 2

C369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7K

+3VS

+5VS

Place closely JHDD SATA CONN.

1.2A

1

C356 10U_0805_10V4Z

2

1 2

C391 0.01U_0402_25V7K

1 2

C390 0.01U_0402_25V7K

1 2

C389 0.01U_0402_25V7K

1 2

C398 0.01U_0402_25V7K

1

C357

0.1U_0402_10V7K

2

B

SATA_FTX_DRX_P0 <23> SATA_FTX_DRX_N0 <23>

SATA_FRX_C_DTX_N0 <23> SATA_FRX_C_DTX_P0 <23>

1

C358

0.1U_0402_10V7K

2

SATA_FTX_DRX_P1 SATA_FTX_DRX_N1

SATA_FRX_C_DTX_N1 SATA_FRX_C_DTX_P1

1

C359

0.1U_0402_10V7K

2

SATA_FTX_DRX_P1 <23> SATA_FTX_DRX_N1 <23>

SATA_FRX_C_DTX_N1 <23>

SATA_FRX_C_DTX_P1 <23>

C

SATA ODD Conn (for 14")

JODD

14 15

GND

GND1

GND

GND2

GND

SANTA_206001-1

@

1 2 3 4 5 6 7

8 9 10 11 12 13

SATA_FTX_14C_DRX_P1 SATA_FTX_14C_DRX_N1

SATA_FRX_14_DTX_N1 SATA_FRX_14_DTX_P1

ODD_PLUGIN#

ODD_DA#

A+

AB-

B+

DP +5V +5V

MD

+5VS_ODD

1

C364 220P_0402_50V6K

2

ODD_DA# <24>

1

2

C365

0.1U_0402_10V7K @

ODD_PLUGIN# <24>

5/16 Change C364 to 220p for ESD request

JODDC

@

14

12

G2

12

13

11 10 9 8 7 6 5 4 3 2 1

SATA_FTX_14C_DRX_P1 SATA_FTX_14C_DRX_N1

SATA_FRX_14_DTX_N1 SATA_FRX_14_DTX_P1

G1

ACES_50504-0120N-001

11 10

9 8 7 6 5 4 3 2 1

D

+5VS_ODD

1

2

1.6A

C352 10U_0805_10V4Z

Place components closely ODD CONN.

1

C353 @ 10U_0805_10V4Z

2

1

C354 @

1U_0402_6.3V6K

2

E

1

C355

0.1U_0402_10V7K

2

1

C360

2

0.1U_0402_10V7K

Power Button & RUSB connector

4

1

WCM-2012-900T_0805

12

R72 300_0402_5% @

1

C297 10P_0402_50V8J @

2

4019K4

1 2

@

RR31 0_0402_5%

LR7

3

4

1

2

1 2

@

RR30 0_0402_5%

E

3

2

USB20_N0_R

27 47Saturday, September 07, 2013

B

of

For debug

JUSIO

4 4

1

2

3

4

5

6

7

8

9

10

11

12

13

GND

14

GND

ACES_88058-120N

@

USB20_P1_R USB20_N1_R

USB20_P0_R USB20_N0_R

ON/OFFBTN#

+5VS_PWR_ON_LED

USB_EN#<28,33>

A

+USB_VCCA

0_0603_5%

USB_EN#

R29

ON/OFFBTN# <33>

12

+5VALW

2.5A

2 3 4 1

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

Place on TOP

+5VS

U14

IN

OUT

IN

OUT

EN/ENB

OUT

GND

OCB

6 7 8 5

SW5

1 3

G

6

@

W=80mils

+USB_VCCA

C373 1000P_0402_50V7K

1

C362

4.7U_0805_10V4Z

2

@

B

2 4

G

NTC017-DA1J-D160T_4P

5

For EMI

12

USB_OC0# <24>

+3VL

R397 100K_0402_5%

1 2

ON/OFFBTN#

1

C473

0.1U_0402_25V6 @

2

For EMI request

Security Classification

USB20_P1<24>

USB20_N1<24>

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

USB20_P1 USB20_P1_R

USB20_N1

Reserved for EHCI CRC errors Reserved for EHCI CRC errors

2012/05/18 2013/10/05

1 2

RR48 0_0402_5%

4

1

WCM-2012-900T_0805

1 2

RR47 0_0402_5%

12

R71 300_0402_5% @

1

C289 10P_0402_50V8J @

2

Compal Secret Data

@

LR8

3

2

@

Deciphered Date

3

2

USB20_N1_R

D

USB20_P0<24>

USB20_N0<24>

USB20_P0 USB20_P0_R

USB20_N0

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

5

4

3

2

1

+5VALW

12

RB73

4.7K_0402_5% @

12

RB74

4.7K_0402_5%

D D

C C

SLP_CHG#

@

SELCDP

X

0

USB20_DN10 USB20_DP10

CEN USB20_DN10

USB20_DP10 SELCDP

+5VALW

Pull-up for SLGC55584AV

12

RB75

4.7K_0402_5% @

12

RB76

4.7K_0402_5% @

Function DCP autodetect with

mouse/keyboard wakeup

1 S0 charging with SDP only

101

S0 charging with CDP or SDP only

1 2

RR44 0_0402_5%

1 2

RR45 0_0402_5%

U15

1 2 3 4 9

SLG55584AVTR_TDFN8_2X2

CEN DM DP SELCDP Thermal Pad

TDM VDD

@

CB

TDP

8 7 6 5

USB20_N10 USB20_P10

SLP_CHG# USB20_N10 USB20_P10

0.1U_0402_16V7K

SLP_CHG# <23> USB20_N10 <24> USB20_P10 <24>

CB25

@

1

2

USB20_DP10

USB20_DN10

1

CB49 10U_0603_6.3V6M @

2

12

+5VALW

1 2

RR26 0_0402_5%

4

1

WCM-2012-900T_0805

1 2

RR25 0_0402_5%

R76 300_0402_5% @

1

C303 10P_0402_50V8J @

2

PJ30

2

1 3

OUT OUT OUT OCB

112

Q8

@

D

AO3413_SOT23

G

2

USB20_N11

W=60mils

+USB_VCCB

6 7

C361 1000P_0402_50V7K

8 5

1

CR39

4.7U_0805_10V4Z

2

@

S

WCM-2012-900T_0805

4

1

12

R77 300_0402_5% @

1

C304 10P_0402_50V8J @

2

For EMI

12

USB_OC1# <24>

1 2

@

RR39 0_0402_5%

3

4

1

2

LR4

1 2

@

RR38 0_0402_5%

3

2

USB20_P11_LUSB20_P11

USB20_N11_L

+USB_VCCB

+USB_VCCC

+5VALW

2.5A

U48

2

IN

3

IN

USB_CHG_EN#<33>

@

USB20_P10_L

LR3

3

2

USB20_N10_L

USB_CHG_EN#

+5VALW

USB_EN#<27,33>

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

PAD-OPEN 2x2m

+USB_VCCC +USB_VCCB

1 2

@

R568 100K_0402_5%

USB_EN#

USB20_P11<24>

USB20_N11<24>

Reserved for EHCI CRC errors Reserved for EHCI CRC errors

1 2

USB30_RX0P<24>

USB30_RX0N<24>

B B

A A

USB30_TX0P<24>

USB30_TX0N<24>

USB30_RX1P<24>

USB30_RX1N<24>

USB30_TX1P<24>

USB30_TX1N<24>

USB30_RX0N

1 2

CB21 0.1U_0402_16V7K

1 2

USB30_TX0N_C

USB30_RX1N

USB30_TX1N_C

CB22 0.1U_0402_16V7K

CB23 0.1U_0402_16V7K

CB24 0.1U_0402_16V7K

@

RR19 0_0402_5%

KINGCORE WCM-2012HS-670T

1

4

LR1

1 2

@

RR20 0_0402_5%

1 2

@

RR32 0_0402_5%

KINGCORE WCM-2012HS-670T

1

4

LR2

1 2

@

RR22 0_0402_5%

1 2

@

RR42 0_0402_5%

KINGCORE WCM-2012HS-670T

1

4

LR5

1 2

@

RR40 0_0402_5%

1 2

@

RR43 0_0402_5%

KINGCORE WCM-2012HS-670T

1

4

LR6

1 2

@

RR41 0_0402_5%

2

3

2

3

2

3

2

3

2

3

2

3

2

3

2

3

USB30_RX0P_LUSB30_RX0P

USB30_RX0N_L

USB30_TX0P_C_LUSB30_TX0P_C

USB30_TX0N_C_L

USB30_RX1P_LUSB30_RX1P

USB30_RX1N_L

USB30_TX1P_C_LUSB30_TX1P_C

USB30_TX1N_C_L

USB20_P10_L USB20_N10_L

Change ESD Diode for EMI request

USB20_P11_L USB20_N11_L

Change ESD Diode for EMI request

+USB_VCCB

W=80mils

220U_6.3V_M

+USB_VCCC

W=80mils

@

220U_6.3V_M

USB30_TX0P_C_L USB30_TX0N_C_L

USB20_N10_L USB20_P10_L

USB30_RX0P_L USB30_RX0N_L

USB30_TX1P_C_L USB30_TX1N_C_L

USB20_N11_L USB20_P11_L

USB30_RX1P_L USB30_RX1N_L

DR1

@

2

1

3

AZC199-02SPR7G_SOT23-3

DR4

@

2

1

3

AZC199-02SPR7G_SOT23-3

1

+

CR40

2

1

+

CR47

2

4.7U_0805_10V4Z

1

CR42

2

1000P_0402_50V7K

4.7U_0805_10V4Z

1

CR46

2

1000P_0402_50V7K

9 1 8 2 7 3 6 4 5

USB30_TX0P_C_L USB30_TX0N_C_L USB30_RX0P_L USB30_RX0N_L

USB30_TX1P_C_L USB30_TX1N_C_L USB30_RX1P_L USB30_RX1N_L

0.1U_0402_10V7K

1

CR41

2

0.1U_0402_10V7K

1

CR45

2

JUSBA

SSTX+ VBUS SSTXDGND

GND

D+

GND

SSRX+

GND

SSRX-

OCTEK_USB-09EAEB @

JUSBB

SSTX+ VBUS SSTXDGND

GND

D+

GND

SSRX+

GND

SSRX-

OCTEK_USB-09EAEB @

YSCLAMP0524P_SLP2510P8-10-9

1

CR43

2

1

CR44

2

Support S/C

10 11 12 13

DR7

@

1

2

4

5 3

3

8

DR8

@

1

2

4

5 3

3

8

9

10

8

9

7

6

65

9

10

8

9

7

6

65

USB30_TX0P_C_L USB30_TX0N_C_L USB30_RX0P_L USB30_RX0N_L

USB30_TX1P_C_L USB30_TX1N_C_L USB30_RX1P_L USB30_RX1N_L

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

1

28 47Saturday, September 07, 2013

B

of

Slot 1 Half PCIe Mini Card-WLAN

Add WLAN_RST# on DVT

APU_PCIE_RST#<11,22,30,32>

WLAN_RST#<33>

E51_TXD<33>

E51_RXD<33>

Debug card using

WLAN_RST#

CLKREQ_WLAN#<24> CLK_PCIE_WLAN#<22>

CLK_PCIE_WLAN<22>

PCIE_FRX_WLANTX_N1<22> PCIE_FRX_WLANTX_P1<22>

PCIE_FTX_C_WLANRX_N1<22> PCIE_FTX_C_WLANRX_P1<22>

1 2

RM20 0_0402_5%

+3V_WLAN

5

UM5

1

P

IN1

O

2

IN2

SN74AHC1G08DCKR_SC70-5

R18

1 2

0_0402_5%

1 2

0_0402_5% R28

G

3

1 2

RM19 0_0402_5%

@

R1443

0_0402_5%

1 2

BT_CTRL_RBT_ON

+3V_WLAN

E51_TXD_R E51_RXD_R

Change JWLAN symbol to SP07000TB00 on DVT

@

4

WLAN_RST#_R

1 2

JWLAN

1

3

5

7

7 9910 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 G153G2

BELLW_80003-7041@

40 mils

+3V_WLAN +1.5VS_WLAN

0.1U_0402_16V4Z

1

CM2

CM1

2

0.01U_0402_25V7K

1

CM3

2

4.7U_0805_10V4Z

For SED

47P_0402_50V8J

4/23 Add RM20 and change UM5,RM21 to @

+1.5VS_WLAN

2

4

6

8

10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54

+1.5VS

PJ33 PAD-OPEN 2x2m @

2 1

+3V_WLAN

WLAN_OFF# WLAN_RST#_R

12

R75 300_0402_5% @

1

C302 10P_0402_50V8J @

2

R27

0_0402_5%

1 2

@

FCH_SCLK0 <9,10,24> FCH_SDATA0 <9,10,24>

USB20_N8 <24> USB20_P8 <24>

RM21 100K_0402_5%

@

Reserved for EHCI CRC errors

12

C253 @

WL_OFF# <33>

BTWLAN/ WiFi

0.1U_0402_16V4Z

1

CM7

CM8

@

2

0.01U_0402_25V7K

For SED

1

12

47P_0402_50V8J

2

C254 @

WLAN&BT Combo module circuits

CM9 @

2

4.7U_0805_10V4Z

BT_ON

BT_ON<33>

For isolate BT_CTRL and Compal Debug Card.

+3VALW TO +3V_WLAN

+3VS

12

R156 100K_0402_5% @

R155

@

WLAN_PWR#<33>

Add WLAN power circuit on DVT

4/23 Change R156,R155,C907,C908,Q210 to @

1 2

47K_0402_5%

BT on module

EnableLHDisable

1 2

E51_RXD_R

R328

1K_0402_5%

+3VS

2

C907

0.1U_0402_10V7K

1

@

G

2

@ C908

0.01U_0402_25V7K

1

Vgs=-4.5V,Id=3A,Rds<97mohm

2

PJ27

2

S

Q210 AO3413_SOT23

D

@

1 3

1

JUMP_43X79 @

+3V_WLAN

+3VL +3VALW_FCH+3V_LAN +1.8VS

1

CCL1 GCLK@

2

0.1U_0402_10V7K

1

CCL2 GCLK@

2

0.1U_0402_10V7K

1

2

1

CCL3 GCLK@

2

0.1U_0402_10V7K

GCLK@

YCL1 25MHZ 12PF X3G025000DK1H-X

1

GND

CCL4 18P_0402_50V8J GCLK@

2

4

1

CCL7 GCLK270@

2

0.1U_0402_10V7K

3

CLK_X2CLK_X1

3

+3VALW_FCH

1

CCL5 18P_0402_50V8J GCLK@

2

Green Clock Generator

22U_0805_6.3V6M

+RTCBATT

+3VL

+3VALW

+1.8VS

+3V_LAN

1 2

RCL10 0_0402_5%

1 2

+3VS

@

RCL11 0_0402_5%

For UMA

UCL1

SLG3NB238VTR_TQFN16_2X3 GCLK238@

1

CCL12

GCLK@

2

CLK_X1 CLK_X2

SLG3NB270VTR_TQFN16_2X3

UCL1

GCLK270@

10

VBAT

15

16

VDD_RTC_OUT

+V3.3A

2

VDD

VDDIO_27M1127MHz

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN XTAL_OUT

4

1

CCL6

2.2U_0603_6.3V6K

2

GCLK@

+RTCBATT_D

FCH_RTCX1_R_R

VGA_X1_R LAN_X1_R_R FCH_X1_R_R

4/23 Change UCL1.2 to +3VALW, UCL1.14 to +RTCVCC_D and add RCL10,RCL11 for USB30 wake issue

1 2

RCL1 0_0402_5%GCLK@

1 2

RCL4 33_0402_5%GCLK270@

1 2

RCL3 33_0402_5%GCLK@

1 2

RCL2 33_0402_5%GCLK@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/05/18 2013/10/05

25MHz_A 25MHz_B

GND1

GND2

7

14

9

32kHz

12 6 5

GND3

GND4

13

17

FCH_RTCX1_R <22>

VGA_X1 <12>

FCH_X1_R <22>

Compal Secret Data

Deciphered Date

1

2

For EMI

CCL10 5P_0402_50V8C

LAN_X1_R <30>

LAN_X1_R_R

Reserved for Swing Level adjustment ( Close GCLK side )

1 2

@

RCL5 0_0402_5%

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

Saturday, September 07, 2013

of

29 47

of

29 47

of

29 47

B

A

B

C

D

E

1 2

PCIE_FRX_C_LANTX_P0<22>

PCIE_FRX_C_LANTX_N0<22>

12

RL433 0_0402_5%

LAN_EN

FCH_PCIE_WAKE#

+3V_LAN

1 2

WOL_EN#

RL28 0_0402_5%

LANCLK_REQ#

RL22 1K_0402_5%@

LAN_EN

Sx Enable Wake up

LOW

LAN_EN<24>

CLKREQ_LAN#<24>

1 1

4/23 Mount QL53 and RL24 and change RL28,RL26

+3VS

+3V_LAN

2 2

to @ for LAN disable

RL24 10K_0402_5%

RL25 10K_0402_5%@

+3VS

12

1K_0402_5% RL6 @

RL7

15K_0402_5%

+3VALW TO +3V_LAN

Vgs=-4.5V,Id=3A,Rds<97mohm

+3VALW

12

RL147 100K_0402_5% @

RL432

@

WOL_EN#<33>

3 3

1 2

47K_0402_5%

CL1 0.1U_0402_10V7K CL2 0.1U_0402_10V7K

PCIE_FTX_C_LANRX_P0<22>

2

PCIE_FTX_C_LANRX_N0<22>

G

2N7002_SOT23-3

1 3

QL53

D

S

1 2

@

1 2

@

RL26 0_0402_5%

WOL_EN#ISOLATE#

Sx Disable Wake up

HIGH HIGH

2

CL483 @

0.1U_0402_10V7K

1

AO3413_SOT23

2

@ CL482

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

1 2

LANCLK_REQ#CLKREQ_LAN#

APU_PCIE_RST#<11,22,29,32>

CLK_PCIE_LAN<22> CLK_PCIE_LAN#<22>

FCH_PCIE_WAKE#<24>

S0

Reserve +3VALW_FCH to +3V_LAN for saving

+3VALW

power consumption on DVT

S

QL51

@

G

2

D

1 3

1

CL681

2

@

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN_EN ISOLATEB S0 Sx S0 Sx

--------------------------------------------- 0 0 0 0 1 1 0 1 0 0 1 1

PCIE_FRX_LANTX_P0 PCIE_FRX_LANTX_N0 PCIE_FTX_C_LANRX_P0

PCIE_FTX_C_LANRX_N0

APU_PCIE_RST#

LAN_X1 LAN_X2

FCH_PCIE_WAKE# ISOLATE#

RL21 10K_0402_5%@

ENSWREG

+LAN_VDDREG

1 2

RL5 2.49K_0402_1%

RTL8105ENCRTL8111E/F

Pin14

2

JUMP_43X39

1

+3VALW_FCH

PJ29 @

2

1

NC 10K ohm PD NC 1K ohm PH

PAD-OPEN 2x2m

CL682 1U_0402_6.3V6K

Pin15 Pin38

12

2

PJ31

2

@

1

+3V_LAN

1

Reserve ESD for LAN on DVT

LAN_MDI1+

+3V_LAN

LAN_MDI1-

1 0 1 1 1 1 1 1 1 1 1 0*

4 4

* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms

A

LAN_MDI2+

+3V_LAN

LAN_MDI2-

B

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111F-CGT_QFN48_6x6 8111FVB@

NC

D99

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

D100

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

LED3/EEDO

LED1/EESK

LED0

EECS

EEDI

MDIP0 MDIN0 MDIP1 MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10 AVDD10

AVDD10 AVDD10 AVDD10

REGOUT

LAN_X1_R<29>

CL43 10PF_0402_50V9

1 2

RL29 22_0402_5%

GCLK@

1

CL26 27P_0402_50V8J NOGCLK@

2

3

LAN_MDI0+

I/O2

2

GND

1

LAN_MDI0-

I/O1

3

LAN_MDI3+

I/O2

2

GND

1

LAN_MDI3-

I/O1

Add test point for pin37 on DVT

31 37 40

30 32

1 2 4 5 7 8 10 11

13 29 41

27 39

12 42 47 48

21 3

6 9 45

36

RL2 10K_0402_5%@ RL1 10K_0402_5%@

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3-

+LAN_VDD10

+3V_LAN

+LAN_EVDD10 +LAN_VDD10

+LAN_REGOUT

60 mils

TL1

12 12

Placement near to YL1

RL8

GCLK@

1 2

0_0402_5%

GCLK@

YL1 25MHZ_20PF_7V25000016NOGCLK@

1

GND

2

3

LAN_X2LAN_X1

3

GND

4

27P_0402_50V8J

NOGCLK@

LAN_MDI1+ LAN_MDI1-

LAN_MDI0+ LAN_MDI0-

LAN_MDI2+ LAN_MDI2-

LAN_MDI3+ LAN_MDI3-

1

CL34

0.1U_0402_25V6

2

Place CL34 colse to LAN chip

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LAN_X2

1

CL27

2

1 2 3 4 5 6 7

10/100M transformer_NS681695

1 2 3 4 5 6 7

10/100M transformer_NS681695

C

LL1

8111FVB@

+LAN_REGOUT

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1

1 2

2.2UH +-5% NLC252018T-2R2J-N

4.7U_0603_6.3V6K 8111FVB@

1 2 LL2 0_0603_5%

CL18

1U_0402_6.3V6K

CL13

1

2

1

2

+LAN_EVDD10+LAN_VDD10

1

CL17

0.1U_0402_10V7K

2

Close to Pin 21

+3V_LAN

ENSWREG

UL3

TD+

TX+

TD-

TX-

CT

NC

CT

RD+

RX+

RD-8RX-

UL4

8111FVB@

TD+

TX+

TD-

TX-

CT

NC

CT

RD+

RX+

RD-8RX-

2012/05/18 2013/10/05

16 15 14 13 12 11 10 9

+3V_LAN

12

1 2

LL3 0_0603_5%8111FVB@

RL4 0_0402_5% 8111FVB@

RL23 0_0402_5% 8105ELDO@

RJ45_MIDI1+ RJ45_MIDI1-

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI2+ RJ45_MIDI2-

RJ45_MIDI3+ RJ45_MIDI3-

4.7U_0603_6.3V6K 8111FVB@

RL4

RL23

Compal Secret Data

Deciphered Date

+LAN_VDDREG

1

CL28

8105E-VL/VD 8111F/F-VB PWM Mode

0 ohm (Pull High)

1

2

NC 0 ohm

CL39 1000P_0402_50V7K

12

1 2

12

8111FVB@

12

8111FVB@

RL11 75_0402_1%

1 2

RL12 75_0402_1%

1 2

RL13 75_0402_1%

1 2

RL15 75_0402_1%

CL40 1000P_0402_50V7K

CL41 1000P_0402_50V7K

CL42 1000P_0402_50V7K

D

+LAN_VDD10

1

CL9

0.1U_0402_10V7K

2

8111FVB@

CL29

0.1U_0402_10V7K 8111FVB@

8105E-VL/VD

LDO Mode

NC

(Pull Down)

8111FVB@

RJ45_GND LANGND

+3V_LAN

+LAN_VDD10

For P/N and footprint Please place them to ISPD page

CL3 to CL6 close to Pin 27,39,47,48 CL7 to CL8 close to Pin 12,42

1 2

CL3 0.1U_0402_10V7K

1 2

CL4 0.1U_0402_10V7K

1 2

CL5 0.1U_0402_10V7K

1 2

CL6 0.1U_0402_10V7K

1 2

CL7 0.1U_0402_10V7K8111FVB@

1 2

CL8 0.1U_0402_10V7K8111FVB@

CL19, CL20,CL21 close to pin 13,29,45, respectively CL22 close to pin 3, respectively CL23,CL24,CL25 close to pin 6,9,41, respectively

1 2

CL19 0.1U_0402_10V7K

1 2

CL20 0.1U_0402_10V7K

1 2

CL21 0.1U_0402_10V7K

1 2

CL22 0.1U_0402_10V7K8111FVB@

1 2

CL23 0.1U_0402_10V7K8111FVB@

1 2

CL24 0.1U_0402_10V7K8111FVB@

1 2

CL25 0.1U_0402_10V7K8111FVB@

UL1

8105E-VD 10/100M 8105ELDO@

LAN Conn.

JRJ45

RJ45_MIDI0+ RJ45_MIDI0RJ45_MIDI1+ RJ45_MIDI2+ RJ45_MIDI2RJ45_MIDI1RJ45_MIDI3+ RJ45_MIDI3-

1 2 3 4 5 6 7 8

1 2

CL36 1000P_1808_3KV7K

Title

Size Document Number Rev

Custom

Date: Sheet

@

PR1+ PR1PR2+ PR3+ PR3PR2PR4+

GND GND

PR4-

SANTA_130452-S

1

2

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

9 10

3

CL37 220P_0402_50V6K

223

1

3

223

1

2

E

For ESD

D92 AZC199-02SPR7G_SOT23-3

D93 AZC199-02SPR7G_SOT23-3 @

For ESD

CL38 @

4.7U_0603_6.3V6K

of

30 47Saturday, September 07, 2013

B

A

MIC2_R MIC2_L

220P_0402_50V7K

1

CA7

470P_0402_50V8J

2

22 21

17 16

31 30 29

15 14

20 12 10 11

19 28 27 34 35 36

2 3

13 18

47

4

MIC1_R_R MIC1_R_L

+MIC1_VREFO_L +MIC1_VREFO_R

1 1

0.01U_0402_25V7K 1 2

CA65

AZ_RST_HD#<24>

@

+MIC2_VREFO

1 2

CA59 100P_0402_50V8J

AZ_SYNC_HD<24>

close to pin 28

1 2

CA6010U_0603_6.3V6M

AC_VREF

1

CA55

0.1U_0402_10V7K

2 2

INT_MIC_CLK<19>

Analog MIC

3 3

MIC2_L

MIC2_R

2

AMIC@ CA26

12

1U_0402_6.3V4Z

12

1U_0402_6.3V4Z CA28 AMIC@

CA56

2.2U_0603_6.3V6K

2

@

RA40 20K_0402_1%

FBMA-10-100505-301T

1

2

@

For EMI

RA42

CAM@

CA52

CAM@

220P_0402_50V7K

INT_MIC_DATA<19>

12

EC_MUTE#<33>

INT_MIC_CLK_R

AMIC@ RA38

12

1K_0402_5%

12

1K_0402_5% RA39 AMIC@

+MIC2_VREFO

MIC1_R_C_R

CA584.7U_0603_6.3V6K

MIC1_R_C_L

CA574.7U_0603_6.3V6K

MONO_IN

close to pin19

12

AC_JDREF

RA34

20K_0402_1%

12

CPVEE

CA54 2.2U_0603_10V6K

12

CA53 2.2U_0603_10V6K

INT_MIC_CLK_R

SENSE_A SENSE_B

12

RA27

4.7K_0402_5% AMIC@

CA27

1 2

AMIC@

close to Codec

4/23 Add CA6,CA7 for EMI request

B

UA1

MIC1_R MIC1_L

MIC2_R MIC2_L

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

LINE2_R LINE2_L

MONO_OUT PCBEEP SYNC RESET#

JDREF LDO_CAP VREF CPVEE CBN CBP

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

SENSE_A SENSE_B

EAPD PD#

ALC259-VC2-CG_MQFN48_6X6

Change int. MIC to MB on DVT

INT_MIC

470P_0402_50V8J

1

CA6

2

DVDD_IO

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+ SPK_OUT_L-

HPOUT_R HPOUT_L

SDATA_OUT

SDATA_IN

Thermal Pad

JMIC

1

2

3

GND

4

GND

ACES_50271-0020N-001

@

DVDD

AVDD1 AVDD2

PVDD1 PVDD2

BCLK

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

35mA for 3.3V level

NC NC NC

1 9

25 38

39 46

45 44

40 41

33

RA19

32

RA20

5 8

AZ_SDIN0_HD_R

6

23 24 48

26 37 42 43 7

49

+DVDD_IO +3VS_DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

75_0402_1%

AZ_BITCLK_HD

HP_R <32> HP_L <32>

RA26 33_0402_5%

AZ_BITCLK_HD

@

AGND

+3VS

12

RA2910_0402_5%

10P_0402_50V8J

CA51

1 2

DGND

2W 4ohm =40mil placement near Audio Codec 1W 8ohm =20mil

SPKL+

SPKL-

SPKR+

SPKR- SPK_R2

RA30

0_0603_5%

RA31

0_0603_5%

RA32

0_0603_5%

RA33

0_0603_5%

12

2

CA32

10U_0603_6.3V6M

1 2

CA35

10U_0603_6.3V6M

1

12

2

CA33

10U_0603_6.3V6M

1 2

CA34

10U_0603_6.3V6M

1

12

C

1 2

RA28 0_0603_5%

CA3

1 2

RA17 0_0603_5%

10U_0603_6.3V6M

CA5

10U_0603_6.3V6M

place close to chip

AZ_SDOUT_HD <24>

AZ_SDIN0_HD <24>

AZ_BITCLK_HD <24>

@

For EMI please place near codec

SPK_L1SPK_L1

2

CA30 1U_0402_6.3V4Z @

1

SPK_L2

SPK_R1

2

CA31 1U_0402_6.3V4Z @

1

SPK_R2

2

1

2

1

0.1U_0402_16V4Z

1

CA4

2

0.1U_0402_16V4Z

1

CA45

2

+DVDD_IO

+3VS_DVDD

D

+AVDD

1

CA36 0.1U_0402_10V7K

close to pin39

2

1

CA38 0.1U_0402_10V7K

2

EC Beep

EC_BEEP#<33>

PCI Beep

FCH_SPKR<24>

EC_MUTE#

To solve noise issue

close to pin 25 close to pin 38

0.1U_0402_10V7K

2

CA42

CA47

1

10U_0603_6.3V6M

+PVDD

EC_MUTE#

Hight LOW

CA40

Internal AMP

Enable Disable

RA50

4.7K_0402_5%

1 2

2

1

10U_0603_6.3V6M

Ext.MIC/LINE IN JACK

MIC1_R_R

MIC1_R_L

2

1

CA37

CA50

1

2

10U_0603_6.3V6M

LA7

1 2

PBY160808T-601Y-N_2P

RA7

1 2 47K_0402_5%

RA8

1 2 47K_0402_5%

RA12

4.7K_0402_5%

RA23

1K_0402_5%

12

1K_0402_5%

RA24

0.1U_0402_10V7K 1

2

0.1U_0402_10V7K 1

CA41

2

1 2

RA22

12

2.2K_0402_5%

12

2.2K_0402_5%

RA25

E

RA18

1 2

0_0603_5%

1

CA39

@

10U_0603_6.3V6M

2

+5VS

12

CA43 10U_0805_6.3V6M

Beep sound

CA13

1 2

MONO_IN

0.1U_0402_10V7K

CA18

100P_0402_50V8J

+MIC1_VREFO_R

MIC1_R <32>

MIC1_L <32>

+MIC1_VREFO_L

+5VS

SPK Conn.

Sense Pin

SENSE A

4 4

Impedance

39.2K 20K 10K

5.1K

39.2K 20K 10K

A

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B PORT-H (PIN 20)

Function

Headphone out Ext. MIC

Analog MIC

1 2

place close to chip

12

MIC_SENSE<32>

NBA_PLUG<32>

B

RA37 20K_0402_1%

RA36 39.2K_0402_1%

SENSE_A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CA63 0.1U_0603_50V7K

1 2

CA61 0.1U_0603_50V7K

1 2

CA66 0.1U_0603_50V7K

1 2

CA62 0.1U_0603_50V7K

1 2

RA35 0_0603_5%

2012/05/18 2013/10/05

C

Compal Secret Data

Deciphered Date

CA64 0.1U_0603_50V7K

CA67 0.1U_0603_50V7K

CA77 0.1U_0603_50V7K

CA68 0.1U_0603_50V7K

D

4/23 Add CA64,CA67,CA68,CA77 for EMI request

@

1 2

@

1 2

SPK_R1 SPK_R2 SPK_L1 SPK_L2

@

1 2

@

1 2

DA9 AZ5125-02S.R7G_SOT23-3

2

1

3

@

2

1

3

DA8 AZ5125-02S.R7G_SOT23-3 @

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

SCHEMATIC, MB A8868

4019K4

Saturday, September 07, 2013

JSPK 1 2 3 4

ACES_85204-0400N

@

E

1 2 3 4

of

31 47

of

31 47

of

31 47

B

5

CardReader Conn.

4

3

2

1

D D

RR1

@

+3VS

1 2

0_0603_5%

MIC_SENSE<31> NBA_PLUG<31>

HP_R<31> HP_L<31>

MIC1_L<31> MIC1_R<31>

+3VS_CR USB20_N7_R

USB20_P7_R HP_R

HP_L MIC1_L

MIC1_R MIC_SENSE NBA_PLUG

Update JCRIO pin definition on DVT

ACES_88058-120N

14

GND

13

GND

12

11

10

9

8

7

6

5

4

3

2

1

JCRIO

@

USB20_P7<24>

USB20_N7<24>

RR67 0_0402_5% LR9

4

1

WCM-2012-900T_0805

RR66 0_0402_5%

12

R74 300_0402_5%

@

1

C301 10P_0402_50V8J @

2

1 2

4

1

1 2

USB20_P7_R

@

3

2

USB20_N7_R

Reserved for EHCI CRC errors

C C

CT2

0.1U_0402_10V7K TPM9655@

TPM1.2 on board

1 2

CT1 22P_0402_50V8J TPM9635@

12

YT1

TPM9635@

RT8 0_0402_5%

32.768KHZ_12.5P_1TJF125DP1A000D

1 2

B B

+3VS

12

RT2 TPM9635@

4.7K_0402_5%

CT6 22P_0402_50V8J TPM9635@

+VSB_TPM

RT7

4.7K_0402_5%@

RT8 TPM9635@ 0_0402_5%

1 2

APU_PCIE_RST#<11,22,29,30>

CLK_PCI_TPM_FCH<22>

TPM9635@

TPM9655@

TPM_XTALI

12

RT1

@

10M_0402_5%

LPC_AD0<22,33,34> LPC_AD1<22,33,34> LPC_AD2<22,33,34> LPC_AD3<22,33,34>

LPC_FRAME#<22,33,34>

1 2

0.1U_0402_10V7K

2

TPM9635@

1

TPM_XTALO

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# PLT_RST# LPC_PD#

SERIRQ<22,33>

CT710P_0402_50V8J RT11 0_0402_5%

SERIRQ

1 2

TPM9635@

RT4 10_0402_5%

1 2

TPM9635@

TPM_XTALO TPM_XTALI

CT2

CT4

0.1U_0402_10V7K TPM9655@ CT5

0.1U_0402_10V7K TPM9655@

0.1U_0402_10V7K

2

CT4

TPM9635@

1

0.1U_0402_10V7K

26 23 20 17 22 16 28 27 21

15

7

14 13

2

CT5

TPM9635@

1

UT1

LAD0 LAD1 LAD2 LAD3 LFRAME# LRESET# LPCPD# SERIRQ LCLK

SLB 9635 TT 1.2

CLKRUN#

PP

XTALO XTALI/32K IN

+VDD_TPM

10

19

24

5

VDD

GPIO2

TEST1

TESTB1/BADD

GND

SLB 9635 TT 1.2_TSSOP28

4

11

18

25

TPM9635@

+3VS

12

RT13 0_0603_5% TPM9655@

+VSB_TPM

VSB

6

GPIO

2

Base I/O Address 0 = 02Eh 1 = 04Eh*

8 9

3

NC

12

NC

1

NC

TPM_GPIO TPM_GPIO2

TPM9635@ 0_0402_5%

1 2

RT5

+VSB_TPM

2

1

0.1U_0402_10V7K

RT14

CT8

TPM9635@

TPM9655@ 0_0402_5%

1 2

RT12 0_0603_5%

TPM9655@

RT10 0_0603_5%

TPM9635@

CT8

0.1U_0402_10V7K TPM9655@

T62PAD @ T63PAD @

TPM9635@

4.7K_0402_5%

APU_PCIE_RST#

12

+3VS

RT3

12

RT6

4.7K_0402_5% @

1 2

+3VS

+3VALW

A A

LPC_PD#

5

Security Classification

2012/05/18 2013/10/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/05/18 2013/10/05

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

32 47Saturday, September 07, 2013

1

B

of

5

1

CB2

CB4

2

0.1U_0402_10V7K

SLP_S3#<24> SLP_S5#<24>

WL_OFF#<29>

1 2

@

0.1U_0402_10V7K

1

2

T14

100K_0402_5%

0.1U_0402_10V7K

1

CB1

EC_RST#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SUSP#

0.1U_0402_10V7K

KSI[0..7]<34>

KSO[0..15]<34>

PWR_SUSP_LED#

2

GATEA20<24>

KB_RST#<24>

SERIRQ<22,32>

LPC_FRAME#<22,32,34>

LPC_AD3<22,32,34> LPC_AD2<22,32,34> LPC_AD1<22,32,34> LPC_AD0<22,32,34>

CLK_PCI_EC<22,26>

LPC_RST#<22,34>

EC_SCI#<24>

WLAN_PWR#<29>

Add WLAN_PWR# on DVT

KSI[0..7] KSO[0..15]

EC_SMB_CK1<37,38> EC_SMB_DA1<37,38> EC_SMB_CK2<7,18> EC_SMB_DA2<7,18>

EC_SMI#<24>

USB_CHG_EN#<28>

BT_ON<29>

FAN_SPEED1<5>

E51_TXD<29>

E51_RXD<29>

FCH_PWRGD<24>

1 2

RB13 0_0402_5%@

1 2

RB16 1K_0402_5%

RTC_CLK<22,26>

RB20 0_0402_5%

For EMI

CLK_PCI_EC

12

RB3

10_0402_5%

D D

+3VL

C C

+3VL +3VS

B B

@

1

CB11

22P_0402_50V8J

@

2

RB2

47K_0402_5%

1 2

CB12 0.1U_0402_10V7K

RP7 1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

@

1 2

@

1 2

LPC_RST#

CB13 1U_0402_6.3V6K

CB14 180P_0402_50V8J

1

CB5

2

1000P_0402_50V7K

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC LPC_RST# EC_RST# EC_SCI# WLAN_PWR#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SLP_S3# SLP_S5# EC_SMI#

USB_CHG_EN# BT_ON

FAN_SPEED1 WL_OFF# E51_TXD E51_RXD FCH_PWRGD

XCLKO

12

RB22

4

1000P_0402_50V7K

1

CB6

2

UB1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

1

CB16 20P_0402_50V8

2

1

CB7

2

LPC & MISC

+3VL

Int. K/B Matrix

9

22

33

96

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

SM Bus

GPIO

GND/GND

11

24

35

+3VL

CB3

0.1U_0402_10V7K

1 2

111

125

67

EC_VDD0

EC_VDD/VCC

AD Input

CPU1.5V_S3_GATE/GPXIOA00

GPIO

GND/GND

GND0

94

113

BEEP#/GPIO10

EC_VDD/AVCC

ACOFF/GPIO13

BATT_TEMP/GPIO38

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

SYSON/GPIO56 VR_ON/GPIO57

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF-A3_LQFP128_14X14

69

GPIO0F GPIO12

GPIO39

GPIO3B

GPIO42

IREF/GPIO3E

GPXIOD06

V18R

3

21

WL_BT_LED#

23

EC_BEEP# 26 27

63

BATT_TEMPA 64 65

ADP_I 66 75 76

EC_ENBKL

68 70

EN_DFAN1 71 72

83

EC_MUTE# 84

USB_EN# 85 86 87

TP_CLK 88

TP_DATA

97

VGATE 98

WOL_EN# 99 109

VCIN0_PH

119 120 126 128

73 74 89 90

BATT_FULL_LED# 91

WLAN_RST# 92 93

BATT_CHG_LOW_LED# 95

SYSON 121

VR_ON 127

100

EC_RSMRST# 101

EC_LID_OUT# 102

PROCHOT_IN 103

H_PROCHOT_EC 104

VCOUT0_PH_L 105

BKOFF# 106

PBTN_OUT# 107

FCH_PWR_EN 108

110

ACIN_D 112

EC_ON_R 114

ON/OFFBTN# 115

LID_SW# 116

SUSP# 117 118

124

+EC_V18R

1

CB15

4.7U_0805_10V4Z

2

WL_BT_LED# <35> EC_BEEP# <31>

BATT_TEMPA <37> ADP_I <37,38>

EC_ENBKL <19>

EN_DFAN1 <5>

EC_MUTE# <31>

USB_EN# <27,28>

TP_CLK <35>

TP_DATA <35>

VGATE <43>

WOL_EN# <30>

VCIN0_PH <37>

BATT_FULL_LED# <35> WLAN_RST# <29>

SYSON <36,40> VR_ON <43>

EC_RSMRST# <24> EC_LID_OUT# <24> PROCHOT_IN <37>

BKOFF# <19>

PBTN_OUT# <24>

FCH_PWR_EN <36,41>

ON/OFFBTN# <27> LID_SW# <35>

SUSP# <36,40,41,42,45>

VCIN0_PH connect to power portion (9012 only)

BATT_CHG_LOW_LED# <35>

1 2

RB14 0_0402_5%

2

PWR_SUSP_LED# <35>

1

BATT_TEMPA

ACIN_D

LID_SW#

TP_CLK

TP_DATA

SYSON

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

ACIN_D

SUSP#

VR_ON

1 2

CB9 100P_0402_50V8J

1 2

CB10 100P_0402_50V8J

1 2

RB35 47K_0402_5%

1 2

RB8 4.7K_0402_5%@

1 2

RB9 4.7K_0402_5%@

1 2

RB10 4.7K_0402_5%

1 2

@

RB34 0_0402_5%

RB18

330K_0402_5%

12

1 2

RB21 10K_0402_5%

1 2

RB23 10K_0402_5%

12

DB1RB751V40_SC76-2

+3VL

+5VS

VS_ON <39>

+3VL

ACIN <38>

Close to EC

13

RB27

100K_0402_5%

1 2

A A

E51_TXD

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109 VCIN1 pin102

VCOUT0 pin104

VCOUT1 pin103

>1.2V <1.2V

HIGH

LOW

HIGH

EC_ON_R

For KB9012 EC_ON low pulse work around

5

4

RB36

1 2

2.2K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

1U_0402_6.3V6K CB50

2

3

EC_ON <39>

H_PROCHOT_EC<37>

Compal Secret Data

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

H_PROCHOT_EC

High Active

H_PROCHOT_EC

2

1 2

RB6 10K_0402_5%

D

QB1

2

2N7002_SOT23-3

G

S

@

H_PROCHOT# <7,22>

Low Active (+1.5V)

+3VS

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

Saturday, September 07, 2013

1

of

33 47

of

33 47

of

33 47

B

1

A A

2

LPC Debug Port

@ E-T_3801K-F10N-01L

12

GND

11

GND

10

9

8

7

CLK_PCI_DDR

6 5 4 3 2 1

JDB

7 6 5 4 3 2 1

+3VS

3

4

Place the PAD under DDR DIMM.

LPC_RST# <22,33> CLK_PCI_DDR <22,26>

LPC_FRAME# <22,32,33> LPC_AD3 <22,32,33> LPC_AD2 <22,32,33> LPC_AD1 <22,32,33> LPC_AD0 <22,32,33>

C457

1 2

22P_0402_50V8J

@

R393

1 2

22_0402_5%

@

CLK_PCI_DDR

5

6

7

8

For EMI

Close to JKB

B B

KSO2 KSO1 KSO0

KEYBOARD CONN.

KSI[0..7]

KSO[0..15]

JKB

C C

26

GND

27

GND

ACES_50524-02501-001 @

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

KSI[0..7] <33>

KSO[0..15] <33>

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSI7 KSI6 KSO6 KSI5 KSO5 KSI4 KSI3 KSI2 KSI1 KSO4 KSI0 KSO3 KSO2 KSO1 KSO0

KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1

1 2

C404 100P_0402_50V8J

1 2

C405 100P_0402_50V8J

1 2

C406 100P_0402_50V8J

1 2

C407 100P_0402_50V8J

1 2

C408 100P_0402_50V8J

1 2

C409 100P_0402_50V8J

1 2

C410 100P_0402_50V8J

1 2

C411 100P_0402_50V8J

1 2

C412 100P_0402_50V8J

1 2

C413 100P_0402_50V8J

1 2

C415 100P_0402_50V8J

1 2

C416 100P_0402_50V8J

1 2

C417 100P_0402_50V8J

1 2

C418 100P_0402_50V8J

1 2

C419 100P_0402_50V8J

1 2

C420 100P_0402_50V8J

1 2

C421 100P_0402_50V8J

1 2

C422 100P_0402_50V8J

1 2

C423 100P_0402_50V8J

1 2

C424 100P_0402_50V8J

1 2

C425 100P_0402_50V8J

1 2

C427 100P_0402_50V8J

1 2

C429 100P_0402_50V8J

1 2

C431 100P_0402_50V8J

D D

Security Classification

2012/05/18 2013/10/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

5

Title

Size Document Number Rev

Date: Sheet

6

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

Saturday, September 07, 2013

7

of

34 47

of

34 47

of

34 47

8

B

5

4

Touchpad Connector (Reserve 7 pins for LED & Win8 TP)

3

2

1

+3VL +5VS +5VALW

D D

TP_CLK<33> TP_DATA<33>

LID_SW#<33>

BATT_FULL_LED#<33>

BATT_CHG_LOW_LED#<33>

PWR_SUSP_LED#<33>

WL_BT_LED#<33>

TP_CLK TP_DATA

LID_SW# BATT_FULL_LED# BATT_CHG_LOW_LED# PWR_SUSP_LED# HDD_LED# WL_BT_LED#

HDD LED

C C

R404

10K_0402_5%

3 4

Q9B 2N7002KDWH_SOT363-6

12

+3VS

HDD_LED#

6 1

5

Q9A 2N7002KDWH_SOT363-6

1 2

@

R50 0_0402_5%

2

SATA_LED# <23>

JTP

1

2

3

4

5

6

7

8

9

10

13

11

G1

11

14

12

G2

12

ACES_50504-0120N-001

@

Screw Hole

H7

H_3P0 @

1

H1

H_4P2 @

1

H_4P6 @

H_4P2x4P6 @

1

H3

H2

VGACPU

H5

H4

1

H_3P5 @

H_3P0 @

1

PTH

H11

H10

H_3P0 @

1

H12 H_3P0 @

1

H13

H_3P0

@

1

@

1

H15

H14

H_3P0 @

1

H17

H_3P0

H_3P0N

@

1

@

1

PCH

H8

H_3P0 @

1

BATT

NPTH

H18

H9 H_3P0 @

1

H_3P0x4P0N @

1

H16

1

H_3P0N @

H20

1

H_3P0N @

H21

H_3P0 @

1

B B

PCB Fedical Mark PAD

FD2

FD1

@

1

FD4

FD3

@

1

ISPD

ZZZ

PCB

PCB LA-8868P REV1

U1

A A

5

4

CPU GPU

AMD E2-1800 R1_UNBW E2R1@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DC-IN

U1

AMD E2-1800 R3 E2R3@

PJP1

PJP1 45@

U1

AMD E1-1200 R3 E1R3@

Compal Secret Data

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

U2

FCH

AMD A13 HUDSON-M3L R3 M3LR3@

UV1

2160809024A11SEYMOU_FCBGA631 SEYMOURR3@

2

Compal Electronics, Inc.

Title

SCHEMATIC, MB A8868

Size Document Number Rev

Date: Sheet

4019K4

Saturday, September 07, 2013

1

35 47

B

of

35 47

of

35 47

of

A

+3VALW TO +3VS

+3VALW +3VS

Q29

S

D

S

D

S

D

G

D

SI4800BDY_SO8

C466

1 2 3 4

1

2

0.022U_0402_25V7K

8 7 6 5

1 1

1

2

4.7U_0805_10V4Z

Vgs=10V,Id=9A,Rds=18.5mohm

1

C459

2

1U_0402_6.3V6K

12

C472

R415 330K_0402_5%

4.7U_0805_10V4Z 1

C460

2

1 2

R410

47K_0402_5%

61

Q10A

2 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6

+VSB

Q10B

5

R406

470_0805_5%

1 2 34

B

C

D

E

+1.5V to +1.5VS+5VALW TO +5VS

+5VALW

1

2

4.7U_0805_10V4Z

Q30

8

D

7

D

6

D

5

G

D

SI4800BDY_SO8

C467

S S S

1 2

1U_0402_6.3V6K 3 4

1

C468

2

0.01U_0402_25V7K

C461

12

R413 200K_0402_5% @

Vgs=10V,Id=9A,Rds=18.5mohm

+5VS

1

2

4.7U_0805_10V4Z C462

1 2

R416

47K_0402_5%

61

Q11A

2 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6

+1.5V

1

2

R411

Q11B

470_0805_5%

1 2 34

5

+VSB

+5VS

For EMI

2

C821

C822

@

1

0.1U_0402_16V4Z

Vgs=10V,Id=9A,Rds=18.5mohm

Q31

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C469

2

4.7U_0805_10V4Z

S S S G

C470

1 2 3 4

1

2

+1.5VS

1

C463

2

1U_0402_6.3V6K

0.1U_0402_25V6

12

R414 820K_0402_5%

4.7U_0805_10V4Z 1

C465

2

1 2

R417

220K_0402_5%

61

Q12A

2 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6

R412

Q12B

470_0805_5%

1 2 34

5

+VSB

SUSPSUSPSUSP

+5VALW

R56

100K_0402_5%

FCH_PWR_EN#

1 2

FCH_PWR_EN<33,41>

2 2

3 3

@

R62 0_0402_5%

12

R67 100K_0402_5%

1 2

34

Q25B

5

2N7002KDWH_SOT363-6

Q25A in page22

+5VS TO +5VS_ODD

+5VS

+5VALW

2

R458 100K_0402_5%

1 2

ODD_PWR#

61

Q53A

2

ODD_PWR<23>

4 4

2N7002KDWH_SOT363-6

R456

1 2

47K_0402_5%

C471

0.1U_0402_16V7K

1

2

C255

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

Q45

G

2

D

1 3

AO3413_SOT23

C679

@

1

2

PJ28

2

JUMP_43X79 @

1

+1.5V

1 2 34

Q218B

SYSON<33,40>

+5VS_ODD

1

C680 1U_0402_6.3V6K

2

R478 470_0805_5%

5

+5VALW

R432

100K_0402_5%

1 2

SYSON#

61

Q218A

2

2N7002KDWH_SOT363-6

FCH_PWR_EN#

+5VS_ODD

R457

470_0805_5%

1 2 34

Q53B

2N7002KDWH_SOT363-6

5

R8

1 2

47K_0402_5%

ODD_PWR#

2

C530

0.1U_0402_10V7K

1

AO3413_SOT23

2

C527

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

C526

Q3

G

2

1

D

1 3

1

2

SUSP

2N7002KDWH_SOT363-6

PJ2 JUMP_43X79

@

+3VALW_FCH

2

C529 1U_0402_6.3V6K

1

Vgs=10V,Id=14.5A,Rds=6mohm

+1.8VS

5

+1.1VALW

8 7 6 5

FDS6676AS_SO8

1

C474

2

4.7U_0805_10V4Z

+0.75VS

R254

470_0805_5% 1 2 34

Q21B

R477 470_0805_5%

1 2 61

Q21A

2N7002KDWH_SOT363-6

2

SUSP

+1.1VALW to +1.1VS

+1.1VS

Q44

S

D

S

D

S

D

G

D

C477

C476 1 2 3 4

1

2

1

2

1U_0402_6.3V6K

12

0.1U_0402_25V6

R420 820K_0402_5%

2N7002KDWH_SOT363-6

4.7U_0805_10V4Z 1

C475

2

1 2

R418

220K_0402_5%

61

Q23A

2

SUSP

SUSP#

SUSP#<33,40,41,42,45>

SUSP

+VSB

1 2

R385 0_0402_5%

2

C201

0.1U_0402_16V4Z @

1

Need to delay after +3VS ramp up

+5VALW

R422 100K_0402_5%

1 2 61

Q25A

2

2N7002KDWH_SOT363-6

+1.1VS

R419 470_0805_5%

1 2 34

Q23B

5

2N7002KDWH_SOT363-6

SUSP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/05/18 2013/10/05

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

36 47Saturday, September 07, 2013

E

B

of

A

B

C

D

PL1

HCB2012KF-121T50_0805

1 2

PL2

HCB2012KF-121T50_0805

ADPIN

PJP1

1

+

1 1

SINGA_2DW-0005-B03

2 2

2

+

3

-

4

-

PJP2

1

2

3

EC_SMCA

3

4

EC_SMDA

4

5

TS_A

5

6

7

CCM_C250137GR007M262ZR

12

1

2

3

PC1

1000P_0402_50V7K

PD1

@PJSOT24CW_SOT323-3

1 2

PR10 100_0402_1%

1 2

PR11 100_0402_1%

1 2

PR12 24K_0402_1%

1 2

PR13 1K_0402_1%

1 2

12

PC2

100P_0402_50V8J

VMB

12

PC5 1000P_0402_50V7K

PD2

@PJSOT24CW_SOT323-3

2

1

3

12

PC3

1000P_0402_50V7K

PL3

HCB2012KF-121T50_0805

1 2

PL4

HCB2012KF-121T50_0805

1 2

VIN

12

PC6

10U_0805_25V6K

+3VL

BATT_TEMPA <33>

12

PC4

100P_0402_50V8J

BATT+

12

PC7

0.01U_0402_25V7K

EC_SMB_CK1 <33,38>

EC_SMB_DA1 <33,38>

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

ADP_I<33,38>

H_PROCHOT_EC<33>

PR2

1 2

10K_0402_1%

PROCHOT_IN<33> VCIN0_PH<33>

2012/07/11

@

12

0.1U_0402_10V7K

@

PC11

B+

100K_0402_1%

POK<39,41>

PR8

VL

1 2

PR9

0_0402_5%

1 2

VSB_N_002

12

PC10

VSB_N_003 13

D

2

G

S

.1U_0402_16V7K

PR7

22K_0402_1%

1 2

PQ2 SSM3K7002FU_SC70-3

1 2

Please locate these parts Near EC chip

+3VL

PR1

1K_0402_1%

12

PR3

20K_0402_1%

GND connect to EC pin69 GND

12

PR6

PC8

100K_0402_1%

0.22U_0603_25V7K

VSB_N_001

+VSBP +VSB

PC12

0.1U_0402_10V7K

13

2

PQ1

TP0610K-T1-GE3_SOT23-3

PJP3

2 1

PAD-OPEN 2x2m

12

PR4

12

PH1

12

PC9

12.1K_0402_1%

100K_0402_1%_TSM0B104F4251RZ

+VSBP

0.1U_0603_25V7K

3 3

RTC Battery

PBJ1

-+

@MAXEL_ML1220T10

12

+RTCBATT_001 +RTCBATT_002

SP093MX0000

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR14

560_0603_5%

1 2

Compal Secret Data

Deciphered Date

C

PR15

560_0603_5%

1 2

2013/10/052011/12/30

+RTCBATT

Title

SCHEMATIC, MB A8868

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SAMSUNG

D

of

37 47Saturday, September 07, 2013

of

37 47Saturday, September 07, 2013

of

37 47Saturday, September 07, 2013

B

A

B

C

D

for reverse input protection

13

D

2

BQ24725_001

1 1

PR225

1 2

1M_0402_5%

PR226

1 2

3M_0402_5%

G

PQ209 SSM3K7002FU_SC70-3

S

PQ203

TPCA8057-H_PPAK56-8-5

5

PC230

2200P_0402_50V7K

4

BQ24725_ACDRV_1

12

2 2

3 3

P1 B+VIN

1 2 3

12

PR231

PC231

@0_0402_5%

0.1U_0402_25V6

12

PR234

4.12K_0603_1%

DMG4406LSS_SO8

1 2 3

PR235

4.12K_0603_1%

PQ205

4

Vin Dectector

Min. Typ Max. H-->L 17.23V L--> H 17.63V

ILIM and external DPM

4 4

3.97A

P2

8 7 6 5

+3VALW

+3VL

ACIN<33>

VIN

PR211

0.01_2512_1%

1 2

PC238

PR238 @10K_0402_1%

PR239 10K_0402_1%

PR240 10K_0402_1%

1 2

PR243

270K_0402_1%

1UH_NRS4018T1R0NDGJ_3.2A_30%

4 3

1 2

PC236

0.1U_0402_25V6

12

0.1U_0603_25V7K BQ24725_ACP

BQ24725_CMSRC

BQ24725_ACDRV

1 2

BQ24725_ACOK

1 2

BQ24725_ACDET1

12

1 2

PD230

BAS40CW_SOT323-3

1U_0603_25V6K

BQ24725_ACN

12

PC244

0.22U_0402_16V7K

PL201

12

PC235

0.1U_0402_25V6

PC239

1 2

PU200

21

PAD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

PR244

154K_0402_1%

PC251

100P_0402_50V8J

PR245

66.5K_0402_1% PC245

100P_0402_50V8J

CHG_B+

VIN

2

3

1

BQ24725_VCC1 12

PR228

10_1206_1%

BQ24725_LX

BQ24725_VCC

19

20

VCC

BQ24725ARGRR_VQFN20_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

BQ24725_IOUT

BQ24725_ACDET

12

PR246

1 2

12

PC211

10U_0805_25V6K

0.047U_0402_25V7K PC237

1 2

BQ24725_BST1

12

PR229

0_0603_5%

DH_CHG

BQ24725_BST

17

18

HIDRV

PHASE

100_0402_5%

12

BTST

12

PC212

PC213

@

10U_0805_25V6K

12

PD231 RB751V-40_SOD323-2

DH_CHG

PC205

1 2

BQ24725_REGN

1U_0603_25V6K

16

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

BATDRV

10

BQ24725_ILIM

12

PR242

100K_0402_1%

12

PC214

@

10U_0805_25V6K

DL_CHG

PR236

10_0603_1%

1 2

SRP

PR237

6.8_0603_1%

1 2

SRN

BQ24725_BATDRV

PR241

1 2

150K_0402_1%

PC243

0.01U_0402_25V7K

EC_SMB_CK1 <33,37>

EC_SMB_DA1 <33,37>

ADP_I <33,37>

12

PC215

0.1U_0402_25V6

AO4468L_SO8

CSOP1

CSON1

12

PC216

4

PQ202

4

PC242

0.1U_0603_16V7K

+3VALW

0.1U_0402_25V6

BQ24725_BATDRV

5

PQ201 AON7408L

4.7UH_ETQP3W4R7WFN_5.5A_20%

123

BQ24725_LX CHG

786

5

12

123

BQ24725_SNUB 12

PL202

1 2

PR206

@4.7_1206_5%

PC206

@680P_0603_50V8J

1 2

PR233

4.12K_0603_1%

CSOP1

12

PQ207

DMG4406LSS_SO8

8 7 6 5

4

BQ24725_BATDRV_1

PR222

0.02_1206_1%

1 2

PC240

0.1U_0402_25V6

1 2 3

12

4 3

CSON1

12

PC241

0.1U_0402_25V6

PC234

0.01U_0402_50V7K

12

PC222

PC221

@10U_0805_25V6K

PR232

@0_0402_5%

12

PC223

10U_0805_25V6K

12

PC224

2200P_0402_50V7K

BATT+

12

PC225

0.01U_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/12/30 2013/10/05

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

SAMSUNG

D

of

38 47Saturday, September 07, 2013

of

38 47Saturday, September 07, 2013

of

38 47Saturday, September 07, 2013

B

A

B

C

D

E

2VREF_8205

12

1 1

PC333

1U_0603_16V6K

PR330

13.7K_0402_1% 1 2

BST_3V

UG_3V

3/5V_B+_001

12

PR331

20K_0402_1%

1 2

PR337

121K_0402_1%

1 2

25

7 8

9 10 11 12

12

PC342 1U_0603_10V6K

2VREF_8205

PU330

P PAD

VO2 VREG3 BOOT2 UGATE2 PHASE2 LGATE2

FB_3V

ENTRIP2

6

ENTRIP2

EN

13

3/5V_B+

5

14

FB2

SKIPSEL

3

4

TONSEL

15

12

PC338

0.1U_0402_25V6

3/5V_B+

12

PC339

+3VALWP

2200P_0402_50V7K

12

PC340

4.7U_0805_25V6-K

SSM6N7002FU_US6

PL332

4.7UH_ETQP3W4R7WFN_5.5A_20%

1

+

PC331

220U_6.3V_M

2

PQ333A

6/18 EOL

12

5/17 emc

ENTRIP1 61

D

S

AON7408L

PR336

4.7_1206_5%

PC336

680P_0603_50V8J

2

N_3_5V_001

G

PQ331

12

SNUB_3V 12

123

5

G

5

4

PQ332 AON7406L

ENTRIP2 34

D

SSM6N7002FU_US6

S

10U_0805_6.3V6M

0.1U_0402_10V7K

3/5V_B+

PQ333B

PC341

PC335

1 2

LX_3V

+3VLP

12

PR334

499K_0402_1%

1 2

100K_0402_1%

PR333

1 2

2.2_0402_5%

LG_3V

PR338

B+

PC334

@680P_0603_50V7K

2 2

3 3

PL331

HCB2012KF-121T50_0805

1 2

12

Ipeak=5A Imax=3.5A F=305kHZ Total capacitor 330u ESR=15m ohm

PR350

30K_0402_1%

1 2

PR351

20K_0402_1%

1 2

FB_5V

PR357

105K_0402_1%

1 2

ENTRIP1

1

2

FB1

REF

ENTRIP1

VO1

PGOOD

BOOT1 UGATE1 PHASE1 LGATE1

NC18VREG5

VIN16GND

17

RT8205LZQW(2)_WQFN24_4X4

12

PC359

4.7U_0805_10V6K

PC360

0.1U_0603_25V7K

3/5V_B+

12

24 23 22 21 20 19

BST_5V

UG_5V LX_5V LG_5V

PR355

2.2_0402_5%

1 2

BST1_5VBST1_3V

VL

PC354

PC353

0.1U_0402_25V6 2200P_0402_50V7K

PC355

0.1U_0402_10V7K 1 2

POK <37,41>

FDMC7692S_MLP8-5

footprint change footprint change

12

PC358

10U_0805_25V6K

PQ352

5

4

PQ351 AON7408L

123

5

4

123

PL352

2.2UH_ETQP3W2R2WFN_8.5A_20% 1 2

12

PR356

SNUB_5V 12

PC356

4.7_1206_5%

680P_0603_50V8J

+

PC351

Ipeak=10.5A Imax=8.5A F=245kHZ Total capacitor 330u ESR=15m ohm

+5VALWP

1

220U_6.3V_M

2

6/18

PR339

100K_0402_5%

PR340

2.2K_0402_1%

EC_ON<33>

VS_ON<33>

4 4

A

1 2

PR341

0_0402_5%

1 2

EC_ON_001

12

2

PC343

4.7U_0805_25V6-K

1 2

13

PQ334 DRC5115E0L_SOD323-3

B

VL

+5VALWP

+3VALWP

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

PJP352

1 2

PAD-OPEN 4x4m PJP332

1 2

PAD-OPEN 4x4m

C

(5A,200mils ,Via NO.= 10)

+5VALW

(4A,120mils ,Via NO.= 8)

+3VALW

Compal Secret Data

2011/12/30 2013/10/05

Compal Secret Data

Deciphered Date

+3VLP

D

PJP333

2 1

PAD-OPEN 2x2m

Title

Size Document Number Rev

Custom

Date: Sheet

+3VL

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

E

39 47Saturday, September 07, 2013

B

of

5

4

3

2

1

D D

PL151

HCB1608KF-121T30_0603

B+

PC151

C C

+1.5VP

Ipeak=14A Imax=9.8A F=313kHZ Total capacitor

1 2

12

@680P_0603_50V7K

1UH_PCMB063T-1R0MS_12A_20%

+

PC152

1

2

12

PL152

220U_6.3V_M

1110u ESR=5m ohm

Mode Level +0.75VSP VTTREF_1.5V S5 L off off S3 L off on S0 H on on

Note: S3 - sleep ; S5 - power off

B B

PC153

0.1U_0402_25V6

12

1.5V_B+

12

PC154

2200P_0402_50V7K

12

SNUB_+1.5VP

12

PC157

10U_0805_25V6K

PR156

4.7_1206_5%

PC156

680P_0603_50V8J

PC158

@4.7U_0805_25V6-K

PQ151

AON7408L

SYSON<33,36>

4

1 2

PR159

0_0402_5%

1 2

5

123

5

PQ152

123

FDMC7692S_MLP8-5

footprint change

PC155

0.22U_0402_10V6K

+5VALW

BST_1.5V

DH_1.5V

PR157

5.1_0603_5%

1 2

PC160

1U_0603_10V6K

12

PC163

@0.1U_0402_10V7K

PR155

1 2

2.2_0402_5%

SW_1.5V

DL_1.5V

16.9K_0402_1%

1U_0603_10V6K

12

EN_1.5V

PR152

1 2

PC159

1 2

VDD_1.5V

BOOT_1.5V

CS_1.5V

+5VALW

887K_0402_1%

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR158

1 2

19

18

17

16

BOOT

PHASE

UGATE

RT8207MZQW_WQFN20_3X3

PGOOD

TON

9

10

TON_1.5V

VLDOIN

S5

S3

8

7

EN_0.75VSP

20

PU150

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

21 1

2

3

4

5

VTTREF_1.5V

2012/7/12

PR160 10K_0402_1%

1 2

PR154

10K_0402_1%

+1.5V

+1.5VP

12

TDC 0.7A Peak Current 1A

12

PC261

PC260

10U_0805_6.3V6K

+1.5VP

PC162 .1U_0402_16V7K

12

10U_0805_6.3V6K

12

+0.75VSP

PC262

@10U_0805_6.3V6K

PC161

0.033U_0402_16V7K

0.75Volt +/- 5%

PR162

PJP152

1 2

PAD-OPEN 4x4m

PJP153

+1.5VP

A A

+0.75VSP

1 2

PAD-OPEN 4x4m

PJP76

1 2

PAD-OPEN 3x3m

5

(12A,480mils ,Via NO.= 24)

+1.5V

(1A,40mils ,Via NO.= 3)

+0.75VS

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/12/30

SUSP#<33,36,41,42,45>

Compal Secret Data

0_0402_5%

Deciphered Date

12

PC164

@0.1U_0402_10V7K

Compal Electronics, Inc.

2013/10/05

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

Saturday, September 07, 2013

SAMSUNG

1

40 47

of

BCustom

5

4

3

2

1

1.1valwp Peak Current 4A current limited 6A

PC174

SNUB_+1.1VALWP

D D

1 2

680P_0402_50V7K

PL154

HCB1608KF-121T30_0603

+5VALW

C C

B B

1 2

12

PC250

12

@68P_0402_50V8J

+5VALW

12

PC248

@100P_0402_50V8J

SUSP#<33,36,40,42,45>

1.1V_B+

12

PC246

@220P_0402_25V8K

12

PC168

2200P_0402_50V7K

+1.1VALWP

PL181

HCB1608KF-121T30_0603

1 2

47K_0402_1%

PR183

EN_1.8VSP

PR184

@47K_0402_5%

PR163

12

PC173

PC171

22U_0805_6.3V6M

12

22U_0805_6.3V6M

FCH_PWR_EN<33,36>

1 2

VIN_1.8VSP

12

PC184 22U_0805_6.3V6M

12

PC187

POK<37,39>

PJP112

PAD-OPEN 4x4m

0.1U_0402_10V7K

@0_0402_5%

1 2

PR166

0_0402_5%

1 2

+1.1VALW

PU180

SY8032ABC_SOT23-6

4

IN

LX

5

PG

GND

FB6EN

EN_1.1V

12

@0.1U_0402_10V7K

(4A,240mils ,Via NO.= 8)

3 2 1

10

9 8

5

PC169

LX_1.8VSP

PVIN PVIN SVIN

EN

4

LX

PG

LX

FB

TP

SS

7

1

11

PR161

4.7_1206_5%

1 2

PR186

4.7_1206_5%

PC186

680P_0402_50V7K

1 2

+1.1VALWP_LX

PL182

PR181

20K_0402_1%

FB_1.8VSP

PR182

10K_0402_1%

2 3

6

PU151

LX

SY8036LDBC_DFN10_3x3

1UH_NRS4018T1R0NDGJ_3.2A_30%

12

SNUB_1.8VSP 12

PL153

0.47UH_PCMB063T-R47MS_18A_20% 1 2

PR164

1 2

+1.1VALWP_FB

12

PC188

68P_0402_50V8J

12

10K_0402_1%

PR165

1 2

11.5K_0402_1%

12

PC182

22U_0805_6.3V6M

+1.1VALWP

12

PC167

22P_0402_50V8J

12

PC183

22U_0805_6.3V6M

12

PC172

22U_0805_6.3V6M

+1.8VSP

12

PC165

PC166

22U_0805_6.3V6M

PC170

22U_0805_6.3V6M

12

PC247

PC249

22U_0805_6.3V6M

@68P_0402_50V8J

@220P_0402_25V8K

PJP182

A A

5

4

+1.8VSP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

PAD-OPEN 4x4m

2011/12/30

3

(3A,120mils ,Via NO.= 6)

+1.8VS

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

LA-8712P

41 47Saturday, September 07, 2013

1

B

of

5

D D

4

3

2

1

PJ101

1

JUMP_43X79

2

12

PC124 22U_0805_6.3V6M

PR98

C C

SUSP#<33,36,40,41,45>

0_0402_5%

1 2

PC94

@0.01U_0402_25V7K

+1.05VSP_VIN

+1.05VSP_EN

1 2

+3VS

PR97

12

@1K_0402_1%

+1.05VSP

B B

+5VALW+1.1VALW

12

PC93 1U_0603_6.3V6M

+1.05VSP_POK

6 5 9

8 7

PU100

VCNTL VIN VIN

EN POK

3

VOUT

4

VOUT

2

FB

GND

1

APL5916KAI-TRL_SO8

PJP102

1 2

JUMP_43X118

PR100

10K_0402_1%

+1.05VSP_FB

PR99

31.6K_0402_1%

+1.05VS

12

PC90

39P_0402_50V8J

PC95

+1.05VSP

22U_0805_6.3V6M

A A

Security Classification

2011/12/30

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/12/30

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

LA-8712P

42 47Saturday, September 07, 2013

1

B

of

5

D D

+3VS

PR526

@10K_0402_1%

1 2

VR_ON<33>

C C

+1.5V

0.1U_0402_10V7K PC785

12

APU_SVC<7>

APU_SVD<7>

APU_PWRGD<7,22>

@0.01U_0402_25V7K

1 2

PR531

@51_0402_1%

1 2

PR532 @51_0402_1%

1 2

PR533

1 2

0_0402_5%

PR535

1 2

0_0402_5%

1 2

PR536

0_0402_5%

PC530

PR528

100K_0402_1%

1 2

APU_SVC_001 APU_SVD_001 APU_CORE_PWORK

VGATE<33>

+5VS

PR541

6.49K_0402_1%

B B

1 2

PR545

1 2

10K_0402_1%

1 2

PR546

APU_VDDNB_RUN_FB_H<7>

APU_VDDNB_RUN_FB_L<7>

A A

PR542 33K_0402_1%

PC536

1 2

22K_0402_1%

+APU_VDDNB

PR540

10K_0402_1%

1 2

@0.01U_0402_25V7K

+3VS

VFIX/DRPSEL

PC537

1 2

@0.01U_0402_25V7K

1 2

OCSET_NB

PR549

100_0402_5%

1 2

PR550

0_0402_5%

1 2

PR554

0_0402_5%

1 2

PR556

1 2

100_0402_5%

PR543

2_0603_5%

PC535

1U_0603_10V6K

APU_VDDNB_RUN_FB_H_001

PC546

@68P_0402_50V8J

1 2

10K_0402_1%

7.15K_0402_1%

VGATE

VFIX/DRPSEL

OCSET_NB

+5VS

12

PR521

PR523

RBIAS

VCC

FB_NB

1 2

+5VS

1 2

PC521

1 2

PU500

1

RBIAS

2

EN

3

SVC

4

SVD

5

PWORK

6

PGOOD

7

VFIX/DRPSEL

8

OCSET_NB

9

VCC

10

FB_NB

PC543

470P_0402_50V8J

1 2

PR551

10K_0402_1%

1 2

PC547

@68P_0402_50V8J

@0.01U_0402_25V7K

OCSET

40

41

GND

OCSET

11

COMP_NB

FB

39

FB

TON_NB12COMP_NB

TON_NB

4

COMP

38

COMP

RT8870AZQW_WQFN40_5X5

ISP_NB

13

ISP_NB

TON

37

14

+APU_VDDNB

ISP0

36

TON

ISN_NB

15

RGND_NB

PC519

@68P_0402_50V8J

1 2

RGND

+APU_CORE

35

34

ISP0

ISN0

RGND

PGND_NB

16

LGATE_NB

PC544

68P_0402_50V8J

1 2

PR552

47K_0402_1%

1 2

PC500

68P_0402_50V8J

1 2

PR518

47K_0402_1%

1 2

PR524

10K_0402_1%

ISP1_N1_ST ISP1_N1_ST

31

32

33

ISP1

ISN1

BOOT1

UGATE_NB19LGATE_NB17RGND_NB

BOOT_NB

PHASE_NB

20

18

PHASE_NB

UGATE_NB

BOOT_NB

+5VS

1 2

PC522

0.1U_0402_25V6

1 2

UGATE1 PHASE1

PGND1

LGATE1

PVCC

LGATE0

PGND0 PHASE0 UGATE0

BOOT0

COMP_NB PC545

@68P_0402_50V8J

1 2

FB_NB

RGND_NB

470P_0402_50V8J

10K_0402_1%

1 2

30 29 28 27 26 25 24 23 22 21

PC517

1 2

PR519

LGATE0

PHASE0 UGATE0

BOOT0

TON_NB

BOOT_NB

+5VS

12

PVCC

PR515

2.2_0603_5%

UGATE_NB

PHASE_NB

LGATE_NB

ISP_NB

+APU_VDDNB

PR529 2_0603_5%

3

APU_VDD0_RUN_FB_H_001

@68P_0402_50V8J

PC520

@68P_0402_50V8J

1 2

2.2_0603_5%

BOOT0

UGATE0

PHASE0

12

PC532 1U_0603_10V6K

LGATE0

ISP0

+APU_CORE

PR547

12

130K_0402_1%

12

BOOT_NB1

PC518

PR505

12

BOOT0_1

PR544

1_0402_5%

TON_NB1

PC542

0.1U_0402_25V6 12

PC515

0.22U_0603_10V7K 1 2

PR548

0_0603_5%

100_0402_5%

0_0402_5%

1 2

0_0402_5%

100_0402_5%

PR527

110K_0402_1%

1 2

0.1U_0402_25V6

PC505

0.22U_0603_10V7K

12

UGATE_NB_1

0.1U_0402_25V6

PR500

PR517

PR520

PR522

TON_APU_1TON

12

PC549

12

PC529

1 2

4

+APU_CORE

12

PR525 1_0402_5%

12

PR530

0_0603_5%

AON7212L_DFN8-5

3 5

241

5

123

1 2

APU_VDD0_RUN_FB_H<7>

APU_VDD0_RUN_FB_L<7>

UGATE0_1

PQ503 AON7408L_DFN8-5

PQ504

PQ502

2012/07/11

FDMC7692S_DFN8-5

4

12

PR516

SNUB_NB

12

3 5

241

5

123

PC534

0.1U_0402_25V6

1 2

1

PC538

2

10U_0805_25V6K

4.7_1206_5%

PC516

680P_0603_50V7K

PQ501

AON7408L_DFN8-5

12

SNUB_CPU

12

CPU_B+

12

PC539

4.7U_0805_25V6-K

PR555

8.2K_0402_1%

1 2

2

1

12

PC523

PC524

2

10U_0805_25V6K

@4.7U_0805_25V6-K

PR506

0.47UH_PCMB063T-R47MS_18A_20%

4.7_1206_5%

PR537

2.43K_0402_1%

1 2

PC506

680P_0603_50V7K

12

PC541

PC540

0.1U_0402_25V6 2200P_0402_50V7K

1UH_PCMB063T-1R0MS_12A_20%

0.1U_0402_25V6

CPU_B+

12

PC525

PC526

0.1U_0402_25V6

PL502

1 2

PL503

1 2

PR553

2K_0402_1%

1 2

1

12

PC527

33U_25V_M

2

2200P_0402_50V7K

2.43K_0402_1% 1 2

0.1U_0402_25V6

12

PC548

+

PR534

1 2

PC533

PC528

100U_25V_M

1

PL501

HCB2012KF-121T50_0805

12

2012/7/12

1

+

PC531

2

33U_D_25VM_R60M

+APU_VDDNB

1

+

PC502 330U_D2_2V_Y

2

1

+

PC550

PC551

33U_25V_M

2

33U_D_25VM_R60M

+APU_CORE

+APU_CORE Imax=7.7A Ipeak=11A Iocp(minimum)=13.2A DCR=4.2mohm Rdson = 7mohm

+APU_VDDNB Imax=7A Ipeak=10A Iocp(minimum)=12A DCR=10mohm Rdson = 7mohm

B+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/12/30 2013/10/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

SCHEMATIC, MB A8868

Size Document Number Rev

C

Date: Sheet

4019K4

1

43 47Saturday, September 07, 2013

of

B

5

4

3

2

1

+APU_CORE

PC803

1

2

PC814

1

PC818 180P_0402_50V8J

2

@330U_SX_2VY

PC821

10U_0603_6.3V6M

1

PC804

2

PC811

1U_0402_6.3V6K

1

PC815

2

0.1U_0402_16V7K

1

+

2

1

2

10U_0603_6.3V6M

1

2

1

2

10U_0603_6.3V6M

1

D D

C C

B B

PC801

10U_0603_6.3V6M

+APU_CORE

PC808

1U_0402_6.3V6K

PC812

0.1U_0402_16V7K

+APU_CORE

PC819

330U_SX_2VY

+APU_CORE

1

2

1

+

2

PC802

2

1

PC809

2

1U_0402_6.3V6K

1

PC813

2

0.1U_0402_16V7K

PC817 180P_0402_50V8J

PC820

330U_SX_2VY

1

2

10U_0603_6.3V6M

1U_0402_6.3V6K

PC810

0.1U_0402_16V7K

1

2

1

+

2

1

PC805

2

0.1U_0402_16V7K

1

PC816

2

10U_0603_6.3V6M

1

PC806

2

10U_0603_6.3V6M

1

PC807

2

+VGA_CORE

12

PC901 D@

10U_0603_6.3V6M

1U_0402_6.3V6K

12

PC902 D@

1U_0402_6.3V6K

+APU_CORE_NB

+APU_VDDNB

1

PC822

+APU_VDDNB

PC829

1U_0402_6.3V6K

+APU_VDDNB

12

PC903 D@

1U_0402_6.3V6K

PC823

2

10U_0603_6.3V6M

1

PC830

2

1

PC837 180P_0402_50V8J

2

12

PC904 D@

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

PC831

1U_0402_6.3V6K

10U_0603_6.3V6M

1

PC824

PC825

2

10U_0603_6.3V6M

1

PC832

2

1U_0402_6.3V6K

1

PC838 180P_0402_50V8J

2

12

PC906

PC905

D@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

PC826

2

1U_0402_6.3V6K

1

PC833

2

12

PC907 D@

1U_0402_6.3V6K

1

2

0.1U_0402_16V7K

1

PC834

2

0.1U_0402_16V7K

12

PC908 D@

1U_0402_6.3V6K

1

PC827

2

0.1U_0402_16V7K

1

PC835

2

+APU_VDDNB

1

PC836

+

330U_SX_2VY~D

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

PC828

2

+VGA_CORE

2012/07/11

1

+

PC940

2

D@

330U_D2_2V_Y

1

+

PC942

PC941

2

D@

330U_D2_2V_Y

330U_D2_2V_YD@

1U_0402_6.3V6K

1

PC924

2

D@

+VGA_CORE

10U_0603_6.3V6M

4.7U_0603_6.3V6K

2

1

PC935

PC930

PC931

1 2

D@

.1U_0402_16V7K

2

PC932

1 2

D@

Title

Size Document Number Rev

A3

Date: Sheet

1 2

D@

.1U_0402_16V7K

Compal Electronics, Inc.

SCHEMATIC, MB A8868

1 2

PC933

1U_0402_6.3V6K

D@

LA-8712P

1

PC934

1U_0402_6.3V6K

D@

1

PC936

2

D@

B

44 47Saturday, September 07, 2013

of

12

PC909 D@

A A

5

4

PC910 D@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

PC917

PC918

2

D@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC911 D@

1

2

12

PC912 D@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

PC919

D@

3

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

PC920

2

D@

2011/12/30

12

PC913 D@

1

2

12

PC914 D@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

PC922

PC921

2

D@

Compal Secret Data

10U_0603_6.3V6M

12

PC916

PC915

D@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

PC923

2

D@

Deciphered Date

5

+VGA_CORE 12

PR707 D@

PC704

D@

PC701

1 2

D@

10P_0402_25V8J

PR703 D@

11.3K_0402_1%

PR709 D@

10.5K_0402_1%

TPS51518_VREF

+3VS

12

PR711

10K_0402_5%D@

10P_0402_25V8J

D D

PR701

D@

0_0402_5%

1 2

PR702

D@ 100K_0402_1%

C C

VGA_PWRGD<22>

12

1 2

PR704

1 2

D@

5.62K_0402_1%

1 2

TPS51518_V0

12

PR710 D@

93.1K_0402_1%

TPS51518_GSNS

TPS51518_V3

TPS51518_V1

10_0402_5%

12

TPS51518_VSNS

21

20

PU700

PAD

GSNS

V3

V2

V1

V0

PC702

0.1U_0402_10V7KD@

VSNS

TPS51518RUKR_QFN20_3X3D@

VREF

6

12

1

2

3

4

5

1 2

4700P_0402_25V7KD@

TPS51518_SLEW 19

SLEW

VID0

PGOOD

8

7

TPS51518_VID0 12

PR712 D@

PR708 D@

82K_0402_1%

PC721

1 2

TPS51518_TRIP 18

TRIP

VID19EN

0_0402_5%

TPS51518_VID1 12

PR713 D@

12

PR718

10K_0402_5%@

17

16

GND

V5IN

DRVL

DRVH

SW

BST

10

EN_VGA_CORE

D@

PC703

@

.1U_0402_16V7K

1 2

4

2012/07/11

PR715

D@

0_0402_5%

1 2

MODE

15

14

LG_VGA_CORETPS51518_V2

13

UG_VGA_CORE

12

SW_VGA_CORE

11

BST_VGA_CORE BST_VGA_CORE1

PR714

0_0402_5%

1 2

PR705

D@

2.2_0603_5%

SUSP# <33,36,40,41,42>

1U_0603_10V6K

PC722

D@

+5VALW

12

PR723

D@

0_0603_5%

1 2

PC705

D@

0.1U_0603_25V7K

UG_VGA_CORE1

3

4

PQ702

4

5

PQ701 TPCA8065-H_PPAK56-8-5

123

5

123

TPCA8059-H_PPAK56-8-5D@

VGA_CORE_B+

D@

5

4

12

PC717 D@

0.1U_0402_25V6

0.36UH_MMD-10CZ-R36M-M1_23A_20%

PQ704

12

PR706

D@

4.7_1206_5%

123

TPCA8059-H_PPAK56-8-5

@

SNUB_VGA_CORE

12

PC716

D@

680P_0603_50V8J

12

PC719

PC718 D@

D@

4.7U_0805_25V6-K

2200P_0402_50V7K

PL703

D@

3 4

12

PC720 D@

2 1

2

12

4.7U_0805_25V6-K

PL701

D@

HCB2012KF-121T50_0805

1 2

PL702

D@

HCB2012KF-121T50_0805

1 2

+VGA_CORE

1

+

2

+VGA_CORE TDC 15.6A

PC796

Peak Current 21.6A

D@

OCP current 26A

330U_D2_2V_Y

FSW=350kHz DCR 1.33mohm +/-5%

1

B+

B B

PR716

1 2

1K_0402_5%

@

VGA_PWRSEL0

VGA_PWRSEL1

Seymour XTX

VGA_PWRSEL1 VGA_PWRSEL0

11

10

0

1 1.05V

00

A A

5

Core Voltage Level

0.90V

1.00V

1.15V

1 2

@

<12>

PR717

1K_0402_5%

<12>

4

+1.5V +5VALW

1

PJP780

D@ JUMP_43X79

PD781

1 2

RB751V-40_SOD323-2

@

PR780

D@

2K_0402_1%

SUSP#<33,36,40,41,42>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/12/30 2013/10/05

3

1 2

Compal Secret Data

Deciphered Date

PC781 D@

+1.0VSP_EN

0.1U_0402_10V7K

4.7U_0805_6.3V6K

2

2 12

D@

1

2

+1.0VSP_VIN

PC784

12

PC780 D@

1U_0603_6.3V6M

PU780 APL5930KAI-TRG_SO8D@

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

Title

Size Document Number Rev

Date: Sheet

3

VOUT

4

VOUT

2

FB

GND

1

+1.0VSP

Compal Electronics, Inc.

SCHEMATIC, MB A8868

SCHEMATIC, MB A8868 4019K4

4019K4

PR781

D@

1.82K_0402_1%

+1.0VSP_FB

PR782

D@

7.32K_0402_1%

1 2

D@

12

PJP782

PAD-OPEN 3x3m

1

12

PC783 D@

+1.0VSP

12

PC782 D@

22U_0805_6.3V6M

0.01U_0402_25V7K

+1.0VS

of

45 47Saturday, September 07, 2013

B

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

1. 2012/04/24 P37-PWR-DCIN/BATT CONN/OTP Change PR12 from 6.49k to 24k Change source

2. 2012/04/24 P37-PWR-DCIN/BATT CONN/OTP Add PR13 1k Change source

3. 2012/04/24 P38-PWR_PWR-CHARGER Change PQ209 from SI1304BDL-T1-GE3_SC70-3 to SSM3K7002FU_SC70-3 Change source

4. 2012/04/24 P38-PWR_PWR-CHARGER Change PC244 from 0.1u to 0.22u Change source

5. 2012/04/24 P38-PWR_PWR-CHARGER Change PR241 from 100k to 150k Adjust current limit point

6. 2012/04/24 P41-PWR-3.3VALWP/5VALWP Change PR330 from 13k to 13.7k Adjust 3v voltage for HW request

7. 2012/04/24 P41-PWR-3.3VALWP/5VALWP Change PR351 from 19.1K to 20k Adjust 5v voltage for HW request

8. 2012/04/24 P41-PWR+1.1VALWP/+1.8VSP Change PU180 from SY8032ABC_SOT23-6 to SY8033BDBC_DFN10_3X3 Change IC solution for cost down

9. 2012/04/24 P43-PWR-CPU_CORE Add PC531 33u For acoustic noise

10. 2012/04/24 P43-PWR-CPU_CORE Add PC550 33u For acoustic noise

11. 2012/04/24 P43-PWR-CPU_CORE Add PC551 33u For acoustic noise

12. 2012/05/17 P38-PWR_PWR-CHARGER Un-mount PC123 10U and PC124 10U For acoustic noise

13. 2012/05/17 P39-PWR-3.3VALWP/5VALWP Add PR336 4.7 and PC336 680P EMI demand

14. 2012/05/17 P39-PWR-3.3VALWP/5VALWP Add PR356 4.7 and PC356 680P EMI demand

15. 2012/05/17 P40-PWR_1.5VP/0.75VSP Add PR156 4.7 and PC156 680P EMI demand

16. 2012/05/17 P40-PWR_1.5VP/0.75VSP PL152 Change partnumber SH00000PJ00 to SH00000QD00 lake of material

17. 2012/05/17 P43-PWR-CPU_CORE Change PC538 from 10U to 4.7U For acoustic noise

18. 2012/05/17 P43-PWR-CPU_CORE Add PC539 4.7U For acoustic noise

19. 2012/05/17 P43-PWR-CPU_CORE Add PC785 0.1U For acoustic noise

20. 2012/05/18 P44-PWR-PROCESSOR-DECOUPLING Un-mount 1U:PC901,PC902,PC903,PC904,PC905,PC906,PC907,PC908,PC909, EVT:uma load bom PC910,PC911, PC912,PC913,PC914,PC915,PC916,PC933,PC934 DVT:

21. 2012/05/18 P44-PWR-PROCESSOR-DECOUPLING Un-mount 10U:PC921,PC922,PC923,PC924,PC935

22. 2012/05/18 P44-PWR-PROCESSOR-DECOUPLING Un-mount 0.1U:PC930,PC931,PC932

23. 2012/05/18 P44-PWR-PROCESSOR-DECOUPLING Un-mount 330U:PC940,PC941

24. 2012/05/18 P44-PWR-PROCESSOR-DECOUPLING Un-mount 4.7U:PC917,PC918,PC919,PC920,PC936

設變數把多餘

時把

vga_core mlcc多Load

mlcc

拿掉

的部分

25. 2012/06/18 P41-PWR-3.3VALWP/5VALWP Change part number PC331 and PC351 from MATSUKI to S.Elcon forbid:MATSUKI

26. 2012/06/18 P41-PWR-3.3VALWP/5VALWP Change part number PQ333 from TOSHIBA to TOSHIBA EOL

27. 2012/06/18 P43-PWR-CPU_CORE Change part number PC531 and PC550 from Panasonic to KEMET shortage

28. 2012/07/16 P37-PWR-DCIN/BATT CONN/OTP Add PR2 1OK and PC11 Change to unmount For support 60w adapter

29. 2012/07/16 P38-PWR_PWR-CHARGER Change vendor PQ205 and PQ207 from DII to NIKO-SEM Custmoer forbid DII

30. 2012/07/16 P40-P40-PWR_1.5VP / 0.75VSP Change PR154 from 10.2k to 10k For HW request

31. 2012/07/16 P43-PWR-CPU_CORE Change vendor PC531 and PC550 from Kemet to Sayno For acoustic noise

32. 2012/07/16 P43-PWR-CPU_CORE Change PC538 and Pc539 from 4.7u to 10u For acoustic noise

33. 2012/07/16 P45-PWR-VGA_CORE/1.0VSP Change PR708 from 130K to 82k Adjust over current protection point

34. 2012/07/16 P45-PWR-VGA_CORE/1.0VSP Add PR718 and PR715 For vga transient test

35. 2012/07/16 P37-PWR-DCIN/BATT CONN/OTP Change PC6,PC157,PC211,PC212,PC222,PC223,PC358, P38-PWR_CHARGER PC524,PC539,PC538 from TAIYO(10U_25V_0805_H1.25) to Murata For acoustic noise P39-PWR-3.3VALWP/5VALWP P40-PWR_1.5VP / 0.75VSP P43-PWR-APU_CORE

36. 2012/08/07 P41-PWR-3.3VALWP/5VALWP Change PR351 from 20k to 19.1k Adjust 5v voltage for HW request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/12/14 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

46 47Saturday, September 07, 2013

of

B

5

4

3

2

1

HW PIR (Product Improve Record)

VBLE4/5 LA-8866P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2012/02/14 Item Date Page Solution Request

--------------------------------------------------------------------------------------------------------------------------

1. 2/1 P28 Change JUSBB.1 from +USB_VCCB to +USB_VCCC For USB power

2. 2/1 P18 Change RV141,RV138,RV138,RV137 to DIS@ For VGA int. sensor

3. 2/1 P12 Remove RV29, change RV28 to 0 ohm For VGA 27MHz

4. 2/1 P22 Change R339 to UMA@ , Change R340 to DIS@ For board ID

5. 2/1 P29 Change +1.8VGS to +1.8VS For Green CLK

D D

6. 2/2 P30 Change CL36 from SE120102K80 to SE120102K90 For shortage

7. 2/6 P32 Update JCRIO pin definition Change int. MIC to MB

8. 2/6 P31 Add RA36,RA37 and delete CA64 Move sense resistors to MB

9. 2/6 P35 Change JTP from SP010015H00 to SP01001BF10 For ME request

10. 2/6 P31 Add JMIC connector SP02000RO00 For customer request

11. 2/6 P29 Change JWLAN from SP07000JP00 to SP07000TB00 For ME request

12. 2/8 P30 Add PJ31 For saving power consumption

13. 2/8 P29 Add PJ33, WLAN power circuit and reset pin For customer request

14. 2/8 P29 Change CM7,CM8,CM9 to @ For cost down

15. 2/8 P29 Add WLAN_PWR# and WLAN_RST# For customer request

16. 2/8 P30 Add test point TL1 for pin37 For vendor request

17. 2/8 P27 Delete SW4 For layout request

18. 2/8 P11 Change UV1 from SA000047G70 to SA000047G60 For PJE request

19. 2/8 P18 Change RV118, RV119 to DIS@ For HDMI issue

20. 2/8 P35 Add screw H17, H20 and H21 For ME request

21. 2/9 P21 Reserve ESD D94~D96 for HDMI For ESD request

22. 2/9 P9 Change C218 from 390U to 330U (SF000002080) For cost down

23. 2/9 P20 Remove D3~D5 and add D97 and D98 For ESD request

24. 2/9 P30 Reserve ESD D99 and D100 for LAN For ESD request

25. 2/9 P27 Add resistors R87,R89,R164,R158 Improve SATA signal quality

26. 2/10 P27 Add JODDC For HW experiment on DVT

27. 2/10 P8 Add C95,C102,C105 For EMI request

28. 2/10 P34 Change C457,R393 to mount For EMI request

29. 2/10 P29 Change CCL10 to mount For EMI request

30. 2/10 P24 Change ODD_DA#_FCH connect to U2.P6 For Module Design

31. 2/10 P24 Change ODD_PLUGIN# connect to P2.W7 For Module Design

32. 2/10 P21 Change Q6 from SB00000M700 to SB570020020 For BOM reduce

C C

--------------------------------------------------------------------------------------------------------------------------

33. 4/23 P19 Change R117 +3VS to +3VALW For LVDS power down sequence

34. 4/23 P19 Change R110,R133,C265,C261 For LVDS power down sequence

35. 4/23 P19 Change R388 +3VS to +5VS,R388 +3VS_LVDS_CAM to +5VS_LVDS_CAM

36. 4/23 P21 Add C202 and C216 For EMI request

37. 4/23 P22 Change R241 from GCLK@ to @ For USB30 wake issue

38. 4/23 P22 Change C294,C293,Y1,R242 to mount For USB30 wake issue

39. 4/23 P22 Change R271 and add R277,R268,C305,+RTCBATT_D

40. 4/23 P29 Change R156,R155,C907,C908,Q210 to @

41. 4/23 P29 Add RM20 and change UM5,RM21 to @

42. 4/23 P29 Change UCL1.2 to +3VALW, UCL1.14 to +RTCVCC_D and add RCL10 For USB30 wake issue ,RCL11

43. 4/23 P30 Mount QL53 and RL24 and change RL28,RL26 to @ For LAN disable

44. 4/23 P31 Add CA6,CA7 For EMI request

45. 4/23 P31 Add CA64,CA67,CA68,CA77 For EMI request

--------------------------------------------------------------------------------------------------------------------------

46. 5/16 P27 Delete R90~R93,R166,R168~R170,C379~C382,R87,R89,R96,R97,R158 For ODD 14" and 15" common PCBA issue R164,R171,R172

47. 5/16 P27 Add U4 For ODD 14" and 15" common PCBA issue

48. 5/16 P23 Reserve R174 For ODD 14" and 15" common PCBA issue

49. 5/16 P27 Change C364 to 220p For ESD request

REVISION CHANGE: 0.2 TO 0.3 GERBER-OUT DATE: 2012/06/18 Item Date Page Solution Request

--------------------------------------------------------------------------------------------------------------------------

B B

1. 6/11 P27 Add JODDC circuit and remove U4 circuit SATA ODD

2. 6/11 P33 Reserve RB8,RB9 Due to TP module for win8 feature

3. 6/15 P7 Change R846,R847,R848,R849,R851,R852 to Reserve For Debug only

REVISION CHANGE: 0.3 TO 1.0 GERBER-OUT DATE: 2012/07/18 Item Date Page Solution Request

--------------------------------------------------------------------------------------------------------------------------

1. 7/12 P19 Add D85 For avoid LVDS_CLK damage issue

2. 7/17 P6 Add C78 For EMI request

3. 7/18 P27 Un-stuff SW5 For debug only

4. 7/25 P30 Stuff D92 For ESD request

5. 8/27 P32 Stuff CT7 and RT4 on TPM SKU For EMI request

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/05/18 2013/10/05

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, MB A8868

4019K4

47 47Saturday, September 07, 2013

1

B

of

COMPAL LA-8868P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual