COMPAL LA-8862P Schematics

A

1 1

B

C

D

E

QCLA4,5

2 2

Eureka 14" & 15"

LA-8862P SchematicREV 0.2

3 3

Intel Processor(Ivy Bridge / Sandy Bridge) PCH(Panther Point)

2011-11-24 Rev 0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/01/31 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

B

Cover Page

QCLA4,5

0.2

1 48Thursday, February 16, 2012

E

0.2

A

B

C

D

E

Intel CPU Ivy Bridge

1 1

eDP Conn.

page 13

Sandy Bridge

rPGA-989

37.5mm*37.5mm

page 5,6,7,8,9,10

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333/1600 MT/s

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

CRT

page 14

LVDS Conn.

page 13

2 2

EC SMBus

HDMI-CEC

page 15

HDMI Conn.

page 15

FDI X8

2.7GT/s

Intel PCH Panther Point

RJ45

page 40

3 3

RTL8105E-VD 10/100M RTL8111F-VB 1G

PCIe port 1

Cardreader RTS5229

PCIe port4

SPI ROM (4MB + 2MB)

RTC CKT.

page 16

DC/DC Interface CKT.

page 38

4 4

Power Circuit DC/DC

page 39,40,41,42,43, 44,45,46,47,48,49

Power On/Off CKT.

page 37

A

Finger Printer/B

page 26

Power/B

page 37

page 16

Touch Pad

page 37

B

page 31

page 29

PCIe Gen1 1x

1.5V 5GT/s

PCIe Gen1 1x

1.5V 5GT/s

Debug Port

page 36

Int.KBD

page 36

FCBGA-989

25mm*25mm

page 16,17,18,19,20,21,22,23,24

LPC BUS

3.3V 33 MHz

ENE KB930/KB9012

EC ROM (128KB)

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

page 36

Issued Date

CIR

C

DMI X4

5GT/s

USB30 4x

5V 5GT/s

USB20 4x

5V 480MHz

USB20 3x

5V 480MHz

USB20 3x

5V 480MHz

PCIe Gen1 1x

1.5V 5GT/s

SATA Gen3 port 1

5V 6GHz(600MB/s)

SATA Gen3 port 0

SATA port 2

5V 3GHz(300MB/s)

PCIe Gen2 2x

page 36

1.5V 5GT/s

HDA Codec

ALC280

page 33

SPK Conn

page 34

page 35

HD Audio

3.3V 24MHz

G-Sensor

EC SMBus

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

USB Right

USB20 port 2,3 USB30 port 3,4 USB30 port 1,2

page 25

USB Left

USB20 port 0,1

page 30

FingerPrinter Int. Camera

USB port 8

page 29

PCIeMini Card WiMax

USB port 9

page 27 page 27

PCIeMini Card WLAN

PCIe port 2

page 27

5V 6GHz(600MB/s)

SATA ODD

SATA port 2

page 23

USB3.0 Right-side UPD720202

PCIe port5

page 31

USB port 11

page 13

PCIeMini Card

3G/TV#1 TV#2

mSATA

SATA HDD

JPIO (HP & MIC)

page 34

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

USB port 12 USB port 10

SATA port 1

page 27

SATA port 0

page 23

USB3.0 Left-side UPD720202

PCIe port6

page 32

Compal Electronics, Inc.

Block Diagram

QCLA4,5

E

B-CAS

page 26

2 48Thursday, February 16, 2012

SIM

page 27

0.2

5

B+

Ipeak=10.63A, Imax=7.44A, Iocp min=12.3A

SY8033BDBC

D D

N-CHANNEL

SI4800

TPS51125

SY8036

C C

VCCPPWRGD

SY8037

LNB EN

APW7137

Ipeak=5A, Imax=3.5A, Iocp min=6.2A

B B

VR_ON

N-CHANNEL

SI4800

NCP6132A

SUSP#

TPS51212

Ipeak=14A, Imax=9.8A, Iocp min=16.92A

SUSP#

SUSP

4

SYSON

Ipeak=6A, Imax=4.2A, Iocp min=8A

Ipeak=6A, Imax=4.A, Iocp min=8

Imax=0.3A, Iocp min=0.8A

BCPWON

P-CHANNEL

AO-3413

KB_LED

P-CHANNEL

AO-3413

+5VS

LDO

G9191

ODD_EN#

P-CHANNEL

AO-3413

N-CHANNEL

FDS6676AS

N-CHANNEL

FDS6676AS

0.75VR_EN#

G2992

WOL_EN

P-CHANNEL

AO-3413

P-CHANNEL

AO-3415

FELICA_PWR

P-CHANNEL

AO-3413

SUSP

UMA_ENVDD

3

DESIGN CURRENT 0.1A

DESIGN CURRENT 11A

DESIGN CURRENT 1.8A

DESIGN CURRENT 6.5A

DESIGN CURRENT 0.1A

DESIGN CURRENT 0.4A

DESIGN CURRENT 0.3A

DESIGN CURRENT 1.6A

DESIGN CURRENT 13.5A

DESIGN CURRENT 5A

DESIGN CURRENT 1.5A

DESIGN CURRENT 1A

DESIGN CURRENT 6A

DESIGN CURRENT 0.3A

DESIGN CURRENT 7.5A

DESIGN CURRENT 0.1A

DESIGN CURRENT 6A

DESIGN CURRENT 2A

DESIGN CURRENT 0.1A

DESIGN CURRENT 94A

DESIGN CURRENT 50A

DESIGN CURRENT 15A

+3VL +5VL

+5VALW

+1.8VS

+5VS

+5VS_L_BCAS

+5VS_LED

+3VS_HDP

+5VS_ODD

+1.5V

+1.5V_CPU

+1.5VS

+0.75VS

+VCCSA

+16VS

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+FLICA_VCC

+CPU_CORE

+GFX_CORE

+1.05VS_VCCP

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Power Tree

QFKAA

0.2

3 48Thursday, February 16, 2012

1

A

B

C

D

E

Voltage Rails

1 1

State

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

( O MEANS ON X MEANS OFF )

+RTCVCC

power plane

+5VL

B+

O

X

+3VL

+5VALW

+3VALW

+VSB

O

X

O

X

+5VS

+1.5V

+3VS

+1.8VS

+1.5VS

+1.05VS

+0.75VS

+CPU_CORE

+VGA_CORE

+GFX_CORE

+VTT

+VRAM_1.5VS

+3VS_DGPU

+1.05VS_DGPU

O

X X

X

X X

BTO Option Table

Function

description

explain

BTO

Function

OO

X

description

explain

BTO

HDMI

HDMI@

SPI ROM

WIN8

WIN8@

Digital MIC

Green CLK

GCLK@

Camera & Mic

CAM@

NOGCLK

NOGCLK@

Analog MIC

AMIC@

USB 3.0

Internal

IUSB30@

TPM

SLB 9635

TPM9635@ TPM9655@

Sleep & Charge

SLB 9655

10/100M Giga

8105ELDO@ 8111FVB@

MINI PCI-E SLOT

Half Card

WIMAX

WIMAX@

LAN

X

PCH SM Bus Address

HEX

Device

Power

DDR SO-DIMM 0

+3VS

DDR SO-DIMM 1

+3VS

3 3

Clock Generator

+3VS

New Card

+3VS

WLAN/WIMAX

+3VS

+3VS Clock Generator

3G+3VS

EC SM Bus1 Address

Device Address Address

+3VL

4 4

+3VL Cap. Sensor Virtual I2C

HEX HEX

16 H

HEXDevice AddressPower

A

A0 H

D2 H

0001 0110 bSmart Battery

Address

1010 0000 b

1010 0100 bA4 H

1101 0010 b

EC SM Bus2 Address

Device

PowerPower

+3VS

NVIDIA GPUHDMI-CEC 34 H 0011 0100 b 1001 1010 b

+3VS

G-Sensor

+3VS

+3VS Light Sensor

B

96 H

9A H

40 H

52 H

STATE

Full ON

S1(Power On Suspend)

1001 0110 bPCH

0100 0000 b

0101 0010 b

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

2010/09/03 2012/12/31

C

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

Compal Secret Data

Deciphered Date

HIGH HIGHHIGH

LOW

LOW LOW

HIGH HIGHHIGH

HIGH

LOW LOWLOW

HIGH

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

QFKAA

4 48Thursday, February 16, 2012

E

0.2

5

@

12

PM_DRAM_PWRGD_ R

CC631000P_0402_ 50V7K@CC631000P_0402_ 50V7K

@

12

H_PWRGOOD_R

CC621000P_0402_ 50V7K@CC621000P_0402_ 50V7K

D D

+1.05VS_VCCP

12

RC44 62_0402_5%RC44 62_0402_5%

RC45 10K_0402_5%RC45 10K_0402 _5%

12

C C

+3VALW_PCH

B B

12

RC11 200_0402_5%RC11 200_0402_5%

+3VS

PM_PWROK18,31

DRAMPWROK18

H_PROCHOT#

H_PWRGOOD

@

12

CC701000P_0402_ 50V7K@CC701000P_0402_ 50V7K

@

12

CC711000P_0402_ 50V7K@CC711000P_0402_ 50V7K

@

CC661000P_0402_ 50V7K@CC661000P_0402_ 50V7K

12

H_PECI

H_PM_SYNC

BUF_CPU_RST#

Please place near JCPU

+3VALW_PCH

DRAMPWROK

0.1U_0402_10V7K

12

RC181 0_04 02_5%@RC181 0_04 02_5%@

1

B

2

A

1 2

SUSP9,34

0.1U_0402_10V7K

UC1

5

74AHC1G09GW _TSSOP5

P

O

G

3

10K_0402_5%

RC13

1 2

RC12 0_0402_5%@RC12 0_0402_5%@

12

CC33

4

PM_SYS_PWRGD_BUF

SUSP

12

RC25

RC25 39_0402_5%

39_0402_5%

@

13

D

2

G

S

H_SNB_IVB#11,21

H_PROCHOT#31

H_THERMTRIP#21

H_PM_SYNC18

H_PWRGOOD21

+1.5V_CPU

12

QC2

QC2 2N7002_SOT23

2N7002_SOT23

@

H_PECI31

RC14

RC14 200_0402_5%

200_0402_5%

4

T1 PADT1 PAD

T2 PADT2 PAD

1 2

RC58 130_0402_5%RC58 130_0402_5%

RC159

RC187

BUF_CPU_RST#

H_SNB_IVB#

TP_SKTOCC#

H_CATERR#

H_PECI

H_PROCHOT#_R

56_0402_5%

H_THERMTRIP#

H_PM_SYNC

H_PWRGOOD_R

0_0402_5%

PM_DRAM_PWRGD_ RPM_SYS_PWRGD_BUF

JCPUB

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

@

3

100 MHz

A28

CLK_CPU_DMI

BCLK

A27

CLK_CPU_DMI#

BCLK#

120 MHz

A16

CLK_CPU_EDP

A15

CLK_CPU_EDP#

R8

H_DRAMRST#

AK1

SM_RCOMP_0

A5

SM_RCOMP_1

A4

SM_RCOMP_2

AP29

PRDY#

AP27

PREQ#

AR26

XDP_TCK_R

TCK

AR27

XDP_TMS_R

TMS

AP30

XDP_TRST#_R

TRST#

AR28

XDP_TDI_R

TDI

AP26

XDP_TDO_R

TDO

Layout request for test point

AL35

DBR#

AT28

BPM#[0]

AR29

BPM#[1]

AR30

BPM#[2]

AT30

BPM#[3]

AP32

BPM#[4]

AR31

BPM#[5]

AT31

BPM#[6]

AR32

BPM#[7]

CLOCKS

DDR3

JTAG & BPM

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

MISC

MISCTHERMALPWR MANAGEMENT

2

CLK_CPU_DMI 17 CLK_CPU_DMI# 17

H_DRAMRST# 7

12

RC56 140_0402_1%R C56 140_0402_1% RC59 25.5_0402_1%R C59 25.5_0402_1%

12 12

RC61 200_0402_1%R C61 200_0402_1%

T4PAD T4PAD T5PAD T5PAD

12

RC55 51_0402_5%RC55 51_0402_5%

T6PAD T6PAD T7PAD T7PAD

Stuff RC157 and RC158 if do not support eDP

CLK_CPU_EDP#

RC157 1K_04 02_5%RC157 1K_04 02_5%

CLK_CPU_EDP

RC158 1K_04 02_5%RC158 1K_04 02_5%

DDR3 Compensation Signals Layout Note:Place these resistors near Processor

H_DRAMRST#

CC34 180P_04 02_50V8J

by ESD requestion and place near CPU

1 2

@

1 2

1

+1.05VS_VCCP

FAN Control Circuit

Buffered Reset to CPU

+3VS

0.1U_0402_10V7K

1

CC36

PLT_RST# 20,26,27,28,31,32

UC2

1

PLT_RST#

A A

OE#

2

IN

3

GND

74AHC1G125GW _SOT353-5

VCC

OUT

+1.05VS_VCCP

2

12

RC38

RC38 75_0402_5%

5

4

BUFO_CPU_RST# BUF_CPU_R ST#

75_0402_5%

RC35

43_0402_1%

1 2

12

RC40

RC40 0_0402_5%

0_0402_5%

@

EN_DFAN131

+FAN2

10mil

+5VS

12

10U_0805_6.3V6M

1A

U1

1 2 3 4

APL5607KI-TRG_SO8

C17

EN VIN VOUT VSET

10U_0805_6.3V6M

8

GND

7

GND

6

GND

5

GND

C13

+FAN2

@

2

12

C15

1000P_0402_50V7K

1

1 2 3

4 5

ACES_85204-0300N

R24 1 0K_0402_5%R24 10K_0402_5%

FAN_SPEED1

1

C14

0.01U_0402_25V7K

@

2

JFAN

@JFAN

@

1 2 3

GND GND

12

+3VS

FAN_SPEED1 31

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Sandy Bridge_JTAG/XDP/FAN

Size Document Number Rev

Custom

QFKAA

Date: Sheet of

2

Date: Sheet of

1

0.2

5 48Thursday, February 16, 2012

5

D D

C C

eDP_COMP signals should be shorted near balls and routed with typical impedance <25m ohm

B B

+1.05VS_VCCP

DMI_PTX_CRX_N018 DMI_PTX_CRX_N118 DMI_PTX_CRX_N218 DMI_PTX_CRX_N318

DMI_PTX_CRX_P018 DMI_PTX_CRX_P118 DMI_PTX_CRX_P218 DMI_PTX_CRX_P318

DMI_CTX_PRX_N018 DMI_CTX_PRX_N118 DMI_CTX_PRX_N218 DMI_CTX_PRX_N318

DMI_CTX_PRX_P018 DMI_CTX_PRX_P118 DMI_CTX_PRX_P218 DMI_CTX_PRX_P318

FDI_CTX_PRX_N018 FDI_CTX_PRX_N118 FDI_CTX_PRX_N218 FDI_CTX_PRX_N318 FDI_CTX_PRX_N418 FDI_CTX_PRX_N518 FDI_CTX_PRX_N618 FDI_CTX_PRX_N718

FDI_CTX_PRX_P018 FDI_CTX_PRX_P118 FDI_CTX_PRX_P218 FDI_CTX_PRX_P318 FDI_CTX_PRX_P418 FDI_CTX_PRX_P518 FDI_CTX_PRX_P618 FDI_CTX_PRX_P718

FDI_FSYNC018 FDI_FSYNC118

FDI_INT18

FDI_LSYNC018 FDI_LSYNC118

1 2

RC2 24.9_0402_1%RC2 24.9_0402_1%

1 2

RC3 10K_0402_5%RC3 10K_0402_5%

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

Reserve RC3 for HW Review demand

EDP_COMP

H_EDP_HPD#

4

JCPUA

B27

DMI_RX#[0 ]

B25

DMI_RX#[1 ]

A25

DMI_RX#[2 ]

B24

DMI_RX#[3 ]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0 ]

H19

FDI0_TX#[1 ]

E19

FDI0_TX#[2 ]

F18

FDI0_TX#[3 ]

B21

FDI1_TX#[0 ]

C20

FDI1_TX#[1 ]

D18

FDI1_TX#[2 ]

E17

FDI1_TX#[3 ]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

@

3

PEG_ICOMPI and RCOMPO signals should be

+1.05VS_VCCP

shorted and routed with - max length = 500 m ils - typical

12

impedance = 43 m ohm (4 mils)

RC1

24.9_0402_1%

J22

PEG_ICOM PI

PEG_ICOM PO

PEG_RCOM PO

PEG_RX# [0] PEG_RX# [1] PEG_RX# [2] PEG_RX# [3] PEG_RX# [4] PEG_RX# [5] PEG_RX# [6] PEG_RX# [7]

DMI

PEG_RX# [8]

PEG_RX# [9] PEG_RX# [10] PEG_RX# [11] PEG_RX# [12] PEG_RX# [13] PEG_RX# [14] PEG_RX# [15]

PEG_RX[0 ] PEG_RX[1 ] PEG_RX[2 ] PEG_RX[3 ] PEG_RX[4 ] PEG_RX[5 ] PEG_RX[6 ] PEG_RX[7 ] PEG_RX[8 ]

PEG_RX[9 ] PEG_RX[1 0] PEG_RX[1 1] PEG_RX[1 2] PEG_RX[1 3] PEG_RX[1 4] PEG_RX[1 5]

PEG_TX#[0 ] PEG_TX#[1 ] PEG_TX#[2 ] PEG_TX#[3 ] PEG_TX#[4 ] PEG_TX#[5 ]

Intel(R) FDI

PEG_TX#[6 ] PEG_TX#[7 ] PEG_TX#[8 ] PEG_TX#[9 ]

PEG_TX#[1 0] PEG_TX#[1 1] PEG_TX#[1 2]

PCI EXPRESS* - GRAPHICS

PEG_TX#[1 3] PEG_TX#[1 4] PEG_TX#[1 5]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]

eDP

PEG_TX[10 ] PEG_TX[11 ] PEG_TX[12 ] PEG_TX[13 ] PEG_TX[14 ] PEG_TX[15 ]

PEG_COMP

J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_ICOMPO signals should be routed w ith max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Custom

QFKAA

Sandy Bridge_DMI/PEG/FDI

6 48Thursday, February 16, 2012

1

0.2

5

JCPUC

DDR_A_D[0..63]11

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3

D D

C C

B B

DDR_A_BS011 DDR_A_BS111 DDR_A_BS211

DDR_A_CAS#1 1 DDR_A_RAS#1 1

DDR_A_WE#11

DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_RAS# DDR_A_WE#

JCPUC

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]

AP11

SA_DQ[48]

AN11

SA_DQ[49]

AL12

SA_DQ[50]

AM12

SA_DQ[51]

AM11

SA_DQ[52]

AL11

SA_DQ[53]

AP12

SA_DQ[54]

AN12

SA_DQ[55]

AJ14

SA_DQ[56]

AH14

SA_DQ[57]

AL15

SA_DQ[58]

AK15

SA_DQ[59]

AL14

SA_DQ[60]

AK14

SA_DQ[61]

AJ15

SA_DQ[62]

AH15

SA_DQ[63]

AE10

SA_BS[0]

AF10

SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

4

DDR_B_D[0..63]12

AB6

DDRA_CLK0

SA_CLK[0]

AA6

SA_CLK#[0]

SA_CLK#[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

RSVD_TP[7] RSVD_TP[8]

RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

DDR SYSTEM MEMORY A

DDRA_CLK0#

V9

DDRA_CKE0

SA_CKE[0]

AA5

DDRA_CLK1 DDRB_CLK1

SA_CLK[1]

AB5

DDRA_CLK1# DDRB_CLK1#

V10

DDRA_CKE1 DDRB_CKE1

SA_CKE[1]

AB4 AA4 W9

AB3 AA3 W10

AK3

DDRA_SCS0# DDRB_SCS0#

SA_CS#[0]

AL3

DDRA_SCS1#

SA_CS#[1]

AG1 AH1

AH3

DDRA_ODT0 DDRB_ODT0

SA_ODT[0]

AG3

DDRA_ODT1

SA_ODT[1]

AG2 AH2

C4

DDR_A_DQS#0

G6

DDR_A_DQS#1

J3

DDR_A_DQS#2

M6

DDR_A_DQS#3

AL6

DDR_A_DQS#4

AM8

DDR_A_DQS#5

AR12

DDR_A_DQS#6

AM15

DDR_A_DQS#7

D4

DDR_A_DQS0

SA_DQS[0]

F6

DDR_A_DQS1

SA_DQS[1]

K3

DDR_A_DQS2

SA_DQS[2]

N6

DDR_A_DQS3

SA_DQS[3]

AL5

DDR_A_DQS4

SA_DQS[4]

AM9

DDR_A_DQS5

SA_DQS[5]

AR11

DDR_A_DQS6

SA_DQS[6]

AM14

DDR_A_DQS7

SA_DQS[7]

AD10

DDR_A_MA0

SA_MA[0]

W1

DDR_A_MA1

SA_MA[1]

W2

DDR_A_MA2

SA_MA[2]

W7

DDR_A_MA3

SA_MA[3]

V3

DDR_A_MA4

SA_MA[4]

V2

DDR_A_MA5

SA_MA[5]

W3

DDR_A_MA6

SA_MA[6]

W6

DDR_A_MA7

SA_MA[7]

V1

DDR_A_MA8

SA_MA[8]

W5

DDR_A_MA9

SA_MA[9]

AD8

DDR_A_MA10

SA_MA[10]

V4

DDR_A_MA11

SA_MA[11]

W4

DDR_A_MA12

SA_MA[12]

AF8

DDR_A_MA13

SA_MA[13]

V5

DDR_A_MA14

SA_MA[14]

V7

DDR_A_MA15

SA_MA[15]

DDRA_CLK0 11 DDRB_CLK0 12 DDRA_CLK0# 11 DDRA_CKE0 11 DDRB_CKE0 1 2

DDRA_CLK1 11 DDRA_CLK1# 11 DDRB_CLK1# 12 DDRA_CKE1 11

DDRA_SCS0# 11 DDRA_SCS1# 11 DDRB_SCS1# 12

DDRA_ODT0 11 DDRB_ODT0 12 DDRA_ODT1 11 DDRB_ODT1 12

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

3

JCPUD

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_BS012 DDR_B_BS112 DDR_B_BS212

DDR_B_CAS#1 2 DDR_B_RAS#1 2

DDR_B_WE#12

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS# DDR_B_WE#

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48]

AJ11

SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]

AH11

SB_DQ[52]

AR8

SB_DQ[53]

AJ12

SB_DQ[54]

AH12

SB_DQ[55]

AT11

SB_DQ[56]

AN14

SB_DQ[57]

AR14

SB_DQ[58]

AT14

SB_DQ[59]

AT12

SB_DQ[60]

AN15

SB_DQ[61]

AR15

SB_DQ[62]

AT15

SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

AA10

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

2

AE2

DDRB_CLK0

SB_CLK[0]

AD2

SB_CKE[0]

SB_CLK[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDRB_CLK0# DDRB_CKE0

DDRB_SCS1#

DDRB_ODT1

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

SB_CLK#[0]

SB_CLK#[1]

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

DDRB_CLK0# 12

DDRB_CLK1 12

DDRB_CKE1 12

DDRB_SCS0# 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

1

TYCO_2013620-2_IVY BRIDGE

@

RC75

0_0402_5%

1 2

@

QC3

D

S

D

S

13

1 2

BSS138_NL_SOT23-3

G

2

1

CC37

0.047U_0402_25V6K

2

DDR3_DRAMRST#_RH_DRAMRST#

H_DRAMRST#5

A A

DRAMRST_CNTRL_PCH11,17

DRAMRST_CNTRL_EC31

RC73 0_0402_5%RC73 0 _0402_5%

RC74 0_0402_5%@RC74 0_0402 _5%@

5

1 2

4.99K_0402_1%

DRAMRST_CNTRL

RC78

1K_0402_5%

+1.5V

12

RC76

RC77

RC77 1K_0402_5%

1K_0402_5%

1 2

4

SM_DRAMRST# 11 ,12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

TYCO_2013620-2_IVY BRIDGE

@

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Sandy Bridge_DDR3

QFKAA

1

7 48Thursday, February 16, 2012

0.2

5

4

3

2

1

+CPU_CORE

D D

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26

C C

AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26

V35 V34

B B

V33 V32 V31 V30 V29 V28 V27

V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32

A A

P31 P30 P29 P28 P27 P26

POWER

JCPUF

97A

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

TYCO_2013620-2_IVY BRIDGE

@

CORE SUPPLY

5

PEG AND DDR

VSS_SENSE_VCCIO

SENSE LINES SVID

8.5A

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

+1.05VS_VCCP

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29

H_CPU_SVIDALRT#

AJ30

H_CPU_SVIDCLK

AJ28

H_CPU_SVIDDAT

AJ35

VCCSENSE_R

AJ34

VSSSENSE_R

B10

VCCIO_SENSE

A10

Close to CPU

0.1U_0402_10V7K

1 2

CC50

@

RC94 0_0402 _5%RC94 0_0402 _5% RC95 0_0402 _5%RC95 0_0402 _5%

12

RC96

RC96 10_0402_1%

10_0402_1%

12

RC91

RC91 130_0402_5%

130_0402_5%

1 2

RC90 43_040 2_1%RC90 43_0402_1%

1 2 1 2

RC88 0_0402 _5%RC88 0_0402 _5% RC92 0_0402 _5%RC92 0_0402 _5%

1 2 1 2

VCCIO_SENSE 39

12

RC98

RC98 10_0402_1%

10_0402_1%

+1.05VS_VCCP

4

+1.05VS_VCCP+1.05VS_VCCP

0.1U_0402_10V7K

1 2

CC49

12

@

RC89

RC89 75_0402_5%

75_0402_5%

VR_SVID_ALRT# 42 VR_SVID_CLK 42 VR_SVID_DAT 42

Pull high resistor on VR side

+CPU_CORE

RC93

RC93 100_0402_1%

100_0402_1%

1 2

12

RC97

RC97 100_0402_1%

100_0402_1%

Close to CPU

VCCSENSE 4 2 VSSSENSE 42

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Sandy Bridge_POWER-1

QFKAA

1

0.2

8 48Thursday, February 16, 2012

5

+GFX_CORE

D D

C C

VCCPLL Decoupling: 1X 330U (6m ohm), 1X 10U, 2x1U

+1.8VS

RC119

12

10U_0805_10V6K

0_0805_5%

B B

A A

1

+

2

330U_B2_2.5VM_R15M

CC58

@

1

CC59

2

1U_0402_6.3V6K

+1.8VS_VCCPLL

1

CC60

2

CC61

1U_0402_6.3V6K

JCPUG

33A

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

1.5A

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

@

4

POWER

GRAPHICS

1.8V RAIL

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

VAXG_SENSE

SM_VREF

5A

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

6A

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

VCCIO_SEL

3

AK35

VCC_AXG_SENSE

AK34

VSS_AXG_SENSE

+V_SM_VREF should have 20 mil trace width

AL1

+V_SM_VREF

B4

+VREF_DQA_M3

D1

+VREF_DQB_M3

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

10U_0805_10V6K

CC55

10U_0805_10V6K

Bottom Socket Cavity

10U_0805_10V6K

1

CC40

2

10U_0805_10V6K

H_VCCSA_VID0 H_VCCSA_VID1

CC41

10U_0805_10V6K

1

CC42

2

0_0402_5% @

M27 M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

A19

1

CC65

0.1U_0402_10V7K

2

10U_0805_10V6K

1

CC56

2

10U_0805_10V6K

Bottom Socket Edge

1

CC51

CC52

CC57

2

10U_0805_10V6K

+VCCSA Decoupling: 1X 330U (6m ohm), 3X 10U

+VCCSA

Co-lay for Cost Down Plan

1 2

RC189 0_0402_5%RC189 0_0402_5%

1

CC43

+

CC44

@

2

330U_D2_2VM_R6M

2

RC111

1 2

H_VCCSA_VID0 4 1 H_VCCSA_VID1 4 1

+VCCSA_SENSE 41

Please kindly check whether pull down by 10k in PWR-Side

+1.5V_CPU +1.5V

+GFX_CORE

12

RC105

RC105 10_0402_1%

10_0402_1%

RC106

1 2

10_0402_1%

+1.5V_CPU

RC120

RC120 1K_0402_0.5%

1K_0402_0.5%

1 2

1K_0402_0.5%

1 2

RC109

+1.5V_CPU Decoupling: 1X 330U (6m ohm), 6X 10U

+1.5V_CPU

10U_0805_10V6K

ESR 6mohm

1

+

CC53

CC54

@

330U_D2_2VM_R6M

2

+VCCSA_SENSE

CC46 0.1U_0402_10V7KCC46 0.1U_0402_ 10V7K

1 2

CC47 0.1U_0402_10V7KCC47 0.1U_0402_ 10V7K

1 2

CC48 0.1U_0402_10V7KCC48 0.1U_0402_ 10V7K

1 2

CC45 0.1U_0402_10V7KCC45 0.1U_0402_ 10V7K

1 2

2N7002DW-T/R7_SOT363-6

2

Close to CPU

VCC_AXG_SENSE 42 VSS_AXG_SENSE 42

Vgs=10V,Id=14.5A,Rds=6mohm

RC192

470_0805_5%

QC5B

5

SUSP

1 2 3

4

0

1

1 1

1

CC68

CC68 10U_0805_10V6K

10U_0805_10V6K

2

CC69

0.1U_0402_25V6

0

1

0

1 2 3 4

FDS6676AS_SO8

1

2

PJ1

2

JUMP_43X118

QC4

S S S G

RUN_ON_CPU1.5VS3

12

RC194

RC194 820K_0402_5%

820K_0402_5%

@PJ1

@

112

D D D D

8 7 6 5

+VCCSAVCCSA_VID0 VCCSA_VID1

0.90 V

0.80 V

0.75 V

0.65 V

1

+1.5VS+1.5V_CPU

C464

4.7U_0805_10V4Z

1 2

C463

+1.5V

1 2

1U_0402_6.3V6K

1 2

C469

4.7U_0805_10V4Z

220K_0402_5%

61

QC5A

2N7002DW-T/R7_SOT363-6

For Sandy Bridge

RC193

1 2

2

SUSP

+VSB

SUSP 5,34

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Sandy Bridge_POWER-2

QFKAA

1

0.2

9 48Thursday, February 16, 2012

5

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

D D

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22 AN19 AN16 AN13 AN10

AN7

AN4 AM29 AM25

C C

AM22 AM19 AM16 AM13 AM10

AM7 AM4 AM3 AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AL7 AL4

AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7 AK4

AJ25

B B

VSS

VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

TYCO_2013620-2_IVY BRIDGE

@

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

JCPUI

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

@

VSS

4

F22

VSS234

F19

VSS235

E30

VSS236

E27

VSS237

E24

VSS238

E21

VSS239

E18

VSS240

E15

VSS241

E13

VSS242

E10

VSS243

E9

VSS244

E8

VSS245

E7

VSS246

E6

VSS247

E5

VSS248

E4

VSS249

E3

VSS250

E2

VSS251

E1

VSS252

D35

VSS253

D32

VSS254

D29

VSS255

D26

VSS256

D20

VSS257

D17

VSS258

C34

VSS259

C31

VSS260

C28

VSS261

C27

VSS262

C25

VSS263

C23

VSS264

C10

VSS265

C1

VSS266

B22

VSS267

B19

VSS268

B17

VSS269

B15

VSS270

B13

VSS271

B11

VSS272

B9

VSS273

B8

VSS274

B7

VSS275

B5

VSS276

B3

VSS277

B2

VSS278

A35

VSS279

A32

VSS280

A29

VSS281

A26

VSS282

A23

VSS283

A20

VSS284

A3

VSS285

3

JCPUE

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG4

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

@

VCC_DIE_SENSE

VSS_DIE_SENSE

RSVD28 RSVD29 RSVD30 RSVD31

RSVD32

CFG

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD_NCTF1 RSVD_NCTF2 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF5

RSVD_NCTF6 RSVD_NCTF7

RESERVED

RSVD_NCTF8 RSVD_NCTF9

RSVD_NCTF10

RSVD51 RSVD52

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11 RSVD_NCTF12 RSVD_NCTF13

2

CFG Straps for Processor

(CFG[17:0] internal pull hi gh to VCCIO)

AH27 AH26

L7 AG7 AE7 AK2

W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

T3PAD T3PAD

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition matches

*

socket pin map definition

CFG2

0:Lane Reversed

CFG4

12

RC82

RC82 1K_0402_1%

1K_0402_1%

@

1

Embedded Display Port Presence Strap

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

B1

KEY

T64PAD T64PAD

PCIE Port Bifurcation Straps

CFG[6:5]

1 : Disabled; No Physical D isplay Port

*

attached to Embedded Displa y Port

CFG4

0 : Enabled; An external Di splay Port device is connected to the Embedded D isplay Port

11: (Default) x16 - Device 1 functions 1 and 2 disabl ed

*

10: x8, x8 - Device 1 funct ion 1 enabled ; function 2 disabled 01: Reserved - (Device 1 fu nction 1 disabled ; functi on 2 enabled) 00: x8,x4,x4 - Device 1 fun ctions 1 and 2 enabled

PEG DEFER TRAINING

1: (Default) PEG Train imme diately following xxRESETB de assertion

CFG7

0: PEG Wait for BIOS for tr aining

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Sandy Bridge_GND/RSVD/CFG

Size Document Number Rev

Custom

QFKAA

Date: Sheet o f

2

Date: Sheet o f

1

0.2

10 48Thursday, February 16, 2012

5

+1.5V

JDDR3L

+0.75VS

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06- K4406-0103

@

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

BOSS2

VSS DQ4 DQ5

VSS

VSS DQ6 DQ7

VSS

VSS DM1

VSS

VSS DM2

VSS

VDD

A15 A14

VDD

A11

A7

VDD

A6 A4

VDD

A2 A0

VDD

CK1

VDD

BA1

VDD

S0#

VDD

NC

VDD

VSS

VSS DM4

VSS

VSS DM6

VSS

SDA

SCL

VTT

+VREF_DQA

CD1

0.1U_0402_10V7K

D D

Close to JDDRL.1

C C

B B

A A

DDR_A_BS27

DDRA_CLK07 DDRA_CLK0#7

DDR_A_BS07

DDR_A_W E#7

DDR_A_CAS #7

DDRA_SCS1 #7

+3VS

CD25

DDR_A_D0 DDR_A_D1

1

CD2

2.2U_0603_6.3V4Z

2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS #1 DDR_A_DQS 1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS #2 DDR_A_DQS 2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDRA_CLK0 DDRA_CLK0#

DDR_A_MA10 DDR_A_BS0

DDR_A_W E# DDR_A_CAS #

DDR_A_MA13 DDRA_SCS1 #

DDR_A_D32 DDR_A_D33

DDR_A_DQS #4 DDR_A_DQS 4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS #6 DDR_A_DQS 6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1 2

RD8

RD8 10K_0402_5%

10K_0402_5%

1

CD26

2

2.2U_0603_6.3V4Z

12

RD9

2

10K_0402_5%

0.1U_0402_10V7K

5

4

+1.5V

2 4

DDR_A_D4

6

DDR_A_D5

8 10

DDR_A_DQS #0

12

DDR_A_DQS 0

14 16

DDR_A_D6

18

DDR_A_D7

20 22

DDR_A_D12

24

DDR_A_D13

26 28 30

SM_DRAMRST #

32 34

DDR_A_D14

36

DDR_A_D15

38 40

DDR_A_D20

42

DDR_A_D21

44 46 48 50

DDR_A_D22

52

DDR_A_D23

54 56

DDR_A_D28

58

DDR_A_D29

60 62

DDR_A_DQS #3

64

DDR_A_DQS 3

66 68

DDR_A_D30

70

DDR_A_D31

72

74

DDRA_CKE1

76 78

DDR_A_MA15

80

DDR_A_MA14

82 84

DDR_A_MA11

86

DDR_A_MA7

88 90

DDR_A_MA6

92

DDR_A_MA4

94 96

DDR_A_MA2

98

DDR_A_MA0

100 102

DDRA_CLK1

104

DDRA_CLK1#

106 108

DDR_A_BS1

110

DDR_A_RAS #

112 114

DDRA_SCS0 #

116

DDRA_ODT 0

118 120

DDRA_ODT 1

122 124 126

+VREF_CAA

128 130

DDR_A_D36

132

DDR_A_D37

134 136 138 140

DDR_A_D38

142

DDR_A_D39

144 146

DDR_A_D44

148

DDR_A_D45

150 152

DDR_A_DQS #5

154

DDR_A_DQS 5

156 158

DDR_A_D46

160

DDR_A_D47

162 164

DDR_A_D52

166

DDR_A_D53

168 170 172 174

DDR_A_D54

176

DDR_A_D55

178 180

DDR_A_D60

182

DDR_A_D61

184 186

DDR_A_DQS #7

188

DDR_A_DQS 7

190 192

DDR_A_D62

194

DDR_A_D63

196 198 200

PM_SMBDATA

202

PM_SMBCLK

204

+0.75VS

206 208

4

DDR3 SO-DIMM A Reverse Type

SM_DRAMRST # 7,12

DDRA_CKE1 7DDRA_CKE07

DDRA_CLK1 7 DDRA_CLK1# 7

DDR_A_BS1 7 DDR_A_RAS # 7

DDRA_SCS0 # 7 DDRA_ODT 0 7

DDRA_ODT 1 7

1

CD15

CD16

2.2U_0603_6.3V4Z

0.1U_0402_10V7K

2

close to JDDRL.126

PM_SMBDATA 12,17,26 PM_SMBCLK 12,17,26

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

3

Intel DDR Vref M3

+VREF_DQA_M 3

+VREF_DQB_M 3

BSS138_NL_SOT23- 3

+1.5V

12

RD6

1K_0402_1%

+VREF_CAA_D IMMA

12

RD7

1K_0402_1%

+1.5V

CD7 330U_2.5V_M

CD8 10U_0603_6 .3V6MCD8 10U_0603_6 .3V6M

CD9 10U_0603_6 .3V6MCD9 10U_0603_6 .3V6M

CD10 10U_0603_6.3V6MCD10 10U _0603_6.3V6M

CD11 10U_0603_6.3V6MCD11 10U _0603_6.3V6M

CD12 10U_0603_6.3V6MCD12 10U _0603_6.3V6M

CD13 10U_0603_6.3V6MCD1 3 10U_0603_6.3V6M

2010/09/03 2012/12/31

3

D

QC9

S

Layout Note: Place near JDDRL

+

1 2

Compal Secret Data

DDR_A_DQS [0..7] 7

DDR_A_DQS #[0..7] 7

DDR_A_D[0..63 ] 7

DDR_A_MA[0..15] 7

13

2

G

Deciphered Date

2

12

@

0_0402_5%

RC115

BSS138_NL_SOT23- 3

QC7

D

S

D

S

13

G

2

RH100

10K_0402_5%

G

2

13

D

S

D

S

QC8

BSS138_NL_SOT23- 3

12

@

0_0402_5%

RC116

H_SNB_IVB# 5,21

+1.5V

1 2

CD50 33P_0402_50V 8KCD50 33P_0402_50V 8K

1 2

CD51 33P_0402_50V 8KCD51 33P_0402_50V 8K

1 2

CD52 33P_0402_50V 8KCD52 33P_0402_50V 8K

1 2

CD53 33P_0402_50V 8KCD53 33P_0402_50V 8K

1 2

CD54 33P_0402_50V 8KCD54 33P_0402_50V 8K

1 2

CD55 33P_0402_50V 8KCD55 33P_0402_50V 8K

Layout Note: Place thes e 4 Caps near Command and Control signals of DIMMA

+1.5V +0.75VS

CD20 0.1U_0402_10V7KCD20 0.1U_0402_10V7K

CD17 0.1U_0402_10V7KCD17 0.1U_0402_10V7K

CD18 0.1U_0402_10V7KCD18 0.1U_0402_10V7K

CD19 0.1U_0402_10V7KCD19 0.1U_0402_10V7K

1 2

12

2

+VREF_DQA

DRAMRST_C NTRL_PCH 7,1 7

+VREF_DQB

1

+1.5V

12

RD1

1K_0402_1%

+VREF_DQA

+VREF_DQB

Layout Note: Place near JDDRL1.203 and 204

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Custom

QFKAA

Date: Sheet of

QFKAA

12

RD2

1K_0402_1%

+1.5V

12

RD10

1K_0402_1%

12

RD11

1K_0402_1%

1 2

CD56 10U_0603_6.3V6MCD56 10U_0603_ 6.3V6M

12

CD24 1U_0402_6.3V6KCD24 1U_0402_6.3V6K

12

CD21 1U_0402_6.3V6KCD21 1U_0402_6.3V6K

12

CD22 1U_0402_6.3V6KCD22 1U_0402_6.3V6K

12

CD23 1U_0402_6.3V6KCD23 1U_0402_6.3V6K

DDRIII-SODIM M0

1

11 48Thursday, Feb ruary 16, 2012

0.2

A

+1.5V

JDDR3H

+0.75VS

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A626-U ASN-7F_204P

@

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

BOSS1 BOSS2

VSS DQ4 DQ5

VSS

VSS DQ6 DQ7

VSS

VSS DM1

VSS

VSS DM2

VSS

VDD

A15 A14

VDD

A11

A7

VDD

A6 A4

VDD

A2 A0

VDD

CK1

VDD

BA1

VDD

S0#

VDD

NC

VDD

VSS

VSS DM4

VSS

VSS DM6

VSS

SDA

SCL

VTT

+VREF_DQB

CD28

2.2U_0603_6.3V4Z

1 1

Close to JDDRH.1

DDRB_CKE07

2 2

3 3

4 4

+3VS

2.2U_0603_6.3V4Z

@

CD48

DDR_B_BS27

DDRB_CLK07 DDRB_CLK0#7

DDR_B_W E#7 DDR_B_CAS #7

DDRB_SCS1 #7

1

2

DDR_B_D0 DDR_B_D1

1

DDR_B_D2

CD27

DDR_B_D3

0.1U_0402_10V7K

2

DDR_B_D8 DDR_B_D9

DDR_B_DQS #1 DDR_B_DQS 1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS #2 DDR_B_DQS 2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDRB_CKE0

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDRB_CLK0 DDRB_CLK0#

DDR_B_MA10 DDR_B_BS0

DDR_B_W E# DDR_B_CAS #

DDR_B_MA13 DDRB_SCS1 #

DDR_B_D32 DDR_B_D33

DDR_B_DQS #4 DDR_B_DQS 4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS #6 DDR_B_DQS 6

DDR_B_D50 DDR_B_D55 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

1 2

RD14

RD14 10K_0402_5%

10K_0402_5%

1 2

RD15

1

10K_0402_5%

CD49

2

0.1U_0402_10V7K

A

B

+1.5V

2 4

DDR_B_D4

6

DDR_B_D5

8 10

DDR_B_DQS #0

12

DDR_B_DQS 0

14 16

DDR_B_D6

18

DDR_B_D7

20 22

DDR_B_D12

24

DDR_B_D13

26 28 30

SM_DRAMRST #

32 34

DDR_B_D14

36

DDR_B_D15

38 40

DDR_B_D20

42

DDR_B_D21

44 46 48 50

DDR_B_D22

52

DDR_B_D23

54 56

DDR_B_D28

58

DDR_B_D29

60 62

DDR_B_DQS #3

64

DDR_B_DQS 3

66 68

DDR_B_D30

70

DDR_B_D31

72

74

DDRB_CKE1

76 78

DDR_B_MA15

80

DDR_B_MA14

82 84

DDR_B_MA11

86

DDR_B_MA7

88 90

DDR_B_MA6

92

DDR_B_MA4

94 96

DDR_B_MA2

98

DDR_B_MA0

100 102

DDRB_CLK1

104

DDRB_CLK1#

106 108

DDR_B_BS1

110

DDR_B_RAS #

112 114

DDRB_SCS0 #

116

DDRB_ODT 0

118 120

DDRB_ODT 1

122 124 126

+VREF_CAB +VREF_C AB_DIMMB

128 130

DDR_B_D36

132

DDR_B_D37

134 136 138 140

DDR_B_D38

142

DDR_B_D39

144 146

DDR_B_D44

148

DDR_B_D45

150 152

DDR_B_DQS #5

154

DDR_B_DQS 5

156 158

DDR_B_D46

160

DDR_B_D47

162 164

DDR_B_D52

166

DDR_B_D53

168 170 172 174

DDR_B_D54

176 178 180

DDR_B_D60

182

DDR_B_D61

184 186

DDR_B_DQS #7

188

DDR_B_DQS 7

190 192

DDR_B_D62

194

DDR_B_D63

196 198 200

PM_SMBDATA

202

PM_SMBCLK

204

+0.75VS

206 208

B

Reverse Type DDR3 SO-DIMM B

SM_DRAMRST # 7,11

DDRB_CKE1 7

DDRB_CLK1 7 DDRB_CLK1# 7

DDR_B_BS1 7 DDR_B_RAS # 7DDR_B_BS07

DDRB_SCS0 # 7 DDRB_ODT 0 7

DDRB_ODT 1 7

1

CD46

CD47

2.2U_0603_6.3V4Z

0.1U_0402_10V7K

2

Close to JDDRH.126

PM_SMBDATA 11,17,26 PM_SMBCLK 11,17,26

C

DDR_B_DQS #[0..7] 7

DDR_B_DQS [0..7] 7

DDR_B_D[0..63 ] 7

DDR_B_MA[0..15] 7

+1.5V

12

RD12

1K_0402_1%

12

RD13

1K_0402_1%

Layout Note: Place near JDDRH

+1.5V

@

+

1 2

CD31 330U_B2_2.5VM_R15M

1 2

CD41 10U_0603_6.3V6MCD4 1 10U_0603_6.3V6M

1 2

CD36 10U_0603_6.3V6MCD3 6 10U_0603_6.3V6M

1 2

CD37 10U_0603_6.3V6MCD3 7 10U_0603_6.3V6M

1 2

CD38 10U_0603_6.3V6MCD3 8 10U_0603_6.3V6M

1 2

CD39 10U_0603_6.3V6MCD3 9 10U_0603_6.3V6M

1 2

CD40 10U_0603_6.3V6MCD4 0 10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

D

Layout Note: Place thes e 4 Caps near Command and Control signals of DIMMB

1 2

CD33 0.1U_0402_10V7KCD33 0.1U_0402_10V7K

1 2

CD29 0.1U_0402_10V7KCD29 0.1U_0402_10V7K

1 2

CD30 0.1U_0402_10V7KCD30 0.1U_0402_10V7K

1 2

CD32 0.1U_0402_10V7KCD32 0.1U_0402_10V7K

D

E

Layout Note: Place near JDDRH.203 a nd 204

+0.75VS+1.5V

1 2

CD57 10U_0603_6.3V6MCD5 7 10U_0603_6.3V6M

12

CD45 1U_0402_6.3V6KCD45 1U_0402_6.3V6K

12

CD42 1U_0402_6.3V6KCD42 1U_0402_6.3V6K

12

CD43 1U_0402_6.3V6KCD43 1U_0402_6.3V6K

12

CD44 1U_0402_6.3V6KCD44 1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Custom

Date: Sheet of

DDRIII-SODIM M1

QFKAA

12 48Thursday, Feb ruary 16, 2012

E

0.2

A

LCD_TXOUT0+19

LCD_TXOUT0-19

LCD_TXOUT1+19

LCD_TXOUT1-19

LCD_TXOUT2+19

LCD_TXOUT2-19

1 1

LCD_TXCLK+19

LCD_TXCLK-19

LCD_EDID_CLK19

LCD_EDID_DATA19

1 2

CAM@

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

R388 0_0603_5%

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

LCD_TZOUT0LCD_TZOUT0+ LCD_TZOUT1LCD_TZOUT1+ LCD_TZOUT2LCD_TZOUT2+ LCD_TZCLKLCD_TZCLK+

CAM@

USB20_N11_R USB20_P11_R

INT_MIC_CLK INT_MIC_DATA

LCD_EDID_CLK LCD_EDID_DATA

LCD_TXOUT0LCD_TXOUT0+

LCD_TXOUT1LCD_TXOUT1+

LCD_TXOUT2LCD_TXOUT2+

LCD_TXCLKLCD_TXCLK+ LED_PWM BKOFF#_R

C257 47P_0402_50V8J

+3VS

JLVDS

2 2

31

GND1

32

GND2

33

GND3

34

GND4

35

GND5

36

GND6

STARC_107K30-000001-G2

JLVDS1

12

GND

11

GND

10

ACES_87036-1001-CP

10

9

8

7

6

5

4

3

2

1

@

3 3

LCD_TXOUT0+

LCD_TXOUT0-

LCD_TXOUT1+

LCD_TXOUT1-

LCD_TXOUT2+

LCD_TXOUT2-

LCD_TXCLK+

LCD_TXCLK-

LCD_EDID_CLK

LCD_EDID_DATA

W=20mils

+3VS_LVDS_CAM

1.5A

+LCD_INV

1 2

@

B

LCD_TZCLK-19

@

For RF

C256 47P_0402_50V8J

1 2

CAM@

0.1U_0402_10V7K

1 2

C225

2

3

D84 AZ5125-02S.R7G_SOT23-3

@

+3VS

1

C248

0.1U_0402_10V7K

2

LCD_TZOUT0+19

LCD_TZOUT0-19

LCD_TZOUT1+19

LCD_TZOUT1-19

LCD_TZOUT2+19

LCD_TZOUT2-19

LCD_TZCLK+19

1

INT_MIC_CLK 30

INT_MIC_DATA 30

1

C226

0.1U_0402_10V7K

2

LED_PWM

BKOFF#_R

C

1

2

1 2

D17 RB751V40_SC76-2D17 RB751V40_SC76-2

12

R131

R131 47K_0402_5%

47K_0402_5%

1 2

D15 RB751V40_SC76-2D15 RB751V40_SC76-2

12

R113

R113 10K_0402_5%

10K_0402_5%

LCD_TZOUT0+

LCD_TZOUT0-

LCD_TZOUT1+

LCD_TZOUT1-

LCD_TZOUT2+

LCD_TZOUT2-

LCD_TZCLK+

LCD_TZCLK-

2A

C227

4.7U_0805_10V4Z

12

C258

C258 47P_0402_50V8J

47P_0402_50V8J

@

For RF

LVDS cable JLVDS1.2 need to contact GND

LVDS_SEL 17

+LCD_INV

C234

68P_0402_50V8J

L2

FBMA-L11-201209-221LMA30T_0805

1

C235

0.1U_0402_25V6

2

B+

12

For EMI1.5A

1

C247

1

C489

C269

@

2

0.1U_0402_25V6

@

2

0.1U_0402_25V6

1

2

D

BKOFF# 31

0.1U_0402_25V6

+LCD_VDD

PCH_PWM 19

B+

1

C490

@

2

E

2N7002DW-T/R7_SOT363-6

UMA_ENVDD19

R109

150_0603_5%

Q1A

F

+LCD_VDD

12

61

100K_0402_5%

2

5

R112

R112 100K_0402_5%

100K_0402_5%

1 2

+3VS

12

R108

3

Q1B

Q1B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

0.1U_0402_10V7K

1 2

R110

47K_0402_5%

0.01U_0402_25V7K

G

C228

LCDPWR_GATE

C230

H

+3VS

2

W=80mils

S

G

1

2

Q17

Q17 AO3413_SOT23

AO3413_SOT23

1

D

1 3

+LCD_VDD

2

W=80mils

1

C233

0.1U_0402_10V7K

2

Reserve for EMI request

1 2

R78 0_0402_5%CAM@R78 0_0402_5%CAM@ WCM-2012-900T_0805

WCM-2012-900T_0805

USB20_P11_R

USB20_N11_R

0.1U_0402_25V6

4

1

4

1

L55

R96 0_0402_5%CAM@R96 0_0402_5%CAM@

@L55

@

1 2

3

2

USB20_P11 20

USB20_N11 20

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

D

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

E

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

Custom

QFKAA

G

LVDS/eDP

0.2

13 48Thursday, February 16, 2012

0.2

H

A

B

C

D

E

CRT CONNECTOR

If=1A

+5VS +CRT_VCC_R +CRT_VCC

D6

2

CHP3_SERDBG21

1

C246

@

2

10P_0402_50V8J

CRT_DDC_CLK

CRT_DDC_DAT

3

+CRT_VCC

HSYNC

VSYNC

1

2

10P_0402_50V8J

1 1

UMA_CRT_R19

UMA_CRT_G19

UMA_CRT_B19

R138

R139

R140

12

150_0402_1%

1

12

C250

C249

@

2

150_0402_1%

2.2P_0402_50V8C

1 2

R189 0_0402_5%R189 0_0402_5%

1 2

R190 0_0402_5%R190 0_0402_5%

1 2

R191 0_0402_5%R191 0_0402_5%

1

C251

@

2

2.2P_0402_50V8C

By EMI demand

2 2

UMA_CRT_HSYNC19

UMA_CRT_VSYNC19

3 3

4 4

CRT_R_R

CRT_G_R

CRT_B_R

C238

1 2

C244 0.1U_0402_10V7KC244 0.1U_0402_10V7K

SN74AHCT1G125GW_SOT353-5

UMA_CRT_CLK19

UMA_CRT_DATA19

1

2

+CRT_VCC

5

A2Y

3

C239

2.2P_0402_50V8C

1

P

OE#

G

1 2

L3 NBQ100505T-800Y_0402L3 NBQ100505T-800Y_0402

1 2

L4 NBQ100505T-800Y_0402L4 NBQ100505T-800Y_0402

1 2

L5 NBQ100505T-800Y_0402L5 NBQ100505T-800Y_0402

1

C241

2

4

U6

C240

2.2P_0402_50V8C

0.1U_0402_10V7K

33P_0402_50V8K

C241

2

2.2P_0402_50V8C

+CRT_VCC

1 2

C252

1

5

P

A2Y

G

SN74AHCT1G125GW_SOT353-5

3

1

C282

2

@

1

C242

2

2.2P_0402_50V8C

R141 10K_0402_5%R141 10K_0402_5%

D_CRT_HSYNC

4

D_CRT_VSYNC

OE#

U7

Q205A

5

2N7002DW-T/R7_SOT363-6

Q205B

4

2N7002DW-T/R7_SOT363-6

1

C285

C285 33P_0402_50V8K

33P_0402_50V8K

2

@

CRT_R_L

CRT_G_L

CRT_B_L

1

C243

2

2.2P_0402_50V8C

12

1 2

L6 10_0402_5%L6 10_0402_5%

1 2

+3VS

2

3

L7 10_0402_5%L7 10_0402_5%

4.7K_0402_5%

61

470P_0402_50V8J

C245

@

+CRT_VCC

R153

R159

4.7K_0402_5%

1 2

1

C283

C284

470P_0402_50V8J

2

@

1

RB491D_SOT23-3

CRT_R_L

CRT_DDC_DAT CRT_G_L

HSYNC CRT_B_L

VSYNC CHP3_SERDBG

CRT_DDC_CLK

+CRT_VCC

F1

40 mils

21

0.5A_8V_KMC3S050RY

0.1U_0402_10V7K

T65 PADT65 PAD

6

5

4

CRT_G_L

CRT_DDC_CLK

CRT_DDC_DAT

6

5

4

2/9: Add for ESD request

1

C237

2

@

JCRT

6

11

1 7

12

2 8

G

13

G

3 9

14

4 10 15

5

SUYIN_070546FR015S251ZR

@

D98

@D98

@

I/O4

I/O2

VDD

GND

I/O3

I/O1

AZC099-04S.R7G_SOT23-6

D97

@D97

@

I/O4

I/O2

VDD

GND

I/O3

I/O1

AZC099-04S.R7G_SOT23-6

16 17

3

2

1

3

2

1

CRT_B_LCRT_R_L

CHP3_SERDBG

HSYNC

VSYNC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

CRT

QFKAA

0.2

14 48Thursday, February 16, 2012

E

0.2

5

D D

4

3

2

1

+3VS

C C

1 2

UMA_HDMI_TXC+19

UMA_HDMI_TXC-19

UMA_HDMI_TX0+19

UMA_HDMI_TX0-19

UMA_HDMI_TX1+19

UMA_HDMI_TX1-19

UMA_HDMI_TX2+19

UMA_HDMI_TX2-19

B B

A A

CV308 0.1U_0402_10 V7K HDMI@CV308 0.1U_ 0402_10V7K HDMI@

CV304 0.1U_0402_10 V7K HDMI@CV304 0.1U_ 0402_10V7K HDMI@

CV306 0.1U_0402_10 V7K HDMI@CV306 0.1U_ 0402_10V7K HDMI@

CV302 0.1U_0402_10 V7K HDMI@CV302 0.1U_ 0402_10V7K HDMI@

CV303 0.1U_0402_10 V7K HDMI@CV303 0.1U_ 0402_10V7K HDMI@

CV301 0.1U_0402_10 V7K HDMI@CV301 0.1U_ 0402_10V7K HDMI@

CV307 0.1U_0402_10 V7K HDMI@CV307 0.1U_ 0402_10V7K HDMI@

CV305 0.1U_0402_10 V7K HDMI@CV305 0.1U_ 0402_10V7K HDMI@

UMA_DVI_TXC-

UMA_DVI_TXC+

UMA_DVI_TXD0-

UMA_DVI_TXD0+

UMA_DVI_TXD1-

UMA_DVI_TXD1+

UMA_DVI_TXD2-

UMA_DVI_TXD2+

5

1 2

@

R157 0_0402_5%

R157 0_0402_5% L8

HDMI@L8

HDMI@

112

4

WCM-2012HS-6 70T_0805

1 2

@

R173 0_0402_5%

1 2

@

R175 0_0402_5%

R175 0_0402_5% L9

HDMI@L9

HDMI@

334

2

WCM-2012HS-6 70T_0805

1 2

@

R180 0_0402_5%

1 2

@

R182 0_0402_5%

R182 0_0402_5% L10

HDMI@L10

HDMI@

112

4

WCM-2012HS-6 70T_0805

1 2

@

R183 0_0402_5%

1 2

@

R187 0_0402_5%

R187 0_0402_5% L11

HDMI@L11

HDMI@

334

2

WCM-2012HS-6 70T_0805

1 2

@

R188 0_0402_5%

3

1

3

1

UMA_DVI_TXC+

UMA_DVI_TXC-

UMA_DVI_TXD0+

UMA_DVI_TXD0-

UMA_DVI_TXD1+

UMA_DVI_TXD1-

UMA_DVI_TXD2+

UMA_DVI_TXD2-

HDMI_R_CK-

2

3

HDMI_R_CK+

HDMI_R_D0-

4

1

HDMI_R_D0+

HDMI_R_D1-

2

3

HDMI_R_D1+

HDMI_R_D2-

4

1

HDMI_R_D2+

4

HDMI_R_D2-

HDMI_R_D2+

HDMI_R_D0+ HDMI_R_D0+

HDMI_R_D0- HDMI_R_D0-

2/9: Add for ESD request

UMA_HDMI_CLK19

UMA_HDMI_DATA19

D95

@

1

10

1

10

2

9

2

9

4

7

4

7

4

5

65

3

8

AZ1045-04F_DFN25 10P10E-10-9

D94

@

1

10

1

10

2

9

2

9

4

7

4

7

4

5

65

3

8

AZ1045-04F_DFN25 10P10E-10-9

9

8

7

6

9

8

7

6

HDMI_R_CK+HDMI_R_CK+

HDMI_R_CK-HDMI_R_CK-

2

3 1

SGD

Q19

BSH111_SOT23-3

HDMI@

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D0+

HDMI_HPD_C

+HDMI_5V_OUT

HDMI_R_D0-

HDMI_R_D2-

HDMI_R_D2+

+5VS

HDMI_R_D1-HDMI_R_D 1-

HDMI_R_D1+HDMI_R _D1+

HDMI_R_D2-

HDMI_R_D2+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+HDMI_5V_OUT

12

R185

R184

2.2K_0402_5%

HDMI@

Q18

HDMI_SDATA

1 2

HDMI@

R195 680_0402_1%

1 2

HDMI@

R197 680_0402_1%

1 2

HDMI@

R198 680_0402_1%

1 2

HDMI@

R202 680_0402_1%

1 2

HDMI@

R201 680_0402_1%

1 2

HDMI@

R203 680_0402_1%

1 2

HDMI@

R205 680_0402_1%

1 2

HDMI@

R206 680_0402_1%

D96

@D 96

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23 -6

2.2K_0402_5%

HDMI@

HDMI_SCLK

2

G

I/O2

GND

I/O1

13

3

2

1

D

Q24

Q24 2N7002_SOT23-3

2N7002_SOT23-3

HDMI@

S

HDMI_SDATA

HDMI_SCLK

2.2K_0402_5%

2

3 1

SGD

BSH111_SOT23-3

HDMI@

2/9: Add for ESD request

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

C264

0.1U_0402_10V7K

HDMI@

PMEG2010AEH_SOD123

+HDMI_5V_OUT

2

5

1

A2Y

3

HDMI@

D53

2 1

+HDMI_5V_OUT_F

+HDMI_5V_OUT

Title

Size Document Number Rev

Date: Sheet o f

HDMI@

R145

1 2

1K_0402_5%

1

100K_0402_5%

U9

P

4

HDMI_HPD

OE#

G

SN74AHCT1G125GW _SOT353-5

HDMI@

R571

2.2K_0402_5%

HDMI_HPD

F2

21

0.5A_8V_KMC3S050RY

HDMI@

HDMI Connector

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

Compal Electronics, Inc.

HDMI Conn./CEC

QFKAA

HDMI_HPD_CHDMI_H PD_U

R186

HDMI@

1 2

12

+3VS

1

C259

HDMI@

0.1U_0402_10V7K

2

JHDMI

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CK-

GND

CK_shield

GND

CK+

GND

D0-

GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

HONGL_13-1320 1904CP

@

1

2

C265

0.1U_0402_10V7K

HDMI@

1

HDMI_HPD 19

+HDMI_5V_OUT+5VS

20 21 22 23

0.2

15 48Thursday, February 16, 2012

5

CMOS Setting, nea r DDR Door

1 2

PCH_RTCRST#

RH23

+RTCVCC

20K_0402_5%

iME Setti ng.

RH24

1 2

PCH_SRTCRST#

20K_0402_5%

D D

Integrated SUS 1.05V VRM Enable

High - Enable Internal VRs

PCH_INTVRMEN

+RTCVCC

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

C C

HDA_SYNC

This signal has a weak internal pull down

*

H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Huron River platform

B B

PCH_SPICLK

PCH_SPIDI

(must be always pulled high)

1 2

RH12

1M_0402_5%

1 2

RH33

330K_0402_5%

+3VS

AZ_SYNC_HD30

For RF

330K_0402_5%

@

1 2

RH36 1K_0402_5%

+3VALW_PCH

1 2

RH54 33_0402_5%RH54 33_0402_5%

1 2

RH56 1M_0402_5%RH56 1M_0402_5%

12

47P_0402_50V8J

CH19

@

1

CH6

0.1U_0402_10V7K

2

PCH_SPICS0#

1 2

PCH_SPI0_CLK

RH66 33_0402_5%RH66 33_0402_5%

1 2

RH67 33_0402_5%RH67 33_0402_5%

Socket: SP07000F500/SP07000H900 Please place U13 & U4 close to U2 PCH, please place RH66, RH67, RH68 near UH3 Please place RH267 near RH66, Please place RH271 near RH67, Please place RH269 near RH68.

SPI ROM for Win8 (2MByte )

PCH_SPICS1#

1 2

PCH_SPIDO PCH_SPI1_DO

WIN8@

RH269 33_0402_5%

A A

for EMI

10_0402_5%

10P_0402_50V8J

+3VS

PCH_SPI0_CLK

12

RH65

1

CH7

2

5

JCMOS @JCMOS @

1 2

CH4

1U_0402_6.3V6K

JME @JME @

1 2

CH5

1U_0402_6.3V6K

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPK High = Enabled (No Reboot)

PCH_SPKR

Low = Disabled (Default)

12

+5VS

G

2

QH1

13

D

S

D

S

BSS138_NL_SOT23-3

@

1 2

RH274 0_0402_5%

4

VSS

2

Q

8

VCC

7

HOLD#

6

SCLK

5

SI

AZ_SYNC

PCH_SPI0_DOPCH_SPI0_DI

+3VS

RH55 1K_0402_5%RH55 1K_0402_5%

AZ_SYNC_R

+3VS

SPI ROM for BIOS & ME (4MByte )

UH3

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L3205DM2I-12G SO8

UH4

1

CS#

2

SO

3

WP#

4

GND

MX25L1606EM2I-12G_SO8

WIN8@

2MB ROM P/N: SA000041N00 SA00003FO10

AZ_BITCLK_HD

1

CH101

@ CH101

@

10P_0402_50V8J

2

4MB ROM P/N: SA00003K800 SA00004LI00

1 2

RH68 33_0402_5%RH68 33_0402_5%

47P_0402_50V8J

1 2

CH20

@ CH20

@

0.1U_0402_10V7K

1 2

CH100

WIN8@

RH26733_0402_5%

1 2 1 2

RH27133_0402_5%

WIN8@

for EMI

RH69

10_0402_5%

WIN8@

CH21

10P_0402_50V8J

WIN8@

4

12

CH2 15P_0402_50V8J

NOGCLK@

YH1

32.768KHZ_12.5P_1TJF125DP1A000D

AZ_BITCLK_HD30

PCH_SPKR30

AZ_RST_HD#30

AZ_SDIN0_HD30

+3VALW_PCH

AZ_SDOUT_HD30

PWRME_CTRL31

YH1

NOGCLK@

1 2

12

CH3 15P_0402_50V8J

NOGCLK@

RH27 33_0402_5%RH27 33_0402_5%

1 2

RH30 33_0402_5%RH30 33_0402_5%

@

RH272 1K_0402_5%

1 2

RH32 33_0402_5%RH32 33_0402_5%

1 2

RH25 0_0402_5%RH25 0_0402_5%

RH2

10M_0402_5%

12

8/30 Change PWRME_CT RL# to HDA_SDO by PCH EDS

RH26

GCLK@RH26

GCLK@

1 2

PCH_RTCX1_R26

0_0402_5%

PCH_RTCX1

Placement near to YH1

PCH_SPIDO

For RF

PCH_SPICLKPCH_SPI1_CLK

WIN8@

PCH_SPIDIPCH_SPI1_DI

PCH_SPI1_CLK

12

1

2

4

3

UH1A

A20

PCH_RTCX1

PCH_RTCX2

12

PCH_RTCRST#

PCH_SRTCRST#

NOGCLK@

SM_INTRUDER#

PCH_INTVRMEN

AZ_BITCLKAZ_BITCLK

AZ_SYNC

PCH_SPKR

AZ_RST#AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPICLK

PCH_SPICS0#

PCH_SPICS1#

PCH_SPIDI

PCH_SPIDO

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

PCHB0@

Security Classification

3

RTCIHDA

JTAG

SPI

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C38

LDRQ0#

SERIRQ

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRAME#

E36 K36

V5

SERIRQ

AM3

SATA_PRX_C_DTX_N0

AM1

SATA_PRX_C_DTX_P0

AP7

SATA_PTX_DRX_N0

AP5

SATA_PTX_DRX_P0

AM10 AM8 AP11 AP10

AD7

SATA_PRX_C_DTX_N2

AD5

SATA_PRX_C_DTX_P2

AH5 AH4

SATA_PTX_DRX_P2

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

SATAICOMP

AB12

AB13

SATA3_COMP

AH1

RBIAS_SATA3

P3

SATA_LED#

V14

PCH_GPIO21

P1

PCH_GPIO19

Compal Secret Data

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

2010/09/03 2012/12/31

RH43 37.4_0402_1%RH43 37.4_0402_1%

RH48 49.9_0402_1%RH48 49.9_0402_1%

RH41 750_0402_1%RH41 750_0402_1%

Deciphered Date

2

LPC_AD0 28,31,32 LPC_AD1 28,31,32 LPC_AD2 28,31,32 LPC_AD3 28,31,32

LPC_FRAME# 28,31,32

SERIRQ 28,31

SATA_PRX_C_DTX_N0 25 SATA_PRX_C_DTX_P0 25 SATA_PTX_DRX_N0 25 SATA_PTX_DRX_P0 25

SATA_PRX_C_DTX_N2 25 SATA_PRX_C_DTX_P2 25 SATA_PTX_DRX_N2 25 SATA_PTX_DRX_P2 25

1 2

SATA_LED# 33

PCH_GPIO19 20

BOOT BIOS Strap Bit 0

2

SERIRQ

HDD

PCH_GPIO21

PCH_GPIO19SATA_PTX_DRX_N2

ODD

+RTCVCC +RTCBATT

+1.05VS_VCC_SATA

+1.05VS_SATA3

+RTCBATT

If use GCLK, please delet DH1

SATA_LED#

12

+3VALW_PCH +3VALW_PCH+3VALW_PCH

RH46

RH46 200_0402_5%

200_0402_5%

RH44

RH44 100_0402_1%

100_0402_1%

1 2

RH50 51_0402_1%RH50 51_0402_1%

12

RH45

RH45 200_0402_5%

PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI

200_0402_5%

12

RH39

RH39 100_0402_1%

100_0402_1%

PCH_JTAG_TCK

Title

PCH_HDA/JTAG/SATA/SPI/LPC

Size Document Number Rev

Custom

Date: Sheet of

1

12

RH31 10K_0402_5%RH31 10K_0402_5%

12

RH34 10K_0402_5%RH34 10K_0402_5%

1 2

RH28 10K_0402_5%RH28 10K_0402_5%

1

12

CH8

2

0.1U_0402_10V7K

1 2

Compal Electronics, Inc.

QFKAA

DH7

NOGCLK@DH1

NOGCLK@

RB751V-40_SOD323-2

DH1

RB751V-40_SOD323-2

+3VL

12

RH2910K_0402_5% RH2910K_0402_5%

RH3520K_0402_5% RH3520K_0402_5%

RH38

RH38 200_0402_5%

200_0402_5%

1 2

RH40

RH40 100_0402_1%

100_0402_1%

1 2

16 48Thursday, February 16, 2012

1

+3VS

+5VS

0.2

5

PASSWORD_CLEAR#

LVDS_SEL13

1 2

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

PCH_GPIO20

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

LVDS_SEL

PANEL_SEL

PCIE_PRX_C_LANTX_N127 PCIE_PRX_C_LANTX_P127

LAN

PCIE_PTX_C_LANRX_N127

PCIE_PTX_C_LANRX_P127

PCIE_PRX_WLANTX_N226 PCIE_PRX_WLANTX_P226

WLAN

PCIE_PTX_C_WLANRX_N 226 PCIE_PTX_C_WLANRX_P226

D D

+3VS

1 2

RH99 10K_0 402_5%RH99 10K_04 02_5%

RH104 10K_0 402_5%RH104 10K_0 402_5%

1 2

RH95 10K_0402_5%RH95 10 K_0402_5%

1 2

Intel Spec: PCIECLK_RQ0# is suspend well, but we pull high to +3VS

C C

for LAN en/disable function

+3VALW_PCH

B B

RH107 10K_0 402_5%RH107 10K_ 0402_5%

1 2

RH110 10K_0 402_5%RH110 10K_ 0402_5%

1 2

RH112 10K_0 402_5%RH112 10K_ 0402_5%

1 2

RH119 10K_0 402_5%RH119 10K_ 0402_5%

RH114 10K_0 402_5%RH114 10K_ 0402_5%

1 2

PCH_GPIO20

CLKREQ_WLAN#

CLKREQ_LAN#

WLAN

PCH_GPIO26

PCH_GPIO25

PCH_GPIO44

PANEL_SEL

PASSWORD_CLEAR#

CH13 0.1U _0402_10V7KC H13 0.1U_0 402_10V7K

12 12

CH11 0.1U _0402_10V7KC H11 0.1U_0 402_10V7K

CH14 0.1U _0402_10V7KC H14 0.1U_0 402_10V7K

12 12

CH17 0.1U _0402_10V7KC H17 0.1U_0 402_10V7K

CLK_LAN#27

LAN

CLK_LAN27

CLKREQ_LAN#27

CLK_WLAN#26 CLK_WLAN26

CLKREQ_WLAN#26

Please place under DDR SODIMM. 10/25

12

JPW@JPW

@

+3VALW_PCH

RH116 10K_0 402_5%RH116 10K_ 0402_5%

LVDS_SEL

A A

Channel

H L

Single (Default)

LVDS_SEL

Dual

4

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

PCHB0@

PANEL_SEL

PCI-E*

PANEL_SEL

Channel LVDS

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLOCKS

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

H L

EDP

3

E12

PCH_SMBALERT#

H14

PCH_SMBCLK

SMBCLK

C9

PCH_SMBDATA

SMBDATA

A12

DRAMRST_CNTRL_PC H

C8

PCH_SMLCLK0

SML0CLK

G12

PCH_SMLDATA0

SML0DATA

C13

LAN_EN

E14

PCH_SMLCLK1

M16

PCH_SMLDATA1

M7

CL_CLK1

Control Link only for support Intel IAMT.

T11

CL_DATA1

P10

CL_RST1#

M10

PCH_GPIO47

AB37 AB38

AV22

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

XTAL25_OUT

XCLK_RCOMP

CLK_CPU_DMI#

AU22

CLK_CPU_DMI

AM12 AM13

BF18

PCH_CLK_DMI#

BE18

PCH_CLK_DMI

BJ30

CLKIN_GND1#

BG30

CLKIN_GND1

G24

CLK_DOT#

E24

CLK_DOT

AK7

CLK_SATA#

AK5

CLK_SATA

K45

CLK_14M_PCH

H45

CLK_PCILOOP

V47

PCH_X1

XTAL25_IN

V49

PCH_X2

Y47

XCLK_RCOMP

K43

CLK_FLEX0

F47

CLK_FLEX1

H47

CLK_FLEX2

K49

DGPU_PRSNT#

Compal common design SW requ est to add DGPU_Prese nt on this GPI O67

DGPU_PRSNT#

M/B SKU UMA

DRAMRST_CNTRL_PC H 7,11

LAN_EN 27

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

CLK_PCILOOP 20

1 2

RH115 90.9_0402_1%RH115 90.9_0402_1 %

T72 PADT72 PAD

T74 PADT74 PAD

T73 PADT73 PAD

H L

From Clock Gen.

+1.05VS_VCCDIFFCLKN

DIS/OPT

2

+3VALW_PCH +3VS

12

RH72 2.2K_0402_5%RH72 2.2K_0402_5%

12

RH70 2.2K_0402_5%RH70 2.2K_0402_5%

PCH_SMBDATA

PCH_SMBCLK

12

RH78 2.2K_0402_5%RH78 2.2K_0402_5%

12

RH74 2.2K_0402_5%RH74 2.2K_0402_5%

PCH_SMLDATA1

PCH_SMLCLK1

PCH_SMBALERT#

DRAMRST_CNTRL_PC H

LAN_EN

PCH_SMLCLK0

PCH_SMLDATA0

PCH_GPIO47

PCH_CLK_DMI# PCH_CLK_DMI

CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT

CLK_SATA# CLK_SATA

CLK_14M_PCH

CLK_PCILOOP

QH3B

354

2

2N7002DW-T /R7_SOT363-6

QH3A

6 1

2N7002DW-T /R7_SOT363-6

QH4B

354

2

QH4A

2N7002DW-T /R7_SOT363-6

6 1

2N7002DW-T /R7_SOT363-6

@

RH124 10_0402_5 %

PCH_X1_R26

RH79 10K_0402 _5%RH79 10K_0402 _5% RH82 10K_0402 _5%RH82 10K_0402 _5%

RH85 10K_0402 _5%RH85 10K_0402 _5% RH86 10K_0402 _5%RH86 10K_0402 _5%

RH80 10K_0402 _5%RH80 10K_0402 _5% RH81 10K_0402 _5%RH81 10K_0402 _5%

RH83 10K_0402 _5%RH83 10K_0402 _5% RH84 10K_0402 _5%RH84 10K_0402 _5%

RH87 10K_0402 _5%RH87 10K_0402 _5%

12

Placement near to YH2

NOGCLK@

RH117 1M_0402 _5%

NOGCLK@

YH2

25MHZ_20PF_7V25000 016

1

PCH_X1 PCH_X2

1

GND

1

CH26

DGPU_PRSNT#

CH26

NOGCLK@

27P_0402_50V8J

1 2

RH227 10K_0402_5%RH227 1 0K_0402_5%

1 2

@

RH261 10K_0402_5%

2

+3VS

1

RH102 4.7K_0402_5%RH1 02 4.7K_0402_5%

RH103 4.7K_0402_5%RH1 03 4.7K_0402_5%

PM_SMBDATA 11,12,26

PM_SMBCLK 11,12,26

+3VS+3VALW_PCH

EC_SMB_DA2 31

EC_SMB_CK2 31

1 2

RH262 10K_0 402_5%RH262 10K_0 402_5%

RH76 1K_04 02_5%RH76 1K_040 2_5%

1 2

RH75 10K_0 402_5%RH75 10K_04 02_5%

1 2

12

RH73 2.2K_04 02_5%RH 73 2.2K_0402_5%

12

RH77 2.2K_04 02_5%RH 77 2.2K_0402_5%

12

RH89 10K_0402_5%RH89 10 K_0402_5%

1 2 1 2

1 2

For EMI

@

12

CH28 22P_0 402_50V8J

RH37

1 2

PCH_X1

0_0402_5%

GCLK@

12

3

GND

1

CH27

4

CH27

NOGCLK@

27P_0402_50V8J

2

+3VALW_PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCH_PCI-E/SMBUS/CLK

Size Do cument Number Rev

Custom

QFKAA

Date: Sheet of

2

Date: Sheet of

1

0.2

17 48Thursday, February 16, 2012

5

+3VALW_PCH

D D

C C

VGATE31,42

PM_PWROK5,31

Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

B B

12

RH234 10K_0402_5 %RH234 10K_0402_5%

12

RH157 10K_0402_5 %RH157 10K_0402_5%

12

RH155 10K_0402_5 %RH155 10K_0402_5%

12

RH163 10K_0402_5 %RH163 10K_0402_5%

12

RH278 10K_0402_5 %RH278 10K_0402_5%

12

RH279 10K_0402_5 %RH279 10K_0402_5%

0.1U_0402_10V7K

CH103

PM_PWROK

@

12

PCH_SUSPWRDN#_RSUSACK#_R

RH281 0_0402_5%

1 2

PCH_RSMRST#

PM_PWROK

SYS_PWROK

0_0402_5%

@RH280

@

PCH_SUSPWRDN#_R

RI#

PCH_LOW_BAT#

RH280

+3VS

5

UH5

1

P

IN1

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

+1.05VS_PCH

Reserve this signal to EC by SW demand 2011/10/18a

SUSACK#31

4

+3VALW_PCH

POK35,37

+3VS

DRAMPWROK5

PCH_RSMRST#31

PCH_SUSPWRDN#31

PBTN_OUT#31

1 2

RH161 330K_0402_5%RH161 330K_0402 _5%

ACIN31,36

CH751H-40PT_SOD323-2

Reserve this signal to EC by SW demand 2011/10/18a

DH5

2 1

CH751H-40PT_SOD323-2

DH6

CH751H-40PT_SOD323-2

DMI_CTX_PRX_N06 DMI_CTX_PRX_N16 DMI_CTX_PRX_N26 DMI_CTX_PRX_N36

DMI_CTX_PRX_P06 DMI_CTX_PRX_P16 DMI_CTX_PRX_P26 DMI_CTX_PRX_P36

DMI_PTX_CRX_N06 DMI_PTX_CRX_N16 DMI_PTX_CRX_N26 DMI_PTX_CRX_N36

DMI_PTX_CRX_P06 DMI_PTX_CRX_P16 DMI_PTX_CRX_P26 DMI_PTX_CRX_P36

21

1K_0402_5%

PM_PWROK

DH2

4

1 2

RH126 49.9_0402_1%RH126 49.9_0402_1%

1 2

RH127 750_0402_1%RH127 750_0 402_1%

@

1 2

RH133 0_0402_5%

RH47

12

1 2

RH131 0_0402_5%RH131 0_0402_5%

@

1 2

PCH_SUSPWRDN#_R

RH132 0_0402_5%

21

PCH_RSMRST#PM_PWROK PCH_RSMRST#

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_COMP

RBIAS_CPY

SUSACK#_R

XDP_DBRESET#

SYS_PWROK

PM_PWROK_R

DRAMPWROK

PCH_RSMRST#

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

UH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

PCHB0@

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

3

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

2

BJ14

FDI_CTX_PRX_N0

AY14

FDI_CTX_PRX_N1

BE14

FDI_CTX_PRX_N2

BH13

FDI_CTX_PRX_N3

BC12

FDI_CTX_PRX_N4

BJ12

FDI_CTX_PRX_N5

BG10

FDI_CTX_PRX_N6

BG9

FDI_CTX_PRX_N7

BG14

FDI_CTX_PRX_P0

BB14

FDI_CTX_PRX_P1

BF14

FDI_CTX_PRX_P2

BG13

FDI_CTX_PRX_P3

BE12

FDI_CTX_PRX_P4

BG12

FDI_CTX_PRX_P5

BJ10

FDI_CTX_PRX_P6

BH9

FDI_CTX_PRX_P7

AW16

FDI_INT

AV12

FDI_FSYNC0

BC10

FDI_FSYNC1

AV14

FDI_LSYNC0

BB10

FDI_LSYNC1

A18

DSWVREN

E22

PCH_DPWROK DSWVREN

B9

EC_SWI#

N3

PCH_GPIO32

G8

SUS_STAT#

N14

D10

PM_SLP_S5#

H4

PM_SLP_S4#

F4

PM_SLP_S3#

G10

PM_SLP_A#

G16

PM_SLP_SUS#

AP14

H_PM_SYNC

K14

PCH_GPIO29

FDI_CTX_PRX_N0 6 FDI_CTX_PRX_N1 6 FDI_CTX_PRX_N2 6 FDI_CTX_PRX_N3 6 FDI_CTX_PRX_N4 6 FDI_CTX_PRX_N5 6 FDI_CTX_PRX_N6 6 FDI_CTX_PRX_N7 6

FDI_CTX_PRX_P0 6 FDI_CTX_PRX_P1 6 FDI_CTX_PRX_P2 6 FDI_CTX_PRX_P3 6 FDI_CTX_PRX_P4 6 FDI_CTX_PRX_P5 6 FDI_CTX_PRX_P6 6 FDI_CTX_PRX_P7 6

FDI_INT 6

FDI_FSYNC0 6

FDI_FSYNC1 6

FDI_LSYNC0 6

FDI_LSYNC1 6

EC_SWI# 26,27

T76 PADT76 PAD

32.768 KHz

CLK_EC 31

PM_SLP_S5# 31

PM_SLP_S4# 31

PM_SLP_S3# 31

T77 PADT77 PAD

T78 PADT78 PAD

H_PM_SYNC 5

1

1 2

Stuff R222 if do not support DeepSX state

DSWVREN must be always pulled high to +RTCVCC

DSWVREN - Internal Deep Sleep 1.05V regulator H

：：：：

Enable

*

L

：：：：

Disable

Follow EC check list demand, but don't implement CLKRUN# this fuction

PCH_GPIO32

EC_SWI#

PCH_GPIO29

RH128 0_0402_5%RH128 0_040 2_5%

RH150 330K_0402_5%RH150 330K_0402_5%

RH151 330K_0402_5%@RH151 330K_0402_5%@

RH256 8.2K_04 02_5%@RH256 8.2K_0402 _5%@

1 2

RH160 10K_0402_5%RH160 10K_04 02_5%

RH159 10K_0 402_5%RH159 10K_0402_5%

1 2

RH162 10K_0 402_5%@RH162 10K_04 02_5%@

1 2

PCH_RSMRST#PCH_DPWROK

+RTCVCC

12

+3VS

+3VALW_PCH

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PCH_DMI/FDI/PM

QFKAA

0.2

18 48Thu rsday, February 16, 2012

1

5

D D

1 2

RH125 100K_0402_5%RH125 100K_0402_5%

+3VS

RH145 2.2K_0402_5%RH145 2.2K_0402_5%

RH146 2.2K_0402_5%RH146 2.2K_0402_5%

RH149 2.2K_0402_5%RH149 2.2K_0402_5%

RH148 2.2K_0402_5%RH148 2.2K_0402_5%

C C

B B

RH142 2.2K_0402_5%RH142 2.2K_0402_5%

RH144 2.2K_0402_5%RH144 2.2K_0402_5%

1 2

RH156 150_0402_1%RH156 150_0402_1%

1 2

RH152 150_0402_1%RH152 150_0402_1%

1 2

RH154 150_0402_1%RH154 150_0402_1%

12

UMA_ENBKL

LCTL_CLK

LCTL_DATA

LCD_EDID_CLK

LCD_EDID_DATA

UMA_CRT_CLK

UMA_CRT_DATA

UMA_CRT_B

UMA_CRT_G

UMA_CRT_R

LCD_EDID_DATA13

UMA_CRT_HSYNC14 UMA_CRT_VSYNC14

UMA_ENBKL31 UMA_ENVDD13

PCH_PWM13

LCD_EDID_CLK13

1 2

RH143 2.37K_0402_1%RH143 2.37K_0402_1%

LCD_TXCLK-13 LCD_TXCLK+13

LCD_TXOUT0-13 LCD_TXOUT1-13 LCD_TXOUT2-13

LCD_TXOUT0+13 LCD_TXOUT1+13 LCD_TXOUT2+13

LCD_TZCLK-13 LCD_TZCLK+13

LCD_TZOUT0-13 LCD_TZOUT1-13 LCD_TZOUT2-13

LCD_TZOUT0+13 LCD_TZOUT1+13 LCD_TZOUT2+13

UMA_CRT_B14 UMA_CRT_G14 UMA_CRT_R14

UMA_CRT_CLK14 UMA_CRT_DATA14

4

UMA_ENBKL UMA_ENVDD

PCH_PWM

LCD_EDID_CLK LCD_EDID_DATA

LCTL_CLK LCTL_DATA

LVDS_IBG

T79 PADT79 PAD

LCD_TXCLKLCD_TXCLK+

LCD_TXOUT0LCD_TXOUT1LCD_TXOUT2-

LCD_TXOUT0+ LCD_TXOUT1+ LCD_TXOUT2+

LCD_TZCLKLCD_TZCLK+

LCD_TZOUT0LCD_TZOUT1LCD_TZOUT2-

LCD_TZOUT0+ LCD_TZOUT1+ LCD_TZOUT2+

UMA_CRT_B UMA_CRT_G UMA_CRT_R

UMA_CRT_CLK UMA_CRT_DATA

UMA_CRT_HSYNC UMA_CRT_VSYNC

12

CRT_IREF

RH138 1K_0402_0.5%RH138 1K_0402_0.5%

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

PCHB0@

3

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

+3VS

12

RH140

2.2K_0402_5%

HDMI@

HDMI_HPD HDMI_HPD

UMA_HDMI_TX2UMA_HDMI_TX2+ UMA_HDMI_TX1UMA_HDMI_TX1+ UMA_HDMI_TX0UMA_HDMI_TX0+ UMA_HDMI_TXCUMA_HDMI_TXC+

RH141 100K_0402_5%RH141 100K_0402_5%

RH255 100K_0402_5%RH255 100K_0402_5%

12

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

RH139

2.2K_0402_5%

HDMI@

2

UMA_HDMI_CLK 15 UMA_HDMI_DATA 15

HDMI_HPD 15

UMA_HDMI_TX2- 15 UMA_HDMI_TX2+ 15 UMA_HDMI_TX1- 15 UMA_HDMI_TX1+ 15 UMA_HDMI_TX0- 15 UMA_HDMI_TX0+ 15 UMA_HDMI_TXC- 15 UMA_HDMI_TXC+ 15

HDMI

1

100K_0402_5%

100K_0402_5% RH254

RH254

12

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_CRT/LVDS/HDMI

Custom

QFKAA

0.2

19 48Thursday, February 16, 2012

1

0.2

5

D D

+3VS

1 2

RH318 8.2K_0402_5%RH318 8.2K_0402_5%

1 2

RH319 8.2K_0402_5%RH319 8.2K_0402_5%

1 2

RH320 8.2K_0402_5%RH320 8.2K_0402_5%

1 2

RH321 8.2K_0402_5%RH321 8.2K_0402_5%

1 2

RH324 8.2K_0402_5%RH324 8.2K_0402_5%

1 2

RH323 8.2K_0402_5%RH323 8.2K_0402_5%

1 2

RH325 8.2K_0402_5%RH325 8.2K_0402_5%

1 2

RH322 8.2K_0402_5%RH322 8.2K_0402_5%

1 2

RH326 8.2K_0402_5%RH326 8.2K_0402_5%

C C

B B

1 2

RH327 8.2K_0402_5%RH327 8.2K_0402_5%

1 2

RH328 8.2K_0402_5%RH328 8.2K_0402_5%

1 2

RH329 8.2K_0402_5%RH329 8.2K_0402_5%

1 2

RH283 8.2K_0402_5%RH283 8.2K_0402_5%

1 2

RH290 8.2K_0402_5%RH290 8.2K_0402_5%

CLK_PCI_TPM_PCH28

PCH_GPIO54

PCH_GPIO4

PCI_PIRQB#

PCI_PIRQC#

PCH_GPIO52

PCH_GPIO53

PCI_PIRQA#

ODD_DA#

PCH_GPIO55

PCH_GPIO2

PCH_GPIO50

PCH_GPIO51

PCI_PIRQD#

PCH_GPIO5

R31422_0402 _5% R31422_040 2_5%

Add new PCI CLK to TPM

CLK_PCI_EC31 CLK_PCILOOP1 7 CLK_PCI_DDR32

@

12

ODD_DA#

CH15180P_0402_50V8J@CH15180P_0402_50V8J

12

CLK_PCI_TPM_PCH_R

U3RXDN1_R29 U3RXDN2_R29

U3RXDP1_R29 U3RXDP2_R29

U3TXDN129 U3TXDN229

U3TXDP129 U3TXDP229

12

ODD_DA#25

T80 PADT80 PAD

PLT_RST#5,26,27,28,31,32

1 2 1 2 1 2

CH22

CH22 47P_0402_50V8J

47P_0402_50V8J

@

U3RXDN1_R U3RXDN2_R

U3RXDP1_R U3RXDP2_R

U3TXDN1 U3TXDN2

U3TXDP1

by ESD requestion and place near CPU

@

12

PLT_RST#

CH104100P_0402_50V8J@CH104100P_0402_50V8J

RH2851K_0402_5% @ RH2851K_0402_5% @

12

A A

PCH_GPIO51

RH2861K_0402_5% @ RH2861K_0402_5% @

12

PCH_GPIO19

PCH_GPIO19 16

PCH_GPIO55

RH2871K_0402_ 5% @ RH2871K_0402_5% @

12

PCH_GPIO55

5

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

PCH_GPIO51 PCH_GPIO53 PCH_GPIO55

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME#

PLT_RST#

RH16722_0402 _5% RH16722_0402_5%

CLK_EC_R

RH16622_0402 _5% RH16622_0402_5%

CLK_PCH

RH28422_0402 _5% RH28422_0402_5%

CLK_SIO

CLK_PCI_TPM_PCH_R

PCH_GPIO51

0 0 1 1 1

A16 Swap Override Strap

*

4

UH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

M20 AY16 BG46

BE28 BC30 BE32

BJ32 BC28 BE30 BF32 BG32

AV26 BB26 AU28 AY30 AU26 AY26

AV28 AW30

K40 K38 H38 G38

C46 C44 E40

D47 E42 F46

G42 G40 C42 D44

K10

C6

H49 H43 J48 K42 H40

Boot BIOS Strap

PCH_GPIO19 Boot BIOS Loaction

0 1 0

Low= A16 swa p override Enable High= A16 swap over ride Disable

4

RSVD

TP21 TP22 TP23 TP24

USB3Rn1 USB3Rn2 USB3Rn3 USB3Rn4 USB3Rp1 USB3Rp2 USB3Rp3 USB3Rp4 USB3Tn1 USB3Tn2 USB3Tn3 USB3Tn4 USB3Tp1 USB3Tp2 USB3Tp3 USB3Tp4

PIRQA# PIRQB# PIRQC# PIRQD#

REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PCHB0@

LPC

Reserved

PCI

SPI

PCI

3

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

AV5

NV_ALE

RSVD23

AV10

RSVD24

DF_TVS

AT8

RSVD25

AY5

RSVD26

BA2

RSVD27

AT12

RSVD28

BF3

RSVD29

C24

EHCI 1

EHCI 2

USB

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

USB20_N0

A24

USB20_P0

C25

USB20_N1

B25

USB20_P1

C26

USB20_N2

A26

USB20_P2

K28

USB20_N3U3TXDP2

H28

USB20_P3

E28 D28 C28 A28 C29 B29 N28 M28 L30

USB20_N8

K30

USB20_P8

G30

USB20_N9

E30

USB20_P9

C30 A30 L32

USB20_N11

K32

USB20_P11

G32 E32 C32 A32

C33

USBBIAS

B33

A14

USB_OC#0

K20

USB_OC#1

B17

USB_OC#2

C16

SLP_CHG#

L16

USB_OC#4

A16

USB_OC#5

D14

USB_OC#6

C14

USB_OC#7

USB20_N0 29 USB20_P0 29 USB20_N1 29 USB20_P1 29 USB20_N2 25 USB20_P2 25 USB20_N3 25 USB20_P3 25

USB20_N8 28 USB20_P8 28 USB20_N9 26 USB20_P9 26

USB20_N11 13 USB20_P11 13

RH165 22.6_0402_1%RH165 22.6_0402_1%

Within 500 mils

SLP_CHG# 29

1 2

USB_OC#0 29 USB_OC#1 25

USB-LEFT1

USB-LEFT2

USB-Right1

USB-Right2

Card Reader

WiMax

Int. Camera

USB-LEFT USB-Right

*

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

@

1 2

NV_ALE

RH164 1K_0402_5%

1 2

USB_OC#6

RH209 10K_0402_5%RH209 10K_04 02_5%

1 2

SLP_CHG#

RH196 10K_0402_5%RH196 10K_04 02_5%

1 2

USB_OC#4

RH200 10K_0402_5%RH200 10K_04 02_5%

1 2

USB_OC#1

RH192 10K_0402_5%RH192 10K_04 02_5%

1 2

USB_OC#2

RH177 10K_0402_5%RH177 10K_04 02_5%

1 2

USB_OC#5

RH183 10K_0402_5%RH183 10K_04 02_5%

1 2

USB_OC#7

RH201 10K_0402_5%RH201 10K_04 02_5%

1 2

USB_OC#0

RH188 10K_0402_5%RH188 10K_04 02_5%

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

1

*

+1.8VS

+3VALW_PCH

PCH_PCI/USB/NAND

QFKAA

1

0.2

20 48Thu rsday, February 16, 2012

5

4

3

2

1

H_SNB_IVB# 5,11

21 48Thursday, February 16, 2012

+3VS

0.2

UH1F

+3VALW_PCH

12

RH204 1K_0402_5%RH204 1K_0402_5%

1 2

RH205 10K_0402_5%RH205 10K_0402_5%

1 2

RH289 10K_0402_5%RH289 10K_0402_5%

D D

C C

B B

A A

1 2

RH202 10K_0402_5%RH202 10K_0402_5%

1 2

RH207 10K_0402_5%RH207 10K_0402_5%

+3VS

1 2

RH180 10K_0402_5%RH180 10K_0402_5%

RH292 1K_0402_5%RH292 1K_0402_5%

1 2

RH190 10K_0402_5%RH190 10K_0402_5%

1 2

RH185 10K_0402_5%RH185 10K_0402_5%

1 2

RH193 10K_0402_5%RH193 10K_0402_5%

1 2

RH178 200K_0402_5%RH178 200K_0402_5%

1 2

RH197 10K_0402_5%RH197 10K_0402_5%

1 2

RH179 10K_0402_5%RH179 10K_0402_5%

1 2

RH293 10K_0402_5%RH293 10K_0402_5%

1 2

RH194 10K_0402_5%RH194 10K_0402_5%

1 2

RH181 10K_0402_5%RH181 10K_0402_5%

1 2

RH195 10K_0402_5%RH195 10K_0402_5%

1 2

RH186 10K_0402_5%RH186 10K_0402_5%

1 2

RH198 10K_0402_5%RH198 10K_0402_5%

@

RH199 10K_0402_5%

GPIO28

On-Die PLL Voltage Regulator H: Enable

*

L: Disable

1 2

RH206 1K_0402_5%@RH206 1K_0402_5%@

GPIO8

Integrated Clock Chip Enable (Removed) H: Disable L: Enable

*

1 2

RH298 1K_0402_5%@RH298 1K_0402_5%@

Integrated clock enable functionality is achieved by soft-strap The current default is clock enable

EC_LID_OUT#

EC_SMI#

PCH_GPIO12

PCH_GPIO28

PCH_GPIO57

PCH_GPIO34

12

CHP3_SERDBG

PCH_GPIO1

BT_DET#

OPTIMUS_EN#

ODD_DETECT#

PCH_GPIO6

PCH_GPIO16

EC_SCI#

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO17

PCH_GPIO37

12

PCH_GPIO27

Follow Compal ORB and Intel Chec k list 460603 V1.5

3D_DET#

PCH_GPIO28

OPTIMUS_EN#

EC_SMI#

5

CHP3_SERDBG14

EC_LID_OUT#31

ODD_DETECT#25

SKU Non3D

SKU NonOPT

4

EC_SCI#31

EC_SMI#31

T81 PADT81 PAD

H L

CHP3_SERDBG

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO12

EC_LID_OUT#

PCH_GPIO16

PCH_GPIO17

BT_DET#

PCH_GPIO27

PCH_GPIO28

PCH_GPIO34

PCH_GPIO35

ODD_DETECT#

PCH_GPIO37

OPTIMUS_EN#

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

3D

Optimus

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

UH1F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

PCHB0@

HDD2_DET#

SKU ONE HDD

3

C40

RCIN#

DF_TVS

NC_1

ODD_EN#

B41

PCH_GPIO69

C41

PCH_GPIO70

A40

PCH_GPIO71

P4

GATEA20

AU16

PECI

P5

KB_RST#

AY11

H_PWRGOOD

PCH_THRMTRIP#

NV_CLE

1 2

RH191 390_0402_5%RH191 390_0402_5%

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PROCPWRGD

THRMTRIP#

GPIO

INIT3_3V#

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

H L

TWO HDD

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

ODD_EN# 34

GATEA20 31

KB_RST# 31

H_PWRGOOD 5

H_THERMTRIP# 5

This signal has weak internal pull-up, can't be pulled low

DMI & FDI Termination Voltage

NV_CLE

12

RH189 1K_0402_5%RH189 1K_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

ODD_EN#

GATEA20

KB_RST#

PCH_GPIO69

PCH_GPIO70

PCH_GPIO71

Set to VCC when HIGH

Set to VSS when LOW

+1.8VS +1.8VS

12

RH187

2.2K_0402_5%

PMEG2010AEH_SOD123

Compal Electronics, Inc.

QFKAA

1 2

RH288 10K_0402_5%RH288 10K_0402_5%

1 2

RH182 10K_0402_5%RH182 10K_0402_5%

1 2

RH184 10K_0402_5%RH184 10K_0402_5%

1 2

RH291 10K_0402_5%RH291 10K_0402_5%

1 2

RH315 10K_0402_5%RH315 10K_0402_5%

1 2

RH203 10K_0402_5%RH203 10K_0402_5%

12

DH54

2 1

PCH_CPU/GPIO

1

RH210

2.2K_0402_5%

5

+1.05VS_VCCP

PJ4

@PJ4

@

2

112

JUMP_43X118

CH32

D D

C C

10U_0603_6.3V6M

B B

CH32

10U_0603_6.3V6M

This pin can be left as NC if On-Die VR is enabled (Default)

+1.05VS_PCH

1

CH43

2

1U_0402_6.3V6K

This pin can be left as NC if On-Die VR is enabled (Default)

CH45

1

CH33

2

1U_0402_6.3V6K

1

CH46

2

+3VS

1U_0402_6.3V6K

1

CH31

2

1

2

1U_0402_6.3V6K

+1.05VS_PCH +VCCA_DAC

1

CH34

2

1U_0402_6.3V6K

+1.05VS_PCH

1

CH44

CH47

1U_0402_6.3V6K

2

1

CH50

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+1.05VS_PCH

+VCCP_VCCDMI

+3VALW to +3V_PCH

Vgs=-4.5V,Id=3A,Rds<97mohm

+3VALW +3VALW_PCH

A A

PCH_PWR_EN#23,34

PCH_PWR_EN#

12

RH3 47K_0402_5%RH3 47K_0402 _5%

PJ2

2

JUMP_43X79

QH2 AO34 13_SOT23

D

S

D

S

13

G

1

2

CH99

2

CH102

0.1U_0402_25V6

4

UH1G

POWER

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

T82PAD T82PAD

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

T83PAD T83PAD

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

PCHB0@

@

112

12

1

@

2

0.1U_0402_10V7K~D

0.01U_0402_25V7K

0.01U_0402_25V7K RH1 2 0K_0402_5%~D@RH1 2 0K_0402_5%~D

CH98

3709mA

CRTLVDS

1mA

VCC CORE

60mA

DMI

75mA

VCCIO

190mA

DFT / SPI HVCMOS

FDI

1mA

VCCALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCCVRM[3]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

20mA

VCCADAC

VSSADAC

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCDMI[1]

VCCSPI

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

0.01U_0402_25V7K

+VCCA_LVDS

+VCCTX_LVDS

0.01U_0402_25V7K

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS_VCC_DMI

3

CH35

CH38

1

CH42

0.1U_0402_10V7K

2

1

CH49

CH49 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH51

0.1U_0402_10V7K

2

1

CH53

CH53 1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.1U_0402_10V7K

CH36

1 2

RH208 0_ 0603_5%RH208 0 _0603_5%

0.01U_0402_25V7K

CH39

+3VS

+VCCP_VCCDMI

RH214

0_0805_5%

+1.8VS

+3VS

1

2

1

CH40

CH40 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+VCCAFDI_VRM

+1.05VS_PCH

12

RH299

1 2

1_0603_1%

1

CH37

CH37 10U_0603_6.3V6M

10U_0603_6.3V6M

2

+VCCA_DAC_R

+3VS

LH2

BLM18PG181SN1D_0603

RH221

0_0603_5%

1 2

RH213

0_0603_5%

1 2

1

CH48

CH48 1U_0402_6.3V6K

1U_0402_6.3V6K

2

LH1

BLM18PG181SN1D_0603

+1.8VS

12

+1.5VS

+1.05VS_VCCP

2

+3VS

12

PCH Power Rail Table Refer to PCH EDS R1.0

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

VccVRM 1.5 0.167

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

Voltage

1.05

5

3.3

1.05

1.1

1.05VccIO 3.711

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC N/A

3.3VccSus3_3

3.3VccSusHDA

1.05VccCLKDMI

1.8VccTX_LVDS 0.04

S0 Iccmax Current (A)

0.001

0.228

0.063

0.08

1.7

0.047

0.095

0.01

0.07

0.001

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PCH_POWER-1

QFKAA

0.2

22 48Thu rsday, February 16, 2012

1

5

+3VS

LH5

1 2

10UH_LB2012T100MR_20%

D D

+3VS_VCC_CLKF33

1

CH73

CH73 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

CH74

CH74 1U_0402_6.3V6K

1U_0402_6.3V6K

2

"@" Avoid leakage

This pin can be left as NC if On-Die VR is enabled (Default)

C C

+1.05VS_PCH

B B

+1.05VS_PCH

A A

LH7 BLM18PG 181SN1D_2PLH7 BLM18PG181SN1D_2P

1 2

LH8 BLM18PG 181SN1D_2PLH8 BLM18PG181SN1D_2P

1 2

RH244

12

0_0603_5%

RH247

12

0_0603_5%

RH303

@RH303

@

12

0_0603_5%

1

CH79

CH79 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCDIFFCLKN

1

CH81

CH81 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH83

CH83 1U_0402_6.3V6K

1U_0402_6.3V6K

@

2

5

CH93

CH93 10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

+VCCDIFFCLK

+1.05VM_VCCSUS

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

1

2

CH94

CH94 1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCDIFFCLKN

+1.05VS_VCCP

CH95

CH95 10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

+1.05VS_PCH

1U_0402_6.3V6K

RH249

1 2

0_0603_5%

4.7U_0603_6.3V6K

1U_0402_6.3V6K

CH96

CH96 1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V7K

CH86

+1.05VS_PCH

CH84

0.1U_0402_10V7K

1

CH87

2

+3VALW_PCH

@

CH58

0.1U_0402_10V7K

+1.05VS_PCH

22U_0805_6.3V6M

1U_0402_6.3V6K

1

CH67

2

CH78

1

2

1

CH88

0.1U_0402_10V7K

2

4

This pin can be left as NC if On-Die VR is enabled (Default)

1

CH55

0.1U_0402_10V7K

2

12

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS

1

CH54

CH54 1U_0402_6.3V6K

1U_0402_6.3V6K

@

2

1

CH65

CH64

22U_0805_6.3V6M

2

1

CH68

CH69

1U_0402_6.3V6K

2

+VCCRTCEXT

1

+VCCAFDI_VRM

2

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+VCCSST

1

0.1U_0402_10V7K

+1.05VM_VCCSUS

CH85

2

+V_CPU_IO

1

+RTCVCC

0.1U_0402_10V7K

2

1

CH89

CH90

1U_0402_6.3V6K

2

4

3

UH1J

POWER

PAD

AD49

T84

T16

V12

T38

BH23

PAD

T85

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17 AF33 AF34 AG34

AG33

V16

T17 V19

BJ8

A22

1

CH91

0.1U_0402_10V7K

2

POWER

VCCACLK

VCCDSW3_3

3mA

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

VCCASW[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1] DCPSUS[2]

1mA

V_PROC_IO

VCCRTC

PANTHER-POINT_FCBGA989

PCHB0@

119mA

1010mA

1mA

Clock and Miscellaneous

PCI/GPIO/LPCMISC

80mA

SATA USB

55mA

95mA

CPURTC

10mA

HDA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

N26

VCCIO[29]

P26

VCCIO[30]

P28

VCCIO[31]

T27

VCCIO[32]

T29

VCCIO[33]

T23

VCCSUS3_3[7]

T24

VCCSUS3_3[8]

V23

VCCSUS3_3[9]

V24

VCCSUS3_3[10]

P24

VCCSUS3_3[6]

T26

VCCIO[34]

M26

V5REF_SUS

AN23

DCPSUS[4]

AN24

VCCSUS3_3[1]

P34

V5REF

1mA

N20

VCCSUS3_3[2]

N22

VCCSUS3_3[3]

P20

VCCSUS3_3[4]

P22

VCCSUS3_3[5]

AA16

VCC3_3[1]

W16

VCC3_3[8]

T34

VCC3_3[4]

AJ2

VCC3_3[2]

AF13

VCCIO[5]

AH13

VCCIO[12]

AH14

VCCIO[13]

AF14

VCCIO[6]

AK1

VCCAPLLSATA

AF11

VCCVRM[1]

AC16

VCCIO[2]

AC17

VCCIO[3]

AD17

VCCIO[4]

T21

VCCASW[22]

V21

VCCASW[23]

T19

VCCASW[21]

P32

VCCSUSHDA

2010/09/03 2012/12/31

+1.05VS_PCH

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

1 2

CH75

0.1U_0402_10V7K

+1.05VS_SATA3

PAD

T86

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

1

2

+1.05VS_PCH

1

CH56

CH56 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW_PCH

1

CH60

0.1U_0402_10V7K

2

1

2

+3VALW_PCH

1 2

CH66 0.1U_0402_10V7KCH66 0.1U_0402_1 0V7K

+3VALW_PCH

1

CH70

CH70 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

1

CH76

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+1.05VS_VCC_SATA

1

CH82

CH82 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RH300 0_04 02_5%RH300 0_ 0402_5%

RH301 0_04 02_5%RH301 0_ 0402_5%

RH302 0_04 02_5%RH302 0_ 0402_5%

+3VALW_PCH

CH92

0.1U_0402_10V7K

Compal Secret Data

Deciphered Date

2

PCH_PWR_EN#22,34

+3VALW_PCH

CH61

0.1U_0402_10V7K

@

CH62 1U_0402_6.3V6K

1 2

+3VS

1

CH72

0.1U_0402_10V7K

2

+1.05VS_SATA3

This pin can be left as NC if On-Die VR is enabled (Default)

1

CH77

CH77 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RH246

0_0805_5%

12

0_0805_5%

+1.05VS_PCH

12

2

RH242

+1.05VS_PCH

1

+5VALW +5VALW_PCH

JUMP_43X39

PJ5

@ PJ5

@

2

112

QH6

AO3413_SOT23

D

S

D

S

13

1

G

12

RH4 47K_0402_5%RH4 47K_040 2_5%

G

2

CH80

2

0.1U_0402_25V6

12

1

RH228

CH59

2

@

20K_0402_5%~D

0.1U_0402_10V7K~D

Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB

+3VALW_PCH

+5VALW_PCH

21

12

DH3

RH232

10_0402_5%

+1.05VS_PCH

12

10_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

1

CH63

0.1U_0402_10V7K

2

+3VS

+5VS

CH63 & CH71 are different by Intel CRB.

12

21

RH237

DH4

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

CH71

1U_0402_6.3V6K

2

Compal Electronics, Inc.

PCH_POWER-2

QFKAA

1

23 48Thu rsday, February 16, 2012

0.2

5

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

D D

C C

B B

A A

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

PCHB0@

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

4

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

PCHB0@

3

H46

VSS[259]

K18

VSS[260]

K26

VSS[261]

K39

VSS[262]

K46

VSS[263]

K7

VSS[264]

L18

VSS[265]

L2

VSS[266]

L20

VSS[267]

L26

VSS[268]

L28

VSS[269]

L36

VSS[270]

L48

VSS[271]

M12

VSS[272]

P16

VSS[273]

M18

VSS[274]

M22

VSS[275]

M24

VSS[276]

M30

VSS[277]

M32

VSS[278]

M34

VSS[279]

M38

VSS[280]

M4

VSS[281]

M42

VSS[282]

M46

VSS[283]

M8

VSS[284]

N18

VSS[285]

P30

VSS[286]

N47

VSS[287]

P11

VSS[288]

P18

VSS[289]

T33

VSS[290]

P40

VSS[291]

P43

VSS[292]

P47

VSS[293]

P7

VSS[294]

R2

VSS[295]

R48

VSS[296]

T12

VSS[297]

T31

VSS[298]

T37

VSS[299]

T4

VSS[300]

W34

VSS[301]

T46

VSS[302]

T47

VSS[303]

T8

VSS[304]

V11

VSS[305]

V17

VSS[306]

V26

VSS[307]

V27

VSS[308]

V29

VSS[309]

V31

VSS[310]

V36

VSS[311]

V39

VSS[312]

V43

VSS[313]

V7

VSS[314]

W17

VSS[315]

W19

VSS[316]

W2

VSS[317]

W27

VSS[318]

W48

VSS[319]

Y12

VSS[320]

Y38

VSS[321]

Y4

VSS[322]

Y42

VSS[323]

Y46

VSS[324]

Y8

VSS[325]

BG29

VSS[328]

N24

VSS[329]

AJ3

VSS[330]

AD47

VSS[331]

B43

VSS[333]

BE10

VSS[334]

BG41

VSS[335]

G14

VSS[337]

H16

VSS[338]

T36

VSS[340]

BG22

VSS[342]

BG24

VSS[343]

C22

VSS[344]

AP13

VSS[345]

M14

VSS[346]

AP3

VSS[347]

AP1

VSS[348]

BE16

VSS[349]

BC16

VSS[350]

BG28

VSS[351]

BJ28

VSS[352]

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PCH_GND

QFKAA

0.2

24 48Thu rsday, February 16, 2012

1

SATA HDD Conn.

D D

23

GND

24

GND

SUYIN_127043FB022G278 ZR

C C

@

5

+5VS

Place closely JHDD SATA CONN.

1.2A

12

C356

10U_0805_6.3V6M

JHDD

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21

12V

22

12V

1

C357

0.1U_0402_10V7K

2

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0

1

C358

0.1U_0402_10V7K

2

Close to JHDD

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2 1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

+3VS

+5VS

1

C359

0.1U_0402_10V7K

2

4

SATA_PTX_DRX_P0 16

SATA_PTX_DRX_N0 16

SATA_PRX_C_DTX_N0 1 6 SATA_PRX_C_DTX_P0 16

GND1 GND2

SANTA_206001-1

@

3

JODD

1

GND

2

SATA_PTX_C_DRX_P2

A+

3

SATA_PTX_C_DRX_N2

A-

4

GND

5

SATA_PRX_DTX_N2

B-

6

SATA_PRX_DTX_P2

B+

7

GND

8

DP

9

+5V +5V

MD GND GND

+5VS_ODD

10 11

ODD_DA#

12 13

SATA ODD Conn (for 14")

14 15

SATA ODD Conn (for 15" 17")

JODDB

@JODDB

@

1

2

SATA_PTX_C_DRX_P2_R

2

3

SATA_PTX_C_DRX_N2_R

3

4

5

SATA_PRX_DTX_N2_R

5

6

SATA_PRX_DTX_P2_R

6

7

8

ODD_DETECT#

8

9

9 10 11 12

GND GND

ACES_88058-120N

+5VS_ODD

10 11

ODD_DA#

12 13

Had confirm with ME that

14

this symbol is the same as connector list ODDB demand

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K

1 2 1 2

C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

1 2

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

ODD_DETECT# 21

ODD_DA# 20

R79 0_0402_5%R79 0_04 02_5%

1 2 1 2

R80 0_0402_5%R80 0_04 02_5%

R81 0_0402_5%R81 0_04 02_5%

1 2 1 2

R82 0_0402_5%R82 0_04 02_5%

2

SATA_PTX_DRX_P2 16

SATA_PTX_DRX_N2 16

SATA_PRX_C_DTX_N2 1 6 SATA_PRX_C_DTX_P2 16

SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_N2

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

+5VS_ODD

12

10U_0805_6.3V6M

Place components closely ODD CONN.

1.6A

12

C355

C354

@C354

@

10U_0805_6.3V6M

1

C379

@

1U_0402_6.3V6K

2

1

C380

0.1U_0402_10V7K

2

1

C360

2

0.1U_0402_10V7K

Power Button & RUSB connector

IN IN EN/ENB GND

OUT OUT OUT OCB

6 7 8 5

USB20_N220

USB20_P220

USB20_N320

USB20_P320

W=80mils

+USB_VCCA

For EMI

12

C361 1000P_ 0402_50V7KC361 1000P_0402_50V7K

USB_OC#1 20

1

C362

4.7U_0805_10V4Z

2

@

USB20_N2

USB20_P2

USB20_N3

USB20_P3

delete +USB_VCCA capacitance (place in SB will be better)

R77 0_0402_ 5%

1 2

@

L54

2

112

4

WCM-2012-90 0T_0805

1 2

R88 0_0402_ 5%

R73 0_0402_ 5%

1 2

L53

112

4

WCM-2012-90 0T_0805

1 2

R87 0_0402_ 5%

USB20_N2_R

3

USB20_P2_R

3

@

2

USB20_N3_R

3

USB20_P3_R

3

@

JUSIO

1

USB20_P3_R USB20_N3_R

USB20_P2_R USB20_N2_R

1 2

R22

390_0402_5%

ON/OFFBTN# +5VS_PWR_ON_LED

+USB_VCCA

ON/OFFBTN#31,33

+5VS

2

3

4

5

6

7

8

9

10

11

12

13

GND

14

GND

ACES_88058-120N

@

+5VALW

2.5A

U14

2 3

USB_EN#29,31

B B

4 1

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SATA-HDD/ODD/USB

Size Do cument Number Rev

Date: Sheet of

2

Date: Sheet of

QFKAA

1

0.2

25 48Thursday, February 16, 2012

Slot 1 Half PCIe Mini Card-WLAN/ WiMax

CM1

0.01U_0402_25V7K

+3V_WLAN

RM17

+3V_WLAN

8.2K_0402_5%

1 2

AOAC_WLAN_PW R_EN#31

WL_OFF#31

40 mils

+3V_WLAN +1.5VS_WLAN

0.1U_0402_10V7K

1

CM3

CM2

2

4.7U_0805_10V4Z

+3V_WLAN

12

C266

47P_0402_50V8J

@

+1.5VS_WLAN

12

C260

47P_0402_50V8J

@

Debug card using

Green Clock

+3VALW

0.1U_0402_10V7K

5

UM4

1

P

IN1

4

WLAN_OFF#

O

2

IN2

G

SN74AHC1G08DCKR _SC70-5

3

@

1 2

WL_OFF#

RM18 0_0402_5%RM18 0_0402_5%

For SED For SED

1

47P_0402_50V8J

2

CLKREQ_WLAN#17

PCIE_PRX_WLANTX_N217 PCIE_PRX_WLANTX_P217

PCIE_PTX_C_WLANRX_N 217 PCIE_PTX_C_WLANRX_P217

WLAN/ WiFi

E51_TXD31 E51_RXD31

1

CCL8

GCLK@

2

+1.05VS_VCCP

CLK_WLAN#17 CLK_WLAN17

12

C253

@

EC_SWI#18,27

0.01U_0402_25V7K

+3VL

+3V_LAN

CM7

@

1 2

0_0402_5%

+3V_WLAN

R16

1 2

0_0402_5%

1 2

0_0402_5%

0_0402_5% R17

R17

1

2

0.1U_0402_10V7K

1

2

@ R1443

@

CCL4

CCL4 18P_0402_50V8J

18P_0402_50V8J

GCLK@

For RF

1

CM8

CM9

@

2

4.7U_0805_10V4Z

EC_SWI#

BT_CTRL_RBT_ON

R1443

E51_RXD_R

1

CCL1

GCLK@

2

0.1U_0402_10V7K

1

CCL2

GCLK@

2

0.1U_0402_10V7K

1

CCL3

GCLK@

2

0.1U_0402_10V7K

YCL1 25MHZ 20PF X3G0 25000DK1H-X

1

GND

2

GCLK@

1

47P_0402_50V8J

2

JWLAN

112 334 556 778 9910 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 G153G2

BELLW_80003-7 041@

+1.05VS_VCCP

3

GND

4

12

WLAN_RST#31

PLT_RST#5,20,27,28,3 1,32

C254

@

+3VALW

+3V_LAN

3

+3VL

CLK_X2CLK_X1

+1.5VS_WLAN

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54

CLK_X2 CLK_X1

1

CCL5

CCL5 18P_0402_50V8J

18P_0402_50V8J

2

GCLK@

1

IN1

2

IN2

SN74AHC1G08DCKR _SC70-5

1 2

WLAN_RST#

RM19 0_0402_5%

+1.5VS

PJ33

PJ33 PAD-OPEN 2x2m

PAD-OPEN 2x2m

@

2 1

+3V_WLAN

WLAN_OFF# WLAN_RST#_R

LED_WIMAX#

UCL1

2

VDD

15

+V3.3A

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_OUT

16

XTAL_IN

4

VSS

7

VSS

13

VSS

17

Thermal Pad

SLG3NB244VTR_TQFN1 6_2X3

+3V_WLAN

5

UM5

P

O

G

3

@

LED_WIMAX#

4

WLAN_RST#_R

1 2

PM_SMBCLK 11,12,17 PM_SMBDATA 11,12,17

USB20_N9 20 USB20_P9 20

LED_WIMAX# 3 3

WIMAX@

1 2

RM7 100K_04 02_5%

WIMAX@

1 2

RM181 200K_0402_5%

GCLK@

VBAT

NC

32K NC

25M_B 25M_A

VDD_RTC_OUT

WLAN&BT Combo module circui ts

RM21

RM21 100K_0402_5%

100K_0402_5%

BT_ON#

BT_ON31

For isolate Intel Rainbow P eak and Compal Debug Card.

AOAC_WLAN_PW R_EN#

WiMax

+5VS

2

GCLK@

22U_0805_6.3V6M

22U_0805_6.3V6M CCL7

CCL7

1

10 11

9

PCH_RTCX1_R

12

5

PCH_X1_R_R

6

LAN_X1_R_R

14

1

CCL6

2.2U_0603_6.3V6K

2

GCLK@

+RTCVCC

BT

on module

Enable Disable

LH

1 2

BT_ON

+3VALW TO +3V_WLAN

for AOAC and WOWL

+3VALW

12

R1456

100K_0402_5%

1 2

47K_0402_5%

+RTCBATT

PCH_RTCX1_R 16

E51_RXD_R

R327

1K_0402_5%

+3VALW

2

C907

0.1U_0402_10V7K

1

G

2

R1457

C908

0.01U_0402_25V7K

1

1 2

GCLK@

RCL1 0_04 02_5%

1 2

GCLK@

RCL2 33_0 402_5%

1 2

LAN_X1_R_R

@

RCL5 0_04 02_5%

Reserved for Swing Level adjustment ( Close GCLK side )

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

Vgs=-4.5V,Id=3A,Rds<97mohm

S

D

1 3

2010/09/03 2012/12/31

PJ30

PJ30 PAD-OPEN 2x2m

PAD-OPEN 2x2m

AO3413_SOT23

@

Q210

2 1

+3V_WLAN

need short PJ30 if system don't support AOAC or WOWL

PCH_X1_RPCH_X1_R_R

PCH_X1_R 17

LAN_X1_RLAN_X1_R_R

LAN_X1_R

LAN_X1_R 27

1

CCL10

CCL10 5P_0402_50V8C

5P_0402_50V8C

2

GCLK@

EMI request 11 /06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCIe-WLAN/JET/3G/TV/GCLK

Size Document Number Rev

QFKAA

Thursday, February 16, 2012

Date: Sheet o f

26 48

0.2

A

CL1 0.1U_0402_10V7KCL1 0.1U_0402_10V7 K

2

G

2N7002_SOT23-38105ELDO@

1 3

D

8111FVB@

1 2

8111FVB@

1 2

RL26 0_0402 _5%

WOL_EN#ISOLATE#

Sx Disable Wake up

HIGH HIGH

S

1 2

CL2 0.1U_0402_10V7KCL2 0.1U_0402_10V7 K

1 2

PCIE_PTX_C_LANRX_P117 PCIE_PTX_C_LANRX_N117

LANCLK_REQ#CLKREQ_LAN#

QL53

PLT_RST#5,20,26,28,31,32

CLK_LAN17 CLK_LAN#17

EC_SWI#18,26

RL21 10K_0402_5%@RL21 10K_0402_ 5%@

+LAN_VDDREG

S0

Pin14

Pin15

Pin38

PCIE_PRX_C_LANTX_P117

PCIE_PRX_C_LANTX_N117

LAN_EN

LAN_EN17

CLKREQ_LAN#17

1 1

RL28 0_0402 _5%

+3V_LAN

1 2

WOL_EN#

EC_SWI#

LANCLK_REQ#

LAN_EN

Sx Enable Wake up

LOW

RL28 0_0402 _5%

RL22 1K_0402_5%@RL22 1K_0402_5%@

+3VS

8105ELDO@

RL24 10K_0402_5%

12

+3V_LAN

RL25 10K_0402_5%@RL25 10K_0402_ 5%@

12

+3VS

12

1K_0402_5%

1K_0402_5% RL6

RL6

@

2 2

@

RL7

RL7 15K_0402_5%

15K_0402_5%

RL433 0_0402_5%RL433 0_0402_5%

+3VALW TO +3V_LAN

2

CL483

@

0.1U_0402_10V7K

1

AO3413_SOT23

2

@

CL482

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

+3VALW

S

QL51

@

QL51

@

G

2

PJ29

D

1 3

2 1

PAD-OPEN 2x2m

Vgs=-4.5V,Id=3A,Rds<97mohm

1

CL681

2 @

@

+3VALW_PCH

+3VALW

12

RL147

RL147 100K_0402_5%

100K_0402_5%

@

RL432

@RL432

@

WOL_EN#31

3 3

1 2

47K_0402_5%

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN _EN ISOLATEB S0 Sx S0 Sx

-------------------------- ------------------- 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

4 4

* S3: after SUSP# assert lo w over 100ms S4/S5: after SYSON assert low over 100ms

A

B

PCIE_PRX_LANTX_P1

PCIE_PRX_LANTX_N1

PCIE_PTX_C_LANRX_P1 PCIE_PTX_C_LANRX_N1

PLT_RST#

CLK_LAN CLK_LAN#

LAN_X1

LAN_X2

EC_SWI#

ISOLATE#

12

ENSWREG

1 2

RL5 2.49K_0 402_1%RL5 2.49K_0402_1%

RTL8105ENCRTL8111E/F

NC 10K ohm PD

NC 1K ohm PH

PJ32

PJ32 PAD-OPEN 2x2m

PAD-OPEN 2x2m

@

2 1

2

CL682

CL682 1U_0402_6.3V6K

1U_0402_6.3V6K

1

LAN_MDI1+

+3V_LAN

LAN_MDI1-

LAN_MDI2+

+3V_LAN

LAN_MDI2-

B

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111F-CGT_QFN48_6x6

8111FVB@

LAN_X1_R26

CL43 10PF_040 2_50V9

NC

+3V_LAN

CL43 10PF_040 2_50V9

D99

@D99

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

D100

@D100

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

I/O2

GND

I/O1

I/O2

GND

I/O1

2/9: Add for ESD request

LED3/EEDO LED1/EESK

LED0

EECS

EEDI

MDIP0 MDIN0 MDIP1

MDIN1 NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10

AVDD10 AVDD10 AVDD10 AVDD10

REGOUT

1 2

RL29 22_0402_ 5%

GCLK@

1

CL26

CL26 27P_0402_50V8J

27P_0402_50V8J

NOGCLK@

2

3

2

1

3

2

1

LAN_MDI0+

LAN_MDI0-

LAN_MDI3+

LAN_MDI3-

C

Add test point for pin37 on DVT

31 37 40

30 32

1 2 4 5 7 8 10 11

13 29 41

27 39

12 42 47 48

21

3 6 9 45

36

RL2 10K_0402_5%@RL2 10K_0402_5%@ RL1 10K_0402_5%@RL1 10K_0402_5%@

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3-

+LAN_REGOUT

60 mils

TL1TL1

+LAN_VDD10

+3V_LAN

+LAN_EVDD10

+LAN_VDD10

12 12

+LAN_REGOUT

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1

1 2

2.2UH +-5% NLC252018T-2R2J-N

1 2

LL2 0_0603_5%LL 2 0_0603_5%

+3V_LAN

1 2

LL3 0_0603_5%8111FVB@ LL3 0_0603_5%8111F VB@

LL1

8111FVB@LL1

8111FVB@

4.7U_0603_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

8111FVB@

1

CL13

2 8111FVB@

8111FVB@

+LAN_EVDD10+LAN_VDD10

1

CL18

2

Close to Pin 21

+LAN_VDDREG

1

CL28

2

1

2

Placement near to YL1

RL8

GCLK@RL8

GCLK@

YL1 25MHZ_20PF_7V250000 16NOGCLK@ YL 1 25MHZ_20PF_7V25000016NOGCLK@

1 2

GND

2

LAN_X2

0_0402_5%

3

LAN_X2LAN_X1

3

27P_0402_50V8J

NOGCLK@

1

@

CL35

0.1U_0402_25V6

2

Place CL35 colse to UL3

1

CL34

0.1U_0402_25V6

2

Place CL34 colse to UL4

Issued Date

CL27

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

LAN_MDI2+ LAN_MDI2-

LAN_MDI3+ LAN_MDI3-

C

1

2

10/100M transformer_NS6816 95

4

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3V_LAN

12

ENSWREG

12

UL3

1

16

TD+

TX+

2

15

TD-

TX-

3

14

CT

4

13

NC

5

12

NC

6

11

CT

7

10

RD+

RX+

9

RD-8RX-

UL4

8111FVB@UL4

8111FVB@

1

16

TD+

TX+

2

15

TD-

TX-

3

14

CT

4

13

NC

5

12

NC

6

11

CT

7

10

RD+

RX+

9

RD-8RX-

2011/11/21 2011/12/11

RL4

RL4 0_0402_5%

0_0402_5%

8111FVB@

RL23

RL23 0_0402_5%

0_0402_5%

8105ELDO@

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+ RJ45_MIDI1-

RJ45_MIDI2+ RJ45_MIDI2-

RJ45_MIDI3+ RJ45_MIDI3-

Compal Secret Data

Deciphered Date

8105E-VL/VD 8111F/F-VB PWM Mode

0 ohm (Pull High)

NC 0 ohm

CL39 1000P_040 2_50V7KCL39 1000P_0402_ 50V7K

12

CL40 1000P_040 2_50V7KCL40 1000P_0402_ 50V7K

12

8111FVB@

CL41 1000P_040 2_50V7K

12

CL42 1000P_040 2_50V7K

12

8111FVB@

D

+LAN_VDD10

1

CL9

0.1U_0402_10V7K

2

8111FVB@

CL17

0.1U_0402_10V7K

1

CL29

0.1U_0402_10V7K

2

8111FVB@

8105E-VL/VD

LDO Mode

NC

(Pull Down)

1 2

RL11 75_0402_ 1%RL11 75_0402_1%

1 2

RL12 75_0402_ 1%RL12 75_0402_1%

8111FVB@

1 2

RL13 75_0402_ 1%

1 2

RL15 75_0402_ 1%

8111FVB@

D

E

+3V_LAN

CL3 to CL6 close to Pin 27,39,47,48 CL7 to CL8 close to Pin 12,42

1 2

CL3 0.1U_040 2_10V7KCL3 0.1U_0402_10V7K

1 2

CL4 0.1U_040 2_10V7KCL4 0.1U_0402_10V7K

1 2

CL5 0.1U_040 2_10V7KCL5 0.1U_0402_10V7K

1 2

CL6 0.1U_040 2_10V7KCL6 0.1U_0402_10V7K

1 2

CL7 0.1U_040 2_10V7K8111FVB@ CL7 0.1U_0402_10V7K8 111FVB@

1 2

CL8 0.1U_040 2_10V7K8111FVB@ CL8 0.1U_0402_10V7K8 111FVB@

+LAN_VDD10

CL19, CL20,CL21 close to pin 13,29,45, respectively CL22 close to pin 3, respectively CL23,CL24,CL25 close to pin 6,9,41, respectively

1 2

CL19 0.1U_0402_10 V7KCL19 0.1U_040 2_10V7K

1 2

CL20 0.1U_0402_10 V7KCL20 0.1U_040 2_10V7K

1 2

CL21 0.1U_0402_10 V7KCL21 0.1U_040 2_10V7K

1 2

CL22 0.1U_0402_10 V7K8111FVB@ CL22 0.1U_0402_10 V7K8111FVB@

1 2

CL23 0.1U_0402_10 V7K8111FVB@ CL23 0.1U_0402_10 V7K8111FVB@

1 2

CL24 0.1U_0402_10 V7K8111FVB@ CL24 0.1U_0402_10 V7K8111FVB@

1 2

CL25 0.1U_0402_10 V7K8111FVB@ CL25 0.1U_0402_10 V7K8111FVB@

For P/N and footprint Please place them to ISPD page

UL1

8105E-VD 10/100M

8105ELDO@

LAN Conn.

JRJ45

1

RJ45_MIDI0+

RJ45_MIDI0-

RJ45_MIDI1+

RJ45_MIDI2+

RJ45_MIDI2-

RJ45_MIDI1-

RJ45_MIDI3+

RJ45_MIDI3-

RJ45_GND LANGND

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

9

PR4+

GND

10

GND

8

PR4-

SANTA_130452-S

@

1 2

CL36 1000P_180 8_3KV7KCL36 1000P_1808_3 KV7K

Title

Size Document Number Rev

Custom

Date: Sheet of

1

CL37

220P_0402_50V6K

2

Compal Electronics, Inc.

PCIe-LAN-RTL8105E/8111F

QMLE4 LA-8864P

1

223

3

1

E

For ESD

D92

D92 AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

@

D93

223

AZC199-02SPR7G_SOT23-3

@

For ESD

1

CL38

@

4.7U_0603_6.3V6K

2

0.2

27 48Thu rsday, February 16, 2012

5

4

3

2

1

CardReader Conn.

Add R2957 0 oh m to protect +3VS

R2957

D D

C C

R2957

1 2

MIC_SENSE30 NBA_PLUG30

0_0603_5%

HP_R30 HP_L30

MIC1_L30 MIC1_R30

+3VS_CR

USB20_N8_R USB20_P8_R

HP_R HP_L

MIC1_L MIC1_R MIC_SENSE NBA_PLUG

+3VS

14

GND

13

GND

12

11

10

9

8

7

6

5

4

3

2

1

ACES_88058-120N

JCRIO

RR67

USB20_N820

@

USB20_P820

USB20_N8 USB20_N8_R

USB20_P8

1 2

0_0402_5%

LR9

@LR9

@

334

2

WCM-2012-900T_0805

1 2

0_0402_5%

4

1

RR66

USB20_P8_R

TPM1.2 on board

1 2

CT1 22P_0402 _50V8J

TPM9635@

YT1

1 2

RT7

RT8

+VSB_TPM

12

TPM9635@

YT1

1 2

RT8

RT8 0_0402_5%

0_0402_5%

CLK_PCI_TPM_PCH20

TPM9655@

32.768KHZ_12.5P_1TJF125DP1A00 0D

RT2

TPM9635@

LPC_PD#

32.768KHZ_12.5P_1TJF125DP1A00 0D

CT6 22P_0402 _50V8J

TPM9635@

4.7K_0402_5%@

TPM9635@

0_0402_5%

4

B B

+3VS

12

4.7K_0402_5%

A A

5

4.7K_0402_5%

CT2

0.1U_0402_10V7K

TPM9655@

0.1U_0402_10V7K

TPM_XTALI

12

RT1

@RT1

@

10M_0402_5%

TPM_XTALO

LPC_AD01 6,31,32 LPC_AD11 6,31,32 LPC_AD21 6,31,32 LPC_AD31 6,31,32

LPC_FRAME#16,31,32

PLT_RST#5,20,26,27,31,32

SERIRQ16,31

@

1 2

@

1 2

CT710P_0402_50 V8J@CT710P_0402_50 V8J

RT4 10_0402_5%

RT11 0_0402_5%

1 2 TPM9635@

TPM9635@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

CT2

TPM9635@

1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# PLT_RST# LPC_PD# SERIRQ

TPM_XTALO

TPM_XTALI

3

CT3

0.1U_0402_10V7K

TPM9655@

CT4

0.1U_0402_10V7K

TPM9655@

0.1U_0402_10V7K

2

CT3

CT4

TPM9635@

1

0.1U_0402_10V7K

UT1

26

LAD0

23

LAD1

20

LAD2

17

LAD3

22

LFRAME#

16

LRESET#

28

LPCPD#

27

SERIRQ

21

LCLK

SLB 9635 TT 1.2

SLB 9635 TT 1.2SLB 9635 TT 1.2

15

CLKRUN#

7

PP

14

XTALO

13

XTALI/32K IN

2011/01/31 2012/12/31

+VDD_TPM

5

10

19

24

VDD

GPIO2

TEST1

TESTB1/BADD

GND

SLB 9635 TT 1.2_TSSOP28

4

11

18

25

TPM9635@

Compal Secret Data

+3VS

12

RT13

RT13 0_0603_5%

0_0603_5%

TPM9655@

+VSB_TPM

VSB

6

GPIO

2

Base I/O Address 0 = 02Eh 1 = 04Eh

8 9

3

NC

12

NC

1

NC

Deciphered Date

TPM_GPIO TPM_GPIO2

*

RT5

TPM9635@

0_0402_5%

1 2

+VSB_TPM

RT12

2

1

CT5

TPM9635@

0.1U_0402_10V7K

T61PAD @ T61PAD @ T62PAD @ T62PAD @

TPM9655@

0_0402_5%

1 2

RT10 0_0603_5%

12

TPM9655@

RT9 0_0603_5%

TPM9635@

CT5

0.1U_0402_10V7K

TPM9655@

TPM9635@

4.7K_0402_5%

PLT_RST#

+3VS

12

+3VALW

+3VS

12

RT3

RT6

4.7K_0402_5%

@

1 2

Compal Electronics, Inc.

Title

PCIe-CardReader RTS5129/TPM

Size Document Number Rev

Custom

Date: Sheet of

QFKAA

0.2

28 48Thu rsday, February 16, 2012

1

5

+5VALW

12

RB73

4.7K_0402_5%

@

CEN USB20_DN0

12

USB20_DP0 SELCDP

RB74

4.7K_0402_5%

@

D D

SELCDP

+5VALW

Pull-up for SLGC55584AV

12

RB75

4.7K_0402_5%

@

12

RB76

4.7K_0402_5%

@

Pull-down for SLGC55584V

USB20_DN0

USB20_DP0

1 2 3 4 9

1 2

0_0402_5%

1 2

0_0402_5%

U15

@U15

@

8

CEN

CB

7

DM

TDM

6

DP

TDP

5

SELCDP

VDD

Thermal Pad

SLG55584AVTR_TDFN8_2X2

USB20_N0

RR44

USB20_P0

RR45

SLP_CHG# USB20_N0 USB20_P0

SLP_CHG# 20 USB20_N0 20 USB20_P0 20

1

CB25

0.1U_0402_16V7K

@

2

SELCDP

SLP_CHG#

X

0

1 S0 charging with SDP only

1

4

Sleep & Charge Function

+5VALW

1

CB49

10U_0603_6.3V6M

2

@

Function

DCP autodetect with mouse/keyboard wakeup

S0 charging with CDP or SDP only

3

2.5A

UR3

2

IN

OUT

3

IN

OUT

4

EN/ENB

OUT

1

GND

OCB

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

+USB_VCCB

W=80mils

1

+

2

220U_6.3V_M

W=60mils

+USB_VCCB

6 7 8 5

0.1U_0402_10V7K

1

CR40

2

12

CR38 1000P_0402_50V7KCR38 1000P_0402_50V7K

USB_OC#0 20

1

CR39

4.7U_0805_10V4Z

2

@

1

CR44

CR45

2

1000P_0402_50V7K

For EMI

+5VALW

USB_EN#25,31

+USB_VCCC

220U_6.3V_M

+5VALW

USB_CHG_EN#

USB_CHG_EN#31

4.7U_0805_10V4Z

CR46

2

@

PJ31

2

112

PAD-OPEN 2x2m

Q8

1 3

D

S

D

+USB_VCCC +USB_VCCB

1 2

R568 100K_0402_5%@R568 100K_0402_5%@

USB_EN#

To EC

W=80mils

1

+

CR47

@

2

4.7U_0805_10V4Z

S

AO3413_SOT23

@

G

2

0.1U_0402_10V7K

1

CR42

CR43

2

1000P_0402_50V7K

1

CR41

2

C C

U3TXDP120

U3TXDN120

B B

U3TXDP220

U3TXDN220

A A

5

U3RXDP1_R20

U3RXDN1_R20

1 2

CR25 0.1U_0402_10V7K

IUSB30@

1 2

CR24 0.1U_0402_10V7K

U3RXDP2_R20

U3RXDN2_R20

IUSB30@

1 2

CR34 0.1U_0402_10V7K

1 2

CR35 0.1U_0402_10V7K

IUSB30@

USB20_P120

USB20_N120

4

U3TXDP1_C

U3TXDN1_C

USB20_DP0 USB20_P0_L

USB20_DN0

U3TXDN2_C

1 2

@ RR19

@

0_0402_5%

LR1

IUSB30@LR1

IUSB30@

334

2

KINGCORE WCM-2012HS-670T

1 2

0_0402_5%@

1 2

@ RR32

@

0_0402_5%

LR2

IUSB30@LR2

IUSB30@

334

2

KINGCORE WCM-2012HS-670T

1 2

0_0402_5%@

1 2

@ RR26

@

0_0402_5%

LR3

IUSB30@LR3

IUSB30@

334

2

WCM-2012-900T_0805

1 2

0_0402_5%@

1 2

@ RR42

@

0_0402_5%

KINGCORE WCM-2012HS-670T

112

4

LR5

IUSB30@LR5

IUSB30@

1 2

0_0402_5%@

1 2

@ RR43

@

0_0402_5%

KINGCORE WCM-2012HS-670T

112

4

LR6

IUSB30@LR6

IUSB30@

1 2

0_0402_5%@

1 2

@ RR39

@

0_0402_5%

LR4

IUSB30@LR4

IUSB30@

334

2

WCM-2012-900T_0805

1 2

0_0402_5%@

U3RXDP1_R_L

RR19

4

112

U3RXDN1_R_L

RR20

U3TXDP1_R_L

RR32

4

112

U3TXDN1_R_L

RR22

RR26

4

112

USB20_N0_L

RR25

U3RXDP2_R_L

RR42

2

334

U3RXDN2_R_L

RR40

U3TXDP2_R_LU3TXDP2_C

RR43

2

334

U3TXDN2_R_L

RR41

USB20_P1_L

RR39

4

112

USB20_N1_L

RR38

3

DR7

@

1

U3TXDP1_R_L

U3TXDN1_R_L

U3RXDP1_R_L

U3RXDN1_R_L

YSCLAMP0524P_SLP2510P8-10-9

USB20_P0_L

USB20_N0_L

Change ESD Diode for EMI request

U3TXDP2_R_L

U3TXDN2_R_L

U3RXDP2_R_L

U3RXDN2_R_L

YSCLAMP0524P_SLP2510P8-10-9

USB20_P1_L

USB20_N1_L

Change ESD Diode for EMI request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.

9

U3TXDP1_R_L

10

2

8

U3TXDN1_R_L

21 9

4

7

U3RXDP1_R_L

7

4

7

4

5

6

U3RXDN1_R_L

65

3

8

DR1

@

2

1

3

AZC199-02SPR7G_SOT23-3

DR8

@

1

9

U3TXDP2_R_L

10

2

8

U3TXDN2_R_L

21 9

4

7

U3RXDP2_R_L

7

4

7

4

5

6

U3RXDN2_R_L

65

3

8

DR4

@

2

1

3

AZC199-02SPR7G_SOT23-3

200910/9 2010/01/23

+USB_VCCB

+USB_VCCC

Compal Secret Data

Deciphered Date

2

U3TXDP1_R_L

U3TXDN1_R_L USB20_N0_L

USB20_P0_L U3RXDP1_R_L

U3RXDN1_R_L

U3TXDP2_R_L

U3TXDN2_R_L USB20_N1_L

USB20_P1_L U3RXDP2_R_L

U3RXDN2_R_L

JUSBA

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

D+

6

SSRX+

4

GND

5

SSRX-

OCTEK_USB-09EAEB

@

JUSBB

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

D+

6

SSRX+

4

GND

5

SSRX-

OCTEK_USB-09EAEB

@

10

GND

11

GND

12

GND

13

GND

10

GND

11

GND

12

GND

13

GND

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

USB3.0

QFKAA

1

29 48Thursday, February 16, 2012

0.2

5

MIC1_R_R MIC1_R_L

D D

0.01U_0402_25V7K

1 2

CA65

@CA65

CA55

close to pin 2 8

AC_VREF

1

2

INT_MIC_CLK13

@

1 2

CA6010U_0603_6.3V6M CA6010 U_0603_6.3V6M

CA56

2.2U_0603_6.3V6K

@

RA34 20K_0402_1%

AZ_RST_HD#16

0.1U_0402_10V7K

C C

CA59 100P_0402_50V8JCA59 100P_0402_50V 8J

INT_MIC_DATA13

12

@

EC_MUTE#31

For EMI

RA42

FBMA-10-100505-301T

CAM@

1

CA52

CAM@CA52

CAM@

220P_0402_50V7K

2

AZ_SYNC_HD16

INT_MIC_CLK_R

Analog MIC

B B

MIC2_L

MIC2_R

AMIC@

CA26

12

1U_0402_6.3V4Z

12

1U_0402_6.3V4Z

1U_0402_6.3V4Z CA28

CA28

AMIC@

RA25

12

1K_0402_5%

12

1K_0402_5%

1K_0402_5% RA26

RA26

AMIC@

CA584.7U_0603_6.3V6K CA584.7 U_0603_6.3V6K CA574.7U_0603_6.3V6K CA574.7 U_0603_6.3V6K

+MIC1_VREFO_L +MIC1_VREFO_R

+MIC2_VREFO

1 2

close to pin19

RA30

20K_0402_1%

CA54 2.2U_0603_10V6KCA54 2.2U_060 3_10V6K

CA53 2.2U_0603_10V6KCA53 2.2U_060 3_10V6K

+MIC2_VREFO

12

RA24

4.7K_0402_5%

AMIC@

MIC1_R_C_R MIC1_R_C_L

MIC2_R MIC2_L

MONO_IN

12

AC_JDREF

12

CPVEE

12

INT_MIC_CLK_R

SENSE_A SENSE_B

INT_MIC

CA27

1 2

220P_0402_50V7K

AMIC@

close to Codec

4

UA1

22

MIC1_R

21

MIC1_L

17

MIC2_R

16

MIC2_L

31

MIC1_VREFO_L

30

MIC1_VREFO_R

29

MIC2_VREFO

15

LINE2_R

14

LINE2_L

20

MONO_OUT

12

PCBEEP

10

SYNC

11

RESET#

19

JDREF

28

LDO_CAP

27

VREF

34

CPVEE

35

CBN

36

CBP

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

13

SENSE_A

18

SENSE_B

47

EAPD

4

PD#

ALC259-VC2-CG_MQFN48_6X6

JMIC

1 2

3 4

@

DVDD

DVDD_IO

AVDD1 AVDD2

PVDD1 PVDD2

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

HPOUT_R

HPOUT_L

SDATA_OUT

SDATA_IN

BCLK

NC NC NC

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

Thermal Pad

1 2

GND GND

ACES_50271-0020N-001

3

35mA for 3.3V level

1 2

+3VS

12

RA2910_0402_5%@RA2910_0402_5%

10P_0402_50V8J

CA51

1 2

RA28 0_0603_5%RA28 0_0603_5%

1 2

RA17 0_0603_5%RA17 0_0603_5%

place close to chip

AZ_SDOUT_HD 16

AZ_SDIN0_HD 16

AZ_BITCLK_HD 1 6

@

1 9

25 38

39 46

45 44

40 41

33

RA19

32

RA20

5 8

6

23 24 48

26 37 42 43 7

49

+DVDD_IO +3VS_DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

75_0402_1%

AZ_SDIN0_HD_R

AZ_BITCLK_HD

HP_R 28

HP_L 28

RA23 33_0402_5%RA23 33_0402_5%

@

AGND

DGND

2W 4ohm =40mil place ment near Aud io Codec 1W 8ohm =20mil

LA7

0_0603_5%

LA8

0_0603_5%

LA9

0_0603_5%

LA10

0_0603_5%

12

2

CA71

10U_0603_6.3V6M

1

2

CA72

10U_0603_6.3V6M

1

12

2

CA76

10U_0603_6.3V6M

1

2

CA75

10U_0603_6.3V6M

1

12

@

SPKL+

SPKL-

SPKR+

SPKR- SPK_R2

0.1U_0402_16V4Z

12

CA4

CA3

10U_0805_6.3V6M

0.1U_0402_16V4Z

12

CA46

CA45

10U_0805_6.3V6M

For EMI please place n ear codec

SPK_L1

2

CA74

CA74 1U_0402_6.3V4Z

1U_0402_6.3V4Z

@

1

SPK_L2

SPK_R1

2

CA73

CA73 1U_0402_6.3V4Z

1U_0402_6.3V4Z

@

1

SPK_R2

2

close to pin 2 5 c lose to pin 38

+DVDD_IO

1

2

+3VS_DVDD

1

2

+AVDD

+PVDD

1

CA33 0.1U_04 02_10V7KCA33 0.1U_0402_10V7K

close to pin39

2

1

CA32 0.1U_04 02_10V7KCA32 0.1U_0402_10V7K

2

EC Beep

EC_BEEP#31

PCI Beep

PCH_SPKR16

EC_MUTE#

To solve noise issue

EC_MUTE#

Hight LOW

CA42

10U_0603_6.3V6M

CA35

Internal AMP

Enable Disable

RA50

4.7K_0402_5%

1 2

0.1U_0402_10V7K

1

2

CA37

CA47

2

1

10U_0603_6.3V6M

LA6

1 2

PBY160808T-601Y-N_2P

2

1

10U_0603_6.3V6M

1 2

47K_0402_5%

1 2

47K_0402_5%

4.7K_0402_5%

RA51

RA52

0.1U_0402_10V7K

2

CA50

1

0.1U_0402_10V7K

CA34

RA49

1

2

1 2

1

2

0.1U_0402_10V7K

1

RA18

1 2

0_0603_5%

1

CA39

@

10U_0603_6.3V6M

2

+5VS

12

CA36

10U_0805_6.3V6M

Beep sound

CA70

1 2

MONO_IN

CA69

100P_0402_50V8J

+5VS

Ext.MIC/LINE IN JACK

MIC1_R_R

MIC1_R_L

RA47

1K_0402_5%

RA45

12

RA48 2.2K_0402_5%RA48 2.2K_0402_5%

12

RA46 2.2K_0402_5%RA46 2.2K_0402_5%

+MIC1_VREFO_R

MIC1_R 28

MIC1_L 28

+MIC1_VREFO_L

SPK Conn.

Sense Pin

SENSE A

A A

Impedance

39.2K

20K

10K

5.1K

39.2K

20K

10K

5

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)SENSE B

PORT-H (PIN 20)

Function

Headphone out

Ext. MIC

MIC_SENSE28

NBA_PLUG28

4

place close to chip

12

RA32 20K_0402_1%RA32 20K_0402_1%

RA33 39.2K_0402_1%RA33 39.2K_0402_1%

1 2

CA63 0.1U_0603_50V7KCA63 0.1U_0603_50V7K

SENSE_A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

1 2

CA61 0.1U_0603_50V7KCA61 0.1U_0603_50V7K

1 2

CA66 0.1U_0603_50V7KCA66 0.1U_0603_50V7K

1 2

CA62 0.1U_0603_50V7KCA62 0.1U_0603_50V7K

1 2

RA31 0_0603_5%RA31 0_0603_5%

Compal Secret Data

2011/11/11 2012/12/31

3

Compal Secret Data

Deciphered Date

2

SPK_R1 SPK_R2 SPK_L1 SPK_L2

Title

Size Docum ent Number Rev

Custom

Date: Sheet of

3

1

2

DA10 AZ5125-02S.R7G_SOT23-3

@

3

1

2

DA11 AZ5125-02S.R7G_SOT23-3

@

Compal Ele ctronics, In c.

USB3.0 con trol

JSPK

1

2

3

4

ACES_85204-0400N

@

1

30 48Thursday, February 16, 2012

5

0.1U_0402_10V7K

1

CB1

CB2

0.1U_0402_10V7K

CLK_PCI_EC

1

2

EC_RST#

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

SUSP#

KSI[0..7]32

KSO[0..15]32

0.1U_0402_10V7K

AOAC_WLAN_PWR_EN#26

For EMI

12

RB3

10_0402_5%

@

22P_0402_50V8J

+3VL

47K_0402_5%

1 2

CB12 0 .1U_0402_10V7KCB12 0.1U_0402 _10V7K

RB12 2.2K_0402_5%RB12 2.2K_0402_5%

RB13 2.2K_0402_5%RB13 2.2K_0402_5%

RB15 2.2K_0402_5%RB15 2.2K_0402_5%

RB16 2.2K_0402_5%RB16 2.2K_0402_5%

1 2

CB14 180P_0402_50V8J

@

CB11

@

RB2

1 2 1 2

@

D D

C C

+3VL

+3VS

B B

CB2

CB4

2

0.1U_0402_10V7K

GATEA2021

KB_RST#21

SERIRQ16,28

LPC_FRAME#16,28,32

LPC_AD31 6,28,32 LPC_AD21 6,28,32 LPC_AD11 6,28,32 LPC_AD01 6,28,32

CLK_PCI_EC20

PLT_RST#5,20,26,27,28,32

EC_SCI#

EC_SCI#21

AOAC_WLAN_PWR_EN#

KSI[0..7]

KSO[0..15]

EC_SMB_CK135,36 EC_SMB_DA135,36 EC_SMB_CK217 EC_SMB_DA217

PM_SLP_S3#18 PM_SLP_S5#18

EC_SMI#21

USB_CHG_EN#29

BT_ON2 6

FAN_SPEED15

WL_OFF#26 E51_TXD26 E51_RXD26 PM_PWROK5 ,18

PWR_SUSP_LED#33

RB20

0_0402_5%

1 2

CLK_EC18

100K_0402_5%

0.1U_0402_10V7K

1

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# EC_RST#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI#

USB_CHG_EN# BT_ON

FAN_SPEED1 WL_OFF# E51_TXD E51_RXD PM_PWROK PWR_SUSP_LED#

1

CB5

2

1000P_0402_50V7K

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

12

RB22

4

1000P_0402_50V7K

1

CB6

2

UB1

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

1

CB16

CB16 20P_0402_50V8

20P_0402_50V8

2

+3VL

1

CB7

2

GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25 KSO6/GPIO26

Matrix

KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLKI/GPIO5D XCLKO/GPIO5E

9

PS2 Interface

SM Bus

22

EC_VDD/VCC

GND/GND

11

+3VL

33

67

96

111

125

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

PWM Output

AD Input

DA Output

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

BATT_CHG_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

GPIO

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

GPI

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

24

35

69

94

113

CB3

0.1U_0402_10V7K

1 2

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56 VR_ON/GPIO57

PM_SLP_S4#/GPIO59

BKOFF#/GPXIOA08

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

V18R

KB9012QF-A3_LQFP128_ 14X14

3

21

WL_BT_LED#

23

EC_BEEP#

26 27

63

BATT_TEMPA

64 65

ADP_I

66 75 76

UMA_ENBKL

68 70

EN_DFAN1

71

PCH_SUSPWRDN#

72

SUSACK#

83

EC_MUTE#

84

USB_EN#

85 86 87

TP_CLK

88

TP_DATA

97

VGATE

98

WOL_EN#

99

PWRME_CTRL

109

VCIN0_PH

119 120

VCIN0_PH connect to

126

power portion (9012 only)

128

73 74 89 90

BATT_FULL_LED#

91

WLAN_RST#

92 93

BATT_CHG_LOW_LED#

95

SYSON

121

VR_ON

127

100

PCH_RSMRST#

101

EC_LID_OUT#

102

PROCHOT_IN

103

H_PROCHOT#_EC

104

VCOUT0_PH_L

105

BKOFF#

106

PBTN_OUT#

107

PCH_PWR_EN

108

SA_PGOOD

110

ACIN_D

112

EC_ON_R

114

ON/OFFBTN#

115

LID_SW#

116

SUSP#

117 118

EC_PECI H_PECI

124

+EC_V18R

1

CB15

4.7U_0805_10V4Z

2

WL_BT_LED# 33 EC_BEEP# 30

BATT_TEMPA 35

ADP_I 35,36

UMA_ENBKL 19

EN_DFAN1 5

PCH_SUSPWRDN# 1 8

SUSACK# 18

EC_MUTE# 30

USB_EN# 25,29

TP_CLK 33

TP_DATA 33

VGATE 18,42

WOL_EN# 27

PWRME_CTRL 16

VCIN0_PH 35

DRAMRST_CNTRL_EC 7 BATT_FULL_LED# 33 WLAN_RST# 26

BATT_CHG_LOW_LED# 33 SYSON 38 VR_ON 42

PM_SLP_S4# 18

PCH_RSMRST# 18 EC_LID_OUT# 21 PROCHOT_IN 35

BKOFF# 13

PBTN_OUT# 18 PCH_PWR_EN 34 SA_PGOOD 41

ON/OFFBTN# 25,33 LID_SW# 33

SUSP# 34 ,38,39,40

1 2

RB19 43_0402_1%RB19 43 _0402_1%

2

H_PECI 5

1 2

H_PROCHOT#_EC

SSM3K7002F_SC59-3

BATT_TEMPA

ACIN_D

H_PROCHOT#_EC

LID_SW#

TP_CLK

TP_DATA

SYSON

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

ACIN_D

SUSP#

VR_ON

VR_HOT#42

Reserve this signal to EC by SW demand 2011/10/18a

PROCHOT_IN connect to power portion (9012 only)

VCOUT0_PH connect to power portion (9012 only)

NV-GPU GPS function control pin connect to a OR-gate in the power portion

RB10_0402_5% RB10_0402_ 5%

1

D

QB1

2

G

S

3

1 2

CB9 100P_0402_50 V8JCB9 1 00P_0402_50V8J

1 2

CB10 1 00P_0402_50V8JCB10 100P_0402_ 50V8J

@

1 2

RB6 10K_0402_5%

1 2

RB35 47K_0402_5%RB35 47K_040 2_5%

1 2

RB8 4.7K_0402_5%RB8 4.7K_0402_5%

1 2

RB9 4.7K_0402_5%RB9 4.7K_0402_5%

1 2

RB10 4.7K_0402_5%RB10 4.7K_0 402_5%

1 2

RB34 0_0402_5%RB34 0_0402_5%

RB18

330K_0402_5%

12

DB1RB751V40_SC76-2 DB1RB751V40_SC76-2

1 2

RB21 10K_0402_5%RB21 10K_040 2_5%

1 2

RB23 10K_0402_5%RB23 10K_040 2_5%

12

+3VL

1

CB8

CB8 47P_0402_50V8J

47P_0402_50V8J

2

+3VS

TV tuner temperature

+3VL

+5VS

ACIN 18,36

1

H_PROCHOT# 5

VS_ON 37

Close to EC

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109

A A

VCIN1 pin102

VCOUT0 pin104

VCOUT1 pin103

RB27

100K_0402_5%

1 2

E51_TXD

5

>1.2V <1.2V

LOW

HIGH

LOW

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

EC_ON_R

RB36 2.2K_0402_5%RB36 2.2K_0402_5%

1

CB50

CB50 1U_0402_6.3V6K

1U_0402_6.3V6K

2

EC_ON 37

For KB9012 EC_ON low pulse work around

Compal Secret Data

2010/12/22 2011/12/22

3

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

LPC-EC-KB9012&930

Thursday, February 16, 2012

0.2

31 48

1

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SPI Flash (128KB)

Lid SW

LPC Debug Port

JDB

@JDB

@

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

E-T_3801K-F10N-01L

Place the JDB under DDR DIMM.

+3VS

CLK_PCI_DDR

PLT_RST# 5,20,26,27,28,31 CLK_PCI_DDR 20

LPC_FRAME# 16,28,31 LPC_AD3 16,28,31 LPC_AD2 16,28,31 LPC_AD1 16,28,31 LPC_AD0 16,28,31

22P_0402_50V8J

For EMI

1 2

C457

@

R393

1 2

22_0402_5%

@

CLK_PCI_DDR

KEYBOARD CONN.

JKB

1

2

KSO15

2

3

KSO14

3

4

KSO13

4

5

KSO12

5

6

KSO11

6

7

KSO10

7

8

KSO9

8

9

KSO8

9

10

KSO7

10

11

KSI7

11

12

KSI6

12

13

KSO6

13

14

KSI5

14

15

KSO5

15

16

KSI4

16

17

KSI3

17

18

KSI2

18

19

KSI1

19

20

KSO4

20

21

KSI0

21

22

KSO3

22

23

KSO2

23

26

24

GND

27

GND

ACES_50524-02501-001

@

KSI[0..7]

KSO[0..15]

KSO1

24

25

KSO0

25

KSI[0..7] 31

KSO[0..15] 31

KSO0

KSO1

KSO2

KSO3

KSI0

KSO4

KSI1

KSI2

KSI3

KSI4

KSO5

KSI5

KSO6

KSI6

KSI7

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

1 2

C406 100P_0402_50V8JC406 100P_0402_50V8J

1 2

C405 100P_0402_50V8JC405 100P_0402_50V8J

1 2

C404 100P_0402_50V8JC404 100P_0402_50V8J

1 2

C408 100P_0402_50V8JC408 100P_0402_50V8J

1 2

C425 100P_0402_50V8JC425 100P_0402_50V8J

1 2

C407 100P_0402_50V8JC407 100P_0402_50V8J

1 2

C431 100P_0402_50V8JC431 100P_0402_50V8J

1 2

C422 100P_0402_50V8JC422 100P_0402_50V8J

1 2

C423 100P_0402_50V8JC423 100P_0402_50V8J

1 2

C424 100P_0402_50V8JC424 100P_0402_50V8J

1 2

C409 100P_0402_50V8JC409 100P_0402_50V8J

1 2

C427 100P_0402_50V8JC427 100P_0402_50V8J

1 2

C411 100P_0402_50V8JC411 100P_0402_50V8J

1 2

C429 100P_0402_50V8JC429 100P_0402_50V8J

1 2

C421 100P_0402_50V8JC421 100P_0402_50V8J

1 2

C412 100P_0402_50V8JC412 100P_0402_50V8J

1 2

C415 100P_0402_50V8JC415 100P_0402_50V8J

1 2

C416 100P_0402_50V8JC416 100P_0402_50V8J

1 2

C417 100P_0402_50V8JC417 100P_0402_50V8J

1 2

C418 100P_0402_50V8JC418 100P_0402_50V8J

1 2

C419 100P_0402_50V8JC419 100P_0402_50V8J

1 2

C413 100P_0402_50V8JC413 100P_0402_50V8J

1 2

C410 100P_0402_50V8JC410 100P_0402_50V8J

1 2

C420 100P_0402_50V8JC420 100P_0402_50V8J

For EMI

Close to JKB

G-Sensor

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Debug/KB

Size Document Number Rev

Date: Sheet of

QFKAA

Thursday, February 16, 2012

32 48

0.2

Power Button

5

SW4

142

3

G

NTC017-DA1J-D160T_4P

5

6

D D

For debug

SW3

142

3

G

NTC017-DA1J-D160T_4P

5

6

+3VL

R395

100K_0402_5%

1 2

ON/OFFBTN#

1

C458

0.1U_0402_25V6

@

2

For EMI request

ON/OFFBTN# 25,31

4

3

2

1

Touchpad Connector

+5VS +5VALW+3VL

JTP

1

2

TP_CLK

TP_CLK31

TP_DATA

TP_DATA31

LID_SW#

LID_SW#31

1 2

R801 0_0402_5%R801 0_0402_5%

1 2

R802 0_0402_5%@R802 0_0402_5%@

BATT_FULL_LED# BATT_CHG_LOW_LED# PWR_SUSP_LED# HDD_LED# WL_BT_LED_R#

WL_BT_LED_R#

BATT_FULL_LED#31

BATT_CHG_LOW_LED#31

PWR_SUSP_LED#31

WL_BT_LED#31

WIMAX_LED#

Mount R802 and un-mount R801 When Wlan LED need Blinking

3

4

5

6

7

8

9

10

11

G1

11

12

G2

12

ACES_50504-0120N-001

@

13 14

WiMAX LED

C C

SATA LED

+3VS

HDD_LED#

R819

12

10K_0402_5%

WIMAX_LED#

R820

10K_0402_5%

WIMAX@

3 4

Q5534B

Q5534B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

6 1

354

Q156B2N7002DW-T/R7_SOT363-6

WIMAX@

6 1

12

5

Q5534A

Q5534A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

1 2

0_0402_5%@

R4534

+3VS

2

Q156A

Q156A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

WIMAX@

2

LED_WIMAX# 26

SATA_LED# 16

Screw Hole

H7

H_3P0

@

1

H2

H1

1

H3

H_4P6

H_4P2

@

H_4P2x4P6

@

1

PTH

H13

H11

H10

H_3P0

@

1

H13

H12

H_3P0

@

1

H14

H_3P0

@

1

VGACPU

H4

H_3P5

@

1

H17

H15

H_3P0

@

1

PCH

H5

H8

H_3P0

@

1

@

1

NPTH

H16

H9

H18

1

H_3P0

@

H_3P0x4P0N

@

H_3P0N

@

1

H19

H_3P0

@

1

PCB Fedical Mark PAD

FD2@FD2

FD3@FD3

FD1@FD1

B B

@

1

FD4@FD4

@

1

ISPD

ZZZ

PCB LA-8862P

PJP1

45@PJP1

45@

PJP1

UH1

HM70R1@UH1

HM70R1@

Panther Point BD82HM70

A A

5

4

3

Panther Point BD82HM70

UH1

HM76R3@UH1

HM76R3@

Panther Point BD82HM76

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.

Compal Secret Data

2010/09/03 2012/12/31

Deciphered Date

2

Compal Electronics, Inc.

Title

TP/PWR/LED/Screw/ISPD

Size Document Number Rev

QFKAA

Thursday, February 16, 2012

Date: Sheet of

33 48

1

0.2

A

+3VALW TO +3VS

+3VALW +3VS

Q29

8

S

D

7

S

D

6

S

D

5

G

D

SI4800BDY_SO8

1 1

1

C465

2

4.7U_0805_10V4Z

1

1 2

2

3 4

1

12

C466

2

0.022U_0402_25V7K

Vgs=10V,Id=9A,Rds=18.5mohm

1

C460 4.7U_08 05_10V4ZC460 4.7U_0805 _10V4Z

C459

C459 1U_0402_6.3V6K

1U_0402_6.3V6K

R412

R412 820K_0402_5%

820K_0402_5%

2

1 2

R409

120K_0402_5%

61

Q10A

2

2N7002DW-T /R7_SOT363-6

R406

470_0805_5%

+VSB

1 2 3

Q10B

5

SUSP SUSP

4

+5VALW

4.7U_0805_10V4Z

B

Q30

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C467

2

1

S

2

S

3

S

4

G

1

C468

2

0.01U_0402_25V7K

+5VALW TO +5VS

Vgs=10V,Id=9A,Rds=18.5mohm

+5VS

4.7U_0805_10V4Z

C462

C461

C461 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

R410

R410 200K_0402_5%

200K_0402_5%

61

Q11A

2

2N7002DW-T /R7_SOT363-6

1

2

+VSB

12

R413

R413 820K_0402_5%

820K_0402_5%

@

1

2

C

+5VS

R407

470_0805_5%

1 2 3

Q11B

5

4

For EMI

2

C822

C821

@

1

0.1U_0402_10V7K

D

+5VALW

R5545

R5545 10K_0402_5%

10K_0402_5%

1 2

PCH_PWR_EN#22,23

PCH_PWR_EN31

PCH_PWR_EN#

12

R5529

100K_0402_5%

13

D

2

G

SB570020110

S

Q5527

2N7002E-T1-E3_SOT2 3-3

E

+1.8VS

R470

R470 470_0805_5%

470_0805_5%

1 2

13

D

Q190

2

SUSP

G

2N7002_SOT23-3

S

Un-used Dual MOS

For S3 CPU Power Saving

VCCP_PWRGOOD39,41

2 2

1 2

R158 220K_0402_5%R158 220K_0402_5%

SUSP

0.75VR_EN

3

Q6B

5

2N7002DW-T /R7_SOT363-6

4

0.75VR_EN 38

SUSP5,9

SUSP#31,3 8,39,40

+5VALW

R422

R422 100K_0402_5%

100K_0402_5%

1 2

SUSP

61

Q6A

2

2N7002DW-T /R7_SOT363-6

+0.75VS

D

S

R421

22_0805_5%

1 2

13

Q189

2

G

2N7002_SOT23-3

+1.05VS_VCCP

R468

R468 470_0805_5%

470_0805_5%

1 2

13

D

Q60

2

SUSP

2N7002_SOT23-3

G

S

+5VS_ODD

R457

470_0805_5%

1 2 61

Q53A

2

ODD_EN#

2N7002DW-T /R7_SOT363-6

3 3

ODD_EN#21

2N7002DW-T /R7_SOT363-6

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

2010/09/03 2012/12/31

Deciphered Date

D

+5VS TO +5VS_ODD

+5VS

+3VS

R441

R441 10K_0402_5%

10K_0402_5%

R440

1 2

354

47K_0402_5%

Q53B

Title

Size Document Number Rev

Date: Sheet o f

+5VS

2

C471

0.1U_0402_10V7K

1

2

C217

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

AO3413_SOT23

Q45

2

C679

Vgs=-4.5V,Id=3A,Rds<97mohm

S

G

D

1 3

1

2 @

@

Compal Electronics, Inc.

DC-DC INTERFACE

QFKAA

Thursday, February 16, 2012

E

2

1

PJ28

PJ28 JUMP_43X79

JUMP_43X79

@

1

2

34 48

+5VS_ODD

C680

C680 1U_0402_6.3V6K

1U_0402_6.3V6K

0.2

A

PL1

HCB2012KF-121T50_0805

1 2

PL2

HCB2012KF-121T50_0805

1 2

12

PC2

100P_0402_50V8J

VMB

12

PC5

PC5 1000P_0402_50V7K

1000P_0402_50V7K

PD2

@PD2

@

PJSOT24CW_SOT323-3

2

3

HCB2012KF-121T50_0805

1

12

1 2

@

PJP1

1 1

2 2

3 3

+

-

SINGA_2DW-0005-B03

@

PJP2

CCM_C250137GR007M262ZR

ADPIN

1

2

3

4

1

2

3

EC_SMCA

3

4

EC_SMDA

4

5

TS_A

5

6

7

12

PC1

1000P_0402_50V7K

1

PD1

@

2

3

PJSOT24CW_SOT323-3

PR10 100_0402_1%PR10 100_0402_1%

PR11 100_0402_1%PR11 100_0402_1%

PR12 6.49K_0402_1%@PR12 6.49K_0402_1%@

PR13 1K_0402_1%@P R13 1K_0402_1%@

PC3

1000P_0402_50V7K

PL3

PL4

PC6

10U_0805_25V6K

+3VL

BATT_TEMPA 31

B

VIN

12

PC4

100P_0402_50V8J

BATT+

12

PC7

0.01U_0402_25V7K

EC_SMB_CK1 31,36

EC_SMB_DA1 31,36

C

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

ADP_I3 1,36

PR2

0_0402_5%

PROCHOT_IN31 VCIN0_PH31

1 2

B+

100K_0402_1%

POK18,37

VL

PR8

PR9

1 2

0_0402_5%

1 2

VSB_N_002

12

PR7

22K_0402_1%

1 2

VSB_N_003

13

D

2

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

G

S

PC10

.1U_0402_16V7K

Please locate these parts Near EC chip

PR1

1 2

1K_0402_1%

PR3

1 2

20K_0402_1%

12

PR6

100K_0402_1%

PQ1

TP0610K-T1-GE3_SOT23-3

S

G

2

PC8

0.22U_0603_25V7K

VSB_N_001

0_0402_5%

1 2

D

13

+VSBP +VSB

PR5

PJP3

2 1

PAD-OPEN 2x2m

+3VL

D

12

PR4

12.1K_0402_1%

12

PH1

100K_0402_1%_TSM0B104F4251RZ

+VSBP

12

PC9

0.1U_0603_25V7K

RTC Battery

PR14

PBJ1

- +

MAXEL_ML1220T10@

SP093MX0000

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

PR14

PR15

1 2

2010/01/232009/01/23

PR15

560_0603_5%

1 2

+RTCBATT

Compal Electronics, Inc.

Title

PWR-DCIN / BATT CONN / OTP

Size Document Number Rev

Date: Sheet of

SAMSUNG

D

35 48Thursday, February 16, 2012

0.2

560_0603_5%

12

A

B

C

D

for reverse in put protectio n

1

D

PQ209

2

SI1304BDL-T1-GE3_SC70-3

G

S

PR225

1 2

1M_0402_5%

1 1

2 2

3 3

1M_0402_5%

TPCA8057-H_PPAK56-8-5

5

12

PC230

2200P_0402_50V7K

PQ203

4

BQ24725_ACDRV_1

1 2 3

Vin Dectector & ILIM

2.4 < Vdetect < 3.15V

Min. Typ Max. H-->L 17.296V L-->H 17.7V

ILIM and external DPM 3A

4 4

PR226

1 2

3M_0402_5%

P1 B+VIN

A

3

P2

PQ205

DMG4406LSS_SO8

1 2

12

PR231@

0_0402_5%

3

12

PC231

0.1U_0402_25V6

12

PR234

PR235

4.12K_0603_1%

8 7 6 5

4

+3VALW

+3VL

ACIN18 ,31

1

2

0.1U_0402_25V6

12

PC238

0.1U_0603_25V7K

PR238 10K_040 2_1%@PR238 10K_0402_1%@

PR239 10K_040 2_1%PR239 10K_0402_1%

PR240 10K_040 2_1%PR240 10K_0402_1%

VIN

PR211

0.01_1206_1%

1 2

PC236

BQ24725_ACP

BQ24725_CMSRC

BQ24725_ACDRV

1 2

PR243

270K_0402_1%

4

3

BQ24725_ACN

BQ24725_ACOK

12

PC235

PC244

0.1U_0402_25V6

B

PL201

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

VIN

2

3

1 12

PR228

PC239

1 2

1U_0603_25V6K

PU200

21

PAD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

BQ24725_VCC

20

VCC

BQ24725RGRR_VQFN20_3P5X3P5

0.1U_0402_25V6

ACDET6IOUT7SDA8SCL9ILIM

12

PR244

BQ24725_ACDET

154K_0402_1%

12

PC246

PR245

66.5K_0402_1%

66.5K_0402_1% 100P_0402_50V8J

100P_0402_50V8J

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC211

@

10U_0805_25V6K

PD230

PD230 BAS40CW_SOT323-3

BAS40CW_SOT323-3

0.047U_0402_25V7K

PC237

1 2

12

10_1206_1%

PR229

2.2_0603_5%

BQ24725_LX

DH_CHG

BQ24725_BST

17

18

19

HIDRV

PHASE

PR246

1 2

100_0402_5%

12

PC245

Please locate the RC Near EC chip 2011-02-22

100P_0402_50V8J

Issued Date

PC214

10U_0805_25V6K

DH_CHG

PR236

PR237

PR241

1 2

150K_0402_1%

12

PC215

@

0.1U_0402_25V6

4

CSOP1SRP

CSON1

0.1U_0603_16V7K

+3VALW

Compal Secret Data

PC216

PC242

12

@

BTST

12

PC213

PC212

10U_0805_25V6K

12

PD231

PD231 RB751V-40_SOD323-2

RB751V-40_SOD323-2

PC205

1 2

BQ24725_REGN

1U_0603_25V6K

16

REGN

15

DL_CHG

LODRV

14

GND

10_0603_1%

1 2

13

SRP

6.8_0603_5%

1 2

12

SRN

11

BQ24725_BATDRV

BATDRV

10

BQ24725_ILIM

12

PC243

PR242

100K_0402_1%

0.01U_0402_25V7K

EC_SMB_CK1 31,35

EC_SMB_DA1 31,35

ADP_I 3 1,35

2009/01/23 2010/01/23

0.1U_0402_25V6

BQ24725_BATDRV

1 2

4.12K_0603_1%

5

PQ201

PQ201 AON7408L

AON7408L

PL202

4.7UH_ETQP3W4R7WFN_5.5A_20%

123

5

4

12

Remember to change PC124 from SE000006S80 to SE025104K80 (2011-02-22)

Deciphered Date

C

BQ24725_LX

PQ202

123

FDMC7692S_MLP8-5

1 2

12

PR206

@

12

PC206

@

4.7_1206_5%

680P_0402_50V7K

PR233

CHG

CSOP1

12

PQ207

DMG4406LSS_SO8

8 7 6 5

BQ24725_BATDRV_1

1

2

PC240

0.1U_0402_25V6

1 2 3

4

PR222

0.02_1206_1%

4

3

CSON1

12

Title

Size Document Number Rev

Date: Sheet of

12

PR232

PC234

@

0_0402_5%

@

0_0402_5%

0.01U_0402_50V7K

12

PC241

0.1U_0402_25V6

12

PC222

PC221

@

10U_0805_25V6K

Compal Electronics, Inc.

PC223

10U_0805_25V6K

PWR-CHARGER

SAMSUNG

D

BATT+

12

PC224

PC225

0.01U_0402_50V7K

2200P_0402_50V7K

10U_0805_25V6K

0.2

36 48Thursday, February 16, 2012

A

B

C

D

E

2VREF_8205

12

PC333

1U_0603_16V6K

1 1

PC338

12

0.1U_0402_25V6

3/5V_B+

PC339

+3VALWP

2200P_0402_50V7K

12

PC340

4.7U_0805_25V6-K

SSM6N7002FU_US6

PC331

PL332

4.7UH_ETQP3W4R7WFN_5.5A_20%

+

220U_6.3V_M

PQ333A

12

1

2

PR336

@

PC336

@

ENTRIP1

61

D

2

G

S

PQ331

AON7408L

12

4.7_1206_5%

SNUB_3V

12

680P_0402_50V7K

N_3_5V_001

5

123

5

123

PQ332

PQ332 FDMC7692S_MLP8-5

FDMC7692S_MLP8-5

5

G

4

ENTRIP2

34

D

PQ333B

SSM6N7002FU_US6

S

PC341

10U_0805_6.3V6M

PC335

0.1U_0402_10V7K

1 2

LX_3V

3/5V_B+

+3VLP

12

PR334

499K_0402_1%

1 2

100K_0402_1%

PR333

1 2

2.2_0402_5%

LG_3V

PR338

B+

2 2

3 3

PL331

HCB2012KF-121T50_0805

1 2

1U_0603_16V6K

PR330

13K_0402_1%

1 2

PR331

20K_0402_1%

1 2

FB_3V

PR337

120K_0402_1%

1 2

ENTRIP2

4

5

6

PU330

25

BST_3V

10

UG_3V

11

12

PC342

PC342 1U_0603_10V6K

1U_0603_10V6K

FB2

P PAD

ENTRIP2

7

VO2

8

VREG3

9

BOOT2

UGATE2

PHASE2

LGATE2

SKIPSEL

EN

14

15

13

3/5V_B+

2VREF_8205

3

TONSEL

12

FB_5V

2

FB1

REF

VIN16GND

17

12

PC360

0.1U_0603_25V7K

PR350

30K_0402_1%

1 2

PR351

20K_0402_1%

1 2

PR357

120K_0402_1%

1 2

ENTRIP1

1

ENTRIP1

24

VO1

23

PGOOD

22

BST_5V

BOOT1

21

UGATE1

20

PHASE1

19

LGATE1

NC18VREG5

RT8205LZQW(2)_WQFN24_4X4

VL

PC359

4.7U_0805_10V6K

UG_5V

LX_5V

LG_5V

PR355

2.2_0402_5%

1 2

3/5V_B+

BST1_5VBST1_3V

12

PC353

0.1U_0402_25V6

0.1U_0402_10V7K

POK 18,35

12

PC355

1 2

PC354

12

PC358

10U_0805_25V6K

2200P_0402_50V7K

FDMC7692S_MLP8-5

PQ352

5

4

5

4

PQ351

PQ351 AON7408L

AON7408L

123

PL352

2.2UH_ETQP3W2R2WFN_8.5A_20%

1 2

12

PR356

@

4.7_1206_5%

SNUB_5V

12

PC356

@

680P_0402_50V7K

+5VALWP

1

+

PC351

2

220U_6.3V_M

PJP333

PR339

100K_0402_5%

PR340

2.2K_0402_1%

EC_ON31

VS_ON31

4 4

A

1 2

PR341

0_0402_5%

1 2

2

12

PC343

4.7U_0805_25V6-K

13

PQ334

PQ334 DRC5115E0L_SOD323-3

DRC5115E0L_SOD323-3

B

1 2

VL

+5VALWP

+3VALWP

PJP352

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP332

PJP332

1 2

PAD-OPEN 4x4m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

(5A,200mils ,Via NO.= 10)

+5VALW

(4A,120mils ,Via NO.= 8)

+3VALW

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

+3VLP

VL +5VL

D

PJP333

2 1

PAD-OPEN 2x2m

PJP353

2 1

PAD-OPEN 2x2m

Title

Size Docum ent Number Rev

Custom

Date: Sheet of

+3VL

Compal Electronics, Inc.

PWR-3.3VALWP/5VALWP

QCLA4 LA-8861P M/B

37 48Thursday, February 16, 2012

E

0.2

5

PL151

HCB1608KF-121T30_0603

B+

D D

+1.5VP

C C

Mode Level +0.75VSP VTTREF_1.5V S5 L off off S3 L off on S0 H on on

Note: S3 - sleep ; S5 - power off

B B

+1.5VP

1 2

PL152

1UH_FDSD0630-H-1R0M-P3_11A_20%

1

+

PC152

2

390U_2.5V_M

PJP152

1 2

PAD-OPEN 4x4m

PJP153

1 2

PAD-OPEN 4x4m

1.5V_B+

12

PC153

PC154

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

12

SNUB_+1.5VP

12

(12A,480mils ,Via NO.= 24)

+1.5V

12

PC157

10U_0805_25V6K

PR156

4.7_1206_5%

FDMC7692S_MLP8-5

PC156

680P_0402_50V7K

4

12

PC158

@

AON7408L

4.7U_0805_25V6-K

PQ151

PQ152

SYSON31

5

123

5

123

4

1 2

PR159

0_0402_5%

1 2

PC155

0.22U_0402_10V6K

+5VALW

5.1_0603_5%

1 2

1U_0603_10V6K

12

BST_1.5V

PR157

PC160

PC163

@PC163

@

0.1U_0402_10V7K

3

PR155

1 2

2.2_0402_5%

DH_1.5V

SW_1.5V

DL_1.5V

20K_0402_1%

1U_0603_10V6K

12

EN_1.5V

PR152

1 2

PC159

1 2

VDD_1.5V

0.75VR_EN34

SUSP#31,34,39,40

BOOT_1.5V

CS_1.5V

+5VALW

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR158

887K_0402_1%

1 2

16

18

17

BOOT

PHASE

UGATE

RT8207MZQW_WQFN20_3X3

S5

PGOOD

TON

8

9

10

TON_1.5V

PR161

@PR161

@

0_0402_5%

12

PR162

0_0402_5%

12

2

20

19

VTT

VLDOIN

VTTGND

VTTSNS

VTTREF

VDDQ

FB

S3

6

7

EN_0.75VSP

12

PC164

@PC164

@

0.1U_0402_10V7K

PU150

PAD

GND

FB_1.5V

21

1

2

3

4

5

VTTREF_1.5V

PR160

PR160 10K_0402_1%

10K_0402_1%

1 2

PR154

10.2K_0402_1%

+1.5V

+1.5VP

12

PC162

PC162 .1U_0402_16V7K

.1U_0402_16V7K

PC260

10U_0805_6.3V6K

1

0.75Volt +/- 5% TDC 0.7A Peak Current 1A

+0.75VSP

12

PC262

PC261

@

10U_0805_6.3V6K

12

PC161

0.033U_0402_16V7K

+1.5VP

PJP76

+0.75VSP

A A

1 2

PAD-OPEN 3x3m

5

(1A,40mils ,Via NO.= 3)

+0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/07/20

Compal Secret Data

Deciphered Date

2012/12/31

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

PWR-1.5VP / +0.75VSP

SAMSUNG

Thursday, February 16, 2012

38 48

1

0.2Custom

5

+3VS

D D

VCCP_PWRGOOD34,41

PR402

60.4K_0402_1%

1 2

PR404

0_0402_5%

SUSP#31,34,38, 40

C C

B B

1 2

PC411

@PC411

@

0.1U_0402_16V7K

12

PR414

PR414 10K_0402_1%

10K_0402_1%

1 2

12

PR401

PR401 100K_0402_1%

100K_0402_1%

TRIP_+1.05VSP

EN_+1.05VSP

FB_+1.05VSP

RF_+1.05VSP

12

PR407

470K_0402_1%

PC413

@PC413

@

1000P_0402_50V7K

1 2

4

PU400

PU400 TPS51212DSCR_SON10_3X3

TPS51212DSCR_SON10_3X3

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

+1.05VSP1 +1.05VSP

PR409

4.99K_0402_1%

VBST

DRVH

SW

V5IN

DRVL

TP

PR408

@PR408

@

1.2K_0402_1%

1 2

12

10

9

8

7

6

11

BST_+1.05VSP

SW_+1.05VSP

LG_+1.05VSP

12

PR405

2.2_0402_5%

1 2

+5VALW

PC410

PC410 1U_0603_10V6K

1U_0603_10V6K

BST1_+1.05VSP

VCCIO_SENSE1

3

PC405

0.22U_0402_10V6K

1 2

UG_+1.05VSP1UG_+1.05VSP

2

PL401

HCB1608KF-121T30_0603

12

PC403

2200P_0402_50V7K

PL402

1 2

HCB1608KF-121T30_0603

12

PC407

PC408

10U_0805_25V6K

PC412

.1U_0402_16V7K

+1.05VSP_B+

12

PC401

5

4

PQ401

PQ401 AON7518

AON7518

123

5

4

PQ402

PQ402 TPCA8059

TPCA8059

123

+1.05VSP

PC401

0.1U_0402_25V6

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

12

PR406

4.7_1206_5%

SNUB_+1.05VSP

12

PC406

680P_0402_50V7K

PJP402

1 2

PAD-OPEN 4x4m

PJP403

1 2

PAD-OPEN 4x4m

10U_0805_25V6K

12

100_0402_1%

+1.05VS_VCCP

1

B+

+1.05VSP

1

+

PC402

2

330U_D2_2.5VY_R15M

PR410

12

VCCIO_SENSE 8

(12A,480mils ,Via NO.= 24)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/07/20

Compal Secret Data

Deciphered Date

2012/12/31

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

PWR-V1.05SP

SAMSUNG

Thursday, February 16, 2012

39 48

1

0.2Custom

A

1 1

PL181

HCB1608KF-121T30_0603

+5VALW

SUSP#31,34,38,3 9

2 2

3 3

1 2

0_0402_5%

PR183

12

PC184

PC184 22U_0805_6.3V6M

22U_0805_6.3V6M

EN_1.8VSP

VIN_1.8VSP

PR184

@PR184

@

47K_0402_5%

B

PU180

SY8033BDBC_DFN10_3X3

PL182

4

10

9

8

5

12

PC187

@

0.1U_0402_10V7K

2

LX_1.8VSP

LX

PVIN

PG

3

LX

PVIN

SVIN

6

FB

EN

TP

NC

7

1

11

PL182

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

12

20K_0402_1%

PR186

4.7_1206_5%

10K_0402_1%

SNUB_1.8VSP

12

PC186

680P_0603_50V7K

PR181

FB_1.8VSP

PR182

C

12

PC188

12

68P_0402_50V8J

PC182

12

PC182

22U_0805_6.3V6M

+1.8VSP

12

PC183

22U_0805_6.3V6M

PJP182

+1.8VSP

1 2

PAD-OPEN 4x4m

D

(3A,120mils ,Via NO.= 6)

+1.8VS

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2012/12/312009/01/23

Title

Size Document Number Rev

Date: Sheet of

PWR-1.8VSP

SAMSUNG

D

40 48Thursday, February 16, 2012

0.2

5

D D

4

3

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

2

VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.8V 1 0 0.725V 1 1 0.675V

1

output voltage adjustable network

PC805

680P_0402_50V7K

1 2

SNUB_+VCCSA

PR801

4.7_1206_5%

+VCCSA_EN

PR805

1K_0402_5%

1 2

PR804

100K_0402_5%

1 2

PL801

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

1 2

SA_PGOOD 31

12

+3VS

1 2

PR806

0_0402_5%

12

PC809

@

0.1U_0402_10V7K

H_VCCSA_VID0 9

H_VCCSA_VID1 9

VCCP_PWRGOOD34,39

PC801

1 2

22U_0805_6.3V6M

+VCCSAP

PC802

1 2

22U_0805_6.3V6M

PL803

HCB1608KF-121T30_0603

+5VALW +VCCSAP

C C

B B

1 2

+VCCSA_PWR_SRC +VCCSA_PHASE

2

12

PC818

PC819

PC817

1

0.1U_0603_25V7K

22U_0805_6.3V6M

2200P_0402_50V7K

PC815

68P_0402_50V8J

+VCCSAP_FB

12

PC820

22U_0805_6.3V6M

PR802

1K_0402_5%

12

1 2

PU801

SY8037BDCC_DFN12_3X3

12

PVIN

11

PVIN

10

SVIN

9

FB

8

VOUT

7

VID1

VID0

GND

13

1

LX

2

LX

3

LX

4

PG

5

EN

6

PC803

1 2

22U_0805_6.3V6M

+VCC_SAP TDC 4.2A Peak Current 6A OCP current 7.2A

PC804

1 2

22U_0805_6.3V6M

PR812

100_0402_5%

12

PR811

0_0402_5%

12

PJP801

1 2

PAD-OPEN 4x4m

+VCCSA_SENSE 9

+VCCSA

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

5

4

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

3

2010/07/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2012/12/31

2

Title

PWR-VCC_SAP

Size Doc ument Number Rev

Date: Sheet of

SAMSUNG

Thursday, February 16, 2012

41 48

1

0.2C

5

PR502

PC502

FBA3

PR503

8.06K_0402_1%

1 2

0.033U_0402_16V7K

PR522

1 2

VGATE18,31

PC502

3300P_0402_50V7K

1 2

PC507

12

PC516

PC516 .1U_0402_16V7K

.1U_0402_16V7K

54.9_0402_1%

1 2

VR_SVID_DAT1

PR527 0_0402 _5%PR527 0_0402_5%

PR548

1 2

10_0402_1%

12

+3VS

12

FB_CPU3

PR551

1 2

8.06K_0402_1%

PR560

1 2

806_0402_1%

FBA1

PR535

PR535 10K_0402_5%

10K_0402_5%

PC531

1 2

0.033U_0402_16V7K

CPU_B+

PR538

1 2

0_0402_5%

PR540

1 2

0_0402_5%

FB_CPU2

PC534

DROOP

10_0402_1%

D D

C C

.1U_0402_16V7K

VR_SVID_DAT8 VR_SVID_ALRT#8 VR_SVID_CLK8

PC523

47P_0402_50V8J

VR_HOT#31

VSSSENSE8

VCCSENSE8

B B

A A

TRBSTA#

PC517

+1.05VS_VCCP

1 2

VCC_AXG_SENSE9

VSS_AXG_SENSE9

12

1 2

+1.05VS_VCCP

PR524

1 2

12

PR534

PR534 75_0402_1%

75_0402_1%

5

130_0402_1%

TRBST#

PR504

806_0402_1%

1 2

PR509

10_0402_1%

1 2

+5VS

VR_ON31

PR528

95.3K_0402_1%

1 2

PR529

1K_0402_1%

PR545

1 2

49.9_0402_1%

12

1000P_0402_50V7K

FBA2

1 2

PR510

1K_0402_1%

2.2U_0603_10V7K

1 2

VSN

12

PC524

PC524 1000P_0402_50V7K

1000P_0402_50V7K

VSP

PR543

1 2

1K_0402_1%

FB_CPU1

PR552

1 2

806_0402_1%

0.033U_0402_16V7K

PC538

1 2

4

680P_0402_50V7K

1 2

1000P_0402_50V7K

PR501

2_0603_5%

1 2

PC501

1 2

0_0402_5%

1 2

12

PC521

0.01U_0402_25V7K

1 2

680P_0402_50V7K

CSREFCSCOMP

4

PC508

PR521

PR526

10K_0402_1%

PC528

PC509 10P_0402_50V8JPC509 10P_040 2_50V8J

PR511

1 2

5.11K_0402_1%

PC513

1 2

6132_VCC

VR_ON_CPU VR_SVID_DAT1 VR_SVID_ALRT# VR_SVID_CLK VBOOT

ROSC_CPU VRMP VR_HOT# VGATE

DIFF_CPU

PC527 22P_0402_ 50V8JPC527 22P_0402_ 50V8J

PR547

6.04K_0402_1%

1 2

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15

12

COMP_CPU1

PC503

.1U_0402_16V7K

1 2

PR505

24K_0402_1%

1 2

COMPA1

2200P_0402_25V7K

60

61

PU500

PAD

VCC VDDBP VRDYA EN SDIO ALERT# SCLK VBOOT ROSC VRMP VRHOT# VRDY VSN VSP DIFF

16

TRBST#

PC529

2200P_0402_50V7K

PR555

1 2

23.7K_0402_1%

3

PUT CLOSE TO GT Inductor

12

PH503

1 2

PC504

PC505

@

560P_0402_50V7K

1500P_0402_50V7K

PR508

165K_0402_1%

PC510

FBA

DIFFA

COMPA

TRBSTA#

IMONAIMONA

54

57

59

58

56

55

FBA

VSPA

VSNA

DIFFA

IOUTA

COMPA

TRBSTA#

NCP6132BMNR2G_QFN60_7X7

CSCOMP22CSP325CSREF24CSSUM

COMP

DROOP21FB

IOUT

ILIM20TRBST#

18

17

19

FB_CPU

DROOP

COMP_CPU

ILIM_CPU

IMONIMON

1 2

12

PR541 21K_0402_1%PR541 21K_040 2_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

1 2

PC536

75K_0402_1%

.1U_0402_16V7K

PH501 220K_04 02_5%_ERTJ0EV224JPH501 220K_0402_5%_ERTJ0EV224J

PUT CLOSE TO VCORE Phase 1 Inductor

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

80.6K_0603_1%

1 2

80.6K_0603_1%

1 2

CSCOMPA

PR516

1 2

21.5K_0402_1%

CSP1A

DROOPA

CSSUMA

ILIMA

52

49

50

48

53

51

47

ILIMA

CSP2A

CSREFA

DROOPA

CSSUMA

CSCOMPA

CSP1

CSP2

TSNS

23

27

29

26

28

TSENSETSENSE CSP2A

PC532

PC532 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PC535 1500P_0 402_50V7KPC535 1500P_0402_ 50V7K

PC537 330P_04 02_50V7K

1 2

PR557

12

Issued Date

3

165K_0402_1%

PR512

SWN2A

PR513

SWN1A

PC512

PC512 1000P_0402_50V7K

1000P_0402_50V7K

PC515

1 2

.1U_0402_16V7K

TSENSEA

46

CSP1A

TSNSA

PWMA

BSTA

HGA SWA

LGA

BST2

HG2

SW2

LG2 PVCC PGND

LG1

SW1

HG1

BST1

DRVEN

PWM

30

PC526

1 2

.1U_0402_16V7K

CSP1 CSP2 CSP3

CSSUM

1 2

@

1 2

165K_0402_1%

45 44 43 42 41 40 39 38 37 36

6132P_VCCP

35 34 33 32 31

PR536

1 2

73.2K_0402_1%

PR558

PH503 220K_0402_5%_ERTJ0EV224J

220K_0402_5%_ERTJ0EV224J

PR506

75K_0402_1%

1 2

12

NTC_PH203

2P: install 1P: @

CSREFA

12

PR514

@PR514

@

0_0402_5%

CSP1A

CSREFA

CSREFA 43

1 2

36K_0402_1%

BST3

BST2

BST1

6132_PWM 43

DRVEN 43

CSREF 43

2009/12/01 2010/12/31

12

PR518

@PR518

@

0_0402_5%

CSP2A

PR520

2P: 36K 1P: 26.1K

PR523

1 2

4.7_0603_5%

HG3 43

LG3 43

PR525

1 2

4.7_0603_5%

HG2 43

LG2 43

1 2

PR530 0_0402_5%PR530 0_04 02_5%

LG1 43

HG1 43

1 2

PR533

4.7_0603_5%

3P: 73.2K 2P: 41.2K

CSP3

PR542

@PR542

@

0_0402_5%

CSREF

CSP2

PR546

@PR546

@

0_0402_5%

CSREF

CSP1

PR553

@PR553

@

0_0402_5%

CSREF

PR554

1 2

160K_0603_1%

PR556

1 2

160K_0603_1%

PR559

1 2

160K_0603_1%

Compal Secret Data

Deciphered Date

PC511

0.047U_0402_16V7K

PR515 5.49K_040 2_1%PR515 5.49K_0402_1%

1 2

PC514

0.047U_0402_16V7K

1 2

6132_PWMA 43

PC518

1 2

BST3_1

PC519

1 2

BST2_1

PC520 2.2U_0603 _10V7KPC520 2.2U_0603_10V7K

1 2

PR532 0_0402_5%PR532 0_04 02_5%

1 2

BST1_1

PC522

0.22U_0402_10V6K

12

PC525

0.047U_0402_16V7K

12

PC530

0.047U_0402_16V7K

12

PC533

0.047U_0402_16V7K

SWN1

SWN2

SWN3

2

1 2

PR519

5.49K_0402_1%

0.22U_0402_10V6K

1 2

PR539

1 2

5.76K_0402_1%

PR544

1 2

5.76K_0402_1%

PR549

1 2

5.76K_0402_1%

2

HF: 1.65K 2P: 1.65K 1P: 1K

SWN1A 43

2P: install 1P: @

SWN2A 43

SW3 43

SW2 43

+5VS

SW1 43

SWN3 43

3P: install 2P: @

SWN2 43

SWN1 43

1

PR507

1 2

1.65K_0402_1%

PC506

1 2

1000P_0402_50V7K

TSENSEA

12

PR517

13.7K_0402_1%

PUT CLOSE TO V_GT HOT SPOT

CSREFACSCOMPA DROOPA

PH504

100K_0402_1%_TSM0B10 4F4251RZ

1 2

+5VS

CSP2A

12

PR531

@PR531

@

0_0402_5%

Option for 1 phase GFX

+5VS

Option for 2 phase CPU

Title

Size Document Number Rev

Custom

Date: Sheet of

12

PR537

@PR537

@

0_0402_5%

CSP3

TSENSE

12

PH502

100K_0402_1%_TSM0B10 4F4251RZ

PR550

1 2

13.7K_0402_1%

PUT CLOSE TO VCORE HOT SPOT

Compal Electronics, Inc.

PWR-CPU_CORE

QCL70

1

2Phase: @ 1Phase: install

3Phase: @ 2Phase: install

42 48Thu rsday, February 16, 2012

0.2

5

4

3

2

1

CPU_B+ CPU_B+

5

4

HG142

D D

C C

SW142

LG142

HG342

SW342

LG342

4

PQ501

AON7518

123

5

4

PQ502

PQ502 TPCA8057

TPCA8057

123

5

4

PQ509

AON7518

123

5

4

PQ506

PQ506 TPCA8057

TPCA8057

123

PQ503

AON7518

@

123

PC549

10U_0805_25V6K

PQ511

AON7518

@

123

12

SNUB_CPU3

12

PC539

10U_0805_25V6K

0.36UH_FDUE1030D-H-R36M=P3_32A_20%

12

PR563

4.7_1206_5%

SNUB_CPU1

12

PC547

680P_0402_50V7K

12

PC550

PC551

10U_0805_25V6K

0.36UH_FDUE1030D-H-R36M=P3_32A_20%

PR568

4.7_1206_5%

PC556

680P_0402_50V7K

PC540

10U_0805_25V6K

12

0.1U_0402_25V6

12

PC542

0.1U_0402_25V6

PL511

134

2

CPU_B+

12

PC552

2200P_0402_25V7K

134

2

12

PC541

2200P_0402_25V7K

PL513

+CPU_CORE +CPU_CORE

PR565

12

0.1U_0603_25V7K

PR569

10_0402_1%

PC553

@PC553

@

12

CSREF 42

SWN1 42

HCB2012KF-121T50_0805

B+

HCB2012KF-121T50_0805

12

+CPU_CORE

SWN3 42

PL516

12

PL517

12

PC554

100U_25V_M

QC 45W CPU VID1=0.9V IccMax=94A Icc_Dyn=66A Icc_TDC=56A R_LL=1.9m ohm OCP~110A

10_0402_1%

V3N_CPU CSREF

HG242

SW242

LG242

CPU_B+

1

+

PC555

@+PC555

@

100U_25V_M

2

DC 35W CPU VID1=1.05V IccMax=53A Icc_Dyn=43A Icc_TDC=33A R_LL=1.9m ohm OCP~65A

4

QC 45W CPU (HF) solution: 3+2 MOS: cpu_core --> Gfx_core -->

QC 45W CPU solution: 3+2 MOS: cpu_core --> Gfx_core -->

DC 35W CPU solution: 2+1 MOS: cpu_core --> Gfx_core -->

5

4

PQ507

PQ505

123

5

PQ504

PQ504 TPCA8057

TPCA8057

123

AON7518

@

123

上上上上

2(AON7518)

上上上上

2(AON7518)

上上上上

1(AON7518)

上上上上

1(AON7518)

上上上上

1(AON7518)

上上上上

1(AON7518)

12

PC543

PC544

10U_0805_25V6K

PL512

0.36UH_FDUE1030D-H-R36M=P3_32A_20%

134

12

2

PR564

4.7_1206_5%

SNUB_CPU2

12

PC548

680P_0402_50V7K

下下下下

1(FDMS0308AS)

下下下下

1(FDMS0308AS)

下下下下

1(FDMS0308AS)

下下下下

1(FDMS0308AS)

下下下下

1(FDMS0308AS)

下下下下

1(FDMS0308AS)

12

PC546

PC545

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

PR566

12

10_0402_1%

CSREFV1N_CPU

SWN2 42

V2N_CPU

12

PC563

10U_0805_25V6K

PL514

QC 45W GT2 VID1=1.23V IccMax=46A Icc_Dyn=37A Icc_TDC=38A R_LL=3.9m ohm OCP~55A

CPU_B+

12

PC564

PC565

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

+GFX_CORE

12

PR581

10_0402_1%

PR584

0_0402_5%

12

DC 35W GT2 VID1=1.23V IccMax=33A Icc_Dyn=20.2A Icc_TDC=21.5A R_LL=3.9m ohm OCP~40A

CSREFA 42

SWN1A 42

B B

6132_PWMA42

PR573

PR575

PR575 0_0402_5%

0_0402_5%

2K_0402_1%

12

VCC_GFX1

12

PR576

PR576 0_0402_5%

0_0402_5%

12

PC567

2.2U_0603_10V7K

DRVEN42

+5VS

A A

BSTA1

1

2

3

4

12

5

PR570

1 2

BSTA1_1

4.7_0603_5%

PC557

PU501

9

BST

FLAG

8

PWM

DRVH

7

EN

SW

6

VCC

GND

5

DRVL

NCP5911MNTBG_DFN8_2X2

5

12

4

0.22U_0402_10V6K

HG1A

SW1AEN_GFX1

LG1A

4

5

4

PQ513

AON7518

123

5

PQ508

PQ508 TPCA8057

TPCA8057

123

4

PQ515

AON7518

@

12

PR580

4.7_1206_5%

SNUB_GFX1

12

PC568

680P_0402_50V7K

12

PC562

10U_0805_25V6K

FDUM0640J-H-R36M=P3

1 2

2Phase: instal l 1Phase:: @

1 2

PR571

4.7_0603_5%

PU502

1

BST

FLAG

2

PWM

DRVH

3

EN

SW

4

VCC

GND

DRVL

NCP5911MNTBG_DFN8_2X2

Compal Secret Data

BSTA2_1

12

9

8

7

6

5

Deciphered Date

2

PC566

0.22U_0402_10V6K

HG2A

SW2A

LG2A

BSTA2

6132_PWM42

DRVEN

+5VS

PR578

PR578 0_0402_5%

0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

3

12

EN_GFX2

PR577

2K_0402_1%

12

VCC_GFX2

PR579

PR579 0_0402_5%

0_0402_5%

12

PC570

2.2U_0603_10V7K

2009/12/01 2010/12/31

5

4

PQ517

AON7518

123

5

4

PQ510

PQ510 TPCA8057

TPCA8057

123

C

Date: Sheet of

10U_0805_25V6K

PQ519

AON7518

@

123

FDUM0640J-H-R36M=P3

12

PR582

4.7_1206_5%

SNUB_GFX2

12

PC569

680P_0402_50V7K

Compal Electronics, Inc.

Title

PWR-CPU_CORE

Size Doc ument Number Rev

QCL70

12

PC558

5

12

PC559

10U_0805_25V6K

PL515

1 2

0_0402_5%

1

PC560

0.1U_0402_25V6

PR585

12

PC561

12

CPU_B+

12

2200P_0402_25V7K

+GFX_CORE

12

PR583

10_0402_1%

43 48Thursday, February 16, 2 012

CSREFA

SWN2A 42

0.2

5

+CPU_CORE

12

PC1101

PC1101 10U_0805_6.3V6M

10U_0805_6.3V6M

D D

12

PC1106

PC1106 10U_0805_6.3V6M

10U_0805_6.3V6M

+CPU_CORE

12

PC1102

PC1102 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1107

PC1107 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1103

PC1103 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1108

PC1108 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1104

PC1104 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1109

PC1109 10U_0805_6.3V6M

10U_0805_6.3V6M

+CPU_CORE

1

PC1111

PC1111 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1116

PC1116 22U_0805_6.3V6M

22U_0805_6.3V6M

2

C C

1

PC1121

PC1121 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1112

PC1112 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1117

PC1117 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1122

PC1122 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1113

PC1113 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1118

PC1118 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1123

PC1123 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1114

PC1114 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1119

PC1119 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1124

PC1124 22U_0805_6.3V6M

22U_0805_6.3V6M

2

4

12

PC1105

PC1105 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1110

PC1110 10U_0805_6.3V6M

10U_0805_6.3V6M

1

PC1115

PC1115 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1120

PC1120 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1125

PC1125 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1126

PC1126 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+GFX_CORE

22U_0805_6.3V6M

PC1151

1

2

22U_0805_6.3V6M

PC1159

1

2

+CPU_CORE

1

+

PC1127

PC1127 330U_D2_2V_Y

330U_D2_2V_Y

2

3

+GFX_CORE

22U_0805_6.3V6M

PC1153

PC1154

1

2

1

2

22U_0805_6.3V6M

PC1161

1

+

2

PC1154

1

2

22U_0805_6.3V6M

PC1162

1

2

PC1128

PC1128 330U_D2_2V_Y

330U_D2_2V_Y

PC1152

22U_0805_6.3V6M

PC1160

2

1

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

22U_0805_6.3V6M

PC1155

1

2

22U_0805_6.3V6M

PC1157

PC1156

PC1158

1

2

Socket Top

5 x (0805) no-stuff sites

7 x 22 µF (0805) 2 x (0805) no-stuff sites

+1.05VS_VCCP

22U_0805_6.3V6M

330U_D2_2V_Y

1

PC1164

+

2

1

+

PC1129

PC1129 330U_D2_2V_Y

330U_D2_2V_Y

2

22U_0805_6.3V6M

1

+

PC1131

PC1131 330U_D2_2V_Y

330U_D2_2V_Y

2

22U_0805_6.3V6M

1

PC751

PC752

2

330U_D2_2V_Y

1

PC1166

PC1165

+

2

1

+

PC1130

PC1130 330U_D2_2V_Y

330U_D2_2V_Y

2

22U_0805_6.3V6M

1

PC753

2

22U_0805_6.3V6M

1

PC755

PC754

PC756

2

22U_0805_6.3V6M

1

PC758

PC757

2

22U_0805_6.3V6M

PC762

1

2

22U_0805_6.3V6M

1

PC759

PC761

PC760

2

330U_D2_2V_Y

1

PC765

PC763

+

2

Chief River 330uF*9m 470uF*4.5m 22uF 10uF

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2008/09/15 2012/12/31

3

Compal Secret Data

Deciphered Date

8layer for DC CPU

8layer for QC CPU

6layer for DC CPU

6layer for QC CPU

GFX_CORE DC

GFX_CORE QC

1.05V_VCCP

2

16

4

5

4

1

2

3

2

Compal Electronics, Inc.

Title

PWR - PROCESSOR DECOUPLING

Size Document Number Rev

Date: Sheet of

QCLA4 LA-8861P M/B

1

10

16

10

16

10

16

10

12

44 48Thursday, February 16, 2012

0.2

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------

1. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Change PU330 to RT8205L Change source

2. 2011/09/29 P53-PWR_ +1.05VS_VCCP/+16VSP Change PU400 to RT8237C Change source

3. 2011/09/29 P54-PWR_+VCCSAP/1.8VSP Change PU450 to SY8037B Change source

4. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change HMOS to MDV1525 Change source

5. 2011/09/29 P53-PWR_ +1.05VS_VCCP/+16VSP Change HMOS to MDV1525 Change source

6. 2011/09/29 P49-PWR_BATTERY CONN / OTP Change PD5,PD6 to SCA00001G00 ESD team request

7. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR589 from 348 to 8.06k FAE suggestion

8. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR590 from 3.65k to 806 FAE suggestion

10. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC574 from 680P to 0.033u FAE suggestion

11. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC577 from 4700P to 0.033u FAE suggestion

12. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR548 from 1.21k to 8.06k FAE suggestion

13. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR550 from 10.7k to 806 FAE suggestion

14. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC547 from 680P to 0.033u FAE suggestion

15. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC551 from 4700P to 0.033u FAE suggestion

16. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Add snubber and boost resistor For 3x3 H-MOS solution

17. 2011/09/29 P49-PWR_BATTERY CONN / OTP Add PR22 30k,PR27 100k, PR32 0 Ohm For 120W adapter protect(9012)

18. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Change PC360 to SE000006R80 Change source

19. 2011/09/29 P49-PWR_BATTERY CONN / OTP Add PR17 14k, PR33 0 Ohm For CPU temperature protect(9012)

20. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Add PR373 0 Ohm For 3/5V always power on(9012)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Custom

Power PIR

QFKAA

45 48Thursday, February 16, 2012

0.2

5

HW PIR (Product Improve Record)

QCLA4,5 LA-7201P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1 GERBER-OUT DATE: 2011/12/30 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

D D

7

27 For support RPM FANChange PCH_PWR_EN from UB1.70 to UB1.68 and add UB1.70 EN_DFAN111/28 35 28 For no support PWM FANDelete C1~4,R1~2,D1 and UB1.26 FANPWM11/28 5,35

C C

29 For no support S&CDelete S&C schematic11/29 25 30 For no support external USB3.0 host ICDelete USB3.0 Host schematic11/29 31,32 31 For change tolerancechange R409 from 120K_1% to 120K_5%11/30 38

37 12/02 35 For delete EC930 schematicDelete CPSETIN 38 12/02 16 For non-rechargeable RTC schematicAdd JRTC,CH9,DH8,DH9,R227

B B

68 Change UH1 P/N to SA00005FH3016~2412/15 For update UH1 P/N 69 Change CR40 P/N to SF000002Y003012/15 For layout limitation 70 Delete RA533312/15 For common design 71 Delete C381~42512/15 For placement update 72 Delete RR23~24,CR26,RR36~37,CR293012/15 For connect GND directly

A A

3311/24 Change P33 ALC280 schematic to ALC259 schematic. Fo r audio function1 3411/24 Change JEXMIC.4 JACK_SENSE to MIC_SENSE. For audio function2

3511/24 Delete UB3,RB26,CB18,RH296 For delete CIR function3 6,13,2111/24 Delete QC1,RC4,C261,U17,R147,R103,R360,R392,R390,R1441~1442,R361,R106,RH304 For LVDS only4 6,13,1711/24 Delete Q23,C293,R62,R389,R120,R79,R97,L60,R262~265,R299~300,RH275,R1440 For LVDS only5

6,1311/2 4 Delete CPU_EDP_HPD,+LCD_VDD_R,+PANEL_VDD,LVDS_ENVDD,+3VS_LVDSDDC For LVDS only6

1311/24 Delete D15 BOM structure and JLVDS.10 connect to +3VS For LVDS function

1311/24 Add J17 connector and change JLVDS from 40 to 30 pin connector. For LVDS function8

2011/24 Delete USB20_N13,USB20_P13 For no Glasses free 3D Panel9

1311/24 Change RC82 BOM structure from IEDP@ to @. For LVDS function10

5,1711/2 4 Change RC157,RC158,RH119,RH203 BOM structure from LVDS@ to mount. For LVDS function11

1711/24 Delete CLK_CPU_EDP#,CLK_CPU_EDP12 For LVDS only

1511/24 Delete CEC schematic and JHDMI.13 HDMI_CEC net13 For no CEC support

1511/24 Delete R570,D55 and change U9.4 HDMI_HPD_R to HDMI_HPD For HDMI HPD14

1515 For HDMI signalChange L8~11 to SM070001U0011/25

1511/25 Delete U9.5 from +5VL to +5VS For HDMI HPD16

3311/25 Change Audio codec schematic For ALC259-VC217

17,2911/25 Delete CH16,CH18,card reader schematic For RTS512918

2611/25 Delete FP & B-CAS schematic For no support FP & B-CAS function19

35,3711/25 Delete JFUN,R8,R1466~1467,D90 For no support JFUN20

20,2711/25 Delete USB20_N10,USB20_P10,USB20_N12,USB20_P12 For no support TV tuner & 3G21

2711/25 Delete RH181 & 3G,B-CAS,JET schematic For no support TV tuner & 3G22

16,2711/25 Delete mSATA schematic For no support mSATA function23

2711/25 Delete RCL3,271@ component and net OSC_IN_R_R,OSC_IN_R For no support S&M function24

611/25 Change RC3 from 1Kohm to 10Kohm (SD028100280) For no support eDP function25

3511/25 Delete UB1.89 HDPACT,UB1.86 HDPLOCK,UB1.68 HDPINT For no support G-SENSOR function26

change DH1 from @ to NOGCLK@ For BOM control34 1612/01 Add SW4 For Debug35 3712/01 Delete U21,C453,C452 For LID on small board3612/0136

12/0239 36 For non-keyboard led schematicDelete JBLG schematic

12/06 12/06 12/07

Modify JKB pin define For meet SS KB Matrix3640 12/05 Change location from J17 to JLVDS1 For location naming 1312/0541 Delete UB1.85 SM_SENSE# For no support S&M3512/0642 Modify JUSIO pin define For small board connect2543 Delete R425 and 0.75VR_EN# For Power circuit connect3844 Add JODDB For 15" ODD connector2545 Change U9.5 connect from +5VS to +HDMI_5V_OUT For prevent leakage issue1546 12/07 Change JCRIO pin define2947 12/08 For small board connect Change UH1.K1 and RH180.2 from BT_ON# to PCH_GPIO342112/12 For common GPIO pins on EC side48 UB1.18 and RB11 connect to BT_ON#3512/12 For common GPIO pins on EC side49 Delete PWR_ON_LED# net25,35,3712/12 For common GPIO pins on EC side50 Change JUSIO pin define2512/12 For LED behavior51 Delete CH9,DH8,DH9,R277,JRTC1612/12 For RTC change to rechargeable52 Delete Q51 and change PCH_WL_BT_LED to PCH_GPIO692112/13 For change WL_BT_LED# to EC GPIO53 UB1.21 connect WL_BT_LED#3512/13 For change WL_BT_LED# to EC GPIO54 Change Q156B.3 from WL_BT_LED# to WIMAX_LED# and connect to R8023712/13 For WLAN LED behavior55 Delete UB1.127 (USB_OC#0) and UB1.17 (USB_OC#1)3512/13 For no support USB S&C56 Add TPM schematic20,2912/13 For TPM function57 Delete Q362712/13 For change BT_ON# to EC GPIO58 Change JCRT,JUSBA,JUSBB,JTP symbol14,30,3712/13 For connector list update59 Change JUSIO,JCRIO symbol25,2912/13 For connector list update60 Change UCL1 to SLG3NB244VTR2712/14 For green clock61 Change UT1.5 and RT7.1 net from +3VALW to +3VALW_PCH2912/14 For ErP Lot6 function62 Add RH181 and connect ISDBT_DET, delete RH2972112/14 For no support TV tuner63 Change RH194 from 100K 5% to 10K 5%2112/14 For update resistor value64 Change RH315.2 connect +3VS and BOM structure to mount2112/14 For update resistor value65 Change ZZZ P/N to DA60000T60066 For update PCB P/N12/14 37 Move D89 to TP small board67 For Move to TP small board12/14 37

Delete CC67912/1573 For not reserve Delete T67~T691612/1974 For not reserve Change YT1 form SJ132P7KW10 to SJ100004Z00 (small package)2912/19 For change to small size75 Change CT2, CT3, CT4, CT5 from SE095104K80 to SE102104K002912/19 For BOM reduce76 Change JCRIO to SP010015H002912/19 For follow connector list77 Delete JLVDS.28 (+LCD_INV)1312/20 For prevent issue78 Modify H1~H173712/20 For Update screw hole79

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

For change tolerancechange RA17 from 0_1% to 0_5%11/30 3332 For reduce circuitDelete R260 and short directly11/30 1333

Compal Secret Data

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Custom

QCLA4,5 LA-8862P M/B

HW-PIR

1

0.2

46 48Thursday, February 16, 2012

1

0.2

5

HW PIR (Product Improve Record)

QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1 GERBER-OUT DATE: 2011/12/30 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

85 12/20 17 Change CLKREQ_CR#,CLKREQ_USBA30#,CLKREQ_USB30# to PCH_GPIO25, 26, 44 For design change

D D

86 12/20 20,23 Change CH104 to 100p and CH71 to 0402 For design change 87 12/20 27,35 Change BT_ON# netname to BT_ON and UA4 to UM4 For design change 88 12/20 27 Modify LED_WIMAX# to 100k +5VS pull high & 200k pull low For design cha nge 89 12/20 35 Delete CB13 For design change 90 12/20 33 Change CA3,CA46,CA36 to 0805_6.3V6M 91 12/20 38 Delete R5534 and short directly For design change 92 12/20 37 Changr R819 from +5VS to +3VS For design change 93 12/20 5,25 Changr C13,C17,C356, C355,C354 to 0805_6.3V6M and unmount C354 For cost down 94 12/20 35 Delete UB2,CB17,RB25 and connect UB1.127 to PM_SLP_S4#, UB1.14 to PM_SLP_S5# For cost down

C C

B B

QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2012/01/10 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

A A

3512/20 Change UB1.68 (PCH_PWR_EN) to UB1.107 For EC common80

3512/20 For Update screw hole81 Change UB1.73 (UMA_ENBKL) to UB1.76

Change RH198 from 100k to 10k2112/20 For follow Intel checklist82 Change UC1.5 from +3VALW to +3VALW_PCH0512/20 For design change83 Modify SATA_LED# to10k (RH29) +5VS pull high & 20k (RH35) pull low1612/2084 For design change

12/20 35 Delete RB24,RB28,RB4,RB5,RB7,R37 and change UB1.119,117,75,64,27,16 to NC For cost down95 12/21 28 Change symbol from SP021105131 For apply symbol96 12/21 35 Change TP_CLK,TP_DATA pull high to +5VS For TP spec97 12/21 13 Unmount D84 For reserve98 12/22 Swap L9,L11,LR1,LR2,L53,L54 signal For swap signal99 15,25,30 12/22 Swap U3TXDP1_R_L and U3TXDN1_R_L, swap U3RXDP1_R_L and U3RXDN1_R _L For swap signal100 30 12/23 Change F1,F2 to SP040003A00 For component common101 14,15 12/24 Change RR66~67 to mount, LR9 to unmount For choke reserved29102 12/24 Cancel H6, H17 (FAN stand-off) and change H4 to H_3P3 (VGA) For ME drawing update37103 12/24 Change PJ29 from JUMP_43X118 to JUMP_43X39 For layout concern28104 12/24 Delete R105, add PJ30 to contact +3VS & +3V_WLAN For no support AOAC function38105 12/26 Update JDB symbol and modify pin define For connector list update and pin define for customer's request36106 12/26 Delete RH282, change RH116 to mount, JLVDS1.2 contact LVDS_SEL For update pin define and BOM reduce13,17107 12/26 JLVDS1.1&11&12 contact GND For LVDS cable smooth route and BOM reduce13108 12/26 Move RA32 & RA33 to Audio/B For AMIC function33109 12/26 JCRIO.11 contact SENSE_A, JCRIO.12 contact INT_MIC For AMIC function29110 12/26 Swap JKB connector pin define For latest keyboard spec36111 12/26 Swap LR9 pin define For layout concern29112 12/27 Swap JCRIO pin define For layout concern29113 12/27 Update JTP pin define For PIN define rule37114 12/27 Update TPM schematic For co-lay SLB9635 and SLB965529115 12/27 Add CL35 and un-mount For EMI request28116

Change CIR_EN# to PCH_GPIO39 and ISDBT_DET to PCH_GPIO4812/27117 21 For schematic update Change HDD2_DET# to PCH_GPIO57 and LNB_EN to PCH_GPIO7012/27118 21 For schematic update Change 3D_DET# to PCH_GPIO7112/27119 21 For schematic update Add S&C schematic12/27120 20,30,35 For reserve S&C schematic Add Analog MIC schematic12/27 33 For Analog MIC121

Change CL63 from SE120102K80 to SE120102K9002/06 28 For sourcer suggest ion16 Change H18,H19 to H_3P0N02/06 37 For ME drawing update17 Change UH1.T7 from HDMI_HPD to CHP3_SERDBG02/08 21 For Eureka Serial POST GPIO18 Change RH292 from 10Kohm to 1Kohm and delete T6602/08 21 For Eureka Serial POST GPIO19 Change UH1.T7 from HDMI_HPD to CHP3_SERDBG and connect to JCRT.402/08 21 For Eureka Serial P OST GPIO20

5

4

3

2

1

For cost down

For vendor recommendation2812/27 Change RL8.2 from LAN_X1 to LAN_X2122 For Ivy/Sandy bridge M1/M3 co-lay solution11,2112/27 Add D54,RH210,RH100,QC9 and delete RC117,RC118123 For Ivy/Sandy bridge M1/M3 co-lay solution1112/27 Change QC7,QC8 to always mount124 For intel S3 power reduce sequence between +1.5VS_CPU and +0.75VS3812/27 Change R158 from 100Kohm to 220Kohm125 For audio sense A pin3312/27 Add CA64 0402 cap @ on SENSE_A126 For S&C function3012/28 Change R569 to PJ31127 For prevent abnormal turn on3012/28 Add RH4,CH80128 For prevent abnormal turn on and do soft start3012/28 Add CH99,CH102 and delete CH97129 For prevent abnormal turn on and do soft start3812/29 Change R5545 from 100k to 10k130 For update transformer P/N2801/03 Change UL3,UL4 from SP0 50006N00 to SP050005Z00131 For TPM firmware update2901/03 change UT1 P/N from SA00000GG40 to SA00000GG60.132 For TPM firmware update2701/03 change R1456,R1457,C907,C908,Q210 to @133

For power saving2802/01 Add PJ32 and connect +3VALW_PCH & +3V_LAN1 For change pin define2902/02 Change JCRIO.2 to connect MIC_SENSE and JCRIO.1 to connect NBA_PLUG2 For sense A circuit3302/02 Delete sense_A off page,CA64 and add RA32,RA333 For connector list3702/02 Change JTP from SP010015H00 to SP01001BF104 For connector list3302/02 Add JMIC connector SP02000RO005 For connector list2702/02 Change JWLAN from SP07000JP00 to SP07000TB006 For component reduce3802/02 Change Q44A to Q6B and delete Q447 For common design1602/02 Delete T67~698 For WLAN Power on/off and WLAN reset3502/03 UB1.38 connect AOAC_WLAN_PWR_EN# and UB1.91 connect WLAN_RST#9 For WLAN Power on/off and WLAN reset2702/03 Change R1456,R1457,C907,C908,Q210 to mount10 For WLAN Power on/off and WLAN reset2702/03 change R1457.1 to connect AOAC_WLAN_PWR_EN#11 For WLAN Power on/off and WLAN reset2702/03 Change JWLAN.22 to connect WLAN_RST#_R12 For WLAN Power on/off and WLAN reset2702/03 Change C260,CM7,CM8,CM9,C254 to connect +1.5VS_WLAN13 For WLAN Power on/off and WLAN reset2702/03 ADD PJ33 (PJ33 don't short),UM5,RM19,RM21 and +1.5VS_WLAN (power)14 For WLAN Power on/off and WLAN reset2702/03 Change UM4.1 to connect AOAC_WLAN_PWR_EN#15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Custom

QCLA4,5 LA-8862P M/B

HW-PIR

0.2

47 48Thursday, February 16, 2012

1

0.2

5

QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2012/01/10 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

22 For ESD request1502/09 Add D94~D96 on HDMI signal 23 For ESD request2702/09 Add D99,D100 on LAN signal 24 For ESD request1402/09 DEL D3~D5 and add D97,D98 on CRT signal 25 For DS3 function reserve 7,3102/09 Add RC74 and net DRAMRST_CNTRL_EC connect RC74.1 & UB1.89 26 For reduce SATA signals reflection 2502/09 Add R79~82

D D

27 For thermal issue1102/14 Change CD7 from SF000002O00 (H=5.9) to SF000002Z00 (H=4.4)

C C

Add TL1 test point02/08 27 For LAN FAE suggestion21

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Custom

QCLA4,5 LA-8862P M/B

HW-PIR

0.2

48 48Thursday, February 16, 2012

1

0.2

COMPAL LA-8862P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual