Page 1
Vinafix.com
A
COMPAL CONFIDENTIAL
B
C
D
E
1 1
PCB NO :
BOM P/N :
LA-8831P
TBD
MODEL NAME :
QCZ00
GPIO MAP:
2 2
Fei Dao 14 UMA
Ivy Bridge + Panther POINT
2012-09-13
REV : 1.0(A00)
@ : Nopop Component
3 3
CONN@ : Connector Component
MB Type BOM P/N
M/B SPI ROM
TAA SPI ROM
5@
6@
TPM ROM TPM@
DTP ROM DTP@ w/o TPM + w/ TAA
w/ eSATA Redriver
w/o eSATA Redriver
4 4
MB SPI ROM part X76@
7@
8@
XDP(ITP) select XDP@
HDMI Royalty@
HDMI Royalty@
Part Number
Part Number
RO0000002HM
RO0000002HM
A
Description
Description
HDMI Royalty
HDMI Royalty
B
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
MB Type BOM config
w/ TPM + w/o TAA
w/o TPM + w/o TAA
w/ TPM + w/ TAA
TPM@+5@+X76@
DTP@+5@+X76@
TPM@+6@
DTP@+6@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-8831P
LA-8831P
LA-8831P
1.0
1.0
1 61Thursday, September 13, 2012
1 61Thursday, September 13, 2012
1 61Thursday, September 13, 2012
E
1.0
Page 2
Vinafix.com
Block Diagram
A
B
C
D
E
Memory BUS (DDR3)
1600MHz
1 1
Ivy Bridge
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
LVDS CONN
PAGE 24
CRT CONN
PAGE 23
LVDS
VGA
HDMI CONN
PAGE 25
2 2
DPB
ULV BGA CPU
FDI
Lane x 8
INTEL
Panther POINT-M
PAGE 6~11
DMI
Lane x 4
BGA
PAGE 14~21
SDXC/MMC
PAGE 33 PAGE 33
Card reader
O2 Micro OZ600FJ0
PCIE x1
SPI
PCI Express BUS
PCIE2
Half Mini Card
WLAN
PAGE 34 PAGE 34 PAGE 32
3 3
USB
PCIE1
Full Mini Card
WWAN
USB
Option
SSX44B
TAA
LPC BUSChina TPM1.2
W25Q64CVSSIG
PAGE 14
64M 4K sector
W25Q32BVSSIG
Discrete TPM
AT97SC3204
CPU ITP Port
PCH ITP Port
PAGE 7
PAGE 14
Thermal Sensor
WiFi ON/OFF
IO/B
DC/DC Interface
4 4
FAN
PAGE 22 PAGE 40
EMC4021
PAGE 22
Power On/Off
SW & LED
PAGE 43
A
B
BC BUS
PAGE 32
SMSC KBC
MEC5055
TP CONN
32M 4K sector
PAGE 41
C
PAGE 14
SMSC SIO
ECE5048
BC BUS
Smart Card Module
Trough LVDS Cable
USB
PCI Express BUS
HD Audio I/F
SATA 3.0
Full Mini Card
mSATA
PAGE 39
PAGE 30
Camera
PAGE 24
BT 4.0
PAGE 41
SLG55584AVTR
USB POWER SHARE
Fingerprint
CONN
PAGE 36
PAGE 30
HDA Codec
92HD93B2
PAGE 34
D
Smart CardOZ77CR6LN
FP Module
INT.Speaker
PAGE 29
Combo Jack
Dig.
MIC
Trough LVDS Cable
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SATA 2.0
Redriver
PS8513BTQFN20GTR2-A0
E-SATA
USB30
USB30
USB30
USB3.0/2.0
USB3.0/2.0
USB3.0/2.0+PS
Intel Lewisville
82579LM
Transformer
PAGE 29
PAGE 38
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
UMA Block Diagram
UMA Block Diagram
UMA Block Diagram
LA-8831P
LA-8831P
LA-8831P
RJ45
PAGE 38
E
PAGE 37
PAGE 37
PAGE 37
PAGE 36
PAGE 36
PAGE 31
PAGE 38
2 61Thursday, September 13, 2012
2 61Thursday, September 13, 2012
2 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 3
Vinafix.com
5
4
3
2
1
POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP
S3#
HIGH
LOW HIGH HIGH
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP
A#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
USB 3.0 PORT#
1
2
3 JESA1 (Back side)
4
Connetion
JUSB1 (Right side)
JUSB3 (Left side)
NA
PCH
USB PORT#
0
1
2
3
4
5
6
7
JUSB1 (Right side )
JUSB3 (Bot side)
Top side E-SATA (Back side)
WLAN
WWAN
Smart Card
DESTINATION
8
PM TABLE
C C
power
plane
State
S0
S3
+PWR_SRC_S
+5V_ALW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
+1.5V_MEM
ON ON
ON
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
mSATA
NA
NA
NA
ESATA
NA
9
10
11
12
13
Blue Tooth
Camera
Finger Print
S5 S4/AC
S5 S4/AC don't exist
B B
ON
OFF
OFFOFF
OFF
OFF
ON
need to update Power Status
and PM Table
A A
OFF
OFFOFF
UMA DP/HDMI Port
Connetion
Port B MB HDMI Conn
Port C
Port D
NA
NA
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6 MMI
Lane 7
Lane 8 None
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
None
None
MINI CARD-3 mSATA
10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-8831P
LA-8831P
LA-8831P
3 61Thursday, September 13, 2012
3 61Thursday, September 13, 2012
3 61Thursday, September 13, 2012
1
1.0
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Page 4
Vinafix.com
5
4
3
2
1
EN_INVPWR
D D
ADAPTER
1.05V_0.8V_PWROK
+PWR_SRC
BATTERY
C C
CHARGER
FDC654P
(Q21)
ISL95836
(PU700)
+BL_PWR_SRC
+VCC_GFXCORE
ALWON
RT8205
(PU100)
+5V_ALW
MCARD_MISC_PWREN
SI3456
(Q42)
+3.3V_FLASH
MCARD_WWAN_PWREN
SI3456
(Q40)
+3.3V_WWAN
+3.3V_ALW
SIO_SLP_S3#
ISL95836
(PU700)
B B
TPS51212
(PU500)
TPS51212
(PU400)
RT8207
(PU200)
DDR_ON
SY8033
(PU300)
1.05V_VTTPWRGD
TPS51461
(PU600)
AUX_EN_WOWL
SI3456
(Q38)
PCH_ALW_ON
SI3456
(Q49)
SIO_SLP_LAN#
SI3456
DMN3030LSS
(Q34) (Q61)
SIO_SLP_S3#
SIO_SLP_S3#
DMN3030LSS
(Q55)
SIO_SLP_A#
SI3456
(Q58)
(QC3)
+1.5V_MEM
NTGS4141NAO4728
(Q59)
SIO_SLP_S3#
0.75V_DDR_VTT_ON
+1.8V_RUN
+VCC_SA
+3.3V_WLAN
+3.3V_ALW_PCH
+3.3V_LAN
+3.3V_RUN
+3.3V_M
+5V_RUN
1.05V_0.8V_PWROK
+VCC_CORE
CPU_VTT_ON
SIO_SLP_A#
+1.05V_RUN_VTT +1.05V_M
SIO_SLP_S3#
CPU1.5V_S3_GATE
SI4164
(Q63)
A A
+1.5V_CPU_VDDQ
+1.5V_RUN +0.75V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
+1.05V_RUN
5
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-8831P
LA-8831P
LA-8831P
4 61Thursday, September 13, 2012
4 61Thursday, September 13, 2012
4 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 5
Vinafix.com
5
4
3
2
1
202
200
202
200
2.2K
2.2K
53
51
53
51
30
32
+3.3V_RUN
DIMMA
DIMMB
IDP1
IDP2
WWAN
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
D D
SMBUS Address [0x9a]
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
B4
A3
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
CAP_SMB_CLK
CAP_SMB_DAT
+3.3V_ALW_PCH
C8
G12
E14M16
SML1_SMBDATA
SML1_SMBCLK
C C
3A
B6A5
3A
1A
1A
@
@
2.2K
2.2K
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_RUN
2N7002
2N7002
SMBUS Address [C8]
7
Cap Sensor
8
CONN
SMBUS Address [0x81]
2.2K
2.2K
B5
A4
LCD_SMBCLK
LCD_SMDATA
2.2K
1B
1B
2.2K
1C
A56
B59
A7
B7
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
BAY_SMBCLK
BAY_SMBDAT
1C
KBC
B B
2D
2D
+3.3V_ALW
+3.3V_ALW
100 ohm
100 ohm
+3.3V_ALW
7
6
BATTERY
CONN
SMBUS Address [0x16]
2.2K
B49
2.2K
B48
GPU_SMBCLK
GPU_SMBDAT
2A
2A
+3.3V_ALW
MEC 5055
2.2K
B50
1G
A A
5
1G
CHARGER_SMBCLK
A47
CHARGER_SMBDAT
2.2K
4
+3.3V_ALW
10
9
Charger
SMBUS Address [0x12]
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-8831P
LA-8831P
LA-8831P
5 61Thursday, September 13, 2012
5 61Thursday, September 13, 2012
5 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 6
Vinafix.com
5
PEG_RCOMPO (G4)
PEG_ICOMPI (G3)
Trace length
D D
DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
C C
B B
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>
FDI_FSYNC0< 16>
FDI_FSYNC1< 16>
FDI_INT<16>
FDI_LSYNC0<16>
FDI_LSYNC1<16>
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
Max is 500 mils
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
PEG_ICOMPO (G1)
P10
P11
W11
AA6
AC9
W10
AA7
AA3
AC8
AA11
AC12
U11
AA10
AG8
AF3
AD2
AG11
AG4
AF4
AC3
AC4
AE11
AE7
AC1
AA4
AE10
AE6
4
U1A
U1A
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
FDI0_TX#[1]
W1
FDI0_TX#[2]
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
FDI1_TX#[3]
U6
FDI0_TX[0]
FDI0_TX[1]
W3
FDI0_TX[2]
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD#
eDP_AUX#
eDP_AUX
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
3
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC1.
(2)PEG_ICOMPO use 12mil connect to RC1
R_COMP place close to CPU
width 4 mils
width 12 mils
DMI Intel(R) FDI
DMI Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
R_COMP
VCC_IO
PEG_COMP
G3
G1
G4
H22
J21
B22
PEG_ICOMPI and RCOMPO signals should be short ed and routed
D21
A19
with - max leng th = 500 mils - typical impeda nce = 43 mohms
D17
PEG_ICOMPO sign als should be r outed with - ma x length = 500 mils
B14
- typical imped ance = 14.5 moh ms
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
+1.05V_RUN_VTT
24.9_0402_1%~D
24.9_0402_1%~D
12
RC1
RC1
PEG Compensation
2
U1I
U1I
BG17
VSS[181]
BG21
VSS[182]
BG24
VSS[183]
BG28
VSS[184]
BG37
VSS[185]
BG41
VSS[186]
BG45
VSS[187]
BG49
VSS[188]
BG53
VSS[189]
BG9
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
VSS[204]
D50
VSS[205]
D54
VSS[206]
D58
VSS[207]
D6
VSS[208]
E25
VSS[209]
E29
VSS[210]
E3
VSS[211]
E35
VSS[212]
E40
VSS[213]
F13
VSS[214]
F15
VSS[215]
F19
VSS[216]
F29
VSS[217]
F35
VSS[218]
F40
VSS[219]
F55
VSS[220]
G51
VSS[221]
G6
VSS[222]
G61
VSS[223]
H10
VSS[224]
H14
VSS[225]
H17
VSS[226]
H21
VSS[227]
H4
VSS[228]
H53
VSS[229]
H58
VSS[230]
J1
VSS[231]
J49
VSS[232]
J55
VSS[233]
K11
VSS[234]
K21
VSS[235]
K51
VSS[236]
K8
VSS[237]
L16
VSS[238]
L20
VSS[239]
L22
VSS[240]
L26
VSS[241]
L30
VSS[242]
L34
VSS[243]
L38
VSS[244]
L43
VSS[245]
L48
VSS[246]
L61
VSS[247]
M11
VSS[248]
M15
VSS[249]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
VSS
VSS
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
NCTF
NCTF
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
G48
A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61
1
T110 PAD~D@ T110 PAD~D@
eDP Compensation
+1.05V_RUN_VTT
12
RC2
RC2
24.9_0402_1%~D
A A
eDP_COMPIO and ICOMPO signals should be short ed near
balls and route d with typical impedance <25 m ohms
5
24.9_0402_1%~D
EDP_COMP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy Bridge (1/6)
Ivy Bridge (1/6)
Ivy Bridge (1/6)
LA-8831P
LA-8831P
LA-8831P
6 61Thursday, September 13, 2012
6 61Thursday, September 13, 2012
6 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 7
Vinafix.com
5
+3.3V_ALW_PCH
CC156 0.1U_0402_25V6K~D@CC156 0.1U_0402_25V6K~D@
1 2
5
UC2
UC2
1
RUNPWROK<39,40>
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
C C
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
PM_DRAM_PWR GD<16>
1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
1 2
RC128 49.9_0402_1%~D@RC 128 49.9_0402_1%~D@
1 2
RC44 62_0402_5%~DR C44 62_0402_5%~D
Follow check list 0.5
H_PROCHOT#<40,51,52>
H_THERMTRIP#<22>
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
H_SNB_IVB#<18>
CPU_DETECT#<39>
PECI_EC<40>
1 2
place RC57 near CPU 300mils ~ 1530mils
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402_5%~D@RC129 0_0402_5%~D@
P
B
O
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,42>
H_CATERR#
VR1 TOPOLOGY
H_PROCHOT#_R
H_THERMTRIP#_R
RUNPWROK_AND PM_DRAM_PW RGD_CPU
4
+1.5V_CPU_VDDQ
RC64
@RC64
@
39_0402_5%~D
39_0402_5%~D
1 2
13
D
D
QC1
@
QC1
@
2
G
SSM3K7002FU_SC70-3~D
G
SSM3K7002FU_SC70-3~D
S
S
INTEL suggest RC64 and QC1 NO stuff by default
U1B
U1B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
place RC129 nea r CPU 250mils~ 2530 mils
1 2
H_PM_SYNC
VCCPWRGOOD_0_R
PM_DRAM_PWR GD_CPU
PCH_PLTRST#_R
H_PM_SYNC< 16>
H_CPUPWRGD<18>
B B
RC25 1K_0402_5%~DRC25 1K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
@
@
CC141
CC141
2
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWR OK
D44
RESET#
ESD request to reserve CC141
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
Buffered reset to CPU
A A
PCH_PLTRST#<17>
1
2
5
+3.3V_RUN
1
5
PCH_PLTRST#_BUF
4
2
UC1
UC1
NC
VCC
A
GND3Y
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@
@
CC140
CC140
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
4
12
RC12
RC12
200_0402_1%~D
200_0402_1%~D
1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
PCH_PLTRST#_R
4
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
MISC
MISC
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
3
+3.3V_ALW_PCH
12
RC124
@RC124
@
1K_0402_1%~D
1K_0402_1%~D
SYS_PWROK_XDP
J3
H2
AG3
AG1
N59
N58
AT30
BF44
BE43
BG43
N53
N55
L56
L55
J58
M60
TDI
L59
K58
G58
E55
E59
G55
G59
H60
J59
J61
CPU_DPLL
CPU_DPLL#
CLK_XDP_ITP
CLK_XDP_ITP#
DDR3_DRAMRST#_CP U
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
BPM#6
BPM#7
CLK_CPU_DMI <15>
CLK_CPU_DMI# <15>
1 2
RC16 1K_0402_5%~DRC16 1K_0402_5%~D
1 2
RC17 1K_0402_5%~DRC17 1K_0402_5%~D
+1.05V_RUN_VTT
Max 500mils
RC26 0_0402_5%~D@RC26 0_0402_5%~D@
T107 PAD~D@ T107 PAD~D@
T127 PAD~D@ T127 PAD~D@
12
Place T108 close to T107, T109
close to T127 for iFDIM request
4.99K_0402_1%~D
4.99K_0402_1%~D
For ESD concern, please put near CPU
VCCPWRGOOD_0_R
12
RC130
RC130
10K_0402_5%~D
10K_0402_5%~D
Avoid stub in t he PWRGD path
while placing r esistors RC25 & RC130
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RC50
RC50
DDR_HVREF_RST_PCH<15>
DDR_HVREF_RST_GATE<40>
XDP_DBRESET#XDP_DBRESET#_R
T108 PAD~D@ T108 PAD~D@
T109 PAD~D@ T109 PAD~D@
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
XDP@
XDP@
1
CC65
CC65
2
Place near JXDP1
1 2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@
S
S
12
XDP_DBRESET# <14,16>
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
2
RC5 1K_0402_1%~DXDP@ RC5 1K_0402_1%~DXDP@
1 2
RC6 0_0402_5%~D@RC6 0_0402_5%~D@
SIO_PWRBTN#<14,16,40>
CFG0<9>
SYS_PWROK<16,39>
PCH_PLTRST#<17>
D
D
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
1
CC177
CC177
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1 2
RC46 0_0402_5%~D@RC46 0_0402_5%~D@
1 2
RC47 0_0402_5%~D@RC47 0_0402_5%~D@
XDP_TDO_R XDP_TDO
12
RC42
RC42
RC43
RC43
140_0402_1%~D
140_0402_1%~D
25.5_0402_1%~D
25.5_0402_1%~D
RC7 1K_0402_1%~DXDP@ RC7 1K_0402_1%~DXDP@
RC9 0_0402_5%~D@RC9 0_0402_5%~D@
RC8 1K_0402_5%~DXDP@ RC8 1K_0402_5%~DXDP@
DDR3_DRAMRST# <12>
DDR_HVREF_RST
1 2
RC23 0_0402_5%~D@RC23 0_0402_5%~D@
1 2
RC24 0_0402_5%~D@ RC24 0_0402_5%~D@
12
12
RC45
RC45
200_0402_1%~D
200_0402_1%~D
2
1 2
1 2
1 2
1 2
CLK_XDP
CLK_XDP#
XDP_TDIXDP_TDI_R
1
+1.05V_RUN_VTT
JXDP1
CONN@JXDP1
XDP_PREQ#
XDP_PRDY#
H_CPUPWRGD_XDPH_CPUPWRGD
CFD_PWRBTN#_X DP
XDP_HOOK2
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCLK
1 2
RH107 0_0402 _5%~D@RH107 0_0402_5%~D@
1 2
RH106 0_0402 _5%~D@RH106 0_0402_5%~D@
CLK_XDP_ITP
CLK_XDP_ITP#
DDR_HVREF_RST <12>
M3 control
1 2
RH109 0_0402_5%~D@RH109 0_0402_5%~D@
1 2
RH108 0_0402_5%~D@RH108 0_0402_5%~D@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
MOLEX_52435-2671
MOLEX_52435-2671
OBSFN_A0
OBSFN_A1
GND
OBSDATA_A[0]
OBSDATA_A[1]
GND
OBSDATA_A[2]
OBSDATA_A[3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_AB
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK124GND
GND
GND
TCK0
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
CONN@
27
28
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D
RC29 51_0402_1%~DRC29 51_0402_1%~D
RC32 51_0402_1%~D@RC32 51_0402_1%~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40
RC40
RC41
RC41
12
12
12
12
12
12
51_0402_1%~D
51_0402_1%~D
12
51_0402_1%~D
51_0402_1%~D
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy Bridge (2/6)
Ivy Bridge (2/6)
Ivy Bridge (2/6)
LA-8831P
LA-8831P
LA-8831P
7 61Thursday, September 13, 2012
7 61Thursday, September 13, 2012
7 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 8
Vinafix.com
5
U1C
D D
C C
B B
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_A_WE#< 12>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
U1C
AG6
SA_DQ[0]
AJ6
SA_DQ[1]
AP11
SA_DQ[2]
AL6
SA_DQ[3]
AJ10
SA_DQ[4]
AJ8
SA_DQ[5]
AL8
SA_DQ[6]
AL7
SA_DQ[7]
AR11
SA_DQ[8]
AP6
SA_DQ[9]
AU6
SA_DQ[10]
AV9
SA_DQ[11]
AR6
SA_DQ[12]
AP8
SA_DQ[13]
AT13
SA_DQ[14]
AU13
SA_DQ[15]
BC7
SA_DQ[16]
BB7
SA_DQ[17]
BA13
SA_DQ[18]
BB11
SA_DQ[19]
BA7
SA_DQ[20]
BA9
SA_DQ[21]
BB9
SA_DQ[22]
AY13
SA_DQ[23]
AV14
SA_DQ[24]
AR14
SA_DQ[25]
AY17
SA_DQ[26]
AR19
SA_DQ[27]
BA14
SA_DQ[28]
AU14
SA_DQ[29]
BB14
SA_DQ[30]
BB17
SA_DQ[31]
BA45
SA_DQ[32]
AR43
SA_DQ[33]
AW48
SA_DQ[34]
BC48
SA_DQ[35]
BC45
SA_DQ[36]
AR45
SA_DQ[37]
AT48
SA_DQ[38]
AY48
SA_DQ[39]
BA49
SA_DQ[40]
AV49
SA_DQ[41]
BB51
SA_DQ[42]
AY53
SA_DQ[43]
BB49
SA_DQ[44]
AU49
SA_DQ[45]
BA53
SA_DQ[46]
BB55
SA_DQ[47]
BA55
SA_DQ[48]
AV56
SA_DQ[49]
AP50
SA_DQ[50]
AP53
SA_DQ[51]
AV54
SA_DQ[52]
AT54
SA_DQ[53]
AP56
SA_DQ[54]
AP52
SA_DQ[55]
AN57
SA_DQ[56]
AN53
SA_DQ[57]
AG56
SA_DQ[58]
AG53
SA_DQ[59]
AN55
SA_DQ[60]
AN52
SA_DQ[61]
AG55
SA_DQ[62]
AK56
SA_DQ[63]
BD37
SA_BS[0]
BF36
SA_BS[1]
BA28
SA_BS[2]
BE39
SA_CAS#
BD39
SA_RAS#
AT41
SA_WE#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AU36
AV36
AY26
AT40
AU40
BB26
BB40
BC41
AY40
BA41
AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55
AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54
BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_ODT0
M_ODT1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
3
DDR_B_D[0..63]<13>
DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>
DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_WE#< 13>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
2
U1D
U1D
AL4
SB_DQ[0]
AL1
SB_DQ[1]
AN3
SB_DQ[2]
AR4
SB_DQ[3]
AK4
SB_DQ[4]
AK3
SB_DQ[5]
AN4
SB_DQ[6]
AR1
SB_DQ[7]
AU4
SB_DQ[8]
AT2
SB_DQ[9]
AV4
SB_DQ[10]
BA4
SB_DQ[11]
AU3
SB_DQ[12]
AR3
SB_DQ[13]
AY2
SB_DQ[14]
BA3
SB_DQ[15]
BE9
SB_DQ[16]
BD9
SB_DQ[17]
BD13
SB_DQ[18]
BF12
SB_DQ[19]
BF8
SB_DQ[20]
BD10
SB_DQ[21]
BD14
SB_DQ[22]
BE13
SB_DQ[23]
BF16
SB_DQ[24]
BE17
SB_DQ[25]
BE18
SB_DQ[26]
BE21
SB_DQ[27]
BE14
SB_DQ[28]
BG14
SB_DQ[29]
BG18
SB_DQ[30]
BF19
SB_DQ[31]
BD50
SB_DQ[32]
BF48
SB_DQ[33]
BD53
SB_DQ[34]
BF52
SB_DQ[35]
BD49
SB_DQ[36]
BE49
SB_DQ[37]
BD54
SB_DQ[38]
BE53
SB_DQ[39]
BF56
SB_DQ[40]
BE57
SB_DQ[41]
BC59
SB_DQ[42]
AY60
SB_DQ[43]
BE54
SB_DQ[44]
BG54
SB_DQ[45]
BA58
SB_DQ[46]
AW59
SB_DQ[47]
AW58
SB_DQ[48]
AU58
SB_DQ[49]
AN61
SB_DQ[50]
AN59
SB_DQ[51]
AU59
SB_DQ[52]
AU61
SB_DQ[53]
AN58
SB_DQ[54]
AR58
SB_DQ[55]
AK58
SB_DQ[56]
AL58
SB_DQ[57]
AG58
SB_DQ[58]
AG59
SB_DQ[59]
AM60
SB_DQ[60]
AL59
SB_DQ[61]
AF61
SB_DQ[62]
AH60
SB_DQ[63]
BG39
SB_BS[0]
BD42
SB_BS[1]
AT22
SB_BS[2]
AV43
SB_CAS#
BF40
SB_RAS#
BD45
SB_WE#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
1
M_CLK_DDR2
BA34
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AY34
AR22
BA36
BB36
BF27
BE41
BE47
AT43
BG47
AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59
AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61
BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22
M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13>
M_CLK_DDR#3 <13>
DDR_CKE3_DIMMB <13>
DDR_CS2_DIMMB# <13>
DDR_CS3_DIMMB# <13>
M_ODT2 <13>
M_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy Bridge (3/6)
Ivy Bridge (3/6)
Ivy Bridge (3/6)
LA-8831P
LA-8831P
LA-8831P
8 61Thursday, September 13, 2012
8 61Thursday, September 13, 2012
8 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 9
Vinafix.com
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
CFG0<7>
+VCC_GFXCORE
1 2
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@
1 2
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@
C C
+VCC_CORE
1 2
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@
1 2
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@
B B
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@
1 2
1 2
VAXG_VAL_SENSE
12
RC69
@RC69
@
100_0402_1%~D
100_0402_1%~D
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
12
RC71
@RC71
@
100_0402_1%~D
100_0402_1%~D
VSS_VAL_SENSE
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
EDS 1.0 RSVD_12 -> VCC_DIE_SENSE
T128PAD~D @T128PAD~D @
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7
VCC_VAL_SENSE
VSS_VAL_SENSE
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
TP_VCC_DIESENSE
U1E
U1E
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
RESERVED
RESERVED
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
+DIMM0_1_VREF_CPU
BE7
+DIMM0_1_CA_CPU
BG7
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
TP_DC_TEST_A4
A4
C4
DC_TEST_C4_D3
D3
TP_DC_TEST_D1
D1
TP_DC_TEST_A58
A58
A59
DC_TEST_A59_C59
C59
A61
DC_TEST_A61_C61
C61
TP_DC_TEST_D61
D61
TP_DC_TEST_BD61
BD61
BE61
DC_TEST_BE59_BE61
BE59
BG61
DC_TEST_BG59_BG61
BG59
TP_DC_TEST_BG58
BG58
TP_DC_TEST_BG4
BG4
BG3
DC_TEST_BE3_BG3
BE3
BG1
DC_TEST_BE1_BG1
BE1
TP_DC_TEST_BD1
BD1
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
T121 PAD~D@ T121 PAD~D@
T118 PAD~D@ T118 PAD~D@
T119 PAD~D@ T119 PAD~D@
T120 PAD~D@ T120 PAD~D@
T122 PAD~D@ T122 PAD~D@
T132 PAD~D@ T132 PAD~D@
T123 PAD~D@ T123 PAD~D@
T124 PAD~D@ T124 PAD~D@
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
Display Port Presence Strap
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG4
CFG6
CFG5
RC54
@ RC54
@
1K_0402_1%~D
1K_0402_1%~D
12
@ R C51
@
1K_0402_1%~D
1K_0402_1%~D
12
@ R C52
@
1K_0402_1%~D
1K_0402_1%~D
12
12
RC51
RC52
RC53
@ RC53
@
1K_0402_1%~D
1K_0402_1%~D
CFG7
12
@ R C56
@
1K_0402_1%~D
1K_0402_1%~D
RC56
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following xxRESETB de assertion
A A
0: PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy Bridge (4/6)
Ivy Bridge (4/6)
Ivy Bridge (4/6)
LA-8831P
LA-8831P
LA-8831P
9 61Thursday, September 13, 2012
9 61Thursday, September 13, 2012
9 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 10
Vinafix.com
5
4
3
2
1
AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48
AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
W17
BC22
AM25
AN22
A44
B43
C44
F43
G43
AN16
AN17
8.5A
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
Note: Place the PU resistors c lose to CPU
RC61 close to C PU 300 - 1500mi ls
1 2
RC140 0_0402_5%~D@RC140 0 _0402_5%~D@
+1.05V_RUN_VTT
1
2
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VCCSENSE_R
VSSSENSE_R
H_CPU_SVIDALRT#
+3.3V_RUN
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC573
CC573
VIDSCLK <51>
Place RC66, RC70 ,RC133near CPU
1 2
RC67 0_0402_5%~D@RC67 0_0402_5%~D@
1 2
RC68 0_0402_5%~D@RC68 0_0402_5%~D@
RC133 10_0402_1%~DRC133 10_0402_1%~D
1 2
1 2
RC61 43_0402_5%~DRC 61 43_0402_5%~D
VCCP_PWRCTRL Pull high on power side
CAD Note: Place the PU
RC141
@RC141
@
10K_0402_5%~D
10K_0402_5%~D
VCCP_PWRCTR L
+1.05V_RUN_VTT
12
RC63
RC63
130_0402_1%~D
130_0402_1%~D
resistors close to CPU
RC63 close to C PU 300 - 1500mi ls
VIDSOUT <51>
RC75
@RC75
@
100_0402_1%~D
100_0402_1%~D
1 2
RC98
RC98
12
10_0402_1%~D
10_0402_1%~D
+1.05V_RUN_VTT
VTT_SENSE <49>
VSSIO_SENSE_R <49>
Place RC98 close to CPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
12
RC60
RC60
75_0402_1%~D
75_0402_1%~D
+VCC_CORE
12
12
2
RC66
RC66
100_0402_1%~D
100_0402_1%~D
VCCSENSE <51>
VSSSENSE <51>
RC70
RC70
100_0402_1%~D
100_0402_1%~D
VIDALERT_N <51>
Iccmax current changed for PDD G Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contr oller(+1.5V_CPU _VDDQ)
5-6A to 2 DIMMs /channel
2-5A to +1.5V_R UN & +0.75V_DDR _VTT
Voltage
0.65-1.3
1.05/1
0.0-1.1
1.8
1.5
0.65-0.9
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy Bridge (5/6)
Ivy Bridge (5/6)
Ivy Bridge (5/6)
LA-8831P
LA-8831P
LA-8831P
1
S0 Iccmax
Current (A)
10 61Thursday, September 13, 2012
10 61Thursday, September 13, 2012
10 61Thursday, September 13, 2012
53
8.5
33
1.2
5
6
12-16
*
1.0
1.0
1.0
POWER
U1F
33A
U1F
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
4
+VCC_CORE
ULV 17W , Max Current
D D
C C
B B
A A
5
in Turbo Mode or HFM
POWER
CORE SUPPLY
CORE SUPPLY
VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
PEG IO AND DDR IO
PEG IO AND DDR IO
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1]
VCCPQE[2]
RAILS
RAILS
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
SENSE LINES SVID QUIET
Page 11
Vinafix.com
5
12
RC74
RC74
100K_0402_5%~D
QC4A
QC4A
2
12
RC99
RC99
100_0402_1%~D
100_0402_1%~D
12
RC100
RC100
100_0402_1%~D
100_0402_1%~D
1
1
2
2
100K_0402_5%~D
61
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC264
CC264
1
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+1.8V_RUN
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1
+
+
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC263
CC263
5
RUN_ON_CPU1.5VS3# <7,42>
RC76
@RC76
@
100_0402_1%~D
100_0402_1%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC176
CC176
1
CC174
CC174
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC262
CC262
1
1
2
2
+1.5V_CPU_VDDQ Source
1 2
RC82 0_0402_5%~D@R C82 0_0402_5%~D@
1 2
RC79 0_0402_5%~D@R C79 0_0402_5%~D@
+VCC_GFXCORE
VCC_AXG_SENSE<51>
VSS_AXG_SENSE<51>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC170
CC170
2
5
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC169
CC169
2
1
CC168
CC168
CC183
CC183
2
2
CPU1.5V_S3_GATE<40>
SIO_SLP_S3#<16,39,42,47,48,49>
+VCC_SA
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
CC172
CC172
+
+
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC171
CC171
2
D D
C C
B B
A A
12
RC72
RC72
330K_0402_5%~D
330K_0402_5%~D
RUN_ON_CPU1.5VS3
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC4B
QC4B
4
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC175
CC175
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC261
CC261
CC260
CC260
1
2
4
+1.5V_MEM +1.5V_CPU_VDDQ+3.3V_ALW2 +PWR_SRC_S
8
7
6
5
1M_0402_1%~D
1M_0402_1%~D
12
RC143
RC143
+VCC_GFXCORE
1.2A
6A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4
QC3
QC3
AO4728L_SO8~D
AO4728L_SO8~D
U1G
U1G
33A
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
3
+V_DDR_SMREF+1.5V_MEM
1K_0402_1%~D
1K_0402_1%~D
12
@
1K_0402_1%~D
1K_0402_1%~D
12
SM_VREF
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]
VCCDQ[1]
VCCDQ[2]
QUIET RAILS
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
SENSE LINES
VCCSA_VID[0]
VCCSA_VID[1]
lines
lines
@
RC80
RC80
@
@
RC81
RC81
VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
RUN_ON_CPU1.5VS3
+V_SM_VREF_CNT
AY43
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
AM28
AN26
BC43
BA43
U10
D48
D49
3
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
3
4
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
1
CC136
CC136
2
20K_0402_5%~D
20K_0402_5%~D
12
@
@
RC73
RC73
CC135
CC135
1
2
POWER
POWER
VREF
VREF
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GRAPHICS
GRAPHICS
SENSE
LINES
SENSE
LINES
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
VCCSA VID
VCCSA VID
1 2
RC134 0_0402 _5%~D@RC134 0_0402_5%~D@
QC5
@QC5
@
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
1
3
2
+V_SM_VREF should
have 10 mil trace width
5A
+1.5V_CPU_VDDQ
+1.5V_CPU_VDDQ
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
1
CC180
CC180
CC181
CC181
2
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC250
CC250
CC251
CC251
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC574
CC574
2
VCCSA_SENSE <5 0>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC161
CC161
1
2
12
12
12
12
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC162
CC162
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC252
CC252
CC253
CC253
1
2
VCCSA_VID_0 <50>
VCCSA_VID_1 <50>
+1.5V_CPU_VDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC163
CC163
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC254
CC254
1
2
12
12
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1K_0402_1%~D
1K_0402_1%~D
RC84
RC84
1K_0402_1%~D
1K_0402_1%~D
RC78
RC78
CC164
CC164
1
2
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC255
CC255
6A
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
2
+V_SM_VREF_CNT
H=1.4mm
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC165
CC165
CC166
CC166
+
+
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC257
CC257
CC256
CC256
1
2
2
1
U1H
U1H
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
CC167
CC167
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC259
CC259
CC258
CC258
1
1
2
2
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
VSS
VSS
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy Bridge (6/6)
Ivy Bridge (6/6)
Ivy Bridge (6/6)
LA-8831P
LA-8831P
LA-8831P
11 61Thursday, September 13, 2012
11 61Thursday, September 13, 2012
11 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 12
Vinafix.com
5
+V_DDR_REFA_M3
+V_DDR_REF
D D
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
C C
Layout Note:
Place near JDIMM1
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
+1.5V_MEM
B B
A A
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD9
CD9
1
1
2
2
Layout Note:
Place near JDIMM1.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD19
CD19
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD4
CD4
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD10
CD10
CD11
CD11
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD20
CD20
2
1U_0402_6.3V6K~D
1
1
CD5
CD5
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD12
CD12
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD21
CD21
2
2
5
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
CD6
CD6
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD14
CD14
CD13
CD13
1
2
CD22
CD22
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
@CD15
@
1
CD16
CD16
CD15
1
+
+
2
2
BOM change 330UF H=1.4mm
RD8 10K_0402_5%~DRD8 10K_0402_5%~D
1 2
1 2
RD9 10K_0402_5%~DRD9 10K_0402_5%~D
1 2
RD1 0_0402_5%~D@ RD1 0_0402_5%~D@
1 2
RD2 0_0402_5%~D@ RD2 0_0402_5%~D@
+3.3V_RUN
4
+DIMM1_VREF_DQ
JDIMM1
JDIMM1
1
VREF_DQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
DDR_A_D0
DDR_A_D1
CD2
1
2
DDR_CKE0_DIMMA<8>
DDR_CS1_DIMMA#<8>
4
CD2
1
CD1
CD1
2
DDR_A_BS2<8>
M_CLK_DDR0<8>
DDR_A_BS0<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
1
CD17
CD17
2
2
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9 DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD18
CD18
+0.75V_DDR_VTT
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
TYCO_2-2013022-1
TYCO_2-2013022-1
CONN@
CONN@
3
2
H=4mm
2-3A to 1 DIMMs/channel
+1.5V_MEM+1.5V_MEM
2
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
BOSS2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
DDR_A_D20DDR_A_D16
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11DDR_A_MA12
DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA4DDR_A_MA5
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
+0.75V_DDR_VTT
DDR_CKE1_DIMMA <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <8>
M_ODT0 <8>
M_ODT1 <8>
DDR_HVREF_RST<7>
+DIMM1_VREF_CA
0.1U_0402_16V7K~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
DDR_XDP_WAN_ SMBDAT <13,15,34>
DDR_XDP_WAN_ SMBCLK <13,15,34>
0.1U_0402_16V7K~D
CD7
CD7
1
2
2
+1.5V_MEM
12
RD3
RD3
1K_0402_1%~D
1K_0402_1%~D
DDR3_DRAMRST#_R
+DIMM0_1_VREF_CPU
DDR_HVREF_RST
+DIMM0_1_CA_CPU
DDR_HVREF_RST
1 2
RD4 1K_0402_1%~DRD4 1K_0402_1%~D
RD5 0_0402_5%~D@RD5 0_0402_5%~D@
1 2
QD1
QD1
D
S
D
S
BSS138-G_SOT23-3
BSS138-G_SOT23-3
13
G
G
2
RD6 0_0402_5%~D@RD6 0_0402_5%~D@
1 2
QD2
QD2
D
S
D
S
BSS138-G_SOT23-3
BSS138-G_SOT23-3
13
G
G
2
M3 Circuit (Processo r Generate d SO-DIMM VREF_DQ)
12
RD7 0_0402_5%~D@ RD7 0_0402_5%~D@
CD8
CD8
+V_DDR_REF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-8831P
LA-8831P
LA-8831P
1
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
1
+V_DDR_REFA_M3
+V_DDR_REFB_M3
12 61Thursday, September 13, 2012
12 61Thursday, September 13, 2012
12 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 13
Vinafix.com
5
D D
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
C C
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD25
CD25
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
B B
A A
10U_0603_6.3V6M~D
CD31
CD31
CD32
CD32
1
1
2
2
Layout Note:
Place near JDIMM2.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
Layout Note:
Place near JDIMM2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD26
CD26
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD33
CD33
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD40
CD40
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD28
CD28
CD27
CD27
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD36
CD34
CD34
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD41
CD41
CD36
CD35
CD35
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD42
CD42
2
All VREF traces should
have 10 mil trace width
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD37
@
1
CD38
CD38
CD37
1
+
+
2
2
BOM change 330UF H=1.4mm
4
+V_DDR_REFB_M3
+V_DDR_REF
4
+DIMM2_VREF_DQ
1 2
RD10 0_0402_5%~D@R D10 0_0402_5%~D@
1 2
RD11 0_0402_5%~D@R D11 0_0402_5%~D@
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
+3.3V_RUN
RD13 10K_0402_5%~DRD13 10K_0402_5%~D
12
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
CD23
CD23
2
+3.3V_RUN
3
+1.5V_MEM +1.5V_MEM
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
CD24
CD24
1
2
DDR_CKE2_DIMMB<8>
DDR_B_BS2<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8>
DDR_B_WE#<8>
DDR_B_CAS#<8>
DDR_CS3_DIMMB#<8>
10K_0402_5%~D
10K_0402_5%~D
12
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
+0.75V_DDR_VTT +0.75V_DDR_VTT
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
RD14
RD14
CD43
CD43
1
1
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
CD44
CD44
2
H=4mm
JDIMM2
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013287-1
TYCO_2-2013287-1
CONN@
CONN@
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
2
2-3A to 1 DIMMs/channel
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
2
DDR3_DRAMRST#_R <12>
DDR_CKE3_DIMMB <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <8>
M_ODT2 <8>
M_ODT3 <8>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
CD29
CD29
2
DDR_XDP_WAN_ SMBDAT <12,15,34>
DDR_XDP_WAN_ SMBCLK <12,15,34>
1
JDIMMB Reverse Type
+DIMM2_VREF_CA
12
RD12 0_0402_5%~D@R D12 0_0402_5%~D@
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
CD30
CD30
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-8831P
LA-8831P
LA-8831P
+V_DDR_REF
13 61Thursday, September 13, 2012
13 61Thursday, September 13, 2012
13 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 14
Vinafix.com
5
CMOS settingCMOS_CLR1
Open
ME_CLR1
Shunt
Open
+RTC_CELL
D D
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
Low - Enable External VRs
Clear CMOSShunt
Keep CMOS
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
+3.3V_ALW_PCH
12
RH66
RH66
1K_0402_1%~D
1K_0402_1%~D
PCH_AZ_SYNC
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
*
+RTC_CELL
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK<29>
+3.3V_ALW_PCH
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
27P_0402_50V8J~D
27P_0402_50V8J~D
RH357 100K_0402_5%~DRH357 100K_0402_5%~D
C C
B B
1
1 2
CH101
@CH101
@
2
12
2
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1
2
USB30_SMI#
1 2
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
CH4
CH4
CMOS place near DIMM
PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_BITCLK
+3.3V_ALW_PCH
12
RH288
@RH288
@
0_0603_5%~D
0_0603_5%~D
+3.3V_ALW_PCH_JTAG
2
2
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
ME_FWP<39>
12
12
12
12
18P_0402_50V8J~D
18P_0402_50V8J~D
18P_0402_50V8J~D
18P_0402_50V8J~D
4
PCH_AZ_SYNC_Q
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
INTEL HDA_SYNC
isolation circuit
CH2
CH2
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
CH3
CH3
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R
12
+3.3V_ALW_PCH
12
12
RH48
RH48
@
@
@
@
100_0402_1%~D
100_0402_1%~D
1 2
RH286 0_0402_5%~D@ RH286 0_0402_5%~D@
PCH_AZ_CODEC_SDIN0<29>
1 2
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
12
RH47
RH47
RH49
RH49
@
@
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
+5V_RUN
S
S
G
G
PCH_RTCX1
SPKR<29>
D
D
13
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
12
RH2
RH2
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_GPIO33
USB30_SMI#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
3
PCH_AZ_SYNC
SIO_PWRBTN#
PCH_RSMRST#_Q<16,30>
UH4A
UH4A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_ EN# / GPIO3 3
N32
HDA_DOCK_ RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
2
+3.3V_ALW_PCH
12
1 2
RH24 1K_0402_1%~D@R H24 1K_0402_1%~D@
FWH0 / L AD0
FWH1 / L AD1
FWH2 / L AD2
FWH3 / L AD3
LPC
LPC
FWH4 / L FRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA
SATA
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMP O
SATA3COMPI
SATA3RBIA S
SATALED#
+3.3V_ALW_PCH+1.05V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
CH1
CH1
1
CH1 clsoe to JXDP2CH6 clsoe to JXDP2
2
LPC_LAD0
C38
LPC_LAD1
A38
LPC_LAD2
B37
LPC_LAD3
C37
LPC_LFRAME#
D36
E36
LPC_LDRQ1#
K36
IRQ_SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
RBIAS_SATA3
AH1
SATA_ACT#
P3
HDD_DET#_R
V14
BBS_BIT0_R
P1
RSMRST#_XDP
1.05V_0.8V_PWROK<40,51>
SIO_PWRBTN#<7,16,40>
+3.3V_ALW_PCH
XDP_DBRESET#<7,16>
change HDD SATA to mSATA signal
RSMRST#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSRSMRST#_XDP
PCH_JTAG_TCK
LPC_LAD0 <32,34,39,40>
LPC_LAD1 <32,34,39,40>
LPC_LAD2 <32,34,39,40>
LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ1# <39>
IRQ_SERIRQ <32,39,40>
mSATA_PRX_DTX_N0_C <34>
mSATA_PRX_DTX_P0_C <34>
mSATA_PTX_DRX_N0_C <34>
mSATA_PTX_DRX_P0_C <34>
ESATA_PRX_DTX_N4_C <37>
ESATA_PRX_DTX_P4_C <37>
ESATA_PTX_DRX_N4_C <37>
ESATA_PTX_DRX_P4_C <37>
remove Dock
1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
1 2
RH46 750_0402_1%~DRH46 750_0402_1%~D
SATA_ACT# <43>
1 2
RH290 0_0402_5%~D@RH290 0_0402_5%~D@
RH284 0_0402_5%~D@RH284 0_0402_5%~D@
1 2
RH283 1K_0402_5%~D@ RH283 1K_0402_5%~D@
1 2
1 2
RH21 0_0402_5%~D@RH21 0_0402_5%~D@
1.05V_0.8V_PWROK_R
PCH_PWRBTN#_XDP
+1.05V_RUN
+1.05V_RUN
HDD
E-SATA
DOCK
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
CH6
CH6
1
2
RH41 10K_0402_5%~D@RH41 10K_0402_5%~D@
RTCIHDA
RTCIHDA
JTAG
JTAG
SATA0GP / GPIO21
SPI
SPI
SATA1GP / GPIO19
+1.05V_RUN
+3.3V_RUN
12
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
PCH_GPIO33
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
IRQ_SERIRQ
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
BBS_BIT0_R
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
INTEL feedback 0302
SPKR
RH35 10K_0402_5%~D@RH35 10K_0402_5%~D@
No Reboot Strap
SPKR
RH30
RH30
10K_0402_5%~D
10K_0402_5%~D
JXDP2
CONN@JXDP2
CONN@
OBSFN_A0
OBSFN_A1
GND
OBSDATA_A [0]
OBSDATA_A [1]
GND
OBSDATA_A [2]
OBSDATA_A [3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_A B
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK124GND
GND
GND
TCK0
MOLEX_52435-2671
MOLEX_52435-2671
12
12
1 2
+3.3V_RUN
12
Low = Default
High = No Reboot
HDD_DET# <34>
27
28
+3.3V_RUN
BBS_BIT0 - BIOS BOOT STRAP BIT 0
+3.3V_M
C746
5@ C746
5@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
12
200 MIL SO8
R890
5@ R890
5@
3.3K_0402_5%~D
3.3K_0402_5%~D
PCH_SPI_CS0# PCH_SPI_CS0_R#
1 2
R935 0_0402_5%~D@R935 0_0402_5%~D@
PCH_SPI_DIN SPI_DIN64
1 2
R894 33_0402_5%~D5@ R894 33_0402_5%~D5@
SPI_WP#_SEL
SPI_WP#_SEL<39>
A A
R898 0_0402_5%~D@R 898 0_0402_5%~D@
1 2
5
SPI_WP#_SEL_R
64Mb Flash ROM
U52
X76@U52
X76@
1
VCC
/CS
2
DO
/HOLD
3
CLK
/WP
GND4DIO
W25Q64CVSSIG_SO8~D
W25Q64CVSSIG_SO8~D
PCH_SPI_DO SPI_DO_TAA
12
R912 0_0402_5%~D6@ R 912 0_0402_5%~D6@
SPI_CLK_TAAPCH_SPI_CLK
12
R906 0_0402_5%~D6@ R 906 0_0402_5%~D6@
8
7
6
5
1 2
12
R891
5@ R891
5@
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_HOLD#
SPI_CLK64
1 2
R899 33_0402_5%~D5@ R899 33_0402_5%~D5@
SPI_DO64
1 2
R901 33_0402_5%~D5@ R901 33_0402_5%~D5@
Update JTAA1 symbol
JTAA1
JTAA1
2
112
4
334
PCH_SPI_CS1_R#
6
556
8
778
10
9910
PCH_SPI_CS0_R#
12
111112
14
131314
ACES_50169-01441-001
ACES_50169-01441-001
CONN@
CONN@
4
PCH_SPI_CLK
PCH_SPI_DO
SPI_DIN_TAA
PCH_SPI_CS1# PCH_SPI_CS1_R#
1 2
R936 0_0402_5%~D@R936 0_0402_5%~D@
PCH_SPI_DIN
1 2
R895 33_0402_5%~D5@ R895 33_0402_5%~D5@
+3.3V_M
PCH_SPI_DIN
12
R896 0_0402_5%~D
R896 0_0402_5%~D
6@
6@
200 MIL SO8
32Mb Flash ROM
U53
1
SPI_DIN32
SPI_WP#_SEL_R
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
/CS
2
DO
3
/WP
GND4DIO
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
X76@U53
X76@
VCC
/HOLD
+3.3V_M
C745
5@ C745
5@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
8
SPI_HOLD#
7
SPI_CLK32
6
CLK
SPI_DO32
5
1 2
R897 33_0402_5%~D5@ R897 33_0402_5%~D5@
1 2
R900 33_0402_5%~D5@ R900 33_0402_5%~D5@
PCH_SPI_CLK
PCH_SPI_DO
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-8831P
LA-8831P
LA-8831P
14 61Thursday, September 13, 2012
14 61Thursday, September 13, 2012
14 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 15
Vinafix.com
5
Follow DG0.9 Device
D D
down & Express/Mini
card topology
PCIE_PRX_WANTX_N 1<34>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
C C
MMI --->
10/100/1G LAN --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI Card--->
B B
1/2 MINI CARD-3 PCIE
(Mini Card 3)--->
PCIE_PRX_WANTX_P 1<34>
PCIE_PTX_WANRX_N 1<34>
PCIE_PTX_WANRX_P 1<34>
PCIE_PRX_WLANTX_ N2<34>
PCIE_PRX_WLANTX_ P2<34>
PCIE_PTX_WLANRX_ N2<34>
PCIE_PTX_WLANRX_ P2<34>
PCIE_PRX_MMITX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_N6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_GLANTX_N7<31>
PCIE_PRX_GLANTX_P7<31>
PCIE_PTX_GLANRX_N7<31>
PCIE_PTX_GLANRX_P7<31>
CLK_PCIE_MINI1#<34>
CLK_PCIE_MINI1<34>
+3.3V_ALW_PCH
MINI1CLK_REQ#<34>
CLK_PCIE_LAN#<31>
CLK_PCIE_LAN<31>
LANCLK_REQ#<31>
CLK_PCIE_MMI#<33>
CLK_PCIE_MMI<33>
+3.3V_RUN
MMICLK_REQ#<33>
+3.3V_ALW_PCH
RH81 10K_0402_5%~DR H81 10K_0402_5%~D
RH87 10K_0402_5%~DRH87 10K_0402_ 5%~D
RH152 10K_0402_5%~DRH 152 10K_0402_5%~D
Express card--->
+3.3V_ALW_PCH
CLK_PCIE_MINI2#<34>
WLAN (Mini Card 2)--->
A A
CLK_PCIE_MINI2<34>
+3.3V_ALW_PCH
MINI2CLK_REQ#<34>
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
RH94 10K_0402_5%~DRH94 10K_0402_ 5%~D
RH97 10K_0402_5%~DRH97 10K_0402_ 5%~D
RH98 10K_0402_5%~DR H98 10K_0402_5%~D
RH101 10K _0402_5%~DRH101 10K _0402_5%~D
RH103 10K _0402_5%~DRH103 10K _0402_5%~D
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
5
4
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
PCIE_PTX_WANRX_N 1
PCIE_PTX_WANRX_P 1
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2
PCIE_PTX_WLANRX_ P2
EXPRESS Card--->
Del Express Card
1/2 MINI CARD-3 PCIE
(Mini Card 3)--->
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
12
1 2
Del Mini Card 3 Port
12
Del Express Card Port
12
12
1 2
1 2
1 2
CLK_PCI_TPM_TCM
1
10P_0402_50V8J~D
10P_0402_50V8J~D
2
4
MINI1CLK_REQ#
LANCLK_REQ#
MMICLK_REQ#
MINI3CLK_REQ#
EXPCLK_REQ#
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCH_GPIO45
PCH_GPIO46
CH112
CH112
RF request to add
CH112 close RH311
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
3
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
PCI_TPM_TCM
JETWAY_14M
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PEG_A_CLKRQ#
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
+XCLK_RCOMP
SIO_14M
CLK_80H
@RH315
@
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH <7>
LAN_SMBCLK <31>
LAN_SMBDATA <31>
SML1_SMBCLK <40>
SML1_SMBDATA <40>
PCH_CL_CLK1 <34>
PCH_CL_DATA1 <34>
PCH_CL_RST1# <34>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~DRH311 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315
12
12
12
12
Reserve RH315, following E4 design
2
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+VCCDIFFCLKN
22_0402_5%~D
22_0402_5%~D
1
DDR_XDP_WAN_ SMBCLK <12,13,34>
DDR_XDP_WAN_ SMBDAT <12,13,34>
+3.3V_ALW_PCH
1 2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
RH300 1K_0402_1%~DRH300 1K_0402_1%~D
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
RH80 10K_0402_5%~DRH80 10K_0402_5%~D
RH363 10K_0402_5%~DRH363 10K _0402_5%~D
RH364 10K_0402_5%~DRH364 10K _0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
1 2
RH74 10K_0402_5%~DRH74 10K_0402_ 5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_ 5%~D
1 2
RH91 10K_0402_5%~DRH91 10K_0402_ 5%~D
1 2
RH76 10K_0402_5%~DRH76 10K_0402_ 5%~D
1 2
RH77 10K_0402_5%~DRH77 10K_0402_ 5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_0402_ 5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_0402_ 5%~D
1 2
RH183 10K_0402_5%~DRH 183 10K_0402_5%~D
+3.3V_ALW_PCH
12
12
12
12
12
12
12
12
12
12
QH5B
QH5B
+3.3V_RUN
2
6 1
5
4
QH5A
QH5A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
PEG_A_CLKRQ#
DDR_XDP_WAN_ SMBCLK
DDR_XDP_WAN_ SMBDAT
LAN_SMBCLK
LAN_SMBDATA
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLOCK TERMINATION for FCIM and need close to PCH
@
CLK_PCI_TPM_TCM <32>
CLK_SIO_14M <39>
PCLK_80H <34>
JETWAY_CLK14M <32>
@
RH309 0_0402_5%~D
RH309 0_0402_5%~D
12
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
12
YH2
YH2
3
OUT
4
2
CH18
CH18
1
GND
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
10P_0402_50V8J~D
10P_0402_50V8J~D
GND
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-8831P
LA-8831P
LA-8831P
1
+3.3V_RUN
+3.3V_LAN
1
IN
2
15 61Thursday, September 13, 2012
15 61Thursday, September 13, 2012
15 61Thursday, September 13, 2012
2
CH19
CH19
1
10P_0402_50V8J~D
10P_0402_50V8J~D
1.0
1.0
1.0
Page 16
Vinafix.com
5
+3.3V_ALW_PCH
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
XDP_DBRESET#
PM_APWROK_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
PCH_RI#
CLKRUN#
PCH_DPWROK PCH_RSMRST#_Q
ME_SUS_PWR_ACK SUSACK#_R
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
1 2
RH144 10K_0402_5 %~DRH144 10K_0402_5%~D
D D
+3.3V_RUN
C C
+1.05V_RUN
1 2
RH111 49.9_0402 _1%~DRH11 1 49.9_0402_1%~D
1 2
RH112 750_0402_ 1%~DRH112 750_0 402_1%~D
SUSACK#<39> PCH_DPWROK <39>
B B
ME_SUS_PWR_ACK<40 >
AC_PRESENT<40>
+3.3V_ALW_PCH
A A
1 2
RH142 10K_0402_5 %~DRH142 10K_0402_5%~D
1 2
RH140 10K_0402_5 %~DRH140 10K_0402_5%~D
1 2
RH137 8 .2K_0402_5%~DRH137 8.2K_04 02_5%~D
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CRX_PTX_P1<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P3<6>
1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@
XDP_DBRESET#<7,14>
SYS_PWROK<7,3 9>
RESET_OUT#<40>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<14, 30>
SIO_PWRBTN#< 7,14,40>
1 2
RH139 8.2K_0402_5%~DRH139 8.2 K_0402_5%~D
4
1 2
RH113 0_0402_5%~D@ RH113 0_0402_5%~D@
1 2
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@
1 2
RH323 0_0402_5%~D@ RH323 0_0402_5%~D@
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
SYS_PWROKRESET_OUT#
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
RH131 150 _0402_1%~DRH131 150_0402 _1%~D
RH132 150 _0402_1%~DRH132 150_0402 _1%~D
RH133 150 _0402_1%~DRH133 150_0402 _1%~D
RH134 100 K_0402_5%~DRH13 4 100K_0402_5%~D
RH145 10K_ 0402_5%~D@RH14 5 10K_0402_5%~D@
DSWODVREN - On Die DSW VR Enable
Enabled (DEFAULT)
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
RH127 3 30K_0402_5%~DRH127 330K_ 0402_5%~D
1 2
PCH_PCIE_WAKE# <40>
CLKRUN# <32,39,40>
T56 PAD~DT56 PAD~D
T57 PAD~DT57 PAD~D
T58 PAD~DT58 PAD~D
SIO_SLP_S5# <40>
T59 PAD~DT59 PAD~D
SIO_SLP_S4# <39,46>
T60 PAD~DT60 PAD~D
SIO_SLP_S3# <11,39,42,4 7,48,49>
T61 PAD~DT61 PAD~D
SIO_SLP_A# <39,42,48>
T62 PAD~DT62 PAD~D
SIO_SLP_SUS# <39,42>
T63 PAD~DT63 PAD~D
SIO_SLP_LAN# < 31,39>
1 2
1 2
1 2
1 2
1 2
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6 >
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
H_PM_SYNC <7>
3
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
PCH_RSMRST#_Q
+RTC_CELL
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
SIO_SLP_A#
PM_APWROK<40>
PANEL_BKEN_PCH< 24>
ENVDD_PCH<24,39>
BIA_PWM_PCH<24>
LDDC_CLK_PCH<24>
LDDC_DATA_PCH<24>
1 2
Minimum speacing of 20mils for LVD_IBG
RH344 2.3 7K_0402_1%~DRH344 2.37K_040 2_1%~D
LCD_ACLK-_PCH<24 >
LCD_ACLK+_PCH<24>
LCD_A0-_PCH<24>
LCD_A1-_PCH<24>
LCD_A2-_PCH<24>
LCD_A0+_PCH<24>
LCD_A1+_PCH<24>
LCD_A2+_PCH<24>
LCD_BCLK-_PCH<24 >
LCD_BCLK+_PCH<24>
LCD_B0-_PCH<24>
LCD_B1-_PCH<24>
LCD_B2-_PCH<24>
LCD_B0+_PCH<24>
LCD_B1+_PCH<24>
LCD_B2+_PCH<24>
Add LVDS Daul channel
BLUE_CRT<23>
GREEN_CRT<23>
RED_CRT<23>
RH123 20_0402_1%~DRH123 20_0402_1%~D
HSYNC_BUF<23>
VSYNC_BUF<23>
1 2
1 2
RH124 20_0402_1%~DRH124 20_0402_1%~D
1K_0402_0.5%~D
1K_0402_0.5%~D
PM_APWROK
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
LCD_BCLK-_PCH
LCD_BCLK+_PCH
LCD_B0-_PCH
LCD_B1-_PCH
LCD_B2-_PCH
LCD_B0+_PCH
LCD_B1+_PCH
LCD_B2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
HSYNC
VSYNC
CRT_IREF
12
RH126
RH126
2
+3.3V_RUN
2.2K_0402_5%~D
RH316
RH316
12
+3.3V_RUN
RH118 0_0402_5%~ D@ RH118 0_040 2_5%~D@
2.2K_0402_5%~D
12
+3.3V_ALW2
1
B
2
A
1 2
RH317
RH317
5
P
G
3
61
QH6A
QH6A
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
2
5
QH6B
QH6B
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
3
4
UH5
UH5
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
PM_APWROK_R
4
O
2.2K_0402_5%~D
2.2K_0402_5%~D
Intel request DDPB can not support eDP
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
Add QH6
CLK_DDC_CRT <23>
DAT_DDC_CRT <23>
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
Del DDPC and DDPD port
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
RH351 2 .2K_0402_5%~DRH351 2.2K_04 02_5%~D
RH352 2 .2K_0402_5%~DRH352 2.2K_04 02_5%~D
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
HDMIB_PCH_HPD <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_P0 <25>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_CLK <25>
1
+3.3V_RUN
12
12
PCH_SDVO_CTRLCLK <25>
PCH_SDVO_CTRLDATA <25>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-8831P
LA-8831P
LA-8831P
1
16 61Thursday, September 13, 2012
16 61Thursday, September 13, 2012
16 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 17
Vinafix.com
+3.3V_RUN
5
4
3
2
1
PCH_PLTRST#
5
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
BT_DET#
PCH_GPIO3
PLTRST_MMI#<33>
PLTRST_LAN#<31>
+3.3V_RUN
5
1
P
B
2
A
G
3
1 2
RH336 0_0402_5%~D@RH336 0 _0402_5%~D@
1 2
RH338 0_0402_5%~D@RH338 0 _0402_5%~D@
CLK_PCI_5048<39>
CLK_PCI_MEC<40>
Del Docking CLK RH103
CLK_PCI_LOOPBACK<15>
CH102
@CH102
@
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1 2
UH3
UH3
PCH_PLTRST#_EC
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
USB3RN1<36>
USB3RN2<36>
USB3RN3<37>
USB3RP1<36>
USB3RP2<36>
USB3RP3<37>
USB3TN1<36>
USB3TN2<36>
USB3TN3<37>
USB3TP1<36>
USB3TP2<36>
USB3TP3<37>
PCIE_MCARD2_DET#<34>
BT_DET#<41>
LCD_CBL_DET#<24>
CAM_MIC_CBL_DET#<24>
Del HDD IFFS
Add RH336 and RH338
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 22_0402_5%~DRH102 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
1
CH110
CH110
10P_0402_50V8J~D
10P_0402_50V8J~D
2
PCH_PLTRST#_EC <30,32,34,39,40>
PCH_GPIO3
12
12
12
4
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
BT_DET#
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_LOOPBACKOUT
CLK_PCI_MECC LK_PCI_5048
1
CH109
CH109
10P_0402_50V8J~D
10P_0402_50V8J~D
2
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
Pop CH109 and CH110 for RF request
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
SATA_SLPD
(BBS_BIT0)
0 0
0 1
1 0
1 1
LPC
Reserved (NAND)
PCI
SPI
3
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP4USBP4+
USBP5USBP5+
USBP11USBP11+
USBP12USBP12+
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
USBRBIAS
USBP0- <36>
USBP0+ <36>
USBP1- <36>
USBP1+ <36>
USBP2- <37>
USBP2+ <37>
USBP4- <34>
USBP4+ <34>
USBP5- <34>
USBP5+ <34>
USBP7- <30>
USBP7+ <30>
USBP11- <41>
USBP11+ <41>
USBP12- <24>
USBP12+ <24>
USBP13- <30>
USBP13+ <30>
Within 500 mils
1 2
RH151
RH151
22.6_0402_1%~D
22.6_0402_1%~D
USB_OC0# <36>
USB_OC1# <36>
SIO_EXT_SMI# <40>
BBS_BIT1
----->Right Side
----->Left Side
----->Top side E-SATA
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->Smart Card
----->DOCK
----->Blue Tooth
----->Camera
Fingerprint
12
RH342
@RH342
@
1K_0402_1%~D
1K_0402_1%~D
2
INTEL feedback 0307
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
USB_OC2#
RH350 10K _0402_5%~DRH350 10K _0402_5%~D
1 2
RH341 10K _0402_5%~DRH341 10K _0402_5%~D
1 2
RH343 10K _0402_5%~DRH343 10K _0402_5%~D
1 2
RH345 10K _0402_5%~DRH345 10K _0402_5%~D
1 2
RH346 10K _0402_5%~DRH346 10K _0402_5%~D
1 2
RH347 10K _0402_5%~DRH347 10K _0402_5%~D
1 2
RH348 10K _0402_5%~DRH348 10K _0402_5%~D
1 2
RH349 10K _0402_5%~DRH349 10K _0402_5%~D
1 2
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-8831P
LA-8831P
LA-8831P
17 61Thursday, September 13, 2012
17 61Thursday, September 13, 2012
17 61Thursday, September 13, 2012
1
1.0
1.0
1.0
1 2
D D
C C
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_040 2_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_040 2_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_040 2_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_040 2_5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_040 2_5%~D
PCI_GNT3#
12
RH333
@RH333
@
1K_0402_1%~D
1K_0402_1%~D
A16 swap overri de Strap/Top-Bl ock
Swap Override jumper
PCI_GNT#3
B B
Remove RH335,RH336,RH337,RH338
to save room for D12" only
RF request to add
CH111 close RH105
A A
PCH_PLTRST#<7>
Low = A16 swap
High = Default
CLK_PCI_LOOPBACK
1
CH111
CH111
10P_0402_50V8J~D
10P_0402_50V8J~D
2
Page 18
Vinafix.com
5
4
3
2
1
+3.3V_ALW_PCH
RH53
RH53
4.7K_0402_5%~D
D D
C C
B B
A A
4.7K_0402_5%~D
1 2
SLP_ME_CSW_DE V#
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
+3.3V_ALW_PCH
SIO_EXT_WAKE# USH_DET#
1 2
12
PCH_GPIO15
RH177 10K_0402_5%~DRH177 10K_040 2_5%~D
RH354 1K_0402_1%~DRH354 1K _0402_1%~D
Intel feedback recommand 2.22
+3.3V_ALW_PCH
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
+3.3V_RUN
RH365 10K_0402_5%~DRH365 10K_040 2_5%~D
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@
RH173 1K_0402_1%~D@R H173 1K _0402_1%~D@
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
1 2
RH165 10K_0402_5%~DRH165 10K_0402_5%~D
1 2
RH269 8.2K_0402_5%~D@ RH269 8.2K_0402_5%~D@
1 2
RH166 10K_0402_5%~DRH166 10K_0402_5%~D
INTEL feedback 0302
RH174 10K_0402_5%~DRH174 10K_040 2_5%~D
RH172 10K_0402_5%~DRH172 10K_040 2_5%~D
RH273 10K_0402_5%~DRH273 10K_040 2_5%~D
KB_DET#
12
DEEP_S3_WAKE
12
PCH_GPIO36
12
PCH_GPIO37
12
TEMP_ALERT#
12
PCH_GPIO22
12
PCH_GPIO7
ESATA_CD#
PCH_GPIO6
DBC_ENABLE
PCH_GPIO48
PCH_GPIO36
12
PCH_GPIO37
12
DBC_ENABLE
12
SIO_EXT_SCI#<40>
SIO_EXT_WAKE#<39>
PM_LANPHY_ENABLE<31>
ESATA_CD#<37>
DBC_ENABLE<24>
PCIE_MCARD1_DET#<34>
DEEP_S3_WAKE<40>
SLP_ME_CSW_DE V#<39>
USB_MCARD1_DET#<34>
TEMP_ALERT#<39>
KB_DET#<41>
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
+3.3V_RUN
TPM@ RH267
TPM@
10K_0402_5%~D
10K_0402_5%~D
TPM_ID0
1 2
DTP@ RH270
DTP@
10K_0402_5%~D
10K_0402_5%~D
1 2
USH_DET#
PCH_GPIO6
PCH_GPIO7
PM_LANPHY_ENABLE
PCH_GPIO15
ESATA_CD#
DBC_ENABLE
PCH_GPIO22
DEEP_S3_WAKE
SLP_ME_CSW_DE V#
USB_MCARD1_DET#
PCH_GPIO36
PCH_GPIO37
TPM_ID0
TPM_ID1
PCH_GPIO48
TEMP_ALERT#
KB_DET#
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
+3.3V_RUN
RH267
TPM_ID1
RH270
12
RH268
RH268
20K_0402_1%~D
20K_0402_1%~D
12
RH271
@RH271
@
2.2K_0402_5%~D
2.2K_0402_5%~D
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
No TPM, No China TPM
China TPM
TBD
TPM
GPIO
GPIO
NCTF
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
0
0
1 1
PECI
NC_1
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
TPM_ID1TPM_ID0
0
1
CONTACTLESS_DET#
PCH_GPIO69
mSATA_DET#
SIO_A20GATE
SIO_RCIN#
PCH_THRMTRIP#_R
DF_TVS
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
mSATA_DET# <34>
USB_MCARD2_DET# <34>
SIO_A20GATE <40>
SIO_RCIN# <40>
H_CPUPWRGD <7>
1
2
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
Due to remove VCCDFERM
jumper(PJP66), need to
change the power rail to
+1.8V_RUN for D12" only
H_SNB_IVB#<7>
+1.05V_RUN_VTT
12
RH262 56_0402_5%~DRH262 56_0402_5%~D
CH97
CH97
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1 2
RH150 0_0402_5%~D@RH150 0_0402_5%~D@
Intel feedback recommand 2.22
5
4
3
2
CONTACTLESS_DET#
PCH_GPIO69
RH256 10K _0402_5%~DRH256 10K _0402_5%~D
RH260 1.5K_0402 _1%~DR H260 1.5K_0402_1%~D
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
PLACE RH150 CLO SE TO THE BRANC HING POINT
( TO CPU and NV RAM CONNECTOR)
+1.8V_RUN
12
RH149
RH149
2.2K_0402_5%~D
2.2K_0402_5%~D
12
1 2
RH158 10K_0402_5%~DRH158 10K_040 2_5%~D
RH203 10K_0402_5%~DRH203 10K_040 2_5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_040 2_5%~D
1 2
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
RH149 need to close to CPU
1 2
RH358 1K_0402_1%~DRH358 1K_0402_1%~D
DMI & FDI Termination Voltage
DF_TVS
Set to Vss when LOW
Set to Vcc when HIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-8831P
LA-8831P
LA-8831P
+3.3V_RUN
+3.3V_RUN
12
12
DF_TVSD F_TVS_R
1.0
1.0
18 61Thursday, September 13, 2012
18 61Thursday, September 13, 2012
18 61Thursday, September 13, 2012
1
1.0
Page 19
Vinafix.com
5
4
3
2
1
LH1 change for CRT ripple
LH1
LH1
1UH_GLFR1608T1R0M-LR_20%~D
POWER
+1.05V_RUN
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH30
CH30
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
+1.05V_RUN
CH44
CH44
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH45
CH45
2
+1.05V_RUN
+1.05V_RUN_VTT
D D
remove RH247,CH40 on VCCAPLLEXP
to save room for D12" only
+1.05V_RUN
C C
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH51
CH51
2
B B
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
1
2
+1.05V_+1.5V_1.8V_RUN
CH33
CH33
CH32
CH32
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH46
CH46
CH47
CH47
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH31
CH31
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH48
CH48
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
DMI
DMI
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCADAC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH103
CH103
2
1
CH43
CH43
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
1
CH50
CH50
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH52
CH52
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH54
CH54
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1UH_GLFR1608T1R0M-LR_20%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH34
CH34
CH35
CH35
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
1 2
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
CH36
CH36
2
+1.8V_RUN_LVDS
CH104
CH104
+3.3V_RUN
CH49
CH49
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH106
@CH106
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
+1.8V_RUN
+3.3V_M
12
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH105
CH105
+1.05V_RUN_VTT
+1.05V_RUN
+3.3V_RUN
+3.3V_RUN
LH8
LH8
100NH_MLG1608BR10JT_5%~D
100NH_MLG1608BR10JT_5%~D
0.1uH inductor, 200mA
CPN: SHI00004Q0L (Change)
+1.8V_RUN
12
+1.05V_+1.5V_1.8V_RUN
1
CH53
CH53
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax
Current (A)
0.001
5
5
0.001
0.001
0.266
0.001
0.08
0.08
1.3
0.042
1.05VccIO 2.925
VccASW
VccSPI
VccDSW3_3 0.003
1.05
3.3
3.3
1.01
0.020
1.8 0.19VCCDFTERM
3.3VccRTC 2 (mA)
3.3VccSus3_3
3.3VccSusHDA
0.119
0.01
VccVRM 1.8 / 1 .5 0 .16
1.05VccClkDMI 0.02
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_LVDS 0.06
VccAPLLEXP 1.05 0.05
+3.3V_RUN
1
2
EMI requestRF request add C1248 and C1322
+3.3V_ALW
+3.3V_ALW
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
C1247
C1247
1
2
0.1U_0402_16V7K~D
1
@
@
C1248
C1248
C1249
C1249
2
that close the PJP101 nad PJP103
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
12
RH197 0_0603_5%~D@RH197 0 _0603_5%~D@
A A
+5V_ALW
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
C1322
C1322
2
+3.3V_RUN
1
2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
@
@
C1246
C1246
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-8831P
LA-8831P
LA-8831P
19 61Thursday, September 13, 2012
19 61Thursday, September 13, 2012
19 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 20
Vinafix.com
5
+3.3V_ALW
Remove RH253 to save
room for D12" only
D D
Remove LH3,CH58 on VCCAPLLDMI2
to save room for D12" only
C C
+3.3V_RUN
B B
A A
Change RH215 from 0402 to 0603 size
1 2
RH215 0_0603_5%~D@RH215 0 _0603_5%~D@
+1.05V_RUN
+1.05V_RUN_VTT
+1.05V_RUN
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
change to SHI0000C800 (need CIS link)
5
+3.3V_ALW_PCH
+VCCDIFFCLKN
1 2
RH359 0_0402_5%~D@RH359 0 _0402_5%~D@
1 2
RH360 0_0402_5%~D@RH360 0 _0402_5%~D@
1
2
LH6
LH6
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
1 2
LH7
LH7
Add Deep S3 select
1 2
RH202 0_0402_5%~D@RH202 0 _0402_5%~D@
1 2
RH201 0_0402_5%~D@RH201 0 _0402_5%~D@
+1.05V_RUN
+1.05V_M
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
@
@
CH73
CH73
2
2
1
2
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH85
CH85
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1
CH94
CH94
1
+
+
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH74
CH74
1
2
CH79
CH79
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH96
CH96
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH86
CH86
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH92
CH92
+
+
2
1
CH55
CH55
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH64
CH64
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH67
CH67
2
2
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH81
CH81
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH84
CH84
2
1
CH87
CH87
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH93
CH93
CH95
CH95
1
2
4
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH65
CH65
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH68
CH68
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+VCCSST
+RTC_CELL
1
CH88
CH88
2
4
+VCCDSW3_3
+3.3V_RUN_VCC_CLKF33
CH69
CH69
+VCCRTCEXT
1
1
CH89
CH89
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
UH4J
UH4J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
CH90
CH90
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
3
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
3
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
1
2
1
CH59
CH59
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+PCH_V5REF_SUS
+PCH_V5REF_RUN
1
2
1
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_RUN
CH56
CH56
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+3.3V_ALW_PCH
1
2
CH70
CH70
1U_0603_10V6K~D
1U_0603_10V6K~D
+3.3V_RUN
1
CH76
CH76
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
1
CH82
CH82
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
CH60
CH60
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH66
CH66
2
1
CH72
CH72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
2
+1.05V_RUN
2
ALW_ON_3.3V#<42>
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CH75
CH75
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH77
CH77
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+1.05V_M
+3.3V_RUN
+3.3V_ALW_PCH
1
S
S
G
G
1
CH98
CH98
2
CH107
CH107
3300P_0402_50V7K~D
3300P_0402_50V7K~D
DH2
DH2
RB751V40_SC76-2
RB751V40_SC76-2
1 2
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
DH3
DH3
RB751V40_SC76-2
RB751V40_SC76-2
1 2
+PCH_V5REF_RUN
1
CH71
CH71
1U_0603_10V6K~D
1U_0603_10V6K~D
2
+5V_ALW_PCH+5V_ALW
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+PWR_SRC_S
12
RH279
RH279
100K_0402_5%~D
100K_0402_5%~D
5V_ALW_PCH_ENAB LE
13
D
D
QH8
QH8
2
G
G
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
10_0402_1%~D
10_0402_1%~D
CRB 0.7 RH208,RH213 trace width 20mil.
10_0402_1%~D
10_0402_1%~D
+3.3V_RUN
+1.05V_RUN
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
QH4
QH4
2
1
2
+3.3V_ALW_PCH+5V_ALW_PCH
12
RH208
RH208
+3.3V_RUN+5V_RUN
12
RH213
RH213
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (7/8)
PCH (7/8)
PCH (7/8)
LA-8831P
LA-8831P
LA-8831P
20 61Thursday, September 13, 2012
20 61Thursday, September 13, 2012
20 61Thursday, September 13, 2012
1
12
RH278
RH278
20K_0402_1%~D
20K_0402_1%~D
1.0
1.0
1.0
Page 21
Vinafix.com
5
D D
C C
B B
A A
UH4H
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
2
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-8831P
LA-8831P
LA-8831P
21 61Thursday, September 13, 2012
21 61Thursday, September 13, 2012
21 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 22
Vinafix.com
5
Place under CPU
Place C266 close to the Q12 as possible
C
D D
100P_0402_50V8J~D
100P_0402_50V8J~D
C266
@C266
@
2
1
C
2
B
B
E
E
Q12
Q12
3 1
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
REM_DIODE1_P_4022
REM_DIODE1_N_4022
4
+5V_RUN
2 1
3
CONN@
CONN@
ACES_50271-0040N-001
ACES_50271-0040N-001
6
GND2
5
GND1
4
FAN1_TACH_FB
RB751S40T1_SOD523-2~DD2RB751S40T1_SOD523-2~D
FAN1_PWM#
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
D2
C219
C219
1
2
4
3
3
2
2
1
1
JFAN1
JFAN1
2
BC_INT#_EMC4021
FAN1_TACH_FB
1
R385 10K_040 2_5%~DR385 10K_0402_5%~D
R426 10K_040 2_5%~DR426 10K_0402_5%~D
12
12
+3.3V_RUN
+3.3V_M
FAN1_PWM#
U9
U9
2
VDD_H
3
VDD_H
6
VDD_PWRGD
(1) DP2/DN2 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP4/DN4 for Skin on Q13, place Q13 close to Vcore VR choke.Pleas and C277 close to Q13
B
B
2
R399
R399
2.2K_0402_5%~D
2.2K_0402_5%~D
REM_DIODE2_P_4022
REM_DIODE2_N_4022
+3.3V_M
12
R395
R395
8.2K_0402_5%~D
8.2K_0402_5%~D
C
C
2
B
B
E
E
Q16
Q16
3 1
THERMATRIP2#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C278
C278
1
2
100P_0402_50V8J~D
100P_0402_50V8J~D
1
C
C C
B B
@C272
@
100P_0402_50V8J~D
100P_0402_50V8J~D
C
C272
2
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
2
B
B
E
E
3 1
Q14
Q14
1
2
+1.05V_RUN_VTT
H_THERMTRIP#<7>
E
E
31
@
@
C277
C277
Q13
Q13
C
C
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
1 2
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
+3.3V_M
C270 2200P _0402_50V7K~DC270 22 00P_0402_50V7K~D
C271 2200P _0402_50V7K~DC271 22 00P_0402_50V7K~D
Place C270 and C271 close to EMC4021
MAX8731_IINP<52>
12
R404
R404
10K_0402_5%~D
10K_0402_5%~D
SMSC request
1 2
R389 10K_0402_5%~DR389 10K_0402_5%~D
1 2
1 2
PCH_PWRGD#<40>
REM_DIODE1_N_4022
REM_DIODE1_P_4022
REM_DIODE2_N_4022
REM_DIODE2_P_4022
VCP2
12
R3874.7K_ 0402_5%~D R3874.7K_0402_5%~D
VSET_4021
FAN1_TACH_FB
FAN1_PWM#
3V_PWROK#
1 2
R391 1K_0402_5%~DR391 1K_0402_5%~D
+RTC_CELL
VDD_L
13
VDD_PWRGD
23
DN1/THERM
24
DP1/VREF_T
26
DN2/DP4
27
DP2/DN4
30
N/C
29
N/C
31
VCP
25
VIN
28
VSET
10
TACH/GPIO1
11
TEST3
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
16
RTC_PWR3V
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EMC4021-1-EZK-TR_QFN32_5X5~D
EMC4021-1-EZK-TR_QFN32_5X5~D
1
C274
C274
2
THERMTRIP2#
SYS_SHDN#
POWER_SW#
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
FAN_OUT
FAN_OUT
SMCLK/BC_CLK
SMDATA/BC_DATA
ADDR_MODE/XEN
TEST1
TEST2
THERMATRIP2#
17
18
N/C
19
POWER_SW_IN#
20
Del Dalmore U10 Change net POWER_SW# to POWER_SW_IN#
21
BC_INT#_EMC4021
9
5
4
8
7
+VCC_4022
1
VDD
VSS
32
14
22
33
+ADDR_XEN
1 2
12
R403
R403
10K_0402_5%~D
10K_0402_5%~D
SMSC request
1 2
R390 47K_ 0402_1%~D@R390 47K_0402_1%~D@
POWER_SW_IN# <40>
ACAV_IN <40,52>
BC_INT#_EMC4021 <40>
BC_CLK_EMC4021 <40>
BC_DAT_EMC4021 <40>
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
R402 10K_040 2_5%~DR402 10K_0402_5%~D
+VCC_4022
+RTC_CELL
THERM_STP# <45>
R388
R388
22_0402_5%~D
22_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C273
C273
C1179
C1179
2
12
+3.3V_M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C282
C282
2
VSET_4021
12
R406
R406
1.82K_0402_1%~D
1.82K_0402_1%~D
R406 change Dalmore 953ohm to 1.82Kohm
Del Docking U10
Tp=98degree
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Thermal Sensor
FAN & Thermal Sensor
FAN & Thermal Sensor
LA-8831P
LA-8831P
LA-8831P
22 61Thursday, September 13, 2012
22 61Thursday, September 13, 2012
22 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 23
Vinafix.com
2
ESD ask to add D77, D83
12P_0402_50V8J~D
12P_0402_50V8J~D
1
C1204
C1204
2
+CRT_VCC
1 2
L99
L99
BLM15BB470SN1D_2P~D
BLM15BB470SN1D_2P~D
1 2
L100
L100
BLM15BB470SN1D_2P~D
BLM15BB470SN1D_2P~D
1 2
L101
L101
BLM15BB470SN1D_2P~D
BLM15BB470SN1D_2P~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
R1644
R1644
L102
L102
BLM15AG121SN1D_2P~D
BLM15AG121SN1D_2P~D
1 2
1 2
L103
L103
BLM15AG121SN1D_2P~D
BLM15AG121SN1D_2P~D
RED_CRT<16>
GREEN_CRT<16>
BLUE_CRT<16>
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
@
@
D77
D77 and D83
B B
change to de-pop (ESD suggest) 7/6
Del U18 for CRT Docking Switch
D77
1
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
@
@
D83
D83
1
12
12
12
R1641
R1641
R1642
R1642
R1643
R1643
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
DAT_DDC_CRT<16>
CLK_DDC_CRT< 16>
HSYNC_CRT
VSYNC_CRT
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1
1
C1203
C1203
C1202
C1202
2
2
Change to 0402 size
Compal P/N SM01000FH0L
BLM15BB470SN1D(MURATA)
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
C1205
C1205
2
2.2K_0402_5%~D
2.2K_0402_5%~D
12
R1645
R1645
1K_0402_5%~D
@R1647
1K_0402_5%~D
@
1K_0402_5%~D
@R1646
1K_0402_5%~D
@
12
12
1
2
R1647
R1646
22P_0402_50V8J~D
22P_0402_50V8J~D
22P_0402_50V8J~D
22P_0402_50V8J~D
@C1209
@
@C1210
@
1
C1209
C1210
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
C1206
C1206
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
1
C1207
C1207
2
1
+5V_RUN
1
U77
U77
IN
AP2330W-7_SC59-3
AP2330W-7_SC59-3
GND2OUT
+CRT_VCC
3
+5V_RUN_CRT
40mils
R
G
JVGA_HS
B
+CRT_VCC
JVGA_VS
M_ID2#
1
C1208
C1208
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
1
C1201
C1201
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
T144
@T144
@
NC
PAD~D
PAD~D
JCRT1
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
TYCO_2041127-1
TYCO_2041127-1
CONN@
CONN@
16
G
G
17
G
G
R1668
@ R 1668
@
1 2
0_0402_5%~D
+CRT_VCC
A A
HSYNC_BUF<16>
VSYNC_BUF<16>
1 2
C1224 0.1U_0402_16V4Z~DC1224 0.1U_0402_16V4Z~D
1 2
C1225 0.1U_0402_16V4Z~DC1225 0.1U_0402_16V4Z~D
VSYNC_BUF
2
0_0402_5%~D
1
5
U73
U73
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
3
1
5
U74
U74
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
3
R1670
@ R1670
@
1 2
0_0402_5%~D
0_0402_5%~D
R1669
R1669
10K_0402_5%~D
10K_0402_5%~D
1 2
4
4
HSYNC_CRTHSYNC_BUF
VSYNC_CRT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
Compal Electronics, Inc.
CRT
CRT
CRT
LA-8831P
LA-8831P
LA-8831P
23 61Thursday, September 13, 2012
23 61Thursday, September 13, 2012
23 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 24
Vinafix.com
5
JLVDS1
JLVDS1
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
46
G6
45
G5
44
G4
43
G3
42
G2
41
G1
CONN@
CONN@
CONN@ JLVDS2
CONN@
GND1
GND2
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JLVDS2
1
2
3
4
5
6
7
8
9
10
11
12
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D D
STARC_107K40-000001-G2
C C
B B
STARC_107K40-000001-G2
E-T_3703K-F12N-03R
E-T_3703K-F12N-03R
Change JLVDS2 connector to SP02000TJ00 (Golden type)
7/6
DMIC0
DMIC_CLK
USBP12_DUSBP12_D+
CAM_MIC_CBL_DET#
DISP_ON
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LCD_A2+_PCH
LCD_A2-_PCH
LCD_A1+_PCH
LCD_A1-_PCH
LCD_A0+_PCH
LCD_A0-_PCH
LDDC_DATA_PCH
LDDC_CLK_PCH
BREATH_WHITE_LED
BATT_YELLOW_LED
BATT_WHITE_LED
CAM_MIC_CBL_DET# <17>
+BL_PWR_SRC
Change LE92 to 0402 size
LE92 BLM15 BB221SN1D_2P~DLE92 BLM15 BB221SN1D_2P~D
1 2
LCD_CBL_DET# <17>
Add LCD LED board function
LCD_BCLK+_PCH
LCD_BCLK-_PCH
LCD_B2+_PCH
LCD_B2-_PCH
LCD_B1+_PCH
LCD_B1-_PCH
LCD_B0+_PCH
LCD_B0-_PCH
Add Dual change JLVDS2
DBC_ENABLE <18>
LCD_BCLK+_PCH <16>
LCD_BCLK-_PCH <16>
LCD_B2+_PCH <16>
LCD_B2-_PCH <16>
LCD_B1+_PCH <16>
LCD_B1-_PCH <16>
LCD_B0+_PCH <16>
LCD_B0-_PCH <16>
4
BIA_PWM_LVDSBIA_PWM_LVDS_L
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
LDDC_DATA_PCH <16>
LDDC_CLK_PCH <16>
LCD_TST <39>
+3.3V_RUN
+LCDVDD
+5V_ALW
PANEL_HDD_LED <43>
BREATH_WHITE_LED <43>
BATT_YELLOW_LED <43>
BATT_WHITE_LED <43>
DISP_ON
BIA_PWM_LVDS
D9 change to pop (ESD suggest) 7/6
Swap D9 pin2 and pin3 for Layout
DMIC0 <29>
DMIC_CLK <29>
2
3
D9
PESD5V0U2BT_SOT23-3~DD9PESD5V0U2BT_SOT23-3~D
1
+3.3V_RUN
Add C1332 and C1333 for RF request
2200P_0402_50V7K~D
2200P_0402_50V7K~D
C1330
C1330
1
2
+CAMERA_VDD
100P_0402_50V8J~D
100P_0402_50V8J~D
1
@
@
C1311
C1311
2
Del DMIC0 and DMIC_CLK pull low 100PF Cap. reserve
1 2
R159 2.2K_0402 _5%~DR159 2.2K_0402_5%~D
1 2
R160 2.2K_0402 _5%~DR160 2.2K_0402_5%~D
LDDC_CLK_PCH
LDDC_DATA_PCH
Place near to JLVDS1
Add C1330 and C1331
+LCDVDD
for RF request
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
Close to JLVDS1.7,8
D67
D67
12
R1138
R1138
100K_0402_5%~D
100K_0402_5%~D
12
R1137
R1137
10K_0402_5%~D
10K_0402_5%~D
1 2
RB751V40_SC76-2
RB751V40_SC76-2
D69
D69
1 2
RB751V40_SC76-2
RB751V40_SC76-2
D66
D66
1 2
RB751V40_SC76-2
RB751V40_SC76-2
D68
D68
1 2
RB751V40_SC76-2
RB751V40_SC76-2
The D67~D69 same to Dalmore 14"
3
10P_0402_50V8J~D
10P_0402_50V8J~D
C1332
C1332
1
1
2
2
+3.3V_RUN
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C1331
C1331
C243
1
2
C243
1
2
Close to JLVD1.9
PANEL_BKEN_PCH <16>
PANEL_BKEN_EC <39>
BIA_PWM_PCH <16>
BIA_PWM_EC <40>
2
+3.3V_ALW
LCD Power
D6
D6
LCD_VCC_TEST_EN<39>
10P_0402_50V8J~D
10P_0402_50V8J~D
C1333
C1333
ENVDD_PCH<16,39>
+BL_PWR_SRC
1
2
C246
C246
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
Close to JLVD1.30,31,32
Close to JLVDS1.6
Add LCD LED board function
Change C302 to reserve because ME H-limit
2
3
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
+5V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@
@
C302
C302
1
2
1
+LCDVDD
130_0402_1%~D
130_0402_1%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
12
R413
R413
61
Q19A
Q19A
2
EN_LCDPWR
2
Q20
Q20
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
40mil
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C297
C297
2
EN_INVPWR<40>
+PWR_SRC_S +3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R414
R414
5
13
+PWR_SRC
12
R422
R422
100K_0402_5%~D
100K_0402_5%~D
1 2
R423 47K_0402_5%~DR423 47K_0402_5%~D
Panel backlight power control by EC
+LCDVDD
12
R412
R412
470K_0402_5%~D
470K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4.7M_0402_5%~D
4.7M_0402_5%~D
3
12
Q19B
Q19B
R1632
R1632
4
BOM change R412 100k to 470Kohm
BOM change R1632 1M to 4.7Mohm
BOM change C293 0.1uF to 0.022UF
Q21
Q21
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
D
D
S
S
4 5
G
G
3
PWR_SRC_ON
1 3
EN_INVPWR
4 5
Q22
Q22
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1
Q18
Q18
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
6
2
1
G
G
3
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
1
C293
C293
2
40mil
6
2
1
1
C296
C296
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
S
S
G
G
2
FDC654P: P CHANNAL
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C292
C292
1
2
+BL_PWR_SRC
For Webcam
Q23
+CAMERA_VDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_10V6M
10U_0603_10V6M
C299
C299
C300
1
2
A A
C300
1
2
CCD_OFF<39>
CCD_OFF
Q23
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
S
D
S
1 3
G
G
2
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
USBP12+<17>
USBP12-<17>
Webcam PWR CTRL
USBP12- USBP12_D-
BOM change L10
L10 DLW21S N121SQ2L_4P~DL10 DLW21SN121SQ2L_4P ~D
4
4
3
1
1
2
1 2
R427 0_0402_5%~D@ R427 0_0402_5%~D@
1 2
R428 0_0402_5%~D@ R428 0_0402_5%~D@
3
2
Remove D38 for saving more spacing.
After ESD confirm PT phase
USBP12_D+USBP12+
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
eDP & CAM &TS Conn
eDP & CAM &TS Conn
eDP & CAM &TS Conn
LA-8831P
LA-8831P
LA-8831P
24 61Thursday, September 13, 2012
24 61Thursday, September 13, 2012
24 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 25
Vinafix.com
2
+5V_RUN
1
Change to new solution (U76)
Remove Diode and Fuse
1
U76
U76
IN
AP2330W-7_SC59-3
AP2330W-7_SC59-3
+5V_RUN
D65
@ D65
@
RB751V40_SC76-2
RB751V40_SC76-2
GND2OUT
1 2
3
12
R1163
@R1163
@
0_0402_5%~D
0_0402_5%~D
+VDISPLAY_VCC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C337
C337
2
1
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C338
C338
1
2
JHDMI1
HDMI_HPD_SINK
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
HONGL_13-13201904CP
HONGL_13-13201904CP
CONN@
CONN@
GND
GND
GND
GND
20
21
22
23
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDMI port
HDMI port
HDMI port
LA-8831P
LA-8831P
LA-8831P
25 61Thursday, September 13, 2012
25 61Thursday, September 13, 2012
25 61Thursday, September 13, 2012
1.0
1.0
1.0
EMI solution. Pop L116~L123, de-pop L19~L22
L116 9NH_0402HS-9N0EJTS_5%~DL116 9NH_0402HS-9N0EJTS_5%~D
1 2
L19
@L19
TMDSB_PCH_CLK#_C
B B
TMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N2_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
+3.3V_RUN
A A
R452 680_0402_5%~DR452 680_0402_5%~D
1 2
R450 680_0402_5%~DR450 680_0402_5%~D
1 2
R448 680_0402_5%~DR448 680_0402_5%~D
1 2
R449 680_0402_5%~DR449 680_0402_5%~D
1 2
R454 680_0402_5%~DR454 680_0402_5%~D
1 2
R453 680_0402_5%~DR453 680_0402_5%~D
1 2
R456 680_0402_5%~DR456 680_0402_5%~D
1 2
R455 680_0402_5%~DR455 680_0402_5%~D
1 2
R458 10K_0402_5%~DR458 10K_0402_5%~D
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
HDMI_CEC
13
D
D
2
G
G
Q26
Q26
S
S
R1165 10K_040 2_5%~DR1165 10K_0402_5 %~D
TMDSB_PCH_CLK#< 16>
TMDSB_PCH_CLK<16>
TMDSB_PCH_N0<16>
TMDSB_PCH_P0< 16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P1< 16>
TMDSB_PCH_N2<16>
TMDSB_PCH_P2< 16>
+3.3V_RUN
12
2
12
C353 0.1U_04 02_10V7K~DC353 0.1U_0402_10V7K~D
C352 0.1U_04 02_10V7K~DC352 0.1U_0402_10V7K~D
C351 0.1U_04 02_10V7K~DC351 0.1U_0402_10V7K~D
C350 0.1U_04 02_10V7K~DC350 0.1U_0402_10V7K~D
C347 0.1U_04 02_10V7K~DC347 0.1U_0402_10V7K~D
C346 0.1U_04 02_10V7K~DC346 0.1U_0402_10V7K~D
C349 0.1U_04 02_10V7K~DC349 0.1U_0402_10V7K~D
C348 0.1U_04 02_10V7K~DC348 0.1U_0402_10V7K~D
PCH_SDVO_CTRLDATA<16>
12
12
12
12
12
12
12
PCH_SDVO_CTRLCLK<16>
TMDSB_PCH_CLK_C
TMDSB_PCH_N1_C
TMDSB_PCH_P1_C
TMDSB_PCH_N2_C
TMDSB_PCH_P2_C
HDMIB_PCH_HPD<16>
TMDSB_PCH_N0_C
TMDSB_PCH_P0_C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
L117 9NH_0402HS-9N0EJTS_5%~DL117 9NH_0402HS-9N0EJTS_5%~D
1 2
L118 9NH_0402HS-9N0EJTS_5%~DL118 9NH_0402HS-9N0EJTS_5%~D
1 2
L20
@L20
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
L119 9NH_0402HS-9N0EJTS_5%~DL119 9NH_0402HS-9N0EJTS_5%~D
1 2
L120 9NH_0402HS-9N0EJTS_5%~DL120 9NH_0402HS-9N0EJTS_5%~D
1 2
L21
@L21
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
L121 9NH_0402HS-9N0EJTS_5%~DL121 9NH_0402HS-9N0EJTS_5%~D
1 2
L122 9NH_0402HS-9N0EJTS_5%~DL122 9NH_0402HS-9N0EJTS_5%~D
1 2
L22
@L22
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
L123 9NH_0402HS-9N0EJTS_5%~DL123 9NH_0402HS-9N0EJTS_5%~D
1 2
+3.3V_RUN
5
3
4
Q120B
Q120B
1M_0402_5%~D
1M_0402_5%~D
R1168
R1168
1 2
3
3
2
2
3
3
2
2
3
3
2
2
3
3
2
2
Q120A
Q120A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC
61
PCH_SDVO_CTRLDATA_R
+3.3V_RUN
G
G
2
HDMI_HPD_SINK
13
D
S
D
S
Q121
Q121
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_ 0402_5%~D
1 2
R1128 20K_040 2_1%~DR1128 20K_0402_1 %~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
C1216
C1216
C1217
C1217
1
1
2
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
C1218
C1218
C1219
1
2
1
2
1
2
C1219
1
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
C1221
C1221
C1220
C1220
1
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
C1222
C1222
C1223
C1223
1
2
Page 26
Vinafix.com
5
D D
Del U20,U21,U23,U24 Dock function
C C
4
3
2
1
BLANK
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DP AUX SW
DP AUX SW
DP AUX SW
LA-8831P
LA-8831P
LA-8831P
26 61Thursday, September 13, 2012
26 61Thursday, September 13, 2012
26 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 27
Vinafix.com
5
D D
C C
4
3
2
Del HDD Function u88 and JSATA1
1
BLANK
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDD CONNECTOR
HDD CONNECTOR
HDD CONNECTOR
LA-8831P
LA-8831P
LA-8831P
27 61Thursday, September 13, 2012
27 61Thursday, September 13, 2012
27 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 28
Vinafix.com
5
D D
C C
4
3
2
1
BLANK
B B
No ODD
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
BRANK
BRANK
BRANK
LA-8831P
LA-8831P
LA-8831P
28 61Thursday, September 13, 2012
28 61Thursday, September 13, 2012
28 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 29
Vinafix.com
2
Internal Speakers Header
15 mils trace
INT_SPK_RINT_SPK_R+
INT_SPK_LINT_SPK_L+
C973 2200P_0 402_50V7K~DC973 2200P_0402_50V7K~D
C974 2200P_0 402_50V7K~DC974 2200P_0402_50V7K~D
C975 2200P_0 402_50V7K~DC975 2200P_0402_50V7K~D
1
2
R1658 3.3_0402_5%~ DR1658 3.3_04 02_5%~D
B B
12
1
1
1
2
2
2
R1660 3.3_0402_5%~ DR1660 3.3_04 02_5%~D
R1659 3.3_0402_5%~ DR1659 3.3_04 02_5%~D
12
12
12
Close to U72
follow Dalmore 14"BOM change C973~C979 2200P and Add R1658~ R1661
Close to U72 pin5 Close to U72 pin6
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
12
R1077
@R10 77
@
47_0402_5%~D
47_0402_5%~D
1
C978
@C978
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
Place closely to Pin 13.
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
DVDD_IO should match
with HDA Bus level
L91 BLM18PG121SN1D_0603L91 BLM18PG121SN1D_0 603
1 2
L92 BLM18PG121SN1D_0603L92 BLM18PG121SN1D_0 603
1 2
L93 BLM18PG121SN1D_0603L93 BLM18PG121SN1D_0 603
1 2
L94 BLM18PG121SN1D_0603L94 BLM18PG121SN1D_0 603
1 2
C976 2200P_0 402_50V7K~DC976 2200P_0402_50V7K~D
R1661 3.3_0402_5%~ DR1661 3.3_04 02_5%~D
12
R1076
R1076
33_0402_5%~D
33_0402_5%~D
1
C977
C977
10P_0402_50V8J~D
10P_0402_50V8J~D
2
AUD_SENSE_A
2
Q107A
Q107A
61
12
R1086
R1086
20K_0402_1%~D
20K_0402_1%~D
3
5
Q107B
Q107B
4
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
INT_SPKR_RINT_SPKR_R+
INT_SPKR_LINT_SPKL_L+
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
2
3
@
@
DE2
DE2
1
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1
2
3
4
5
6
ACES_50269-00401-001
ACES_50269-00401-001
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
2
3
@
@
DE1
DE1
1
330P_0402_50V7K~D
330P_0402_50V7K~D
C1318
C1318
1
2
BCLK: Audio serial data bus bi t clock input/output
LRCK: Audio serial data bus word clock input/output
AUD_NB_MUTE#<39>
+3.3V_RUN
+VDDA_AVDD
R1083
R1083
2.49K_0402_1%~D
2.49K_0402_1%~D
12
+3.3V_RUN
C980
C980
12
R1087
R1087
100K_0402_5%~D
100K_0402_5%~D
1
@C967
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+3.3V_RUN +3.3V_RUN_DVDD +3.3 V_RUN_DVDD
JSPK1
JSPK1
1
2
3
4
GND1
GND2
CONN@
CONN@
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_SDOUT<14>
PCH_AZ_CODEC_SDIN0<14 >
330P_0402_50V7K~D
330P_0402_50V7K~D
1
2
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_RST#<14>
C1319
C1319
1
2
330P_0402_50V7K~D
330P_0402_50V7K~D
C1320
C1320
@PJP60
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
INT_SPKL_L+
INT_SPKR_LINT_SPKR_R+
INT_SPKR_R-
330P_0402_50V7K~D
330P_0402_50V7K~D
C1321
C1321
1
2
PJP60
Place R1096 close to codec
R1096
R1096
EMI solution
1 2
10K_0402_5%~DR1099 10K_0402_5%~DR1 099
AUD_HP_NB_SENSE <38,39>
C967
Del Docking function R1661 and R1660
1U_0603_10V7K~D
1U_0603_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C952
C952
2
1 2
place at AGND and DGND plane
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
Del CE981 and CE982
1
C994
C994
2
2
33_0402_5%~D
33_0402_5%~D
Del Docking function RE9,RE10,R1097
1 2
C981
C981
1 2
C982
C982
1 2
C983
C983
+DVDD_CORE
10U_0603_10V6M
10U_0603_10V6M
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C954
C954
C953
C953
2
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place C994, C952~C957 close to Codec
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD93B2X5NLGXWBX8_Q FN48_7X7~D
92HD93B2X5NLGXWBX8_Q FN48_7X7~D
place at Codec bottom side
PJP62
@PJP62
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
AVDD1
AVDD2
PVDD
PVDD
SENSE_A
SENSE_B
PORTA_L
PORTA_R
VrefOut_A
PORTB_L
PORTB_R
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
MONO_OUT
PC_BEEP
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
CAP+
CAP-
VREFFILT
CAP2
Vreg
AVSS1
AVSS
AVSS
27
38
45
39
13
14
28
29
23
31
32
40
41
44
43
25
12
Change LE3 to 0402 size
DMIC_CLK_L
2
4
46
48
36
35
21
22
34
V-
37
26
30
33
place close to pin27 place close to pin38
+VDDA_AVDD
+VDDA_PVDD
AUD_SENSE_A
AUD_SENSE_B
MIC_IN_L
+VREFOUT
AUD_HP_OUT_L
AUD_HP_OUT_R
INT_SPK_L+
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
AUD_PC_BEEP
1
C962
C962
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
Place C962 close to Codec
2
CODEC_VREF
CODEC_CAP2
CODEC_VN
CODEC_VREG
1U_0603_10V7K~D
1U_0603_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C957
C957
2
2
C1105 0.1U_0402_25V6K~DC110 5 0. 1U_0402_25V6K~D
C1106 0.1U_0402_25V6K~DC110 6 0. 1U_0402_25V6K~D
1 2
LE3 BLM15BB2 21SN1D_2P~DLE3 BLM 15BB221SN1D_2P~D
Place LE3 close to codec
Place C963~C966 close to Codec
Del R1667
1
10U_0603_10V6M
10U_0603_10V6M
1
C956
C956
C955
C955
C954, C955,C958, C960, C966 change to 0603 size
2
IDT feedback C1163 change 0603 size
1 2
2.2U_0603_6.3V6K~DC1163 2.2U_0603 _6.3V6K~DC1163
+VREFOUT
1 2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
Del ALC290 VREF to C1215 and C1214
T186PAD~D @T186PAD~D @
12
12
DMIC_CLK <24>
T184PAD~D @T184PAD~D @
Del R165
DMIC0 <24>
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C963
C963
2
L77
L77
BLM21PG600SN1D_0805~ D
BLM21PG600SN1D_0805~ D
1 2
AUD_HP_OUT_L <38>
AUD_HP_OUT_R <38>
1U_0603_10V7K~D
1U_0603_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C965
C965
C964
C964
2
2
Del R1663 resve
+5V_RUN
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_10V6M
10U_0603_10V6M
1
C958
C958
2
MIC_IN_R <38>
1 2
R1119 100K_0402_5%~DR1119 100K_0402_5 %~D
1 2
R1120 100K_0402_5%~DR1120 100K_0402_5 %~D
1 2
R1141 10K_ 0402_5%~D@R1 141 10K_0402_5%~D@
1 2
R1142 10K_ 0402_5%~D@R1 142 10K_0402_5%~D@
10U_0603_10V6M
10U_0603_10V6M
1
C966
C966
2
Del R1664~R1666,C1165,C1164
10U_0603_10V6M
10U_0603_10V6M
1
1
C959
C959
C960
C960
2
2
Notice Layout
12
R1095
@R10 95
@
0_0805_5%~D
0_0805_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C961
C961
2
SPKR <14>
BEEP <40>
Near to U72.23
+VREFOUT
1
2
1U_0603_10V7K~D
1U_0603_10V7K~D
C1180
C1180
Add for solve pop noise and detect issue
A A
Place closely to Pin 14
AUD_SENSE_B
10K_0402_5%~D
10K_0402_5%~D
1
2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
@
@
+VDDA_AVDD
12
R1078
C979
C979
R1078
IDT feedback pull up 10K
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
NA
SPDIFOUT0
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Pull-up to AVDD
Del Docking U73and R162~R166 and C1103 ,R1540
Del Q106 and R1079 and R1080
External MICPORT A
PORT B
PORT C
PORT D
2
HeadPhone Out
Dock Audio
Internal SPK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
Compal Electronics, Inc.
Azalia (HD) Codec
Azalia (HD) Codec
Azalia (HD) Codec
LA-8831P
LA-8831P
LA-8831P
29 61Thursday, September 13, 2012
29 61Thursday, September 13, 2012
29 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 30
Vinafix.com
5
4
3
2
1
Power Switch for debug
POWER_SW#_M B<40,43>
D D
POWER_SW#_M B POWER_SW#_M B
1
C759
@C759
@
100P_0402_50V8J~D
100P_0402_50V8J~D
2
@PW RSW1
@
@SHORT PADS~D
@SHORT PADS~D
Place on Bottom
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
WIRELESS_ON#/OFF<39>
C C
WIRELESS_ON#/OFF
Sniffer
JSNIF1
JSNIF1
1
1
2
2
3
3
4
4
ACES_50504-0040N-001
ACES_50504-0040N-001
CONN@
CONN@
112
PWRSW1
5
G1
6
G2
2
Reserve for debugging (X-build will remove)
Change to E3 use part (SN11100580L)
SKRBAAE010_4P~D
+3.3V_RUN
1
2
@
@
SKRBAAE010_4P~D
4
2
@
@
SW1
SW1
Smart Card
+5V_RUN
1
C1279
C1279
2
@
@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
Swap JSC1 pin-define
because connector from Bot to Top
Change JLID1 connector to HB_A081015-SAHR21
C1278
C1278
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
+3.3V_RUN
PCH_PLTRST#_EC<17,32,34,39,40>
3
1
USBP7-<17>
USBP7+<17>
+5V_RUN
JSC1
JSC1
HB_A081015-SAHR21
HB_A081015-SAHR21
12
GND
11
GND
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CONN@
CONN@
+5V_RUN
1
C1317
C1317
2
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
Swap JLID1 pin-define
because connector from Bot to Top
+3.3V_ALW
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1308
@C1308
@
C1316
C1316
@
@
1
2
+3.3V_RUN
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
Change JCAP2.2 to +3.3V_RUN
Width:20mil
+5V_RUN
+3.3V_RUN
CAP_RST#<40>
CAP_INT#<40>
CAP_SMB_CLK< 40>
CAP_SMB_DAT<40>
CAP_RST#
Change JLID1 connector to HB_A080415-SAHR21
LID_CL#<39,43>
Cap Sensor
CAP_INT#
CAP_SMB_CLK
CAP_SMB_DAT
Lid board
LID_CL#
HB_A080415-SAHR21
HB_A080415-SAHR21
6
GND
5
GND
4
4
3
3
2
2
1
1
JLID1
JLID1
CONN@
CONN@
JCAP2
JCAP2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND1
10
GND2
ACES_50506-00841-P01
ACES_50506-00841-P01
CONN@
CONN@
Fingerprint CONN.
JFP1
JFP1
1
1
2
2
3
3
4
4
5
7
5
G1
6
8
6
G2
ACES_50505-00641-001_6P-T
ACES_50505-00641-001_6P-T
CONN@
CONN@
+3.3V_RUN
USBP13_R_D-
USBP13_R_D+
USBP13_R_D+
USBP13_R_D-
2
3
D73
PESD5V0U2BT_SOT23-3~D
D73
PESD5V0U2BT_SOT23-3~D
1
C1304
@C1304
@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
3
2
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
L52
@ L52
@
3
2
R741 0_0402 _5%~D@ R741 0_0402_5%~D@
R742 0_0402 _5%~D@ R742 0_0402_5%~D@
4
4
1
1
12
12
USBP13- <17>
USBP13+ < 17>
B B
1
RSMRST circuit
RSMRST#
+3.3V_ALW_PCH
R1622
R1622
100K_0402_5%~D
100K_0402_5%~D
1 2
+3.3V_ALW
1 2
EC SIDE
PCH_RSMRST#<40>
PCH_RSMRST#
1 2
R1623 0_0402_5%~D@R1623 0_0402_5%~D@
PCH_RSMRST#_Q
5
1
P
B
2
A
G
3
C288 0.1U_04 02_16V7K~D@ C288 0.1U_0402_16V7K~D@
U7
U7
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
R1624 0_0402_5%~D@ R1624 0_0402_5%~D@
1 2
PCH_RSMRST#_Q <14,16>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
LA-8831P
LA-8831P
LA-8831P
30 61Thursday, September 13, 2012
30 61Thursday, September 13, 2012
30 61Thursday, September 13, 2012
1
1.0
1.0
1.0
+5V_ALW_PCH
12
R1630
R1630
33_0402_5%~D
33_0402_5%~D
1
C289
C289
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
A A
2
5
U4
U4
1
VCC
2
GND
RT9818A-44GU3 _SC70-3~D
RT9818A-44GU3 _SC70-3~D
RESET#
3
Page 31
Vinafix.com
5
+3.3V_LAN
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C470
C470
1
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
+3.3V_LAN
12
R549
R549
10K_0402_5%~D
10K_0402_5%~D
1 2
R555 0_0402 _5%~D@ R555 0_0402_5%~D@
12
R557
@R557
@
10K_0402_5%~D
10K_0402_5%~D
1 2
R1144 0_0402_5%~D@ R1144 0_0402_5%~D@
Y3
Y3
25MHZ_18PF_X3G025000DI1H-H~D
25MHZ_18PF_X3G025000DI1H-H~D
1
2
IN
GND
GND
OUT
3
4
LANCLK_REQ#<15>
PLTRST_LAN#<17>
CLK_PCIE_LAN<15>
CLK_PCIE_LAN#<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_P7<15>
PCIE_PTX_GLANRX_N7< 15>
LAN_SMBCLK<15>
LAN_SMBDATA<15>
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C471
C471
1
1 2
R1187 0_0402_5%~D@ R1187 0_0402_5%~D@
12
C458 0.1U_0402_10V7K~DC458 0 .1U_0402_10V7K~D
12
C459 0.1U_0402_10V7K~DC459 0 .1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0 .1U_0402_10V7K~D
1 2
C461 0.1U_0402_10V7K~DC461 0 .1U_0402_10V7K~D
R551 0_0402 _5%~D@R551 0_0402_5%~D@
1 2
1 2
R552 0_0402 _5%~D@R552 0_0402_5%~D@
SMBus Device Address 0xC8
LAN_DISABLE#_R<39>
LAN_ACTLED_YEL#<38>
LED_100_ORG#<38>
LED_10_GRN#<38>
T142 PAD~DT142 PAD~D
T143 PAD~DT143 PAD~D
1K_0402_5%~D
1K_0402_5%~D
12
R561
R561
1 2
R545 10K_040 2_5%~D@R 545 10K_0402_5%~D@
1 2
R546 10K_040 2_5%~D@R 546 10K_0402_5%~D@
D D
PM_LANPHY_ENABLE<18>
C C
4
+3.3V_RUN
12
R547
R547
10K_0402_5%~D
10K_0402_5%~D
LANCLK_REQ#_R
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LAN_SMBCLK_R
LAN_SMBDATA_R
LAN_DISABLE#_R
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
XTALI
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
12
R562
R562
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
MDI
MDI
PCIE
PCIE
RSVD_VCC3P3_1
RSVD_VCC3P3_2
SMBUS
SMBUS
VDD3P3_OUT
JTAG LED
JTAG LED
82579_QFN48_6X6~D
82579_QFN48_6X6~D
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_NC
VDD3P3_IN
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD1P0_47
VDD1P0_46
VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
13
14
17
18
20
21
23
24
6
+RSVD_VCC3P3_1
1
+RSVD_VCC3P3_2
2
5
4
15
19
29
47
46
37
43
11
40
22
16
8
REGCTL_PNP10
7
49
3
LAN_TX0+
LAN_TX0-
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
+3.3V_LAN_OUT
+1.0V_LAN
12
12
1
C464
C464
1U_0603_10V7K~D
1U_0603_10V7K~D
2
2
REGCTL_PNP10
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C466
C466
2
2
Note:
+1.0V_LAN will work at 0.95V t o 1.15V
change to SHI0000C900 (need CIS link)
L29
L29
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
Idc max=330mA
Place R548, C46 2, C463 and L29 close to U31
+1.0V_LAN
22U_0805_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C468
C468
C467
C467
2
22U_0805_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1177
C1177
1
1
C469
C469
2
2
1
+1.0V_LAN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C462
C462
C463
C463
1
1
2
2
+3.3V_LAN
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1178
C1178
1
2
Place C1178 clo se to pin5
R548
@R548
@
0_0805_5%~D
0_0805_5%~D
1 2
+1.05V_M
+3.3V_M
+1.0V_LAN POWER OPTIONS
R563
@R563
Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3
Add L124~L131 for EMI request
LAN_TX0+
LAN_TX0-
B B
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
1 2
L124 12NH_0603CS-120EJTS_5%~DL124 12NH_0603CS-120EJTS_5%~D
1 2
L125 12NH_0603CS-120EJTS_5%~DL125 12NH_0603CS-120EJTS_5%~D
1 2
L126 12NH_0603CS-120EJTS_5%~DL126 12NH_0603CS-120EJTS_5%~D
1 2
L127 12NH_0603CS-120EJTS_5%~DL127 12NH_0603CS-120EJTS_5%~D
1 2
L128 12NH_0603CS-120EJTS_5%~DL128 12NH_0603CS-120EJTS_5%~D
1 2
L129 12NH_0603CS-120EJTS_5%~DL129 12NH_0603CS-120EJTS_5%~D
1 2
L130 12NH_0603CS-120EJTS_5%~DL130 12NH_0603CS-120EJTS_5%~D
1 2
L131 12NH_0603CS-120EJTS_5%~DL131 12NH_0603CS-120EJTS_5%~D
LAN_TX0+_L
LAN_TX0-_L
LAN_TX1+_L
LAN_TX1-_L
LAN_TX2+_L
LAN_TX2-_L
LAN_TX3+_L
LAN_TX3-_L
Add R1735~R1742 and C1326~C1329 for IEEE LAN EA
LAN_TX0+_L
LAN_TX0-_L
LAN_TX1+_L
LAN_TX1-_L
LAN_TX2+_L
LAN_TX2-_L
LAN_TX3+_L
LAN_TX3-_L
1 2
R1735 6.8_0402_1%~DR1735 6.8_0402_1%~D
1 2
R1736 6.8_0402_1%~DR1736 6.8_0402_1%~D
1 2
R1737 6.8_0402_1%~DR1737 6.8_0402_1%~D
1 2
R1738 6.8_0402_1%~DR1738 6.8_0402_1%~D
1 2
R1739 6.8_0402_1%~DR1739 6.8_0402_1%~D
1 2
R1740 6.8_0402_1%~DR1740 6.8_0402_1%~D
1 2
R1741 6.8_0402_1%~DR1741 6.8_0402_1%~D
1 2
R1742 6.8_0402_1%~DR1742 6.8_0402_1%~D
1
C1326
C1326
15P_0402_50V8J~D
15P_0402_50V8J~D
2
1
C1327
C1327
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
2
1
C1328
C1328
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
2
1
C1329
C1329
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
2
LAN_TX0+_R <38>
LAN_TX0-_R <38>
LAN_TX1+_R <38>
LAN_TX1-_R <38>
LAN_TX2+_R <38>
LAN_TX2-_R <38>
LAN_TX3+_R <38>
LAN_TX3-_R <38>
Shared with PCH
1.05V SVR
STUFF: R548
NO STUFF: L29
Dalmore has LAN Switch.
FeiDao no LAN Switch.
A A
Internal SRV
*
STUFF: L29
NO STUFF: R548
SIO_SLP_LAN#<16,39>
LED_100_ORG#
LED_10_GRN#
+3.3V_ALW2
12
61
2
+3.3V_LAN
1
B
2
A
+PWR_SRC_S
R565
R565
100K_0402_5%~D
100K_0402_5%~D
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q35A
Q35A
C478
@C478
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
5
P
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
U15
U15
12
R564
R564
100K_0402_5%~D
100K_0402_5%~D
ENAB_3VLAN
1M_0402_5%~D
1M_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
WLAN_LAN_DISB# <39>
12
R1638
R1638
Q35B
Q35B
Q34
Q34
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C477
C477
2
@
0_1206_5%~D
0_1206_5%~D
1 2
+3.3V_LAN+3.3V_ALW
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C475
C475
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C476
C476
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
LA-8831P
LA-8831P
LA-8831P
31 61Thursday, September 13, 2012
31 61Thursday, September 13, 2012
31 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 32
Vinafix.com
5
D D
4
3
2
1
always short
1 2
PAD-OPEN1x1m
+3.3V_RUN_TPM
SP_TPM_LPC_EN<39>
C C
PAD-OPEN1x1m
1 2
R873 0_0402_5%~D@ R873 0_0402_5%~D@
+3.3V_RUN_TPM
CLK_PCI_TPM_TCM< 15>
PCH_PLTRST#_EC<17,30,34,39,40>
CLK_PCI_TPM_TCM
12
RE5@
RE5@
33_0402_5%~D
33_0402_5%~D
1
CE3
@CE3
@
33P_0402_50V8J~D
33P_0402_50V8J~D
2
LPC_LFRAME#<14,34,39,40>
IRQ_SERIRQ<14,39,40>
1 2
R1663 10K_0402_5%~D@ R1663 10K_ 0402_5%~D@
1 2
R1662 0_0402_5%~D@ R1662 0_0402_5%~D@
D91 RB751S40T1_SOD523-2~D@D91 RB751S40T1_SOD523-2~D@
LPC_LAD0<14,34,39,40>
LPC_LAD1<14,34,39,40>
LPC_LAD2<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLKRUN#<16,39,40>
+3.3V_SB3V
+3.3V_SB3V
SP_TPM_LPC_EN_R
21
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
TCM_BA1
1
2
TPM@
TPM@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
TPM@
TPM@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C44
C44
2
ATMEL TPM for E4
C45
C45
U39
TPM@ U39
TPM@
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A18-AB_TSSOP28
AT97SC3204-X2A18-AB_TSSOP28
VCC_0
VCC_1
VCC_2
V_BAT
NBO_13
NBO_14
GPIO6
TESTBI
TESTI
NC_7
GND_4
GND_11
GND_18
GND_25
10
19
24
12
13
14
6
9
8
7
4
11
18
25
+3.3V_RUN_TPM
TPM@
TPM@
test1
JETWAY_CLK14M
NC_P
1 2
C554 1U _0402_6.3V6K~D@C 554 1U_0402_6.3V6K~D@
C554 DalMore pop it.
test2
TCM_BA0
PP
R656 4.7K_0402_5%~D@ R656 4.7K_0402_5%~D@
1 2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C550
C550
C551
C551
2
2
TPM@
TPM@
JETWAY_CLK14M <15>
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C552
C552
2
2
TPM@
TPM@
+3.3V_RUN_TPM
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C553
C553
TPM@
TPM@
+3.3V_RUN_TPM+3.3V_RUN
PJP61
PJP61
DalMore has JUSH.
FeiDao no JUSH.
Co-lay U37 and U38
LPC layout: Place TCM first and then end LPC with TPM.
B B
LOW:Power Down Mode
High:Working Mode
+3.3V_RUN_TPM
12
12
12
R658
@R658
@
10K_0402_5%~D
10K_0402_5%~D
12
R660
TPM@ R660
TPM@
10K_0402_5%~D
10K_0402_5%~D
TCM_BA0
TCM_BA1
R657
@R657
@
10K_0402_5%~D
10K_0402_5%~D
R659
TPM@ R659
TPM@
10K_0402_5%~D
10K_0402_5%~D
A A
China TCM: NationZ & Jetway co-lay
U37
@ U 37
@
SP_TPM_LPC_EN_R
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
PP
TCM_BA1
TCM_BA0
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
GND_11
GND_18
GND_25
VDD_0
VDD_1
VDD_2
GND_4
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
+3.3V_RUN_TPM
10
19
24
11
18
25
4
5
12
13
1
2
6
8
14
test1
JETWAY_CLK14M
test2
NC_P
+3.3V_SB3V
JETWAY_CLK14MCLK_PCI_TPM_TCM
12
@
@
RE6
RE6
33_0402_5%~D
33_0402_5%~D
1
@
@
CE4
CE4
27P_0402_50V8J~D
27P_0402_50V8J~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
TPM/TCM
TPM/TCM
TPM/TCM
LA-8831P
LA-8831P
LA-8831P
32 61Thursday, September 13, 2012
32 61Thursday, September 13, 2012
32 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 33
Vinafix.com
A
1 1
B
C
D
E
+3.3V_RUN
+1.5V_RUN
+PE_VDDH
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C573
C573
C574
C574
2
2
2 2
place close to pin U38.32
3 3
4 4
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C561
C561
C562
C562
2
2
CLK_PCIE_MMI<15>
CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>
PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_P6<15>
PCIE_PTX_MMIRX_N6<15>
PLTRST_MMI#<17>
MMICLK_REQ#<15>
L45
L45
BLM18PG471SN1D_2P~D
BLM18PG471SN1D_2P~D
1 2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
C571 0.1U_0402_10V7K~DC571 0.1U_0402_10V7K~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C577
C577
2
2
1 2
L44 BLM18BD601SN 1D_0603~DL44 BLM18BD601SN 1D_0603~D
C578 4.7U_06 03_6.3V6K~DC578 4.7U_0603_6.3V6K~D
R677 191_0402_1%~DR677 191_0402_1%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C576
C576
C575
C575
2
+3.3VDDH
+VDDH_SD +OZ_AVDD
+PE_VDDH
+PE_VDDH
12
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
1 2
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
MMI_VCC_OUT
SD_CMD/MS_BS
DalMore has CE758 on SD/MMCCLK signal.
DVDD
AVDD
SKT_VCC
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
MS_CD#
MMI_CLK
SD_CD#
SD_WPI
+OZ_DVDD
10
8
+SKT_VCC
17
15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
SD/MMCDAT0_R
29
27
25
SD/MMCDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21
20
11
SD/MMCCMD_R
19
SD/MMCCLK_R
18
SD/MMCCD#
12
SDWP
30
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C565
C565
2
R663 33_0402_5%~DR663 33_0402_5%~D
1 2
R664 33_0402_5%~DR664 33_0402_5%~D
1 2
R665 33_0402_5%~DR665 33_0402_5%~D
1 2
R668 33_0402_5%~DR668 33_0402_5%~D
1 2
R669 33_0402_5%~DR669 33_0402_5%~D
1 2
R670 33_0402_5%~DR670 33_0402_5%~D
1 2
R672 33_0402_5%~DR672 33_0402_5%~D
1 2
R673 33_0402_5%~DR673 33_0402_5%~D
1 2
R674 33_0402_5%~DR674 33_0402_5%~D
1 2
R676 10_0402_1%~DR676 10_0402_1%~D
1 2
R676 DalMore 33ohm.
EMI request
SD/MMCCLK
12
RE678
@RE678
@
22_0402_5%~D
22_0402_5%~D
1
CE757
@CE757
@
33P_0402_50V8J~D
33P_0402_50V8J~D
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C560
C559
C559
2
+3.3V_RUN_CARD
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
C579
C579
2
C560
2
Note: The trace need to route as
daisy-chain and the trace of SD signals
need to route as short as possible
JSD1
JSD1
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
10K_0402_5%~D
10K_0402_5%~D
12
R826
R826
C572
C572
SD/MMCCMD
SD/MMCCLK
SDWP
SD/MMCCD#
SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
9
12
8
1
2
4
3
15
14
13
11
7
5
10
6
16
17
T-SOL_156-4000000606_15P-T
T-SOL_156-4000000606_15P-T
CONN@
CONN@
VCC/VDD/SD4
CMD/SD2
CLK/SD5
WP SW_TAISOL/SD
CD SW_TAISOL/SD
DAT0/SD7
DAT1/SD8
DAT2/SD9
DAT3/SD1
DAT4/MMC10
DAT5/MMC11
DAT6/MMC12
DAT7/MMC13
VSS1/SD3
GND/VSS2/SD6
CD&WPSW /GND
CD&WPSW /GND
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C564
C564
C563
C563
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C566
C566
2
2
2
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7S D/MMCDAT7_R
SD/MMCCMD
SD/MMCCLK
+3.3V_RUN_CARD
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A
B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader OZ600FJ0
Card Reader OZ600FJ0
Card Reader OZ600FJ0
LA-8831P
LA-8831P
LA-8831P
33 61Thursday, September 13, 2012
33 61Thursday, September 13, 2012
33 61Thursday, September 13, 2012
E
1.0
1.0
1.0
Page 34
Vinafix.com
5
USB_MCARD2_DET#
PCIE_MCARD2_DET#_R
D D
R694 100K _0402_5%~DR694 100K_0402_5%~D
R695 10K_ 0402_5%~DR695 10K_0402_5%~D
+3.3V_RUN
12
+3.3V_RUN
12
DDR_XDP_WAN_ SMBCLK<12,13,15>
DDR_XDP_WAN_ SMBDAT<12,13,15>
Mini WWAN/GPS/LTE H=5.2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
R719
R719
1 2
+SIM_PWR
1
2
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
100K_0402_5%~D
100K_0402_5%~D
C616
C616
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
JMINI1
PCIE_WAKE#<40>
MINI1CLK_REQ#<15>
CLK_PCIE_MINI1#<15>
CLK_PCIE_MINI1<15>
PCIE_PRX_WANTX_N 1<15>
PCIE_PRX_WANTX_P 1<15>
PCIE_PTX_WANRX_N 1<15>
PCIE_PTX_WANRX_P 1<15>
PCIE_MCARD2_DET#<17>
PCIE_WAKE#
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
PCIE_PTX_WANRX_N 1_C
1 2
PCIE_PTX_WANRX_P 1_C
1 2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
1 2
R725 0_0402 _5%~D@ R725 0_0402_5%~D@
PCIE_MCARD2_DET#_R
Change R725 to reserve (no PCIE card)
+1.5V_RUN
C C
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
@
@
C593
C593
2
2
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C610
C610
2
2
B B
SIM Card Push-Push
HW_GPS_DISABLE2#<39>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
@
@
C594
C594
33P_0402_50V8J~D
33P_0402_50V8J~D
22U_0805_6.3V6M~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C611
C611
22U_0805_6.3V6M~D
1
1
C612
C612
C613
C613
2
2
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
+
+
C615
C615
C614
C614
2
2
PWR
Rail
+3.3V
+3.3Vaux
+1.5V
U40
@U40
@
UIM_RESET
A A
UIM_CLK
33P_0402_50V8J~D
33P_0402_50V8J~D
1
@
@
2
1
2
3
33P_0402_50V8J~D
33P_0402_50V8J~D
1
@
@
SRV05-4.TCT_SOT23-6~D
SRV05-4.TCT_SOT23-6~D
C629
C629
C628
C628
2
5
UIM_VPP
6
5
UIM_DATA
4
33P_0402_50V8J~D
33P_0402_50V8J~D
1
@
@
C630
C630
2
JMINI1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
LCN_DAN08-52406-0500
LCN_DAN08-52406-0500
CONN@
CONN@
LED_WWAN _OUT#
Voltage
Tolerance
+-9%
+-9%
+-5%
+SIM_PWR
33P_0402_50V8J~D
33P_0402_50V8J~D
De-pop C628, C629, C30, C631 (Reserve)
1
@
@
C631
C631
2
4
R1157 0_0402_5%~D@ R1157 0_0402_5%~D@
R1158 0_0402_5%~D@ R1158 0_0402_5%~D@
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
R704 0_0402 _5%~D@ R704 0_0402_5%~D@
WWAN_SM BCLK
WWAN_SM BDAT
USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN _OUT#L ED_WWAN_OUT#
+3.3V_PCIE_WWAN
G
G
2
13
D
S
D
S
Q77
Q77
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1159
@
12
R1159
12
12
+1.5V_RUN
+SIM_PWR
USBP5- <17>
USBP5+ <17>
USB_MCARD2_DET# <18>
1 2
R697 0_0402 _5%~D@ R697 0_0402_5%~D@
2.2K_0402_5%~D
2.2K_0402_5%~D
12
WWAN_RA DIO_DIS# <39>
PCH_PLTRST#_EC <17,30,32,39,40>
WIRELESS_LED# <39,43>
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
UIM_CLK
250 (Wake enable)
250
5 (Not wake enable)
375
NA
JSIM1
JSIM1
1
VCC
2
RST
3
CLK
4
NC
5
GND
10
G1
11
G2
HB_5620821-SICR11
HB_5620821-SICR11
CONN@
CONN@
VPP
GND
I/O
CD
G3
G4
Update JSIM Symbol
4
@R1160
@
R1160
WWAN_SM BCLK
WWAN_SM BDAT
PCIE_MCARD2_DET#USB_MCARD2_DET#
6
7
8
9
12
13
+1.5V_RUN
UIM_VPP
UIM_DATAUIM_RESET
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
@
@
C601
C601
2
2
3
WLAN_RADIO_DIS#< 39>
COEX2_WLAN_ACTIVE<41>
COEX1_BT_ACTIVE<41>
COEX2_WLAN_ACTIVE
C600
@C600
@
33P_0402_50V8J~D
33P_0402_50V8J~D
1 2
R693 0_0402 _5%~D@ R693 0_0402_5%~D@
D31
D31
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
MINI2CLK_REQ#<15>
CLK_PCIE_MINI2#<15>
1
2
PCIE_PTX_WLANRX_ N2<15>
PCIE_PTX_WLANRX_ P2<15>
CLK_PCIE_MINI2<15>
HOST_DEBUG_RX<40>
PCIE_PRX_WLANTX_ N2<15>
PCIE_PRX_WLANTX_ P2<15>
PCIE_MCARD1_DET#<18>
PCH_CL_CLK1<15>
PCH_CL_DATA1<15>
PCH_CL_RST1#<15>
WLAN_RADIO_DIS#_R
21
PCIE_WAKE#<40>
1 2
R700 0_0402_5%~D@R700 0_0402_5%~D@
1 2
R702 0_0402_5%~D@R702 0_0402_5%~D@
MSCLK< 40>
C596 0.1U_0402_10V7K~DC596 0 .1U_0402_10V7K~D
1 2
1 2
C598 0.1U_0402_10V7K~DC598 0 .1U_0402_10V7K~D
1 2
R707 0_0402_5%~D@R707 0_0402_5%~D@
BT_RADIO_DIS#_R
PCIE_WAKE#
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2_C
PCIE_PTX_WLANRX_ P2_C
2
Mini WLAN/WIMAX H=4
+3.3V_WLAN
check
1 2
R1726 0_0402_5%~D@R1726 0_0402_5%~D@
WiGi_RADIO_DIS#<39>
BT_RADIO_DIS#<39,41>
Add WiGig card function
+3.3V_WLAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@C603
@
1
@
@
C603
C602
C602
2
mSATA_PTX_DRX_N0_C<14>
mSATA_PTX_DRX_P0_C<14>
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
@
@
C619
C619
2
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RF TEAM request
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
2
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
@
@
C620
C620
1
C604
C604
2
mSATA_PRX_DTX_P0_C<14>
mSATA_PRX_DTX_N0_C<14>
+3.3V_RUN
1
2
2
C605
C605
1
mSATA_DET#<18>
HDD_DET#<14>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@C621
@
1
C621
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCLK_80H<15>
C617
C617
C618
C618
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
D92
D92
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
1 2
R1727 0_0402_5%~D@R1727 0_0402_5%~D@
D93
D93
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1
C607
C607
C608
1
C1310
C1310
C1309
C1309
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1 2
1 2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1 2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C623
C623
2
C608
2
PCH_PLTRST#_EC
PCLK_80H
1 2
1 2
mSATA_PTX_DRX_N0
mSATA_PTX_DRX_P0
mSATA_DET#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C624
C624
1
C606
C606
R711 100K_0402_5%~DR711 100K_0402_5%~D
C622
C622
WiGi_RADIO_DIS#_R
21
BT_RADIO_DIS#_R
21
47P_0402_50V8J
47P_0402_50V8J
12
@
@
C609
C609
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
mSATA_PRX_DTX_P0
mSATA_PRX_DTX_N0
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C625
C625
2
1
C626
C626
2
JMINI2
JMINI2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
LCN_DAN08-52406-0500
LCN_DAN08-52406-0500
CONN@
CONN@
JMINI3
JMINI3
1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
CONN@
CONN@
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
LCN_DAN08-52406-0500
LCN_DAN08-52406-0500
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
WIMAX_LED#
WLAN_LED#
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
1
+3.3V_WLAN
+1.5V_RUN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
BT_LED#
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
R703 0_0402 _5%~D@ R703 0_0402_5%~D@
USB_MCARD3_DET#
PCIE_MCARD1_DET#
1 2
R698 0_0402 _5%~D@ R698 0_0402_5%~D@
PCIE_MCARD1_DET#
USB_MCARD1_DET#
MSDATA
WLAN_RADIO_DIS#_R
1 2
R1717 0_0402_5%~D@ R1717 0_0402_5%~D@
WiGi_RADIO_DIS#_R
USBP4USBP4+PCIE_MCARD1_DET#
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
BT_LED#
1 2
R706 0_0402 _5%~D@ R706 0_0402_5%~D@
+3.3V_WLAN
G
G
2
R1734
R1734
1 2
100K_0402_5%~D
100K_0402_5%~D
S
S
Q126
Q126
R705
R705
R718
R718
1 2
1 2
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
2
Q124A
Q124A
USB_MCARD3_DET# mSATA_DET#
+1.5V_RUN
LPC_LFRAME# <14,32,39,40>
PCH_PLTRST#_EC
12
R712 100K_0402_5%~D@R712 100K_0402_5%~D@
WPAN Noise
USB_MCARD3_DET#
1
@C627
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1 2
R692 100K_0402_5%~DR692 100K_0402_5%~D
PCIE_MCARD1_DET#USB_MCARD1_DET#
1 2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@
1 2
R701 100K_0402_5%~DR701 100K_0402_5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P_ 0402_25V7K~D
PCH_PLTRST#_EC
Add BT_LED# control for WiGi Card
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
WIRELESS_LED#
13
D
D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
LPC_LAD0 <14,32,39,40>
C627
HOST_DEBUG_TX <40>
USB_MCARD1_DET# <18>
MSDATA
61
12
MSDATA <40>
WIMAX_LED# STUDY FOR DEBUG
+3.3V_WLAN
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
Q124B
Q124B
1 2
R708 0_0402_5%~D@R708 0_0402_5%~D@
just reserve
USBP4- <17>
USBP4+ <17>
WIRELESS_LED#WIRELESS_LED#
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Mini Card
Mini Card
Mini Card
LA-8831P
LA-8831P
LA-8831P
34 61Thursday, September 13, 2012
34 61Thursday, September 13, 2012
34 61Thursday, September 13, 2012
1
+3.3V_ALW_PCH
+3.3V_RUN
1.0
1.0
1.0
Page 35
Vinafix.com
5
4
3
2
1
Power Control for Mini card2
+3.3V_ALW
D D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AUX_EN_WOW L<39>
+3.3V_ALW
Q39A
Q39A
2
12
R716
R716
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R713
R713
5
61
6
12
R714
R714
2
1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q39B
Q39B
4
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
45
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1620
R1620
1
2
+3.3V_WLAN
12
R715
R715
20K_0402_5%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
20K_0402_5%~D
DalMore has ExprssCard PWR/Connector.
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_WW AN_PWREN<39>
B B
Power Control for Mini card1
+3.3V_ALW
+3.3V_ALW
Q41A
Q41A
2
12
R726
R726
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WW AN_PWREN#
61
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
3
Q41B
Q41B
5
4
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
6
R722
R722
2
1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1625
R1625
D
D
Q40
Q40
G
G
3
1
2
+3.3V_PCIE_WWAN
S
S
45
2200P_0402_50V7K~D
2200P_0402_50V7K~D
C644
C644
Q73
Q73
12
R723
R723
1K_0402_5%~D
1K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
MCARD_WW AN_PWREN#
2
G
G
S
S
Power Control for Mini card3
+3.3V_ALW
+3.3V_ALW
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q43A
Q43A
MCARD_MISC_PW REN<39>
A A
2
12
R733
R733
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
470K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R728
R728
61
470K_0402_5%~D
12
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q43B
Q43B
5
4
Q42
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1628
R1628
12
220P_0402_50V8J~D
220P_0402_50V8J~D
C650
C650
+3.3V_PCIE_FLASH
12
20K_0402_5%~D
20K_0402_5%~D
PJP3
@PJP3
@
112
JUMP_43X79
JUMP_43X79
R730
R730
+3.3V_RUN
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
LA-8831P
LA-8831P
LA-8831P
35 61Thursday, September 13, 2012
35 61Thursday, September 13, 2012
35 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 36
Vinafix.com
5
1 2
R1703 0_0402_5%~D@R1703 0_0402_5%~D@
L115
C1243 0.1U_0402_1 0V7K~DC1243 0.1U_0402_10V7K~D
USB3TN2<17>
USB3TP2<17>
D D
12
C1242 0.1U_0402_1 0V7K~DC1242 0.1U_0402_10V7K~D
12
USB3T_N2 USB3TN2_D-
L115
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1706 0_0402_5%~D@R1706 0_0402_5%~D@
4
2
2
3
3
USB3TP2_D+USB3T_P2
USBP1-<17>
USBP1+<17>
3
1 2
R1705 0_0402_5%~D@ R1705 0_0402_5%~D@
L113
L113
4
4
1
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R1707 0_0402_5%~D@ R1707 0_0402_5%~D@
3
3
2
2
3
2
1
USBP1_R_D-
USBP1_R_D+
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
D90
D90
2
+5V_USB_PWR
1
2
1
JUSB3
JUSB3
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
C1245
C1245
1
+
+
2
USBP1_R_D-
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
USBP1_R_D+
USB3RN2_D-
C1244
C1244
USB3RP2_D+
USB3TN2_DUSB3TP2_D+
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
SANTA_373070-1
SANTA_373070-1
Link CIS
CONN@
CONN@
GND
GND
GND
GND
10
11
12
13
1 2
R1704 0_0402_5%~D@R1704 0_0402_5%~D@
L114
L114
USB3RN2<17>
USB3RP2<17>
C C
USB_PWR_SHR_E N#<39>
B B
+5V_ALW
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C1230
C1230
1
1
2
2
A A
R1626 0_0402_5%~D@R1626 0_0402_5%~D@
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
ESATA_USB_PWR _EN#<39>
C1231
C1231
PWRSHARE_EN #
12
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1702 0_0402_5%~D@R1702 0_0402_5%~D@
SA00004VH00(SLG55584) CIS Link OK
USBP0-<17>
USBP0+<17>
SB#
+5V_ALW
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
2
U75
U75
1
GND
FAULT1#
2
IN
3
IN
4
EN1#
EN2#5FAULT#2
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
C715
C715
OUT1
OUT2
T-PAD
USB_PWR_SHR_V BUS_EN<39>
8
7
6
5
10
9
8
7
ILIM
6
11
2
2
3
3
U2
U2
CB
TDM
TDP
VDD
SLG55584AVTR_TDFN8_2X2
SLG55584AVTR_TDFN8_2X2
CEN
SELCDP
Thermal Pad
USB3RN2_D-
USB3RP2_D+
R784 0_0402_5%~D@ R784 0_0402_5%~D@
1
2
DM
3
DP
4
9
R1613
@R1613
@
10K_0402_5%~D
10K_0402_5%~D
USB_OC1# <17>
USB_OC0# <17>
1 2
PWRSHARE_EN
USBP0_DUSBP0_D+
SEL PWRSHARE_EN #
+SATA_SIDE_PWR
24.9K_0402_1%~D
24.9K_0402_1%~D
12
1 2
R1677
R1677
+5V_ALW
+5V_USB_CHG_PWR
USB3TN1<17>
USB3TP1<17>
USB3TP2_D+ USB3TP2_D +
USB3TN2_D- USB3TN2_D-
USB3RP2_D+ USB3RP2_D+
USB3RN2_D- USB3RN2_D-
2
G
R1614
R1614
10K_0402_5%~D
10K_0402_5%~D
1 2
13
D
D
S
S
G
SB#
2
G
G
Q53
@
Q53
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
USB3RN1<17>
USB3RP1<17>
D89
D89
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
Place D78 close to JUSB1
+5V_ALW
R816
R816
100K_0402_5%~D
100K_0402_5%~D
1 2
13
D
D
Q48
Q48
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
12
C412 0.1U_04 02_16V7K~DC412 0.1U_0402_16V7K~D
USB3TP1_C USB3TP1_D+
12
C413 0.1U_04 02_16V7K~DC413 0.1U_0402_16V7K~D
Place D72 close to JUSB1
10
9
7
6
D89 for ESD request change to NXP SC30000250L
+5V_ALW
10U_0805_10V4Z~D
10U_0805_10V4Z~D
USB_SIDE_EN#<39>
1
1
C675
0.1U_0402_16V7K~D
C675
0.1U_0402_16V7K~D
C676
C676
2
2
+5V_USB_CHG_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
C651
C651
2
L95
L95
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1605 0_0402_5%~D@ R1605 0_0402_5%~D@
1 2
R1604 0_0402_5%~D@ R1604 0_0402_5%~D@
L96
L96
1
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
R1606 0_0402_5%~D@ R1606 0_0402_5%~D@
R1603 0_0402_5%~D@ R1603 0_0402_5%~D@
1
4
1 2
1 2
2
2
3
3
2
3
USB3RN1_D-
USB3RP1_D+
2
3
USB3TN1_D-USB3TN1_C
U48
U48
1
2
4
G547I2P81U_MSOP8
G547I2P81U_MSOP8
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
3
C654
C654
2
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USBP0_D+ USBP0_R_D+
USBP0_D-
8
GND
VOUT
7
VOUT
VIN
6
VIN3VOUT
5
FLG
EN
USBP0_R_DUSBP0_R_D+
2
USB3RN1_D-
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
USB3RP1_D+
USB3TN1_DUSB3TP1_D+
1
D78 for ESD request change to NXP SC30000250L
D78
D78
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
L51
L51
1 2
OCE2012120YZF_4P
OCE2012120YZF_4P
1 2
R736 0_0402_5%~D@ R736 0_0402_5%~D@
1 2
R740 0_0402_5%~D@ R740 0_0402_5%~D@
USB_OC0# <17>
USB3RN1_D-
10
USB3RP1_D+
9
USB3TN1_D-
7
USB3TP1_D+
6
34
USBP0_R_D-
1
2
3
4
5
6
7
8
9
+5V_USB_PWR
JUSB1
JUSB1
VBUS
DD+
GND
SSRXSSRX+
GND
GND
GND
SSTX-
GND
SSTX+
GND
SANTA_373070-1
SANTA_373070-1
CONN@
CONN@
10
11
12
13
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB 3.0
USB 3.0
USB 3.0
LA-8831P
LA-8831P
LA-8831P
36 61Thursday, September 13, 2012
36 61Thursday, September 13, 2012
36 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 37
Vinafix.com
5
4
3
2
1
ESATA Repeater
D D
C C
1 2
R752 4.99K_0402_1%~D@R752 4.99K_0402_1%~D@
1 2
R751 0_0402_5%~D@R751 0_0402_5%~D@
USB3TN3<17>
USB3TP3<17>
REXT
ESATA_CD#_R
C1234 0.1U_0402_10V7K~DC1234 0.1U_0402_10V 7K~D
12
C1235 0.1U_0402_10V7K~DC1235 0.1U_0402_10V 7K~D
12
USB3T_N3
R7460_0402_5%~D @ R7460_0402_5%~D @
12
R1678 0_0402_ 5%~D@ R1678 0_0402_5%~D@
1
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
R1681 0_0402_ 5%~D@ R1681 0_0402_5%~D@
1 2
L110
L110
1
4
1 2
ESATA_CD# <18>
2
2
3
3
1 2
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PRX_DTX_P4_C<14>
USB3TN3_D-
USB3TP3_D+USB3T_P3
ESATA_PTX_DRX_P4_C ESATA_PTX_DRX_P4
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
USBP2-<17>
USBP2+<17>
R749 0_0402 _5%~D@ R749 0_0402_5%~D@
12
C663 0.01U_0402_16V7K~D7@ C663 0.01U_0402_16V7K~D7@
C664 0.01U_0402_16V7K~D7@ C664 0.01U_0402_16V7K~D7@
C665 0.01U_0402_16V7K~D7@ C665 0.01U_0402_16V7K~D7@
C666 0.01U_0402_16V7K~D7@ C666 0.01U_0402_16V7K~D7@
ESATA_PTX_DRX_N4
12
ESATA_PRX_DTX_N4
12
12
1 2
R1679 0_0402_5%~D@ R1679 0_0402_5%~D@
L111
L111
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R1680 0_0402_5%~D@ R1680 0_0402_5%~D@
D88 for ESD request change to NXP SC30000250L
D88
1 2
R1682 0_0402_ 5%~D@ R1682 0_0402_5%~D@
L112
L112
B B
USB3RN3<17>
USB3RP3<17>
1
1
2
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
R1683 0_0402_ 5%~D@ R1683 0_0402_5%~D@
4
1 2
3
USB3RN3_D-
2
USB3RP3_D+
3
USB3TP3_D+ USB3TP3_D +
USB3TN3_D- USB3TN3_D-
USB3RP3_D+ USB3RP3_D+
USB3RN3_D- USB3RN3_D-
D88
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
Place D79 close to JESATA1
+3.3V_RUN
pin7 need to meet 2nd source.
pop R747
12
R747
R747
0_0402_5%~D
0_0402_5%~D
ESATA_CD#_R
2
2
3
3
Place D74 close to JESATA1
10
9
7
6
U44
7@U44
7@
7
EN
17
NC_GND_VDD
19
18
1
2
4
5
3
13
21
PS8513BTQFN20GTR-A0_TQFN20_4X4
PS8513BTQFN20GTR-A0_TQFN20_4X4
2
3
1
NC_GND_VDD
NC_GND_VDD
A_INp
A_INn
B_OUTn
B_OUTp
GND
GND
GND
USBP2_D-
USBP2_D+
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
D87
D87
PREXT/NC/VDD
NC/GND/VDD
VCC
VCC
A_PRE
B_PRE
A_OUTp
A_OUTn
B_INp
B_INn
+3.3V_RUN
6
16
20
10
9
8
ESATA_PTX_DRX_P4_RP
15
ESATA_PTX_DRX_N4_RP
14
ESATA_PRX_DTX_P4_RP
11
ESATA_PRX_DTX_N4_RP
12
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
REXT
ESATA_PE1
ESATA_PE2
@
R1594 0_0402_5%~D7@R1594 0_0402_5%~D
7@
R1595 0_0402_5%~D@R1595 0_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
7@ C6 61
7@
7@ C6 62
7@
1
C661
C662
2
12
12
C1236 0.01U_0402_ 16V7K~DC1236 0.01U_0402_16V7K~D
1 2
C1237 0.01U_0402_ 16V7K~DC1237 0.01U_0402_16V7K~D
1 2
C1238 0.01U_0402_ 16V7K~DC1238 0.01U_0402_16V7K~D
1 2
C1239 0.01U_0402_ 16V7K~DC1239 0.01U_0402_16V7K~D
1 2
@
R745 0_0402_5%~D@R745 0_0402_5%~D
R743 0_0402_5%~D@R743 0_0402_5%~D@
12
12
+SATA_SIDE_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
C1232
C1232
+
+
2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
C1233
C1233
1
2
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
SATA_PRX_DTX_N4
SATA_PRX_DTX_P4
USB3RN3_DUSB3RP3_D+
USB3TN3_DUSB3TP3_D+
USBP2_DUSBP2_D+
JESA1
JESA1
1
VBUS
2
D-
USB2.0
USB2.0
3
D+
4
GND
5
GND
6
A+
7
A-
ESATA
ESATA
8
GND
9
B-
10
B+
11
GND
12
SSRX-
13
SSRX+
14
GND
15
SSTX-
USB3.0
USB3.0
16
SSTX+
17
GND
18
GND
19
GND
20
GND
TAIWI_EU147-167CRL-TW D
TAIWI_EU147-167CRL-TW D
Link CIS
CONN@
CONN@
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C SATA_PTX_DRX_N4_B
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C
A A
R1718 0_0402_5%~D8@ R1718 0_0402_5%~D8@
R1720 0_0402_5%~D8@ R1720 0_0402_5%~D8@
R1722 0_0402_5%~D8@ R1722 0_0402_5%~D8@
R1724 0_0402_5%~D8@ R1724 0_0402_5%~D8@
12
12
12
12
SATA_PTX_DRX_P4_B
SATA_PRX_DTX_N4_B
SATA_PRX_DTX_P4_B
R1719 0_0402_5%~D8@ R1719 0_0402_5%~D8@
R1721 0_0402_5%~D8@ R1721 0_0402_5%~D8@
R1723 0_0402_5%~D8@ R1723 0_0402_5%~D8@
R1725 0_0402_5%~D8@ R1725 0_0402_5%~D8@
12
12
12
12
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ESATA
ESATA
ESATA
LA-8831P
LA-8831P
LA-8831P
37 61Thursday, September 13, 2012
37 61Thursday, September 13, 2012
37 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 38
Vinafix.com
5
TR1
TR1
LAN_TX3 -_R<31>
1
TD1+
4
1:1
1:1
TX1+
24
NB_LAN_ TX3-
3
2
1
C1323~C1325 reserve for EMI
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1
@
@
C1324
C1324
2
LAN_ACT LED_YEL#_R
LED_10_ GRN#_R
LED_100 _ORG#_R
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1
@
@
C1325
C1325
2
R1089 150_0402 _5%~DR1089 1 50_0402_5%~D
NB_LAN_ TX3-
NB_LAN_ TX3+
NB_LAN_ TX1-
NB_LAN_ TX2-
NB_LAN_ TX2+
NB_LAN_ TX1+
NB_LAN_ TX0-
NB_LAN_ TX0+
1 2
R1091 150_0402_5%~ DR1091 150_0402_5%~D
R1090 150_0402_5%~ DR1090 150_0402_5%~D
LAN_ACT LED_YEL#_R
1 2
1 2
LED_10_ GRN#_R
LED_100 _ORG#_R
+3.3V_LA N
1U_0603_10V6K~D
1U_0603_10V6K~D
C1169
C1169
1
2
JLOM1
JLOM1
10
Yellow LED-
9
Yellow LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED-
13
Orange LED-
12
Green-Orange LED+
CONN@
CONN@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
470P_0402_50V7K~D
470P_0402_50V7K~D
C1168
C1168
C1167
C1167
1
1
2
2
SANTA_1 30456-241
SANTA_1 30456-241
GND
GND
15
14
LAN_TX3 +_R<31>
D D
C C
+TRM_CT 4
+TRM_CT 3 Z2807
1
1
C36
C36
2
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
+TRM_CT 2
+TRM_CT 1
1
1
C38
C38
2
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
LAN_TX2 -_R<31>
LAN_TX2 +_R<31>
C37
C37
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
LAN_TX1 -_R<31>
LAN_TX1 +_R<31>
LAN_TX0 -_R<31>
C39
C39
LAN_TX0 +_R<31>
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
2
TD1-
3
TDCT1
4
TDCT2
5
TD2+
6
TD2-
7
TD3+
8
TD3-
9
TDCT3
10
TDCT4
11
TD4+
12
TD4-
350uH_IH-1 15-F~D
350uH_IH-1 15-F~D
GND
CHASSIS
NB_LAN_ TX3+
23
TX1-
Z2805
22
TXCT1
21
1:1
1:1
TXCT2
TX2+
TX2-
1:1
1:1
1:1
1:1
TX3+
TX3-
TXCT3
TXCT4
TX4+
TX4-
20
19
18
17
16
15
14
13
C1104
C1104
NB_LAN_ TX2-
NB_LAN_ TX2+
NB_LAN_ TX1-
NB_LAN_ TX1+
Z2806
Z2808
NB_LAN_ TX0-
NB_LAN_ TX0+
GND_CHA SSIS
1 2
150P_18 08_3KV8J
150P_18 08_3KV8J
12
12
12
12
R1113 75_0402_1%~DR1113 75_0402_1%~D
R1114 75_0402_1%~DR1114 75_0402_1%~D
R1111 75_0402_1%~DR1111 75_0402_1%~D
R1112 75_0402_1%~DR1112 75_0402_1%~D
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1
@
@
C1323
C1323
2
LAN_ACT LED_YEL#<31>
LED_10_ GRN#<31>
LED_100 _ORG#<31>
B B
AUD_HP_ OUT_L<2 9>
AUD_HP_ OUT_R<2 9>
A A
5
Combo Jack
MIC_IN_R<29>
12
30.1_040 2_1%~DR1650 30.1 _0402_1%~DR1650
12
30.1_040 2_1%~DR1651 30.1 _0402_1%~DR1651
AUD_HP_ OUT_L1
AUD_HP_ OUT_R1
4
JHP1
BLM18BD 601SN1D_0603 ~DL104 BLM18BD 601SN1D_0603 ~DL104
12
BLM18BD 601SN1D_0603 ~DL105 BLM18BD 601SN1D_0603 ~DL105
12
BLM18BD 601SN1D_0603 ~DL106 BLM18BD 601SN1D_0603 ~DL106
12
220P_0402_50V7K~D
220P_0402_50V7K~D
1
C1211
C1211
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
EXT_MIC
AUD_HP_ OUT_L2
AUD_HP_ OUT_R2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C1212
C1212
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C1213
C1213
D81 AZ5125-02S.R7G_SOT23-3D81 AZ5125-02S.R7G_SOT23-3
2
3
1
4
3
1
2
5
6
D82 AZ5125-02S.R7G_SOT23-3D82 AZ5125-02S.R7G_SOT23-3
2
3
1
JHP1
SINGA_2SJ 3053-100111F
SINGA_2SJ 3053-100111F
CONN@
CONN@
1 2
R1652 0_04 02_5%~D@ R1652 0_04 02_5%~D@
2
Normal
Close
7
G
G
AUD_HP_ NB_SENSE <29,39>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
RJ45
RJ45
RJ45
LA-8831P
LA-8831P
LA-8831P
38 61Thursday, September 13 , 2012
38 61Thursday, September 13 , 2012
38 61Thursday, September 13 , 2012
1
1.0
1.0
1.0
Page 39
Vinafix.com
+3.3V_ALW
1 2
R796 10K_040 2_5%~DR796 10K_0402_5%~D
1 2
R798 100K_04 02_5%~DR798 100K_0402_5%~D
1 2
R761 100K_04 02_5%~DR761 100K_0402_5%~D
1 2
R763 100K_04 02_5%~DR763 100K_0402_5%~D
D D
C C
+3.3V_RUN
B B
1 2
R760 100K_04 02_5%~D@ R760 100K_0402_5%~D@
1 2
R774 100K_04 02_5%~DR774 100K_0402_5%~D
1 2
R776 100K_04 02_5%~DR776 100K_0402_5%~D
R764 10K_040 2_5%~D@R 764 10K_0402_5%~D@
1 2
R769 100K_04 02_5%~DR769 100K_0402_5%~D
1 2
R778 100K_04 02_5%~DR778 100K_0402_5%~D
R785 10K_040 2_5%~D@R 785 10K_0402_5%~D@
1 2
R768 10K_040 2_5%~DR768 10K_0402_5%~D
R773 10K_040 2_5%~D@R 773 10K_0402_5%~D@
R755 100K_04 02_5%~D@ R755 100K_0402_5%~D@
1 2
R766 100K_04 02_5%~DR766 100K_0402_5%~D
R766 change to pull-high +3.3V_ALW for S3
1 2
R457 100K_04 02_5%~DR457 100K_0402_5%~D
1 2
R772 10K_040 2_5%~D@R 772 10K_0402_5%~D@
R771 10K_040 2_5%~D@R 771 10K_0402_5%~D@
1 2
R1082 100K_04 02_5%~D@ R1082 100K_0402_5%~D@
1 2
R1081 100K_04 02_5%~D@ R1081 100K_0402_5%~D@
1 2
R767 100K_0402_5%~DR767 100K_0402_5%~D
1 2
R775 10K_0402_5%~DR775 10K_0402_5%~D
1 2
R3 100K_0402_5%~DR3 100K_0402_5%~D
+3.3V_ALW
1 2
R800 100K _0402_5%~DR800 100K_0402_5%~D
VGA_ID
5
DYN_TURB_PWR_ALRT#
HW_GPS_DISABLE2#
PROCHOT_GATE
CPU_DETECT#
SLICE_BAT_PRES#
WWAN_RA DIO_DIS#
USB_PWR_SHR_E N#
MODULE_BATT_PRES#
12
ESATA_USB_PWR _EN#
USB_PWR_SHR_V BUS_EN
DOCK_SMB_ALERT#
12
USB_SIDE_EN#
MOD_SATA_PCIE#_DET
12
DOCK_DET# DOCK_DET#
12
WIRELESS_ON#/OFF
MCARD_PCIE_SATA#
SP_TPM_LPC_EN
ZODD_WAKE#
12
DOCK_HP_DET
DOCK_MIC_DET
LCD_TST
SYS_LED_MASK#
CHARGE_EN
USB_PWR_SHR_V BUS_EN<36>
VGA_ID
1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@
D12" does not support E-Module, ECE5048(U46) pin B7,A15,B15,A16,B32,A42,A49 not used, but do not assign GPIO for these pins.
+3.3V_ALW
WiGi_RADIO_DIS#
1 2
R1728 100K_0402_5%~D@R1728 100K_0402_5%~D@
R1729 100K_0402_5%~D@R1729 100K_0402_5%~D@
1 2
BT_RADIO_DIS#
Add WiGig card function
T125 PA D~D@ T125 PAD~D@
T126 PA D~D@ T126 PAD~D@
R806
@R806
T130 PA D~D@ T130 PAD~D@
T131 PA D~D@ T131 PAD~D@
T133 PA D~D@ T133 PAD~D@
T139 PA D~D@ T139 PAD~D@
T140 PA D~D@ T140 PAD~D@
T141 PA D~D@ T141 PAD~D@
T148 PA D~D@ T148 PAD~D@
LCD_TST<24>
SUSACK#<16>
R808
@R808
@
@
1 2
R797 0_0402_5%~D@ R797 0_0402_5%~D@
MCARD_MISC_PW REN<35>
PROCHOT_GATE<52>
USB_SIDE_EN#<36>
PANEL_BKEN_EC<24>
ENVDD_PCH<16,24>
PSID_DISABLE#<44>
PBAT_PRES#<44>
AUD_NB_MUTE#<29>
MCARD_WW AN_PWREN<35>
LCD_VCC_TEST_EN<24>
CCD_OFF<24>
AUD_HP_NB_SENSE<29,38>
ESATA_USB_PWR _EN#<36>
mSATA_EN
WiGi_RADIO_DIS#<34>
USB_PWR_SHR_E N#<36>
CPU_DETECT#<7>
SLP_ME_CSW_DE V#<18>
LAN_DISABLE#_R<31>
SYS_LED_MASK#<43>
SIO_EXT_WAKE#<18>
WIRELESS_LED#<34,43>
WLAN_RADIO_DIS#<34>
WIRELESS_ON#/OFF<30> BC_CLK_ECE5048 <40>
BT_RADIO_DIS#<34,41>
WWAN_RA DIO_DIS#<34>
SYS_PWROK<7,16>
CPU_VTT_ON<49>
PCH_DPWROK<16>
1 2
1 2
VGA_ID0
Discrete
0
UMA 1
A A
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP
12
R793
@ R 793
@
1K_0402_1%~D
1K_0402_1%~D
5
4
0_0402_5%~D
0_0402_5%~D
mSATA_EN
PROCHOT_GATE
LID_CL_SIO#
DOCK_SMB_ALERT#
USB_SIDE_EN#
USH_PWR_STATE #
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
AUD_NB_MUTE#
MCARD_WW AN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR _EN#
0_0402_5%~D
0_0402_5%~D
SLICE_BAT_ON
SLICE_BAT_PRES#
MODULE_BATT_PRES#
USB_PWR_SHR_E N#
MCARD_PCIE_SATA#
CPU_DETECT#
MOD_SATA_PCIE#_DET
ZODD_WAKE#
VGA_ID
SLP_ME_CSW_DE V#
LAN_DISABLE#_R
CHARGE_EN
SYS_LED_MASK#
DYN_TURB_PWR_ALRT#
WIRELESS_LED#
USB_PWR_SHR_V BUS_EN
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RA DIO_DIS#
SYS_PWROK
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
4
U46
U46
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
+3.3V_ALW
1
2
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
GPIOK1/TACH3
14.318MHZ/GPIOM0
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
C705
C705
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
CLK32/GPIOM2
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
EP
DB Version 0.4
DB Version 0.4
3
2
1
C708
C708
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
SIO_SLP_S4# <16,46>
SIO_SLP_S3# <11,16,42,47,48,49>
IMVP_PWRGD <51>
IMVP_VR_ON <51>
T151PAD~D @T151PAD~D @
1.8V_RUN_PWRGD <47>
R738 0_0402_5%~D@ R738 0_0402_5%~D@
T154PAD~D @T154PAD~D @
T155PAD~D @T155PAD~D @
T156PAD~D @T156PAD~D @
T117PAD~D @T117PAD~D @
T157PAD~D @T157PAD~D @
T158PAD~D @T158PAD~D @
10_0402_1%~D
10_0402_1%~D
@C712
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
trace width 20 mils
trace width 20 mils
Change to reserve for RF
12
R794
@R794
@
1
C712
2
2
BAT1_LED# <43>
BAT2_LED# <43>
BREATH_LED# <43>
LPC_LAD0 <14,32,34,40>
LPC_LAD1 <14,32,34,40>
LPC_LAD2 <14,32,34,40>
LPC_LAD3 <14,32,34,40>
PCH_PLTRST#_EC <17,30,32,34,40>
CLK_PCI_5048 <17>
CLKRUN# <16,32,40>
T159PAD~D @T159PAD~D @T145 PA D~D@ T145 PAD~D@
LPC_LDRQ1# <14>
IRQ_SERIRQ <14,32,40>
CLK_SIO_14M <15>
EC_32KHZ_ECE5048 <40>
T160PAD~D @T160PAD~D @
T161PAD~D @T161PAD~D @
T162PAD~D @T162PAD~D @
T163PAD~D @T163PAD~D @
T164PAD~D @T164PAD~D @
BC_INT#_ECE5048 < 40>
BC_DAT_ECE5048 <40>
+CAP_LDO trace width 20 mils
DOCK_AC_OFF_EC
1 2
1
C714
C714
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1
C707
C707
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
SIO_SLP_A# <16,42,48>
0.75V_DDR_VTT_ON <46 >
AUX_EN_WOW L <35>
WLAN_LAN_DISB# <31>
SIO_SLP_LAN# <16,31>
SIO_SLP_SUS# <16,42>
ME_FWP <14>
MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43>
RUN_ON <42,47,48>
SPI_WP#_SEL <14>
HW_GPS_DISABLE2# <34>
LPC_LFRAME# <14,32,34,40>
RUNPWROK <7,40>
SP_TPM_LPC_EN <32>
1
C706
C706
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
SIO_SLP_A#
B63
0.75V_DDR_VTT_ON
A60
A61
B65
A62
R765 0_0402_5%~D@ R765 0_0402_5%~D@
1 2
B66
A63
B67
A64
SIO_SLP_LAN#
A5
SIO_SLP_SUS#
B6
A6
B7
DOCK_HP_DET
A7
DOCK_MIC_DET
B8
ME_FWP
A8
MASK_SATA_LED#
B9
B10
LED_SATA_DIAG_OUT#
A10
TEMP_ALERT#_R TEMP_ALERT#
B11
RUN_ON
A11
B12
A12
SUS_ON
B60
A57
BAT1_LED#
B64
B68
BAT2_LED#
A9
B1
USH_PWR_ON
A18
A44
HW_GPS_DISABLE2#
B34
BREATH_LED#
B39
B51
LPC_LAD0
A27
LPC_LAD1
A26
LPC_LAD2
B26
LPC_LAD3
B25
LPC_LFRAME#
A21
PCH_PLTRST#_EC
B22
CLK_PCI_5048
A28
CLKRUN#
B20
A23
LPC_LDRQ1#
A22
IRQ_SERIRQ
B21
CLK_SIO_14M
A32
B35
B29
B28
A25
A24
B23
D_CLKRUN#
A19
D_DLDRQ1#
B24
D_SERIRQ
A20
BC_INT#_ECE5048
A29
BC_DAT_ECE5048
B31
BC_CLK_ECE5048
A30
RUNPWROK
A4
SP_TPM_LPC_EN
B56
B19
R804 1K_0402_1%~DR804 1K_0402_1%~D
+CAP_LDO
B46
B27
C1
1
C709
C709
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
1
C710
C710
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
GPIO different
1 2
CLK_PCI_5048CLK_SIO_14M
R795
@R795
@
10_0402_1%~D
10_0402_1%~D
C713
@C713
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
TEMP_ALERT# <18>
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
CPU_VTT_ON
0.75V_DDR_VTT_ON
SLICE_BAT_ON
SUS_ON
USH_PWR_STATE #
DOCK_AC_OFF_EC
+3.3V_ALW
12
R805
R805
100K_0402_5%~D
12
LID_CL_SIO#
1
2
100K_0402_5%~D
R807 10_0402_1%~DR807 10_0402_1%~D
1
C716
C716
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ECE5048
ECE5048
ECE5048
LA-8831P
LA-8831P
LA-8831P
1
R777 100K_04 02_5%~D@ R777 100K_0402_5%~D@
R780 100K_04 02_5%~D@ R780 100K_0402_5%~D@
R782 100K_04 02_5%~D@ R782 100K_0402_5%~D@
R786 100K_04 02_5%~DR786 100K_0402_5%~D
R789 100K_04 02_5%~DR789 100K_0402_5%~D
R790 100K_04 02_5%~DR790 100K_0402_5%~D
R791 100K_04 02_5%~DR791 100K_0402_5%~D
R878 100K_04 02_5%~D@ R878 100K_0402_5%~D@
R1627 1M_0 402_5%~DR16 27 1M_0402_5%~D
R1629 1M_0 402_5%~D@ R1629 1M_0402_5%~D@
12
1
12
12
12
12
12
12
12
12
1 2
1 2
LID_CL# <30,43>
39 61Thursday, September 13, 2012
39 61Thursday, September 13, 2012
39 61Thursday, September 13, 2012
+3.3V_RUN
1.0
1.0
1.0
Page 40
Vinafix.com
5
+3.3V_ALW
C720
@C720
@
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1 2
5
U50
1
B
2
A
CAP_RST#<30>
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
1
C735
C735
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R858
R858
R859
R859
5
U50
P
G
3
@Q127
@
1
2
10K_0402_5%~D
10K_0402_5%~D
R860
R860
1.05V_0.8V_PWROK
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
12
R1744
@R1744
@
39_0402_5%~D
39_0402_5%~D
13
Q127
Change R865 to Q127 and R1744 reserve (ENE didn't need)
2
DEEP_S3_WAKE<18>
@SHORT PADS~D
@SHORT PADS~D
@JTAG1
@
JTAG1
10K_0402_5%~D
10K_0402_5%~D
+3.3V_ALW
R861
R861
10K_0402_5%~D
10K_0402_5%~D
R853 0_0402_5%~D@ R853 0_0402_5%~D@
R855 0_0402_5%~D@ R855 0_0402_5%~D@
1 2
1 2
12
1 2
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
EC_32KHZ_ECE5048<39>
12
R847
R847
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
R848
R848
1.05V_0.8V_PWROK <14,51>
SML1_SMBDATA<15>
SML1_SMBCLK<15>
CLK_TP_SIO<41>
DAT_TP_SIO<41>
PBAT_SMBDAT<44>
PBAT_SMBCLK<44>
T165 PAD~D@ T165 PAD~D@
R881 0_0402_5%~D@ R881 0_0402_5%~D@
T167 PAD~D@ T167 PAD~D@
PCH_ALW_ON<42,44>
BIA_PWM_EC<24>
T168 PAD~D@ T168 PAD~D@
BC_CLK_ECE5048< 39>
BC_DAT_ECE5048<39>
BC_INT#_ECE5048<39>
BC_CLK_EMC4021<22>
BC_DAT_EMC4021<22>
BC_INT#_EMC4021<22>
T169 PAD~D@ T169 PAD~D@
PCH_PCIE_WAKE#<16>
PCIE_WAKE#<34>
BC_CLK_ECE1117< 41>
BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
BEEP<29>
SIO_SLP_S5#<16>
ACAV_IN_NB<52>
SIO_EXT_SMI#<17>
SIO_RCIN#<18>
IRQ_SERIRQ<14,32,39>
PCH_PLTRST#_EC<17 ,30,32,34,39>
CLK_PCI_MEC<17>
LPC_LFRAME#<14,32,34,39>
LPC_LAD0<14,32,34,39>
LPC_LAD1<14,32,34,39>
LPC_LAD2<14,32,34,39>
LPC_LAD3<14,32,34,39>
CLKRUN#<16,32,3 9>
SIO_EXT_SCI#<18>
MEC_XTAL2 MEC_XTAL2_R
R1068 0_0402_5%~D@ R1068 0_0402_5%~D@
1 2
R867 0_0402_5%~D@ R867 0_0402_5%~D@
T170 PAD~D@ T170 PAD~D@
T171 PAD~D@ T171 PAD~D@
T172 PAD~D@ T172 PAD~D@
100K_0402_5%~D
@R850
100K_0402_5%~D
@
12
R850
R849
R849
HOST_DEBUG_TX
HOST_DEBUG_RX
R875 C744
240K 4700p
130K 4700p
4700p
62K
4700p
33K
4700p
8.2K
*
4700p
4.3K
4700p
2K
1K
4700p
BOARD_ID rise time is measured from
5%~68%.
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+3.3V_ALW
12
12
12
10K_0402_5%~D
10K_0402_5%~D
12
100_0402_1%~D
100_0402_1%~D
12
@
@
1.05V_VTTPWRGD
VCCSAPWROK
PCIE_WAKE#
BC_DAT_ECE5048
BC_DAT_ECE1117
BC_DAT_EMC4021
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
CHARGER_SMBDAT
CHARGER_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
R824
R824
R836
R836
JTAG_RST# citcu it
close to U51.B5 7
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
2
1.05V_VTTPWRGD<49,50>
VCCSAPWROK<50>
Modify name net
+3.3V_ALW
D D
C C
R759 10K_0402_5%~DR759 10K_0402_5%~D
R814 100K_0402_5%~DR814 100K_0402_5%~D
R817 100K_0402_5%~DR817 100K_0402_5%~D
R821 100K_0402_5%~DR821 100K_0402_5%~D
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
R823 100K_0402_5%~D@R823 100K_0402_5%~D@
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
R829 2.2K_0402_5%~D@R829 2.2K_0402_5%~D@
R822 2.2K_0402_5%~D@R822 2.2K_0402_5%~D@
JTAG_RST#
32 KHz Clock
C741
C741
1 2
39P_0402_50V8J~D
11
12
R885
@R885
@
@ C747
@
C747
C743
C743
JDEG2
JDEG2
G1
G2
CONN@
CONN@
10
39P_0402_50V8J~D
Y6
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
1 2
1 2
39P_0402_50V8J~D
39P_0402_50V8J~D
+3.3V_ALW
49.9_0402_1%~D
49.9_0402_1%~D
12
R864
R864
1
1
2
2
3
3
4
4
5
5
MSCLK
6
6
MSDATA
7
7
HOST_DEB_TX
8
8
HOST_DEB_RX PCH_ALW_ON
9
9
10
12
DalMore pop this.
1
2
MEC_XTAL2
MEC_XTAL1
B B
HB_A531015-SCHR21
HB_A531015-SCHR21
Update JEDG2 CIS symbol (change part)
A A
Place closely pin A29
CLK_PCI_MEC
10_0402_1%~D
10_0402_1%~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4
D12" does not support E-Module, MEC5 055 (U51) pin A17,B36 not used, but do not assign GPIO for these pins.
+RTC_CELL
1 2
12
SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
CAP_R_RST#
PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_EMC4021
BC_DAT_EMC4021
BC_INT#_EMC4021
PCH_PCIE_WAKE#
PCIE_WAKE#
BC_CLK_ECE1117
BC_DAT_ECE1117
BC_INT#_ECE1117
BEEP
SIO_SLP_S5#
ACAV_IN_NB
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
MEC_XTAL1
A5
B6
A37
B40
A38
B41
A39
B42
B59
A56
A51
B55
B56
A53
B57
B22
A21
B23
B24
A23
B25
A24
A43
B45
A42
A12
B13
A13
B20
A18
B19
A20
B21
A19
A16
B16
A15
A6
A27
B29
A28
B30
A29
B31
A30
B32
A31
B33
A32
A33
A61
A62
B62
B34
A64
B68
BOM change 8.2k ohm for X-build phase
4
BOARD_ID
+3.3V_ALW
12
R875
R875
8.2K_0402_5%~D
8.2K_0402_5%~D
1
C744
C744
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
REV
X00
X01
X02
X03
A00
+RTC_CELL_VBAT
1 2
R815 0_0402_5%~D@R815 0_0402_5%~D@
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
GPIO110/PS2_CLK2/GPTP-IN6
GPIO111/PS2_DAT2/GPTP-OUT6
GPIO112/PS2_CLK1A
GPIO113/PS2_DAT1A
GPIO114/PS2_CLK0A
GPIO115/PS2_DAT0A
GPIO154/I2C1C_DATA/PS2_CLK1B
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
GPIO145/I2C1K_DATA/JTAG_TDI
GPIO146/I2C1K_CLK/JTAG_TDO
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
GPIO050/FAN_TACH1
GPIO051/FAN_TACH2
GPIO052/FAN_TACH3
GPIO053/PWM0
GPIO054/PWM1
GPIO055/PWM2
GPIO056/PWM3
BC-LINK
BC-LINK
GPIO123/BCM_A_CLK
GPIO122/BCM_A_DAT
GPIO121/BCM_A_INT#
GPIO022/BCM_B_CLK
GPIO023/BCM_B_DAT
GPIO024/BCM_B_INT#
GPIO044/BCM_C_CLK
GPIO043/BCM_C_DAT
GPIO042/BCM_C_INT#
GPIO047/LSBCM_D_CLK
GPIO046/LSBCM_D_DAT
GPIO045/LSBCM_D_INT#
GPIO032/GPTP-IN3/BCM_E_CLK
GPIO31/GPTP-OUT2/BCM_E_DAT
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
GPIO011/nSMI
GPIO061/LPCPD#
LDRQ#
SER_IRQ
LRESET#
PCI_CLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
XTAL1
XTAL2
GPIO160/32KHZ_OUT
NC1
NC2
NC3
15mil
+3.3V_ALW
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
C723
C723
2
B64
VBAT
AGND
B66
C739 close to U51.B12
SYSTEM_ID
A11
A22
B35
A41
A58
A52
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO141/I2C1F_DATA/I2C2B_DATA
DB Version 0.12
DB Version 0.12
VSS[1]
VR_CAP
VSS[4]
B11
B12
B60
least
15mil
+VR_CAP
1
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
+3.3V_ALW
R871
R871
1K_0402_1%~D
1K_0402_1%~D
1 2
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C742
C742
2
3
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
1
1
C725
C725
C727
C727
2
2
2
A26
VTR[7]B3VTR[8]
MISC INTERFACE
MISC INTERFACE
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO124/GPTP-OUT5/UART_RX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
PROCHOT#/PWM4
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
SMBUS INTERFACE
SMBUS INTERFACE
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
DELL PWR SW INF
DELL PWR SW INF
VSS_RO
B54
C740
C740
CHIPSET_ID for BID
function
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI
PECI
PECI_VREF
I2S
I2S
I2S_DAT
I2S_CLK
I2S_WS
EP
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
C1
RESET_OUT#
3
nFWP
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
C731
C731
C729
C729
2
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
A46
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
A59
B63
A60
A63
B67
B1
A1
B51
A48
PECI
B17
B27
B28
+3.3V_M
12
13
D
D
2
G
G
S
S
1
2
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
DDR_HVREF_RST_GATE
DYN_TUR_CURRNT_SET#
CPU1.5V_S3_GATE
MSDATA
MSCLK
SIO_A20GATE
PS_ID
FWP#
PROCHOT#_EC
ME_SUS_PWR_ACK
1.5V_SUS_PWRGD
PM_APWROK
1.05V_A_PWRGD
ALW_PW RGD_3V_5V
DEVICE_DET#
RESET_OUT#
PCH_RSMRST#
AC_PRESENT
SIO_PWRBTN#
LCD_SMBDAT
LCD_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
USH_SMBDAT
USH_SMBCLK
LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW _IN#
ACAV_IN
VCI_IN3#
+PECI_VREF
PECI_EC_R
R941 100K_0402_5%~DR941 100K_0402_5%~D
R942 100K_0402_5%~DR942 100K_0402_5%~D
R893
R893
100K_0402_5%~D
100K_0402_5%~D
PCH_PWRGD# <22>
Q50
Q50
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
C739
C739
C728
C728
C726
C726
2
2
R884 1K_0402_1%~ DR884 1K_0402_1%~D
R886 1K_0402_1%~ DR886 1K_0402_1%~D
R887 1K_0402_1%~ DR887 1K_0402_1%~D
Reserve 0_ohm to debug
R874 0_0402_5%~DR87 4 0_0402_5%~D
1 2
R877 0_0402_5%~DR87 7 0_0402_5%~D
1 2
R863 43_0402_5%~DR863 4 3_0402_5%~D
1 2
1 2
SMSC ask to add
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
1
2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C732
C732
C730
C730
2
2
GPIO Different.
DDR_ON <46>
HOST_DEBUG_TX <34>
HOST_DEBUG_RX < 34>
RUNPWROK <7,39>
EN_INVPWR <24>
T173PAD~D @T173PAD~D @
T174PAD~D @T174PAD~D @
T175PAD~D @T175PAD~D @
DDR_HVREF_RST_GATE <7>
DYN_TUR_CURRNT_SET# <52 >
CPU1.5V_S3_GATE <11>
MSDATA <34>
MSCLK <34>
SIO_A20GATE <18>
PS_ID <44>
T176PAD~D @T176PAD~D @
T177PAD~D @T177PAD~D @
R872
R872
10K_0402_5%~D
10K_0402_5%~D
1 2
R879
@R879
@
10K_0402_5%~D
10K_0402_5%~D
1 2
VOL_MUTE
CAP_INT#
VOL_UP
VOL_DOWN
Remove D95 level shift
because Cap Sensor side return to +3.3V_RUN
CAP_SMB_DAT <30>
CAP_SMB_CLK <30>
PECI_EC <7>
CAP_INT# <30>
CARD_SMBCLK
CARD_SMBDAT
USH_SMBCLK
USH_SMBDAT
1 2
R862 0_0402_5%~D@ R862 0_0402_5%~D@
C737
C737
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
12
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
PCH_RSMRST#
2
+1.05V_RUN_VTT
MSDATA
DDR_ON
EN_INVPWR
R863 close to
U51& least 250mils
1
2
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D
1 2
R880 100K_0402_5%~DR880 100K_0402_5%~D
1 2
R882 100K_0402_5%~DR882 100K_0402_5%~D
1 2
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
R843 8.2K_0402_5%~D@R843 8.2K_0402_5%~D@
1 2
R889 100K_0402_5%~DR889 100K_0402_5%~D
1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D
R589 2.2K_0402_5%~D@ R589 2.2K _0402_5%~D@
R590 2.2K_0402_5%~D@ R590 2.2K _0402_5%~D@
R591 2.2K_0402_5%~D@ R591 2.2K _0402_5%~D@
R592 2.2K_0402_5%~D@ R592 2.2K _0402_5%~D@
1 2
1 2
1 2
1 2
1 2
1 2
12
ME_SUS_PWR_ACK <16>
1.5V_SUS_PWRGD <46>
PM_APWROK <16>
1.05V_A_PWRGD <48>
ALW_PW RGD_3V_5V <45>
RESET_OUT# <16>
T178PAD~D @T178PAD~D @
PCH_RSMRST# <30>
AC_PRESENT <16>
SIO_PWRBTN# <7,14,16>
CAP_SMB_DAT
CAP_SMB_CLK
CHARGER_SMBDAT <52>
CHARGER_SMBCLK <52>
T183PAD~D @T183PAD~D @
ALWON <45>
ACAV_IN <22,52>
1 2
T185PAD~D @T185PAD~D @
+3.3V_ALW
FWP#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+RTC_CELL
12
1 2
R1179 10K_0402_5%~D@R1179 10K_0402_5%~D@
1 2
R812 100K_0402_5%~D@R812 100K_0402_5%~D@
+3.3V_ALW
POWER_SW _IN#
VCI_IN1#
LAT_ON_SW#
VCI_IN3#
RUN_ON_ENABLE#<42>
DYN_TUR_CURRNT_SET#
2
G
G
AC_PRESENT
LCD_SMBCLK
LCD_SMBDAT
BAY_SMBDAT
BAY_SMBCLK
DEVICE_DET#
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
VOL_MUTE
VOL_DOWN
VOL_UP
CAP_R_RST#
CAP_INT#
1
2
R870 100K_0402_5%~DR870 100K_0402_5%~D
R813 100K_0402_5%~DR813 100K_0402_5%~D
SMSC suggest pull up
RUNPWROK
POWER_SW _IN#<22>
+1.05V_RUN_VTT
PROCHOT#_EC
GPIO Different.
Add R1743 because Cap Sensor side is +3.3V rail
CAP_SMB_DAT
CAP_SMB_CLK
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
C721
@C721
@
1U_0402_6.3V6K~D
R810
R810
100K_0402_5%~D
100K_0402_5%~D
R811 10K_0402_5%~DR811 10K_ 0402_5%~D
C722
C722
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
13
D
D
S
S
R1180 0_0402_5%~D@ R1180 0_0402_5%~D@
R1169 100K_0402_5%~DR1169 100K_0402_5%~D
R1197 100K_0402_5%~DR1197 100K_0402_5%~D
R1118 100K_0402_5%~DR1118 100K_0402_5%~D
1U_0402_6.3V6K~D
1 2
1 2
12
1 2
12
Q47
@
Q47
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
+3.3V_RUN
12
R799
R799
10K_0402_5%~D
10K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
1 2
R835 10K_0402_5%~DR835 10K_0402_5%~D
12
R418 2.2K_0402_5%~D@ R418 2.2K _0402_5%~D@
12
R420 2.2K_0402_5%~D@ R420 2.2K _0402_5%~D@
12
R854 2.2K_0402_5%~D@ R854 2.2K _0402_5%~D@
12
R856 2.2K_0402_5%~D@ R856 2.2K _0402_5%~D@
12
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
12
R1125 100K_0402_5%~DR1125 100K_0402_5%~D
12
R845 4.7K_0402_5%~D@ R845 4.7K _0402_5%~D@
12
R846 4.7K_0402_5%~D@ R846 4.7K _0402_5%~D@
12
R851 4.7K_0402_5%~D@ R851 4.7K _0402_5%~D@
12
R852 4.7K_0402_5%~D@ R852 4.7K _0402_5%~D@
12
12
12
12
R888 100K_0402_5%~DR888 100K_0402_5%~ D
12
R1743 100K_0402_5%~DR1743 100K_0402_5%~D
12
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
12
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
MEC5055
MEC5055
MEC5055
LA-8831P
LA-8831P
LA-8831P
1
POWER_SW #_MB < 30,43>
+RTC_CELL
Q45
Q45
+3.3V_ALW_PCH
+3.3V_ALW
+5V_RUN
+3.3V_RUN
+3.3V_RUN
H_PROCHOT# <7,51,52>
40 61Thursday, September 13, 2012
40 61Thursday, September 13, 2012
40 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 41
Vinafix.com
5
4
3
2
1
BlueTooth
D D
+3.3V_RUN
C C
+3.3V_TP
1
C755
C755
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
B B
TP_CLK
TP_DATA
2
3
D37
PESD5V0U2BT_SOT23-3~D
D37
PESD5V0U2BT_SOT23-3~D
1
DAT_TP_SIO< 40>
CLK_TP_SIO<40>
Place close to JTP1
D37 ESD ask to change to SOT23-3
+3.3V_TP
12
1
2
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
Touch Pad
R902
R902
R903
R903
Change L54 and L55 to 0402 size Update JTP1 symbol
L54 BLM 15AG601SN1D_2PL54 BLM15AG601SN1D_2P
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
L55 BLM 15AG601SN1D_2PL55 BLM15AG601SN1D_2P
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C751
C751
2
12
12
10P_0402_50V8J~D
10P_0402_50V8J~D
C750
C750
TP_DATA
TP_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
1
1
C749
C749
2
2
KB_DET#<18>
BC_INT#_ECE1117<40>
BC_DAT_ECE1117<40>
BC_CLK_ECE1117<40>
BT_RADIO_DIS#<34,39>
Add WiGig card function
R1708
R1708
1K_0402_5%~D
1K_0402_5%~D
BT_COEX_STATUS2
1 2
R1710
R1710
1K_0402_5%~D
1K_0402_5%~D
1 2
COEX2_WLAN_ACTIVE<34>
+5V_RUN
+3.3V_ALW
+3.3V_TP
BT_PRI_STATUS
BT_DET#<17>
COEX1_BT_ACTIVE<3 4>
BT_ACTIVE<43>
USBP11-<17>
USBP11+<17>
BC_INT#_ECE1117
BC_DAT_ECE1117
BC_CLK_ECE1117
Change to pop D94 for WiGi Card supporting
1 2
R1730 0_0402_5%~D@R1730 0_0402_5%~D@
21
D94
D94
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+3.3V_RUN
BT_COEX_STATUS2
BT_PRI_STATUS
BT_RADIO_DIS#_CON
100P_0402_50V8J~D
10K_0402_5%~D
10K_0402_5%~D
12
R1709
R1709
100P_0402_50V8J~D
@C1307
@
C1307
1
2
ACES_50506-01641-P01
ACES_50506-01641-P01
18
GND2
17
GND1
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JTP1
1
2
TP_DATA
TP_CLK
33P_0402_50V8J~D
33P_0402_50V8J~D
C1306
C1306
BT_RADIO_DIS#_CON
1 2
C1305
C1305
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CONN@JTP1
CONN@
JBT1
JBT1
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
ACES_50224-0120N-001
ACES_50224-0120N-001
CONN@
CONN@
+5V_RUN+3.3V_ALW
1
C756
C756
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
A A
1
C758
C758
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
2
Place close to JTP1
5
+3.3V_TP
1
2
@
@
C765
C765
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
+3.3V_ALW +3.3V_RU N
1 2
R1161 0_0603_5%~D@ R1161 0_0603_5%~D@
1 2
R1162 0_0603_5%~D@ R1162 0_0603_5%~D@
+3.3V_TP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Touch PAD/Int KB
Touch PAD/Int KB
Touch PAD/Int KB
LA-8831P
LA-8831P
LA-8831P
41 61Thursday, September 13, 2012
41 61Thursday, September 13, 2012
41 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 42
Vinafix.com
5
+3.3V_ALW_PCH Source
+3.3V_ALW2
12
R907
R907
100K_0402_5%~D
100K_0402_5%~D
D D
Q51A
Q51A
2
ALW_ON_3.3V#
61
Add Deep S3 select
PCH_ALW_ON<40,44>
SIO_SLP_SUS#<16,39>
ALW_ON_3.3V#<20>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
R737 0_0402_5%~D@ R737 0_0402_5%~D@
R750 0_0402_5%~D@R750 0_0402_5%~D@
1 2
1 2
+PWR_SRC_S
12
100K_0402_5%~D
100K_0402_5%~D
3
5
4
R905
R905
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q51B
Q51B
4
+3.3V_ALW +3.3V_ALW_ PCH
ALW_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1619
R1619
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C762
C762
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C760
C760
1
2
R908
R908
20K_0402_1%~D
20K_0402_1%~D
3
DC/DC Interface
SIO_SLP_S3#<11,16,39,47,48,49>
RUN_ON<39,47,48>
1 2
R735 0_0402_5%~D@R735 0_0402_5%~D@
1 2
R744 0_0402_5%~D@R744 0_0402_5%~D@
2
1
+1.5V_RUN Source
1
2
+1.5V_RUN+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C769
C769
R921
R921
20K_0402_1%~D
20K_0402_1%~D
+3.3V_ALW2
12
R909
R909
100K_0402_5%~D
100K_0402_5%~D
2
RUN_ON_ENABLE#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q52A
Q52A
RUN_ON_ENABLE#<40>
+PWR_SRC_S
12
3
5
4
R920
R920
470K_0402_5%~D
470K_0402_5%~D
1.5V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q52B
Q52B
Q59
Q59
8
7
6
5
2.2M_0402_5%
2.2M_0402_5%
12
R1610
R1610
1
2
3
AO4728L_SO8~D
AO4728L_SO8~D
4
1
C771
C771
470P_0402_50V7K~D
470P_0402_50V7K~D
2
+1.05V_RUN Source
+PWR_SRC_S
12
R930
R930
330K_0402_5%~D
Del +3.3V_SUS for USH power
C C
1.05V_RUN_ENABLE
13
D
D
2
G
G
S
S
330K_0402_5%~D
+1.05V_M
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8
7
5
4
100P_0402_50V8J~D
1M_0402_5%~D
Q64
Q64
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1M_0402_5%~D
12
R1611
R1611
100P_0402_50V8J~D
1
C773
C773
2
+1.05V_RUN
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
36
12
C772
C772
1
R931
R931
20K_0402_1%~D
20K_0402_1%~D
2
+3.3V_M Source
+3.3V_ALW2
12
61
Q57A
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SIO_SLP_A#<16,39,48>
Q57A
2
+PWR_SRC_S
R918
R918
100K_0402_5%~D
100K_0402_5%~D
A_ON_3.3V#
5
12
R917
R917
470K_0402_5%~D
470K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q57B
Q57B
4
Discharg Circuit
12
R928
@R928
@
1K_0402_1%~D
1K_0402_1%~D
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
Q66
ALW_ON_3.3V#
A A
Q66
2
G
G
S
S
RUN_ON_ENABLE#
+3.3V_ALW
A_ENABLE
12
2
G
G
4.7M_0402_5%~D
4.7M_0402_5%~D
R1617
R1617
12
+5V_RUN_CHG
13
D
D
S
S
R923
@R923
@
1K_0402_1%~D
1K_0402_1%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
Q67
Q67
Q58
Q58
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
220P_0402_50V8J~D
220P_0402_50V8J~D
12
C770
C770
+1.5V_RUN +3.3V_RUN+5V_RUN
12
R924
@R924
@
1K_0402_1%~D
1K_0402_1%~D
+1.5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q68
2
Q68
G
G
S
S
1
2
2
G
G
+3.3V_M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C768
C768
12
+3.3V_RUN_CHG
13
D
D
S
S
12
R919
@R919
@
20K_0402_1%~D
20K_0402_1%~D
Change R925 and Q70 to de-pop (reserve)
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
R929
@ R 929
@
39_0603_5%~D
39_0603_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
Q69
Q69
2
G
G
A_ON_3.3V#
12
R925
@R925
@
39_0402_5%~D
39_0402_5%~D
+1.05V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q70
Q70
S
S
+3.3V_M
12
R916
R916
39_0603_5%~D
39_0603_5%~D
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q60
Q60
2
G
G
S
S
12
R926
R926
220_0402_5%~D
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG
RUN_ON_CPU1.5VS3#<7,11>
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q71
Q71
2
G
G
S
S
2
G
G
12
R927
R927
22_0603_5%~D
22_0603_5%~D
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q72
Q72
S
S
+PWR_SRC_S
12
13
D
D
2
G
G
S
S
+PWR_SRC_S
12
13
D
D
2
G
G
S
S
R933
R933
470K_0402_5%~D
470K_0402_5%~D
5V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q62
Q62
R940
R940
470K_0402_5%~D
470K_0402_5%~D
3.3V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q56
Q56
+5V_RUN Source
+5V_ALW
Q55
Q55
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
8
7
5
1M_0402_5%~D
1M_0402_5%~D
12
@
@
R1621
R1621
+3.3V_RUN Source
8
7
5
1M_0402_5%~D
1M_0402_5%~D
12
@
@
R1618
R1618
1
2
36
4
220P_0402_25V8J
220P_0402_25V8J
1
C767
C767
2
Q61
Q61
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
1
2
36
4
220P_0402_25V8J
220P_0402_25V8J
1
C766
C766
2
1
2
+5V_RUN
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C761
C761
1
2
12
+3.3V_RUN+3.3V_ALW+3.3V_ALW_PCH
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
C764
C764
R910
R910
20K_0402_1%~D
20K_0402_1%~D
12
R913
R913
20K_0402_1%~D
20K_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER CONTROL
POWER CONTROL
POWER CONTROL
LA-8831P
LA-8831P
LA-8831P
42 61Thursday, September 13, 2012
42 61Thursday, September 13, 2012
42 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 43
Vinafix.com
5
4
3
2
1
+3.3V_ALW
12
R932
R932
10K_0402_5%~D
Q74B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
C C
SATA_ACT#<14>
MASK_SATA_LED#<39>
LED_SATA_DIAG_OUT#<39>
WIRELESS_LED#<34,39>
Q74B
1 2
3
4
5
BT_ACTIVE<41>
RB751V40_SC76-2
RB751V40_SC76-2
1 2
RB751V40_SC76-2
RB751V40_SC76-2
5
12
R950
R950
100K_0402_5%~D
100K_0402_5%~D
D59
D59
D62
D62
10K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
+3.3V_ALW
12
3
MASK_BASE_LEDS#
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
Q74A
Q74A
2
Q80A
Q80A
2
R937
R937
100K_0402_5%~D
100K_0402_5%~D
Q78A
Q78A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
HDD LED solution for White LED
+5V_ALW
2
61
Q75
Q75
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R1731 1K_0402_5%~DR1731 1K_0402_5%~D
SATA_LED
Change R1731 from Power Board to MB
PANEL_HDD_LED
2
61
Q81
Q81
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R938 1.5K_0402_5%~DR938 1.5K_0402_5%~D
PANEL_HDD_LED <24>
WLAN LED solution for White LED
+5V_ALW
61
2
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R1732 1K_0402_5%~DR1732 1K_0402_5%~D
WLAN_LED
Q83B
Q83B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
BAT2_LED#<39>
BAT1_LED#<39>
BREATH_LED#<39>
4
5
MASK_BASE_LEDS#
Q83A
Q83A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
MASK_BASE_LEDS#
Q84B
Q84B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q84A
Q84A
2
MASK_BASE_LEDS#
R955
R955
1K_0402_5%~D
1K_0402_5%~D
1 2
BAT2_LED#_Q
BAT1_LED#_Q
61
R949
R949
1K_0402_5%~D
1K_0402_5%~D
1 2
R958
R958
1K_0402_5%~D
1K_0402_5%~D
1 2
R951
R951
330_0402_5%~D
330_0402_5%~D
1 2
R959
R959
330_0402_5%~D
330_0402_5%~D
1 2
BATT_WHITE
BATT_YELLOW
BATT_WHITE_LED
BATT_YELLOW_LED
Change R1733 from Power Board to MB
BREATH_LED#_Q
1 2
R1733 1K_0402_5%~DR1733 1K_0402_5%~D
BREATH_WHITE_LED
BREATH_WHITE_LED <24>
EMI request
+5V_ALW
+5V_ALW +5V_ALW
+5V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW+3.3V_ALW +3.3V_ALW+3.3V_ALW
Battery LED
BATT_WHITE_LED <24>
BATT_YELLOW_LED <24>
+3.3V_ALW
+5V_ALW
Breath LED
+5V_RUN +3.3V_RUN
Change R1732 from Power Board to MB
1
1
1
1
1
1
C777
C763
C763
C774
C774
C775
2
@
@
C775
2
2
@
@
@
@
C777
C776
C776
2
2
@
@
@
@
1
1
1
C779
C779
C780
C780
C781
2
@
@
C781
2
2
@
@
1
C782
C782
C783
C783
2
2
@
@
@
@
1
1
1
C785
C785
C784
C784
2
2
@
@
@
@
1
C786
C786
C787
C787
2
2
@
@
@
@
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
+3.3V_RUN
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
+3.3V_RUN +3.3V_RUN+3.3V_RUN +3.3V_RUN +3.3V_RUN
+5V_ALW
POWER_SW#_MB<30,40>
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
Power Board (LS-8833P)
SATA_LED
BATT_WHITE
BATT_YELLOW
WLAN_LED
BREATH_LED#_Q
POWER_SW#_MB
D23
@D23
@
1
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
B B
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
H1
@ H1
@
H_2P8
Fiducial Mark
FD1
@ FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD2
@ FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@ FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@ FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
H_2P8
@ H13
@
H_3P2
H_3P2
H13
LED Circuit Control Table
H3
@ H3
@
H4
@H4
@
H2
@H2
@
H_2P8
H_2P8
H_2P3
H14
1
1
ZZZ
ZZZ
PCB-MB
PCB-MB
H_2P3
1
H16
@H16
@
H_3P2
H_3P2
H_2P8
H_2P8
1
@H14
@
H_3P2
H_3P2
1
SYS_LED_MASK# LID_CL#
0
1 0
H5
@H5
@
H6
@ H6
@
H7
@H7
@
H8
@ H8
@
H9
@H9
1
@H19
@
H_3P8
H_3P8
@
H_2P3
H_2P3
H_2P8
H_2P8
1
1
@H21
@
H20
@ H20
@
H19
H_3P8
H_3P8
H_3P8
H_3P8
1
1
H_2P8
H_2P8
H_2P3
H_2P3
H_2P8
H_2P8
1
1
1
H17
@H17
@
H_3P2
H_3P2
1
1
+3.3V_RUN +5V_RUN
X
11
H11
@H11
@
H10
@H10
@
H_2P8
H_2P8
1
H21
@ H22
@
H_3P8
H_3P8
1
H12
@ H12
@
H_5P4N
H_5P4N
H_2P0
H_2P0
1
1
H26
@ H26
@
H24
@H24
@
H23
@H23
@
H22
H_2P8X2P3
H_2P8X2P3
1
1
H_2P5X2P0
H_2P5X2P0
1
H_2P3
H_2P3
1
SYS_LED_MASK#<39>
SYS_LED_MASK#
LID_CL#
LID_CL#<30,39>
+5V_RUN
0.1U_0402_16V7K~D
+3.3V_RUN
1
2
+3.3V_RUN
+3.3V_ALW
5
U58
U58
P
B
O
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
C778 0. 1U_0402_16V7K~D@ C778 0.1U_0402_16V7K~D@
1 2
MASK_BASE_LEDS#
4
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
+3.3V_ALW
JLED1
JLED1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND1
3
2
10
GND2
ACES_50506-00841-P01
ACES_50506-00841-P01
CONN@
CONN@
0.1U_0402_16V7K~D
ESD request
2012.3.02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PAD and Standoff
PAD and Standoff
PAD and Standoff
LA-8831P
LA-8831P
LA-8831P
1
43 61Thursday, September 13, 2012
43 61Thursday, September 13, 2012
43 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 44
Vinafix.com
5
4
3
2
1
+COINCELL
COIN RTC Battery
12
PR1
PR1
1K_0402_5%
PR19
PR19
100K_0402_1%
100K_0402_1%
Z4012
2
3
1
PS_ID 40
12
PC9
PC9
0.22U_0603_25V7K
0.22U_0603_25V7K
VSB_N_001
1K_0402_5%
+PWR_SRC_S
13
12
+COINCELL
PC8
PC8
0.1U_0402_25V6
0.1U_0402_25V6
JRTC1
JRTC1
1
1
2
2
3
G1
4
G2
ACES_50271-0020N-001
ACES_50271-0020N-001
CONN@
CONN@
PD4
PD4
BAS40CW_SOT323-3
BAS40CW_SOT323-3
+RTC_CELL
12
PC3
PC3
1U_0603_10V6K
1U_0603_10V6K
2
TP0610K-T1-GE3_SOT23-3
TP0610K-T1-GE3_SOT23-3
Move to power schematic
PQ4
PQ4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-8831P
LA-8831P
LA-8831P
1
1.0
1.0
44 61Thursday, September 13, 2012
44 61Thursday, September 13, 2012
44 61Thursday, September 13, 2012
1.0
+3.3V_RTC_LDO
D D
ESD Diodes
1
PD5
PD5
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
Primary Battery Connector
SOCKET BATT BTJ-07DNFB 7P
SOCKET BATT BTJ-07DNFB 7P
12
PC5
PC5
2200P_0402_25V7K
2200P_0402_25V7K
C C
B B
PBATT1
PBATT1
CONN@
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
GND
9
GND
NB_PSID
Z4305
Z4306
Z4304
2
3
PR7
PR7
100_0402_5%
100_0402_5%
GND
1 2
2
100_0402_5%
100_0402_5%
1
@
@
PD7
PD7
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
3
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
PR9
PR9
1 2
PL4
PL4
1
PD6
PD6
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
100_0402_5%
100_0402_5%
12
PR8
PR8
1 2
PR14
PR14
1 2
100K_0402_1%
100K_0402_1%
PR16
PR16
1 2
15K_0402_1%~D
15K_0402_1%~D
PBATT+_C
PBAT_SMBCLK 40
PBAT_SMBDAT 40
@
@
PR11
PR11
1 2
0_0402_5%
0_0402_5%
D
D
1 3
2
B
B
E
E
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
12
PC4
PC4
0.1U_0402_25V6
0.1U_0402_25V6
S
S
PQ2
PQ2
FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
2
C
C
PQ3
PQ3
MMBT3904WT1G_SC70-3
MMBT3904WT1G_SC70-3
3 1
PL2
PL2
1 2
PR13
PR13
33_0402_5%~D
33_0402_5%~D
1 2
+5V_ALW
+3.3V_ALW
PR17
PR17
1 2
10K_0402_5%
10K_0402_5%
@
@
12
PR6
PR6
100K_0402_5%
100K_0402_5%
+3.3V_ALW
PR12
PR12
1 2
2.2K_0402_1%
2.2K_0402_1%
PBAT_PRES# 39
PSID_DISABLE# 39
+VCHGR
12
PR15
PR15
10K_0402_1%
10K_0402_1%
DC_IN+ Source
+DC_IN
PL5
PL5
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
12
PC18
PC18
0.01UF_0402_25V7K
0.01UF_0402_25V7K
12
PC12
PC12
0.01UF_0402_25V7K
0.01UF_0402_25V7K
PL6
PL6
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
12
PC16
PC16
0.1U_0402_25V6@
0.1U_0402_25V6@
PJPDC1
PJPDC1
1
1
-DCIN_JACK
2
2
3
3
+DCIN_JACK
4
4
5
5
6
GND
7
GND
ACES 50299-0050N-001
ACES 50299-0050N-001
CONN@
A A
CONN@
5
+DC_IN
PC10
PC10
12
PR24
PR24
4.7K_0805_5%~D@
4.7K_0805_5%~D@
12
1 2
PR21
PR21
240K_0402_5%~D
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
240K_0402_5%~D
4
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
2
3
4
PR23
PR23
47K_0402_5%
47K_0402_5%
1 2
PQ5
PQ5
8
S
D
7
S
D
6
S
D
5
G
D
12
12
PC11
PC11
PC13
PC13
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
+DC_IN_SS
12
12
PC14
PC14
0.1U_0402_25V6
0.1U_0402_25V6
3
12
PC15
PC15
PR22
PR22
100K_0402_5%
100K_0402_5%
10U_0805_25V6K
10U_0805_25V6K
PCH_ALW_ON39
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+PWR_SRC
PR25
@PR25
@
VSB_N_002
1 2
0_0402_5%
0_0402_5%
12
PR20
PR20
22K_0402_1%
22K_0402_1%
1 2
VSB_N_003
13
D
D
PQ6
PQ6
2
G
L2N7002WT1G_SC70-3
G
L2N7002WT1G_SC70-3
S
S
12
PC17
PC17
.1U_0402_16V7K
.1U_0402_16V7K
2
Page 45
Vinafix.com
A
B
C
D
E
2VREF_6182
12
PC101
PC101
1U_0603_16V6K
1U_0603_16V6K
PC120
@ PC 120
@
1 1
+PWR_SRC
2 2
PL100
PL100
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
+3.3V_ALWP
3.3VALWP
TDC 4.322A
Peak Current 6.175A
+DC1_PWR_SRC
12
12
PC100
PC100
PC102
PC102
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K
2200P_0402_25V7K
+3.3V_RTC_LDO
+3.3V_ALW2
PR100
@PR100
12
12
PC103
PC103
PC119
PC119
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PL101
PL101
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
1 2
1
+
+
PC110
PC110
2
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
PQ100
PQ100
3 5
241
12
PR109
PR109
4.7_1206_5%
4.7_1206_5%
3 5
241
SNUB_3V
12
PC112
PC112
680P_0402_50V7K
680P_0402_50V7K
@
1 2
0_0402_5%
0_0402_5%
10U_0603_6.3V6M
10U_0603_6.3V6M
PC108
PC108
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
1 2
PQ102
PQ102
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
PC107
PC107
LX_3V
12
PR107
PR107
1 2
2.2_0603_5%
2.2_0603_5%
LG_3V
12
OCP current 8.03A
PR111
PR113
PD100
PD100
+DC1_PWR_SRC
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
3 3
2N7002DW-7-F_SOT363-6
ENTRIP2
3
PQ104B
PQ104B
5
4
2N7002DW-7-F_SOT363-6
ENTRIP1
61
PQ104A
PQ104A
2
1 2
RLZ5.1B_LL34@
RLZ5.1B_LL34@
499K_0402_1%@
499K_0402_1%@
PR113
PR111
300K_0402_1%
300K_0402_1%
@
@
12
100P_0402_50V8J
100P_0402_50V8J
PR101
PR101
13.7K_0402_1%
13.7K_0402_1%
1 2
PR103
PR103
20K_0402_1%
20K_0402_1%
1 2
PR105
PR105
162K_0402_1%
162K_0402_1%
1 2
25
7
8
BST_3V
9
UG_3V
10
11
12
12
PC115
PC115
1U_0603_10V6K
1U_0603_10V6K
2VREF_6182
12
FB_3V
ENTRIP2
5
6
PU100
PU100
P PAD
VO2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
FB2
ENTRIP2
SKIPSEL
EN
14
13
+DC1_PWR_SRC
3
4
REF
TONSEL
VIN16GND
15
12
PC121
@ PC 121
@
12
100P_0402_50V8J
100P_0402_50V8J
PR102
PR102
30.9K_0402_1%
30.9K_0402_1%
1 2
PR104
PR104
20K_0402_1%
20K_0402_1%
FB_5V
1 2
PR106
PR106
90.9K_0402_1%~D
90.9K_0402_1%~D
ENTRIP1
1 2
2
1
FB1
ENTRIP1
24
VO1
23
PGOOD
22
BOOT1
21
UGATE1
20
PHASE1
19
LGATE1
NC18VREG5
17
RT8205LZQW(2) WQFN 24P PW M
RT8205LZQW(2) WQFN 24P PW M
+5V_ALW2
12
PC114
PC114
4.7U_0805_10V6K~D
4.7U_0805_10V6K~D
PC116
PC116
0.1U_0402_25V6
0.1U_0402_25V6
BST_5V
UG_5V
LX_5V
LG_5V
PR108
PR108
1 2
2.2_0603_5%
2.2_0603_5%
100K_0402_1%
100K_0402_1%
PR112
PR112
+DC1_PWR_SRC
12
12
PC106
PC106
PC105
PC105
PC104
PC104
0.1U_0402_25V6
0.1U_0402_25V6
BST1_5VBST1_3V
+3.3V_ALW
1 2
2200P_0402_25V7K
2200P_0402_25V7K
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
@
@
10U_0805_25V6K
10U_0805_25V6K
PC109
PC109
1 2
FDMC7692S_POWER33 -8-5
FDMC7692S_POWER33 -8-5
12
12
PC118
PC118
10U_0805_25V6K
10U_0805_25V6K
PQ103
PQ103
ALW_PWRGD_3V _5V 40
PQ101
PQ101
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
241
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
12
PR110
PR110
4.7_1206_5%
4.7_1206_5%
3 5
241
SNUB_5V
12
PC113
PC113
5VALWP
TDC 3.5A
Peak Current 5.0A
OCP current 6.5A
PL103
PL103
1 2
680P_0402_50V7K
680P_0402_50V7K
1
+
+
2
+5V_ALWP
PC111
PC111
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
PR114
PR114
100K_0402_1%
100K_0402_1%
1 2
13
PQ105
PR115
PR115
2K_0402_1%
2K_0402_1%
ALWON40
THERM_STP#22
4 4
A
1 2
PR116
@PR116
@
1 2
0_0402_5%
0_0402_5%
2
12
PC117
PC117
1U_0603_10V6K
1U_0603_10V6K
@
@
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
B
+5V_ALW2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+5V_ALWP
+3.3V_ALWP
@
@
PJP101
PJP101
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP103
PJP103
@
@
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
D
+5V_ALW
+3.3V_ALW
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
LA-8831P
LA-8831P
LA-8831P
45 61Thursday, September 13, 2012
45 61Thursday, September 13, 2012
45 61Thursday, September 13, 2012
E
1.0
1.0
1.0
Page 46
Vinafix.com
5
4
3
2
1
1.5Volt +/- 5%
D D
TDC 9.11A
Peak Current 13.0A
OCP current 16.9A
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
PJP200
+PWR_SRC
+1.5V_MEN_P
C C
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
B B
Note: S3 - sleep ; S5 - power off
PJP200
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
1UH_FDS D0630-H-1R0M_1 1A_20%
1UH_FDS D0630-H-1R0M_1 1A_20%
1 2
1
+
+
PC265
PC265
330U_B2 _2VM_R15M
330U_B2 _2VM_R15M
2
PL200
PL200
1.5V_B+
12
12
PC274
PC274
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
PC275
PC275
680P_04 02_50V7K
680P_04 02_50V7K
SNUB_1.5V
12
12
PC276
PC276
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
PR203
PR203
4.7_1206 _5%
4.7_1206 _5%
DDR_ON4 0
SIO_SLP_S 4#1 6,39
12
PC281
PC281
2200P_0 402_25V7K
2200P_0 402_25V7K
PC279
PC279
0.1U_0402_25V6
0.1U_0402_25V6
PQ200
FDMC888 4_POWER33 -8-5
FDMC888 4_POWER33 -8-5
PQ200
1.5V_SUS _PWRGD40
PR206
PR206
0_0402_ 5%
0_0402_ 5%
1 2
PR232
@P R232
@
1 2
0_0402_ 5%
0_0402_ 5%
@
@
3 5
241
+5V_ALW
PQ210
PQ210
3 5
241
FDMC769 2S_POWER3 3-8-5
FDMC769 2S_POWER3 3-8-5
+3.3V_ALW
PR204
PR204
100K_04 02_1%
100K_04 02_1%
12
PC255
PC255
.1U_0402 _16V7K
.1U_0402 _16V7K
@
@
PJP204
PU200
PU200
PAD
GND
21
1
2
3
4
5
1.5V_FB
PJP204
PAD-OPEN 1x1m
PAD-OPEN 1x1m
@
@
+V_DDR_ REF
VDDQ_1.5 V
22P_040 2_50V8J~D
22P_040 2_50V8J~D
PR238
PR238
0_0402_ 5%
0_0402_ 5%
1 2
+1.5V_MEN_P
12
PR237
PR237
0_0402_ 5%@
0_0402_ 5%@
12
PC215
@P C215
@
12
+1.5V_MEN_P
12
@
@
PR200
PR200
1 2
2.2_0603 _5%
2.2_0603 _5%
1 2
PC278
PC278
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PR202
PR202
5.1_0603 _5%~D
5.1_0603 _5%~D
1 2
12
BOOT_1.5 V
PR201
PR201
22.1K_04 02_1%
22.1K_04 02_1%
1 2
+5V_ALW
1 2
12
PC253
PC253
1U_0603 _10V6K
1U_0603 _10V6K
S5_1.5V
DH_1.5V
SW_ 1.5V
DL_1.5V
CS_1.5V
VDD_1.5V
1.5V_SUS _PWRGD
0.75V_DD R_VTT_ON39
PC272
PC272
1U_0603 _10V6K
1U_0603 _10V6K
1.5V_B+
15
LGATE
14
PGND
13
CS
RT8207M ZQW_W QFN20_3X3
RT8207M ZQW_W QFN20_3X3
12
VDDP
11
VDD
PR205
PR205
1M_0402 _1%~D
1M_0402 _1%~D
1 2
@P R236
@
1 2
0_0402_ 5%
0_0402_ 5%
16
PHASE
PGOOD
10
PR236
17
UGATE
TON
9
VLDOIN_1.5 V
18
20
19
BOOT
S5
8
VTT
VLDOIN
VTTGND
VTTSNS
VTTREF
VDDQ
FB
S3
6
7
OCP Current 0.9A
12
12
PC263
PC263
PC280
PC280
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC282
PC282
.1U_0402 _16V7K
.1U_0402 _16V7K
+0.75V_P
+V_DDR_REF
PC277
PC277
0.033U_0 402_16V7~D
0.033U_0 402_16V7~D
PJP203
PJP201
+1.5V_MEN_P
A A
2
PJP201
JUMP_1x3m@
JUMP_1x3m@
112
+1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
PJP203
PAD-OPEN 1x1m
PAD-OPEN 1x1m
@
@
12
+1.5V_ME N_P
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
LA-8831P
LA-8831P
LA-8831P
46 61Thursday, September 13 , 2012
46 61Thursday, September 13 , 2012
46 61Thursday, September 13 , 2012
1
1.0
1.0
1.0
Page 47
Vinafix.com
A
1 1
PJP301
2 2
3 3
+3.3V_ALW
RUN_ON39,42,48
SIO_SLP_S3#11,16,39,42 ,48,49
+1.8V_RUNP
PJP301
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
1 2
PR303 0_0402_5%@PR303 0_0402_5%@
PR306
@PR306
@
1 2
0_0402_5%
0_0402_5%
PJP300
PJP300
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
12
PC300
PC300
22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8VSPEN_1.8VSP
+1.8V_RUN
1.8VSP_VIN
12
PC307
PC307
0.1U_0402_25V6
0.1U_0402_25V6
PR304
@PR304
@
47K_0402_5%
47K_0402_5%
B
12
2
3
6
+3.3V_RUN
1.8V_RUN_PWRGD 39
1.8VSP_LX
1.8VSP_FB
1UH_NRS4018T1R 0NDGJ_3.2A_30%
1UH_NRS4018T1R 0NDGJ_3.2A_30%
1 2
12
PR301
PR301
4.7_0603_5%
4.7_0603_5%
SNUB_1.8VSP
12
PC305
PC305
680P_0402_50V7K
680P_0402_50V7K
PR300
PR300
10K_0402_5%
10K_0402_5%
PU300
PU300
4
10
9
8
5
12
12
PC304
PC304
.1U_0402_16V7K
.1U_0402_16V7K
@
@
LX
PVIN
PG
LX
PVIN
SVIN
FB
EN
TP
NC
7
1
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
NC
C
PL301
PL301
12
PR302
PR302
20K_0402_1%
20K_0402_1%
PR305
PR305
10K_0402_1%
10K_0402_1%
PC301
PC301
22P_0402_50V8J
22P_0402_50V8J
12
<Vo=1.8V> VFB=0.6V
D
+1.8V_RUNP
12
12
12
12
PC303
PC302
PC302
PC303
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1.8Volt +/-5%
PC306
PC306
TDC 0.65A
Peak Current 0.93A
47P_0402_50V8J
47P_0402_50V8J
OCP current 1.21A
Vo=VFB*(1+PR302/PR305)=0.6*(1+20K/10K)=1.8V
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
DELL CONFIDENTIAL/PROPRIETARY
LA-8831P
LA-8831P
LA-8831P
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
LA-8831P
D
1.0
1.0
1.0
47 61Thursday, September 13, 2012
47 61Thursday, September 13, 2012
47 61Thursday, September 13, 2012
Page 48
Vinafix.com
5
D D
4
3
2
+V1.05SP_B+
PJP400
PJP400
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
1
+PWR_SRC
+3.3V_ALW
12
PR400
PR400
100K_0402_1%
100K_0402_1%
PR402
PR402
80.6K_0402_1%
S0 mode be high level
C C
SIO_SLP_A#16,39 ,42
SIO_SLP_S3#11,16,39,42 ,47,49
RUN_ON39,42,47
B B
80.6K_0402_1%
1 2
PR403 0_0402_5%@PR403 0_0402_5%@
1 2
PR408
@PR408
@
1 2
0_0402_5%
0_0402_5%
PR409
@PR409
@
1 2
0_0402_5%
0_0402_5%
PC407
@PC40 7
@
.1U_0402_16V7K
.1U_0402_16V7K
1.05V_A_PWRGD40
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
12
PR405
PR405
470K_0402_1%
12
470K_0402_1%
PU400
PU400
1
2
3
4
5
PR406
PR406
4.99K_0402_1%
4.99K_0402_1%
VBST
PGOOD
TRIP
DRVH
EN
VFB
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
SW
V5IN
DRVL
TP
12
10
9
8
7
6
11
BST_+V1.05SP
UG_+V1.05SP
SW_+V1.05SP
LG_+V1.05SP
2.2_0603_5%
2.2_0603_5%
1 2
+5V_ALW
1 2
PC405
PC405
1U_0402_6.3V6K
1U_0402_6.3V6K
PR401
PR401
PC404
PC404
0.1U_0402_25V6
0.1U_0402_25V6
1 2
PQ400
PQ400
3 5
241
FDMC8884_POWER33-8- 5
FDMC8884_POWER33-8- 5
3 5
241
PQ405
PQ405
12
12
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
PR404
PR404
4.7_1206_5%
4.7_1206_5%
PC408
PC408
680P_0402_50V7K
680P_0402_50V7K
12
PC401
PC401
PC402
PC402
0.1U_0402_25V6
0.1U_0402_25V6
PL400
1UH_FDSD0630-H-1 R0M_11A_20%
1UH_FDSD0630-H-1 R0M_11A_20%
PL400
1 2
12
12
PC403
PC403
2200P_0402_25V7K
2200P_0402_25V7K
12
PC400
PC400
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
+1.05V_MP
1
+
+
PC406
PC406
330U_B2_2VM_R15M
330U_B2_2VM_R15M
2
+1.05Volt +/- 5%
TDC 4.75A
PR407
PR407
10K_0402_1%
10K_0402_1%
1 2
+1.05V_MP
2 1
PJP401
PJP401
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
+1.05V_M
Peak Current 6.69A
OCP current 8.70A
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docume nt Number Rev
Size Docume nt Number Rev
Size Docume nt Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-8831P
LA-8831P
LA-8831P
48 61Thursday, September 13, 2012
48 61Thursday, September 13, 2012
48 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 49
Vinafix.com
5
4
3
+V1.05S_VCCPP_B+
2
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP500
PJP500
1
+PWR_SRC
+3.3V_RUN
12
12
12
D D
1.05V_VTTPWRGD40,50
PR501
PR501
82.5K_0402_1%
82.5K_0402_1%
1 2
PR503 0_0402_5%@PR 503 0_0402_5%@
CPU_VTT_ON39
SIO_SLP_S3#
C C
1 2
1 2
PR307 0_0402_5%
PR307 0_0402_5%
@
@
PC506
PC506
.1U_0402_16V7K@
.1U_0402_16V7K@
12
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
12
PR505
PR505
470K_0402_1%
470K_0402_1%
PR500
PR500
100K_0402_5%
100K_0402_5%
1 2
PU500
PU500
1
PGOOD
2
TRIP
3
EN
4
VFB
5
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
PR507
PR507
4.99K_0402_1%
4.99K_0402_1%
12
VBST
DRVH
V5IN
DRVL
PR502
PR502
2.2_0603_5%
2.2_0603_5%
1 2
BST_+V1.05S_VCCPP
10
UG_+V1.05S_VCCPP
9
SW_+V1.05S_VCCPP
8
SW
7
LG_+V1.05S_VCCPP
6
11
TP
PC504
PC504
0.1U_0402_25V6
0.1U_0402_25V6
1 2
12
PC505
PC505
1U_0603_6.3V6M
1U_0603_6.3V6M
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
+5V_ALW
PQ501
PQ501
PQ500
PQ500
FDMC8884_POWER33-8- 5
FDMC8884_POWER33-8- 5
3 5
241
3 5
241
PC501
PC501
0.1U_0402_25V6
0.1U_0402_25V6
PL500
1UH_FDSD0630-H-1 R0M_11A_20%
1UH_FDSD0630-H-1 R0M_11A_20%
12
PR504
PR504
4.7_1206_5%
4.7_1206_5%
12
PC508
PC508
680P_0402_50V7K
680P_0402_50V7K
PL500
1 2
VTT_SENSE_FB
VSSIO_SENSE_R_FB
PC503
PC503
PC502
PC502
2200P_0402_25V7K
2200P_0402_25V7K
@
@
12
PC500
PC500
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
1
+
+
PC511
PC511
330U_B2_2VM_R15M
330U_B2_2VM_R15M
12
PC510
PC510
.1U_0402_16V7K
.1U_0402_16V7K
2
Local sense put on HW site
PR508
@PR50 8
@
1 2
0_0402_5%
0_0402_5%
PR513
@PR513
@
1 2
0_0402_5%
0_0402_5%
+1.05VTTP
VTT_SENSE 10
VSSIO_SENSE_R 10
+1.05Volt +/- 5%
B B
PR510
PR510
10K_0402_1%
10K_0402_1%
1 2
12
PR514
PR514
10_0402_1%@
10_0402_1%@
+1.05VTTP
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
PJP501
PJP501
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP502
PJP502
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
3
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
2
TDC 6A
Peak Current 8.5A
OCP current 10.2A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docume nt Number Rev
Size Docume nt Number Rev
Size Docume nt Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
LA-8831P
LA-8831P
LA-8831P
49 61Thursday, September 13, 2012
49 61Thursday, September 13, 2012
49 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 50
Vinafix.com
5
4
3
2
1
D D
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.85V
1 0 0.775V
1 1 0.750V
+3.3V_RUN
12
PR79
PR79
100K_0402_5%
PR80
@PR80
@
VCCSAPWROK40
1 2
0_0402_5%
0_0402_5%
100K_0402_5%
+VCCSA_PWRGD
PR90
@ PR90
@
1 2
0_0402_5%
0_0402_5%
PR91
@ PR91
@
1 2
0_0402_5%
0_0402_5%
PC78
@PC78
@
0.033U_0402_16V7K
0.033U_0402_16V7K
1 2
VCCSA_VID_1 11
VCCSA_VID_0 11
+5V_ALW
PR82
PR82
10_0402_1%
12
3300P_0402_50V7K
3300P_0402_50V7K
10_0402_1%
19
20
21
22
23
24
PC91
PC91
PU7
PU7
PGND
PGND
PGND
VIN
VIN
VIN
12
PC75
PC75
2.2U_0603_10V7K
1 2
PC89
PC89
10U_0805_25V6K
10U_0805_25V6K
2.2U_0603_10V7K
+VCCSA_PWR_SRC
1 2
PC90
PC90
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
C C
12
1 2
1 2
PC88
PC88
PC87
PC87
PC86
+3.3V_ALW
B B
PJP19
PJP19
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
+VCCSA_PWR_SRC
PC86
2200P_0402_25V7K
2200P_0402_25V7K
GNDA_VCCSA
0.1U_0402_25V6
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
PC74
PC74
1 2
1U_0603_10V6K
1U_0603_10V6K
12
18
16
17
V5FILT
V5DRV
PGOOD
TPS51463RGER_QFN24_4X4~D
TPS51463RGER_QFN24_4X4~D
COMP
GND
VREF
3
1
2
12
PR89
PR89
5.1K_0402_1%
5.1K_0402_1%
PC92
PC92
PR83
@ PR83
+VCCSA_BT
+VCCSA_PHASE
PR86
PR86
100K_0402_5%
100K_0402_5%
@
1 2
0_0402_5%
0_0402_5%
PR84
PR84
2.2_0603_1%
2.2_0603_1%
1 2
12
+VCCSA_BT_1
12
PC77
PC77
680P_0402_50V7K
680P_0402_50V7K
12
PR85
PR85
4.7_1206_5%
4.7_1206_5%
1.05V_VTTPWRGD 40,49
PC76
PC76
0.1U_0402_25V6
0.1U_0402_25V6
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL15
PL15
1 2
+VCCSA_EN
13
14
15
EN
VID0
VID1
SLEW
4
1 2
0.01U_0402_25V7K
0.01U_0402_25V7K
12
BST
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
VOUT
MODE
5
6
output voltage adjustable network
VCCSA
TDC 4.2A
Peak Current 6 .0A
OCP current 7.2 A
PC82
PC82
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC83
PC83
1 2
2200P_0402_25V7K
2200P_0402_25V7K
12
PC84
PC84
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
VCCSA_SENSE 11
PC85
PC85
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
PC80
PC80
.1U_0402_16V7K
.1U_0402_16V7K
PR87
PR87
100_0402_5%
100_0402_5%
PR88
@ PR88
@
1 2
0_0402_5%
0_0402_5%
PC81
PC81
1 2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
+VCCSA_P
@
@
PJP20
PJP20
+VCCSA_P
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
@
@
PJP21
PJP21
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCC_SA
12
GNDA_VCCSA
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+VCC_SA
+VCC_SA
+VCC_SA
LA-8831P
LA-8831P
LA-8831P
1
50 61Thursday, September 13, 2012
50 61Thursday, September 13, 2012
50 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 51
Vinafix.com
5
Local sense put on HW site
VCC_AXG_SENSE11
VSS_AXG_SENSE11
D D
VSUMG+
12
12
PR707
PR707
2.61K_0402_1%
2.61K_0402_1%
12
PH700
PH700
VSUMG-
12
PC711
PC711
.1U_0402_16V7K
PR712
PR712
1 2
3.83K_0402_1%
3.83K_0402_1%
C C
.1U_0402_16V7K
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR715
PR715
27.4K_0402_1%
27.4K_0402_1%
H_PROCHOT#40,52,7
12
PR709
PR709
11K_0402_1%
11K_0402_1%
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
12
PH701
PH701
12
VIDSCLK10
VIDALERT_N10
VIDSOUT10
+1.05V_RUN_VTT
12
PR730 54.9_0402_1%PR730 54.9_0402_1%
B B
A A
SCLK
12
PR735 75_0402_5%@ PR735 75_0402_5%@
ALERT#
12
PR737 130_0402_1%PR737 130_0402_1%
SDA
12
12
PC707
PC707
0.01U_0402_25V7K
0.01U_0402_25V7K
+5V_RUN
PC719
PC719
43P_0402_50V8J~D
43P_0402_50V8J~D
PC708
PC708
.1U_0402_16V7K
.1U_0402_16V7K
1.05V_0.8V_PWROK14,40
12
PC709
PC709
@
@
0.082U_0402_16V7K
0.082U_0402_16V7K
@
@
PR729
PR729
1 2
0_0402_5%
0_0402_5%
PR716 0_0402_5%@PR716 0_0402_5%@
1 2
PR718 0_0402_5%@PR718 0_0402_5%@
1 2
PR719 0_0402_5%@PR719 0_0402_5%@
1 2
PR721 0_0402_5%@ PR721 0_0402_5%@
1 2
IMVP_VR_ON39
PR725
PR725
1 2
3.83K_0402_1%
3.83K_0402_1%
PR713 0_0402_5%@PR713 0_0402_5%@
1 2
+5V_RUN
VSUM+
PR746
PR746
2.61K_0402_1%
2.61K_0402_1%
PH703
PH703
VSUM-
PC743
PC743
.1U_0402_16V7K
.1U_0402_16V7K
330P_0402_50V7K
330P_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
PR710
PR710
590_0402_1%
590_0402_1%
1 2
PR711
PR711
732_0402_1%
732_0402_1%
1 2
ALERT#
SDA
VR_HOT#
PR722 0_0402_5%@ PR722 0_0402_5%@
1 2
1 2
PR723 0_0402_5%@ PR723 0_0402_5%@
12
PH702
PH702
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR727
PR727
27.4K_0402_1%
27.4K_0402_1%
12
1 2
12
12
12
PR747 11K_040 2_1%PR747 11K_0 402_1%
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
12
@ PC703
@
1 2
SCLK
PR732 0_0402_5%@PR732 0_0402_5%@
12
PC738
PC738
PC703
12
PC706
PC706
12
ISEN1G
ISEN2G
NTCG
VR_EN
NTC
12
.1U_0402_16V7K
.1U_0402_16V7K
PC739
PC739
1 2
649_0402_1%~D
649_0402_1%~D
4
PC710
PC710
2200P_0402_50V7K
2200P_0402_50V7K
PU700
PU700
1
ISUMPG
2
ISEN1G
3
ISEN2G
4
NTCG
5
SCLK
6
ALERT#
7
SDA
8
VR_HOT#
9
VR_ON
10
NTC
41
TP
12
PC740
PC740
.1U_0402_16V7K
.1U_0402_16V7K
@
@
0.022U_0402_16V7K
0.022U_0402_16V7K
PR724
PR724
@
@
0_0402_5%
0_0402_5%
1 2
634_0402_1%
634_0402_1%
PR754
@PR754
@
499_0402_1%
499_0402_1%
39
38
40
FBG
RTNG
ISUMNG
ISEN212FB17ISUMP14ISEN3/FB2
11
13
ISEN2
PR750
PR750
12
1 2
PC744
PC744
@
@
3300P_0402_25V7K
3300P_0402_25V7K
3.32K_0402_1%
3.32K_0402_1%
PR704
PR704
PGOODG
37
36
35
COMPG
PGOODG
15
PR701
PR701
2K_0402_1%
2K_0402_1%
PR703
12
30
29
28
27
26
25
24
23
22
21
BOOT1
PR728 1.91K_0402_1%PR728 1.91K_0402_1%
390P_0402_50V7K
390P_0402_50V7K
12
PR740
PR740
12
2K_0402_1%
2K_0402_1%
PC737
PC737
PR703
130K_0402_1%
130K_0402_1%
PC722
PC722
12
2K_0402_1%
2K_0402_1%
PR702
PR702
12
12
680P_0402_50V7K
680P_0402_50V7K
PR708
@PR708
@
IMVP_PWRGD
1 2
0_0402_5%
0_0402_5%
34
33
32
31
PWM2G
BOOT1G
LGATE1G
PHASE1G
UGATE1G
BOOT2
UGATE2
PHASE2
LGATE2
VCCP
VDD
PWM3
LGATE1
PHASE1
UGATE1
COMP
PGOOD19ISUMN
RTN16ISEN1
BOOT1
18
20
ISL95836HRTZ-T_TQFN40_5X5~D
ISL95836HRTZ-T_TQFN40_5X5~D
PR726
@PR726
@
PGOOD
COMP
1 2
0_0402_5%
0_0402_5%
499_0402_1%
499_0402_1%
@
@
330P_0402_50V7K
330P_0402_50V7K
PC741
PC741
0.01U_0402_50V7K
0.01U_0402_50V7K
PC704
PC704
PR736
PR736
1 2
1 2
Local sense put on HW site
3
330P_0402_50V7K
330P_0402_50V7K
12
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC705
PC705
1 2
47P_0402_50V8J
47P_0402_50V8J
LGATE1G
PHASE1G
UGATE1G
BOOT1G
VCCP
LGATE1
PHASE1
UGATE1
1U_0603_10V6K
1U_0603_10V6K
IMVP_PWRGD 39
12
33P_0402_50V8J
33P_0402_50V8J
PR741
PR741
130K_0402_1%
130K_0402_1%
PR744
PR744
1 2
PC701
PC701
12
PC702
PC702
12
PWM3
PC714
PC714
+3.3V_RUN
PC723
PC723
12
PC727
PC727
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC729
PC729
1 2
470P_0402_50V7K
470P_0402_50V7K
VCCSENSE 10
VSSSENSE 10
12
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PR714 0_0402_5%@PR714 0_0402_5%@
1 2
12
12
PR705
PR705
150K_0402_1%~D
150K_0402_1%~D
PC750
PC750
PR763
PR763
0_0603_5%
0_0603_5%
1 2
PR717
PR717
1_0603_5%
1_0603_5%
1_0603_5%
1_0603_5%
12
PC715
PC715
1U_0603_10V6K
1U_0603_10V6K
PR742
PR742
42.2K_0402_1%
42.2K_0402_1%
1 2
BOOT1
2.2_0603_5%
2.2_0603_5%
LGATE1
PR720
PR720
UGATE1
PHASE1
PR749
PR749
PQ708
PQ708
PQ711
PQ711
@
@
1 2
12
+5V_ALW
12
12
1 2
PC742
PC742
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
5
4
123
5
4
213
PQ704
PQ704
4
PQ706
PQ706
4
2
VCC_GFXCORE
TDC 21.5A
Peak Current 33A
OCP current 42A
Load line -3.9mV/A
12
PC748
PC748
@
@
10U_0805_25V6K
10U_0805_25V6K
MDU1516URH_POWERDFN56-8-5
MDU1516URH_POWERDFN56-8-5
5
PQ710
PQ710
4
213
PR760
PR760
4.7_1206_5%
4.7_1206_5%
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
5
123
5
213
SIR818DP-T1-GE3_POWERPAK8-5
VCC_core
TDC 16A
Peak Current 33A
OCP current 42A
Load line -2.9mV/A
Icc_Dyn_VID1 28A
+VCC_PWR_SRC
MDU1516URH_POWERDFN56-8-5
MDU1516URH_POWERDFN56-8-5
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
+GFX_PWR_SRC
12
12
PC746
PC746
PC747
PC747
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.36UH_PDME064T-R36MS1R405_24A_20%
0.36UH_PDME064T-R36MS1R405_24A_20%
GP1_SW GP1_Vo
12
PC751
PC751
680P_0402_50V7K
680P_0402_50V7K
12
PR758
PR758
1 2
12
12
PC734
PC734
PC733
PC733
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
PC745
PC745
12
680P_0402_50V7K
680P_0402_50V7K
PR751
PR751
4.7_1206_5%
4.7_1206_5%
12
12
PC749
PC749
PC752
PC752
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K
2200P_0402_25V7K
PL704
PL704
1
4
3
2
3.65K_0603_1%
3.65K_0603_1%
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
12
PC754
PC754
PC736
PC736
0.1U_0402_25V6
0.1U_0402_25V6
0.36UH_PDME064T-R36MS1R405_24A_20%
0.36UH_PDME064T-R36MS1R405_24A_20%
P1_SW
PR755
PR755
VSUM+
1 2
3.65K_0603_1%
3.65K_0603_1%
VSUM-
PJP702
PJP702
PAD-OPEN1x1m
PAD-OPEN1x1m
@
@
+VCC_GFXCORE
12
PR759
PR759
1_0402_5%
1_0402_5%
VSUMG-VSUMG+
PL700
PL700
1 2
1
12
+
+
PC732
PC732
15U_B2_25V@
15U_B2_25V@
2
2200P_0402_25V7K
2200P_0402_25V7K
PL702
PL702
4
3
PR757
PR757
12
1_0402_5%
1_0402_5%
1
+VCC_PWR_SRC
12
+PWR_SRC
1
+
+
PC753
PC753
2
33U_D_25VM_R60M
33U_D_25VM_R60M
1
+VCC_CORE
2
P1_Vo
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD P ARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_CORE
+VCC_CORE
+VCC_CORE
LA-8831P
LA-8831P
LA-8831P
51 61Thursday, Septem ber 13, 2012
51 61Thursday, Septem ber 13, 2012
51 61Thursday, Septem ber 13, 2012
1
1.0
1.0
1.0
Page 52
Vinafix.com
A
B
+PWR_SRC
C
D
ISL88731C 11@
BQ24747 22@
+DC_IN_SS
GNDA_CHG
PC1318
PC1318
2200P_0402_25V7K
2200P_0402_25V7K
22@
22@
12
PC1337
PC1337
0.01U_0402_25V7K@
0.01U_0402_25V7K@
3
2
22@PC1304
22@
B
+SDC_IN
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
12
12
PC1327
PC1327
1U_0603_10V6K
1U_0603_10V6K
22@
22@
PR1340
PR1340
1.8M_0402_1%
1.8M_0402_1%
1 2
8
PU1304A
PU1304A
P
+
O
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
PR1322
1 +-5% 0603
1 +-5% 0603
PC1306
PC1306
12
1 2
MAX8731_REF
1 2
PR1327
PR1327
10K_0402_5%
10K_0402_5%
22@
22@
GNDA_CHG
1
22@PR1322
22@
MAX8731_IINP
PR1324
PR1324
7.5K_0402_5%
7.5K_0402_5%
22@
22@
PC1303
PC1303
0.1U_0402_25V6
0.1U_0402_25V6
1 2
GNDA_CHG
+DCIN
12
PC1328
.1U_0402_16V7K
.1U_0402_16V7K
@ PC1328
@
+5V_ALW
PR1334
PR1334
1 2
221K_0402_1%~D
221K_0402_1%~D
1
+DC_IN_SS
1 1
ACAV_IN
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
3
PQ1311B
PQ1311B
5
4
E2 AC_OK=17.7 Volt
PR1313
TI bq24745 = 316K
Intersil ISL88731 = 226K
PR1317
PR1317
49.9K_0402_1%
49.9K_0402_1%
12
12
PC1307
PC1307
0.01U_0402_25V7K
0.01U_0402_25V7K
2 2
Vref
TI bq24747 = 3.3V
Intersil ISL88731C = 3.2V
VDDP
TI bq24747 = 6V
Intersil ISL88731C = 5.1V
GNDA_CHG
CHARGER_SMBCLK40
CHARGER_SMBDAT40
PR1306
PR1306
10K_0402_5%
10K_0402_5%
+SDC_IN
PR1313
PR1313
226K_0402_1%~D11@
226K_0402_1%~D11@
+5V_ALW
GNDA_CHG
2
MAX8731A_LDO
1 2
ACAV_IN22,40,52
12
PC1316
PC1316
.1U_0402_16V7K
.1U_0402_16V7K
MAX8731_IINP22
12
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
61
PQ1311A
PQ1311A
1 2
PR1307
PR1307
10K_0402_5%
10K_0402_5%
MAX8731_REF
12
10K_0402_1%11@
10K_0402_1%11@
PR1310
PR1310
12
PR1316
PR1316
15.8K_0402_1%11@
15.8K_0402_1%11@
PR1329
PR1329
8.45K_0402_1%@
8.45K_0402_1%@
2
35
PQ1300
PQ1300
SI7121DN-T1-GE3_POWERPAK8-5
SI7121DN-T1-GE3_POWERPAK8-5
4
1 2
PR1308
PR1308
100K_0402_5%
100K_0402_5%
12
10K_0402_5%22@
10K_0402_5%22@
PR1311
PR1311
PR1320
@PR1320
@
1 2
0_0402_5%
0_0402_5%
1 2
PR1323
PR1323
200K_0402_5%
200K_0402_5%
12
22@
22@
PR1325
PR1325
11@
11@
2.2K_0402_1%
2.2K_0402_1%
PC1321
PC1321
120P_0402_50VNPO~D
120P_0402_50VNPO~D
12
PC1323
PC1323
1 2
12
12
22@
22@
PC1324
PC1324
220P_0402_50V7K~D
220P_0402_50V7K~D
11@
11@
0.01U_0402_25V7K
0.01U_0402_25V7K
PC1320
PC1320
1 2
22@
22@
56P_0402_50V8~D
22@
56P_0402_50V8~D
22@
12
12
PC1326
PC1326
PC1325
PC1325
11@
11@
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
Maximum charging current is 7.2A
3 3
4 4
PU1300
22@PU1300
22@
PR1313
BQ24747
BQ24747
316k_0402_1%
316k_0402_1%
DYN_TUR_CURRENT_SET#
65W
90W
DYN_TUR_CURRNT_SET#40
22@PR1313
22@ PR1304
High
Low
PR1325
22@PR1325
22@
4.7k_0402_1%
4.7k_0402_1%
A
+3.3V_ALW2
12
PR1341
PR1341
150K_0402_1%~D
150K_0402_1%~D
12
12
PR1349
PR1349
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
5
PQ1306B
PQ1306B
PC1334
0.1U_0402_25V6
0.1U_0402_25V6
PC1341
PC1341
PR1350
PR1350
66.5K_0402_1%
66.5K_0402_1%
150K_0402_1%~D
150K_0402_1%~D
100P_0402_50V8J
100P_0402_50V8J
3
4
22@PC1334
22@
12
PR1330
0_0402_5%
0_0402_5%
MAX8731_IINP
22@PR1330
22@
PR1343
PR1343
20K_0402_1%
20K_0402_1%
1 2
0_0402_5%
0_0402_5%
12
PC1336
PC1336
100P_0402_50V8J@
100P_0402_50V8J@
+5V_ALW
12
PC1340
PC1340
220P_0402_50V7K~D
220P_0402_50V7K~D
Adapter Protection Circuit for Turbo Mode
22@PR1304
22@
PR1305
0_0402_5%
0_0402_5%
22@PR1305
22@
PC1304
0.1U_0402_25V6
0.1U_0402_25V6
PR1301
PR1301
0.01_1206_1%~D
0.01_1206_1%~D
1
4
3
2
CSSP_1
10K_0402_5%
10K_0402_5%
12
11@
11@
PR1304
10_0402_5%
PR1304
10_0402_5%
0.047U_0402_25V7K
0.047U_0402_25V7K
11@
11@
1
PU1300
PU1300
22
DCIN
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
29
TP
ISL88731C_QFN28_5X5~D
ISL88731C_QFN28_5X5~D
11@
11@
@PR1339
@
0_0402_5%
0_0402_5%
1 2
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
61
2
CSSN_1
PR1303
PR1303
12
12
PC1304
PC1304
11@
11@
PR1305
10_0402_5%
PR1305
10_0402_5%
1 2
1 2
PC1305
PC1305
0.1U_0402_25V6
0.1U_0402_25V6
11@
11@
28
27
ICOUT
CSSP
CSSN
ICREF
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
VFB
NC
GNDA_CHG
PR1339
PQ1307A
PQ1307A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
GNDA_CHG
ICOUT
26
PR1318
PR1318
2.2_0603_1%
2.2_0603_1%
BOOT
1 2
25
MAX8731A_LDO
21
24
23
PR1322
PR1322
12
0_0603_5%11@
0_0603_5%11@
PC1317
PC1317
220P_0402_50V7K~D@
220P_0402_50V7K~D@
20
19
18
17
VFB
PR1328
PR1328
1 2
15
100_0402_5%
100_0402_5%
16
PJP801
PJP801
1 2
PAD-OPEN1x1m@
PAD-OPEN1x1m@
H_PROCHOT# 40,51,7
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ1307B
PQ1307B
3
5
4
BOOT_D
12
PC1310
PC1310
PD1301
PD1301
0.1U_0402_25V6
0.1U_0402_25V6
22@
22@
BAT54HT1G_SOD323-2~D
BAT54HT1G_SOD323-2~D
CHG_UGATE
+VCHGR_B
12
CHG_LGATE
+VCHGR
C
1UH_NRS4018T1R0NDGJ_3.2A_30%
1UH_NRS4018T1R0NDGJ_3.2A_30%
12
1 2
PC1338
PC1338
4
PL1300
PL1300
PR1319
PR1319
4.7_0603_5%
4.7_0603_5%
11@
11@
GNDA_CHG
1 2
PC1311
PC1311
1U_0603_10V6K
1U_0603_10V6K
MAX8731_REF
+DC_IN
PR1335
PR1335
232K_0402_1%~D
232K_0402_1%~D
12
PR1346
PR1346
22.6K_0402_1%
22.6K_0402_1%
100P_0402_50V8J
100P_0402_50V8J
+3.3V_ALW
0.1U_0402_25V6
0.1U_0402_25V6
12
5
PU1302
PU1302
1
P
IN1
O
2
IN2
G
74AHC1G08GW_SOT353-5~D
74AHC1G08GW_SOT353-5~D
3
12
PC1301
PC1301
12
PC1309
PC1309
1U_0603_10V6K
1U_0603_10V6K
11@
11@
12
PC1319
3300P_0402_50V7K@
PC1319
3300P_0402_50V7K@
12
12
PR1336
PR1336
47K_0402_1%~D
47K_0402_1%~D
12
12
PR1347
PR1347
42.2K_0402_1%
42.2K_0402_1%
PC1342
PC1342
PROCHOT_GATE 39
To preset system to throtlle
switching from AC to DC
47P_0402_50V8J
47P_0402_50V8J
3 5
12
3 5
241
12
PC1302
PC1302
0.1U_0402_25V6
0.1U_0402_25V6
@
@
PQ1304
PQ1304
241
PQ1305
PQ1305
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
12
PC1339
PC1339
100P_0402_50V8J
100P_0402_50V8J
100K_0402_5%
100K_0402_5%
CHAGER_SRC
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
PL1301
PL1301
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
12
PC1322
PC1322
680P_0402_50V7K
680P_0402_50V7K
PR1332
PR1332
4.7_1206_5%
4.7_1206_5%
1 2
GNDA_CHG
PR1333
PR1333
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
8
5
P
+
6
-
G
4
+3.3V_ALW
12
PR1351
PR1351
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ1306A
PQ1306A
61
1 2
PC1333
PC1333
0.1U_0402_25V6
0.1U_0402_25V6
22@
22@
PU1304B
PU1304B
7
O
LM393DR_SO8~D
LM393DR_SO8~D
2
+VCHGR_L
1 2
ACAV_IN 22,40,52
PQ1301
PQ1301
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
8
S
D
2
7
S
D
3
12
PR1330
PR1330
11@
11@
10_0402_5%
10_0402_5%
S
4
G
12
PR410
PR410
470K_0402_1%
470K_0402_1%
12
PC1312
PC1312
2200P_0402_25V7K
2200P_0402_25V7K
PR1326
PR1326
0.01_1206_1%~D
0.01_1206_1%~D
4
3
1 2
PC1334
PC1334
0.22U_0402_16V7K
0.22U_0402_16V7K
11@
11@
MAX8731_REF
12
10K_0402_1%
10K_0402_1%
PR1338
PR1338
12
PR1348
PR1348
@
@
41.2K_0402_1%~D
41.2K_0402_1%~D
PC1313
PC1313
D
D
12
0.1U_0402_25V6
0.1U_0402_25V6
1
2
PR1331
@ PR1331
@
6
5
+DC_IN_SS
PC1314
PC1314
10U_0805_25V6K
10U_0805_25V6K
0_0402_5%
0_0402_5%
1 2
PC1329
PC1329
1 2
PC1335
PC1335
0.1U_0402_25V6@
0.1U_0402_25V6@
PR1342
@PR1342
@
1 2
0_0402_5%
0_0402_5%
12
0.1U_0402_25V6
0.1U_0402_25V6
PC1315
PC1315
12
PC1330
PC1330
GNDA_CHG
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
10U_0805_25V6K
10U_0805_25V6K
12
12
+VCHGR
12
12
PC1331
PC1331
PC1332
PC1332
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
ACAV_IN_NB 40
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Charger
Charger
Charger
LA-8831P
LA-8831P
LA-8831P
D
52 61Thursday, September 13, 2012
52 61Thursday, September 13, 2012
52 61Thursday, September 13, 2012
1.0
1.0
1.0
Page 53
Vinafix.com
5
D D
C C
4
3
2
1
B B
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
BLAK
BLAK
BLAK
LA-8831P 1.0
A
LA-8831P 1.0
A
LA-8831P 1.0
A
53 61Thursday, September 13, 2012
53 61Thursday, September 13, 2012
2
53 61Thursday, September 13, 2012
1
Page 54
Vinafix.com
5
4
3
2
1
D D
+1.05V_RUN_VTT
+VCC_CORE +VCC_GFXCORE
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_6.3V6-M~D
10U_0805_6.3V6-M~D
22U_0805_6.3V6M
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC1111
1
1
2
PC1119
PC1119
1
2
PC1127
C C
PC1127
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
B B
330U_SX_2VY~D
330U_SX_2VY~D
1
1
PC1168
PC1168
+
+
2
2
1
2
2
PC1120
PC1120
PC1121
PC1121
@
@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
2
2
PC1129
PC1129
PC1128
PC1128
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
1
PC1203
PC1203
PC1202
PC1202
2
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
1
PC1214
PC1214
PC1216
PC1216
2
2
330U_SX_2VY~D
330U_SX_2VY~D
330U_SX_2VY~D
330U_SX_2VY~D
1
PC1169
PC1169
PC1170
+
+
PC1170
+
+
2
1
1
2
PC1122
PC1122
22U_0805_6.3VAM
22U_0805_6.3VAM
1
2
PC1130
PC1130
@
@
22U_0805_6.3VAM
22U_0805_6.3VAM
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
PC1204
PC1204
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
PC1217
PC1217
2
1
2
2
PC1123
PC1123
PC1126
PC1126
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1205
PC1205
2
1
PC1215
PC1215
2
22U_0805_6.3VAM
1
2
PC1136
PC1136
PC1131
PC1131
@
@
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
PC1206
PC1206
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
PC1212
PC1212
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
1
2
1
2
PC1208
PC1208
PC1207
PC1207
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
PC1213
PC1213
PC1211
PC1211
2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
1
2
PC1210
PC1210
PC1209
PC1209
2
PC1111
1
2
10U_0805_4VAM~D
10U_0805_4VAM~D
1
PC1115
PC1115
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1137
PC1137
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1148
PC1148
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1113
PC1113
PC1112
PC1112
1
1
2
2
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
2
1
2
1
2
PC1132
PC1132
PC1118
PC1118
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1139
PC1139
PC1138
PC1138
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1149
PC1149
PC1150
PC1150
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1114
PC1114
1
2
10U_0805_4VAM~D
10U_0805_4VAM~D
1
PC1133
PC1133
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1140
PC1140
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1151
PC1151
2
22U_0805_6.3V6M
PC1116
PC1116
PC1117
1
2
1
2
1
2
1
+
+
2
PC1117
1
2
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_6.3V6-M~D
10U_0805_6.3V6-M~D
1
PC1134
PC1134
PC1135
PC1135
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1141
PC1141
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
PC1157
PC1157
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
2
1
PC1147
PC1147
PC1142
PC1142
2
330U_D2_2VM_R9M
330U_D2_2VM_R9M
PC1158
PC1158
+
+
2
1
1
2
1
2
1
2
1
2
1
+
+
2
PC1125
PC1125
PC1124
PC1124
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1172
PC1172
PC1175
PC1175
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1185
PC1185
PC1184
PC1184
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1195
PC1195
PC1196
PC1196
2
330U_SX_2VY~D
330U_SX_2VY~D
330U_SX_2VY~D
330U_SX_2VY~D
1
PC1166
PC1166
PC1165
PC1165
+
+
2
10U_0805_6.3V6-M~D
10U_0805_6.3V6-M~D
10U_0805_6.3V6-M~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
PC1154
PC1154
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1176
PC1176
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1186
PC1186
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1197
PC1197
2
10U_0805_6.3V6-M~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
1
PC1155
PC1155
PC1156
PC1156
PC1159
PC1159
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
PC1177
PC1177
PC1178
PC1178
PC1179
PC1179
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1188
PC1188
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1198
PC1198
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
2
1
2
PC1190
PC1190
PC1189
PC1189
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1199
PC1199
PC1200
PC1200
2
10U_0805_6.3V6-M~D
10U_0805_6.3V6-M~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
2
1
2
1
2
1
PC1161
PC1161
PC1160
PC1160
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1180
PC1180
PC1181
PC1181
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1192
PC1192
PC1191
PC1191
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1201
PC1201
10U_0805_4VAM~D
1
1
PC1162
PC1162
PC1167
PC1167
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
2
1
2
PC1183
PC1183
PC1182
PC1182
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
PC1193
PC1193
PC1194
PC1194
2
2
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-8831P
LA-8831P
LA-8831P
54 61Thursday, September 13 , 2012
54 61Thursday, September 13 , 2012
54 61Thursday, September 13 , 2012
1
1.0
1.0
1.0
Page 55
Vinafix.com
5
Request
Request
Item
Item Issue Description
ItemItem
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Issue DescriptionDate
Issue DescriptionIssue Description
3
Page 1
Page 1
Page 1Page 1
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
1 44 Power 4/6 Compal
D D
2
54 Power 4/6 Compal X01
For ESD request PBATT1 pin6 connect to PQ6.3
For ME design change
Change PC1157 to SGA00004700
X01
Change PC1158 to SGA00004200
3
54 Power 4/11 Compal
4 54 Power 4/13 Compal
5 47 Power
6 50
Power
4/13
4/13
Compal
Compal
7 51 Power 4/18 Compal
518 Power 4/19 Compal
C C
4/19Power
Compal449
For ME design change
For ME design change Change PC1158 to SGA00006100
For RF team request
For RF team request
Improve CPU transient response Add PR729, PR724 but unpop
For reduce acoustic noise
For ESD request
Change PC1157 to SGA00006A00
pop PR301, PC305
pop PC77, PR85
Add PC753
Change PL702, PL704 to SH00000NX00
PBATT1 pin6 connect to PQ6.2
X01
X01
X01
X01
X01
X01
X01
PBATT1 pin4 connect to PQ6.3
10 45
Power 4/23 Compal
11 45 Power 4/25 Compal
12 51 Power 5/17 Compal
13 51 Power 6/15 Compal
5414 Power 7/5 Compal
B B
16
5215 Power
50
Power
7/5
7/5
Compal
Compal
For Z height limite
For Z height limite unpop PC735 and PC748
No space, from un-pop to remove
For Vcore H/L-side MOSFET cross validation change PQ704, PQ708 to SB00000S800
Change footprint D2 to D3 for height emphasis change PC1157 footprint to D3 type
Same components but different CPN
Same components but different CPN
Change PC1306 to 0603
X01
X01
Delete PC735 X02
X02
X02
Change PR1347 from
SD03442228L to SD034422280
Change PC81, PC82, PC84, PC85 CPN
X02
X02
from SE000001120 to SE00000111L
Compal7/12Power5117 X02
For DFB request, PL702 and PL704 pad are too big
that will cause components shift
Compal18 45 Power 8/21
To meet cpk>1.33 of WCEPTA report Change PR106 to 90.9 Kohm
Change PL702, PL704 footprint
to CYNTE_PDME064T-R36MS1R405_4P
X03
Change PR105 to 162 Kohm
Compal19 46 Power 8/21
20 48 Power Compal8/21
21 49 Power Compal8/21
A A
22 44 Power 8/21 Compal
To meet cpk>1.33 of WCEPTA report Change PR201 to 22.1 Kohm
To meet cpk>1.33 of WCEPTA report
To meet cpk>1.33 of WCEPTA report
Reduce 0 ohm resistor
Change PR402 to 80.6 Kohm
Change PR501 to 82.5 Kohm
Short PR25 X03
X03
X03
X03
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR 1
PWR_PIR 1
PWR_PIR 1
LA-7902P
LA-7902P
LA-7902P
55 61Thursday, September 13, 2012
55 61Thursday, September 13, 2012
55 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 56
Vinafix.com
5
Request
Request
Item
Item Issue Description
ItemItem
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Issue DescriptionDate
Issue DescriptionIssue Description
3
Page 2
Page 2
Page 2Page 2
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
23 45 Power 8/21 Compal
D D
24 46 Power Compal X03
25 47 Power Compal
26 Power Compal
27 Power
48
49
50
Power
29 51 Power Compal
5230 Power Compal
C C
8/21
8/21
8/21
8/21
8/21
8/21
8/21
Compal
Compal28
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Reduce 0 ohm resistor
Short PR116, PR100
X03
Short PR232, PR236
Short PR306 X03
Short PR403
Short PR513, PR503, PR508
Short PR90, PR91, PR80, PR88, PR83
Short PR721, PR713, PR726, PR723,
PR716, PR714, PR718, PR732, PR719
Short PR1342, PR1320, PR1331, PR1339
X03
X03
X03
X03
X03
change PC17, PC1316, PC708, PC743,
31 44-54 Power 9/6 Compal
change 80 end PN to 8L, unite with EE
PC738, PC1328, PC255, PC282, PC740,
PC711, PC304, PC80, PC407, PC510, PC506
X03
PN from SE076104K80 to SE076104K8L
change PC1304, PC1334, PC16, PC8, PC14,
PC4, PC736, PC13, PC100, PC1303, PC1305,
32 44-54 Power 9/6 Compal
change 80 end PN to 8L, unite with EE
PC104, PC1310, PC116, PC11, PC1329, PC1302,
PC749, PC279, PC1333, PC76, PC307, PC1313,
PC404, PC1335, PC401, PC87, PC501, PC504
X03
PC1342 PN from SE00000G880 to SE00000G88L
change PC120, PC1336, PC121, PC1338,
44-54
B B
Compal9/6Power33
Compal9/644-54 Power34
change 80 end PN to 8L, unite with EE
change 80 end PN to 8L, unite with EE
PC1341, PC1339 PN from SE071101J80 to
SE071101J8L
change PC263, PC107, PC280 PN from
SE000005T80 to SE000005T8L
X03
X03
change PC1327, PC3, PC253, PC115, PC117
35 44-54 Power 9/6 Compal
change 80 end PN to 8L, unite with EE
PC715, PC714, PC272, PC1309, PC74, PC1311
PN from SE080105K80 to SE080105K8L
X03
change PC1139, PC1192, PC1201, PC1199,
PC1149, PC1176, PC1137, PC1191, PC1188,
PC1185, PC1190, PC1148, PC1178, PC1147,
36 44-54 Power 9/6 Compal X03
change 80 end PN to 8L, unite with EE
PC1184, PC1182, PC1142, PC1189, PC1151,
PC1196, PC1183, PC1193, PC1181, PC1198,
PC1175, PC1200, PC1186, PC1180, PC1194,
PC1150, PC1140, PC405, PC1177, PC1138,
A A
PC1197, PC1141, PC1195, PC1172, PC1179
PN from SE000000K80 to SE000000K8L
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR 1
PWR_PIR 1
PWR_PIR 1
LA-7902P
LA-7902P
LA-7902P
55 61Thursday, September 13, 2012
55 61Thursday, September 13, 2012
55 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 57
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Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
1 HW
Date
DateDate
04/09/2012
RequestRequest
Owner
Owner
OwnerOwner
COMPAL
4
Issue DescriptionDate
Issue DescriptionIssue Description
Leakage +3.3V_RUN
3
R838,R841 Pin 1 change to +3.3V_RUN
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X0240
2 X02
3
4
5
6
40,30
34
40
43
43 ME COMPAL
7
C C
8
9
10
11
12
13
14
B B
36
36
36
43
18
6,9
34
HW
HW
HW
ME
04/09/2012
04/09/2012
04/09/2012
04/10/2012
COMPAL
COMPAL
COMPAL
COMPAL
04/10/2012
HW36 04/10/2012 COMPAL
COMPAL04/10/2012HW
HW
HW
HW
HW
HW
HW
04/11/2012
04/11/2012
04/11/2012
04/11/2012
04/12/2012
04/12/2012
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
From ENE reset
Leakage +3.3V_RUN
Leakage +3.3V_RUN
Follow from E4 solution
Follow from E4 solution
HDMI power solution
Cost saving
Follow from E4 solution
Follow from E4 solution
Follow from E4 solution
JCAP2 Pin5 add R865 to CAP_RST#
R695 Pin1 change to +3.3V_RUN
R888 Pin1 change to +3.3V_RUN
ADD H25
Del H15,H18
Change BOM Q53 Reserve. Change R1614 to 10k ohm
Change U2 SA00004RE0L to SA00004VH00
Del D4, R1648 and F2, Add U76 AP2330W-7
Change U48 to SA00003TV00,Del R748
Change PANEL_HDD_LED to Q81 Pin 3, ADD R938 (1.2k) to Q83 Pin1
Del RH366
Del RC20,RC21 Change to T110,T128
Change BOM C1176, C609 Reserve
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
15
16
34,39
34,39
17
19
20
A A
34,39
34,39
41 HW 04/12/201221 COMPAL
HW
04/12/2012
HW
04/12/2012
18
HW 04/12/2012 COMPAL18 34
HWHW04/12/2012
04/12/2012
COMPAL
COMPAL
COMPAL04/12/201234
COMPAL
COMPAL
Reserve for RF
Add WiGig card function 1/3
Add WiGig card function 2/3
Add WiGig card function 3/3
Add R753 Connect "BT_WIGIG_RADIO_DIS#" to JMINI2 Pin51
Add R739 Connect "WIGIG_RADIO_DIS#" to JMINI2 Pin39
Change BOM C1310,C1309,C617,C618 to 0.01UF
Delete C1176, Change C609 to Reserve
Add trace that 5048.A1 to JMINI2.32 of WiGi_RADIO_DIS#
5048.A13 to JMINI2.51 of BT_RADIO_DIS#
Reserve path selection R1726, D92 and R1727, D93
Reserve +3.3V_ALW pull-high resistor R1728, R1729
Add R1730 and reserve D94 to prevent leakage for
BT_RADIO_DIS# to BTRADIO_DIS#_CON
X02
X02
X02
X02
X02
X02
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (1/4)
EE P.I.R (1/4)
EE P.I.R (1/4)
LA-8831P
LA-8831P
LA-8831P
57 61Thursday, September 13, 2012
57 61Thursday, September 13, 2012
57 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 58
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5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
22 COMPAL
Page# Title
Page#Page#
Title
TitleTitle
40 X02HW
Date
DateDate
04/12/2012
23 38 04/12/2012HW
24 29
25 19,43
HW 04/13/2012 COMPAL
RequestRequest
Owner
Owner
OwnerOwner
COMPAL
COMPALHW 04/13/2012
HW 04/13/2012 COMPAL1126
HW 04/13/2012 COMPAL27 18
HW 04/13/2012 COMPAL28 32
29 32 HW 04/13/2012 COMPAL
30 19 HW 04/16/2012 COMPAL
C C
31 25 HW 04/16/2012 COMPAL
32 24 HW 04/16/2012 COMPAL
33 37 HW 04/17/2012 COMPAL
34 20 HW 04/17/2012 COMPAL
35 15 HW 04/17/2012 COMPAL
36 42 HW 04/17/2012 COMPAL
37 34 HW 04/17/2012 COMPAL
B B
38 36,37 HW 04/17/2012 COMPAL
39 17 HW 04/17/2012 COMPAL
40 19 HW 04/17/2012 COMPAL
41 38 HW 04/17/2012 COMPAL
42 40 HW 04/18/2012 COMPAL
43 39 HW 04/18/2012 COMPAL
44 17 HW 04/18/2012 COMPAL
45 24 HW 04/18/2012 COMPAL
46 31, 38 HW 04/18/2012 COMPAL
A A
4
Issue DescriptionDate
Issue DescriptionIssue Description
Board ID change
Improve LAN layout Swap TR1(X'FORM) LAN signals (From 0,1,2,3 to 3,2,1,0). Swap C36~C39
EMI fail on Audio_SPK Add C1318~C1321 (0402 330pF SE074331K8L)
EMI request Pop C1247, C780
BOM control for TPM and DTP RH267 -> TPM@, RH270 -> DTP@
BOM control for TPM R659 and R660 change to TPM@
PCI CLK EA fail
TAIYO didn't support 0603 size LH8 change Vendor to SHI00004Q0L (TDK)
HDMI EMI request Change R451,R459,R462,R466,R468~R471 to L116~L123 (9nH, SHI0000EE0L) and pop,
Saving more spacing for DFB concern Remove D38
Add BOM config for w/ and w/o eSATA redriver 7@ for w/ eSATA redriver, 8@ for w/o eSATA redriver
Add current limitation (PCH) Change RH215 from 0_0402 to 0_0603
Reserve unuse signal (FLEX CLK) Reserve RH315, changing to de-pop
Reserve charge circuit Change R925 and Q70 to de-pop (Reserve)
Reserve RF circuit for SIM card Change C628~C631 to de-pop (Reserve)
ESD request ESD Diode for USB3.0 D78, D88, D89 change to NXP SC30000250L
RF request for PCI CLK Add CH111 10p for CLK_PCI_LOOPBACK and CH112 10p for CLK_PCI_TPM_TCM
RF request Add C1322 and pop C1248 for +3.3V_ALW and +5V_ALW
EMI request reserve for LAN LED signal Reserve C1323~C1325 120p cap
Cap sensor didn't need reset signal
(IC internal reset)
CLK_PCI_5048 EA fail Change R795 and C713 to reserve
RF request for CLK_PCI_MEC and CLK_PCI_5048 Pop CH109 and CH110 with 10pF cap
Layout request Swap D9 pin2 and pin3 (DMIC0 and DMIC_CLK)
EMI request for LAN signal Add L124~L131 with 12nH for LAN signals
3
Change R875 to 62K
Change RC72 to 330k ohm, RC143 to 1M ohm and CC136 to 0.022UFImprove power consumption
de-pop RE5 and RE3 (@ only)
de-pop L19~L22
Change R865 to reserve
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (2/4)
EE P.I.R (2/4)
EE P.I.R (2/4)
LA-8831P
LA-8831P
LA-8831P
58 61Thursday, September 13, 2012
58 61Thursday, September 13, 2012
58 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 59
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5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
47 43 HW 04/18/2012 COMPAL
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
LED design change Change R1731, R1732, R1733 with 1.2k ohm from Power Board (LS-8833P) to MB
3
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X02
48 41 HW 04/19/2012 COMPAL
49 24,29 HW 04/19/2012 COMPAL
50 14,34,37,41 HW 04/19/2012 COMPAL
HW51 24 04/19/2012 COMPAL
52 34 HW 04/19/2012 COMPAL
53 39 HW 04/19/2012 COMPAL
54 37 HW 04/19/2012 COMPAL
C C
55 19,20,31 HW 04/20/2012 COMPAL
56 11,12,13 HW 04/23/2012 COMPAL
57 29 HW 04/23/2012 COMPAL
58 23 HW 04/23/2012 COMPAL
59 43 HW 04/25/2012 COMPAL
60 43 HW 04/25/2012 COMPAL
61 40 HW COMPAL
62 34 HW COMPAL
B B
2963 HW COMPAL
64 31 HW COMPAL
3065 HW COMPAL
2466 HW COMPAL
67 40 HW COMPAL
68 24 HW COMPAL
69 36 HW COMPAL
70 34 HW COMPAL
A A
06/26/2012
06/26/2012
06/26/2012
06/26/2012
06/26/2012
06/26/2012
06/26/2012
06/26/2012
06/26/2012
06/26/2012
Design change Change L54 and L55 to 0402 size (SM01000C500)
Design change Change LE3 and LE92 to 0402 size (SM01000BV0L)
Connector Symbol update Update JTP1, JTAA1, JSIM1, JESA1, JDEG2
LVDS PWM and BKEN control by PCH only Change D68 and D69 to reserve
WWAN card didn't have PCIE bus for this project Change R725 to reserve
WIRELESS_ON#/OFF on S3 need pull-high to ALW power Change R766 to pull-high +3.3V_ALW
eSATA re-driver need to meet 2nd source design Change to pop R766
Replace by other Vendor Change LH6, LH7,LH8, L29
ME H-limitation Change CC167, CD16 and CD38 to SGA00006A00 H=1.4mm
Change C954, C955, C958, C960, C966 to SE00000SU00 (0603 10U cap)ME H-limitation
Cost saving Change L102, L103 to 0402 size, L99~L101 to 0402 SM01000FH0L
ME change screw size Change H13, H14, H16 H17 from 3.3 to 3.2
ESD pop small board protection circuit Change D23 to reserve
Cap Sensor Power rail change to only +5V_RUN Change R838 and R841 to pull-high to +5V_RUN
WiGi Card support BT_LED control Add BT_LED# (JMINI2.46) with Q126 and R1734
Improve Internal Speaker R/L cable swap Swap JSPK1 pin-define
Improve IEEE LAN EA Add R1735~R1742 (6.8ohm) and C1326~C1329 (3.3p) for IEEE LAN EA
Change JCAP.2 to +5V_RUNCap Sensor Power rail change to only +5V_RUN
For LCD test Mode Pop D68, D69
Crystal test result Change C741 and C743 to 39p cap (SE071390J8L)
ME limitation Change C300 to 10p 0603 size (SE00000SU00)
USB2.0 port0 EA Change L51 to SM070001600
Support WiGi Card Pop D92, D93
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (3/4)
EE P.I.R (3/4)
EE P.I.R (3/4)
LA-8831P
LA-8831P
LA-8831P
59 61Thursday, September 13, 2012
59 61Thursday, September 13, 2012
59 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 60
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Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
71 23 HW COMPAL
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
06/28/201272 40 HW COMPAL
73 30 HW 06/28/2012 COMPAL
74 30 ME 06/28/2012 COMPAL
75 43 ME 07/02/2012 COMPAL
76 30 ME 07/03/2012 COMPAL
77 30 EE 07/03/2012 COMPAL
78 40 EE 07/04/2012 COMPAL
C C
79 43 EE 07/04/2012 COMPAL
80 22 EE 07/04/2012 COMPAL
81 11,12,13 EE 07/05/2012 COMPAL
82 24 EE 07/05/2012 COMPAL
83 23, 24 EE 07/06/2012 COMPAL
84 24 EE 07/06/2012 COMPAL
85 43 ME 07/09/2012 COMPAL
86 41 07/09/2012EE COMPAL
B B
87 40 EE 07/10/2012 COMPAL
88 35 EE 07/11/2012 COMPAL
89 39, 40 EE 07/11/2012 COMPAL
90 7 EE 08/20/2012 COMPAL
91 14 EE 08/20/2012 COMPAL
92
14 EE 08/20/2012 COMPAL
93 40 EE 08/20/2012 COMPAL
4
Issue DescriptionDate
Issue DescriptionIssue Description
New solution for CRT power Change D80, F3 and R1640 to U77 (SA00004ZA00)
Cap Sensor change power rail to +5V_RUN Replace R868 by D95 (SC100000S0L) and add R1743 for CAP_INT#_R
ME change JSC1 and JLID1 position from BOT to TOP Swap JSC1 and JLID1 pin-define
ME add Screw Add H26 H_2P3
ME testing result ME Change H11 to 5P4N
Change JLID1 connector Change JLID1 connector to HB_A080415-SAHR21
Change JCAP2 power rail to +5V_RUN Change C1316 to +5V_RUN
Board ID change Change R875 to 33K
LED light testing
Thermal team design change Change R406 from 1.24k to 1.82k (92degree to 98degree)
Correct SGA00006A00 footprint to D3 size CD167,CD16,CD38 package size change to D3 H=1.4mm
Add RF solution for LVDS Add C1330 and C1331 to 2200p, C1332 and C1333 to 10p
ESD team request Pop D9 (SCA00000T0L), De-pop D77 and D83
Change JLVDS2(Golden Type) and JSC1 connectr JLVDS2 -> E-T_3703K-F12N-03R(SP02000TJ00), JSC1 -> HB_A081015-SAHR21
ME testing result ME Change H3 to 2P8, keeping H11 to 2P8 (Change to 5P4N next phase)
WiGi Card support and use the same BT_RADIO_DIS# De-pop R1730 and pop D94 (SC100000S0L)
Cap Sensor Board change to +5V_RUN power rail Change reserve from R865 to Q127 and R1744
For WWAN power soft-start Change C644 from 220p to 2200p(SE074222K8L)
Change resistors of useless EC GPIO to reserve
Change XDP(ITP) components to reserve De-pop RC5, RC7, RC8, CC65
X76 BOM control for ROM part Change U52 and U53 to X76@ BOM config
Change JTAG resistors on PCH to reserve
Change Board ID for X-build (A00) Change R875 to 8.2k ohm
3
Change R1733(1.5K), R1731(600), R949(600), R1732(700)
R955(2.2K), R938(2.4K), R958(1.8K)
De-pop R785,R760,R764,R774,R771,R1082,R1081,R777,R782,R780,R878,R1629
R845, R846, R851, R852, R829, R822, R854, R856, R420, R418
De-pop RH47, RH48, RH49 and RH288
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X0306/26/2012
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
X03
A00
A00
A00
A00
94 34 EE 08/21/2012 COMPAL
A A
95 43 EE 08/30/2012 COMPAL
Change +1.5V_RUN cap of Mini Card to reserve
because Mini Card didn't have +1.5V_RUN power
LED design change Change R1731, R1732, R1733, R949, R955, R958 to 1k ohm and R938 to 1.5k ohm
De-pop C593, C594, C601, C602, C619, C620
A00
A00
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (4/4)
EE P.I.R (4/4)
EE P.I.R (4/4)
LA-8831P
LA-8831P
LA-8831P
60 61Thursday, September 13, 2012
60 61Thursday, September 13, 2012
60 61Thursday, September 13, 2012
1
1.0
1.0
1.0
Page 61
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5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
96 31 HW COMPAL
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
08/30/2012HW3897 COMPAL
98 43 ME 09/03/2012 COMPAL
99 43 HW 09/03/2012 COMPAL
100 30 HW 09/04/2012 COMPAL
101 40 HW 09/04/2012 COMPAL
102 39 HW 09/05/2012 COMPAL
103
C C
104 40 HW 09/12/2012 COMPAL
7,17,30,31,
40,41,43
HW 09/06/2012 COMPAL
4
Issue DescriptionDate
Issue DescriptionIssue Description
IEEE LAN solution modify
EMI request
Change to +3.3V_RUN for ENE IC JCAP2.2 and C1316.1 change to +3.3V_RUN
Cap Sensor (ENE IC) return to +3.3V_RUN Remove D95 (EC and ENE both 3.3V power rail)
Fei Dao didn't support Dock De-pop R755 Dock detect resistor
Cost reduction plan
ENE IC change to +3.3V_RUN power rail
3
Change C1326 from 3.3p to 15p 0402 cap
Change C1104 from 1000p to 150p 1808 cap (SE00000FA80)
Change H11 from H_2P8 to H_5P4NModify ME drawing
Change D81, D82 from SCA00000T0L to SCA00001A00Meet ESD 2nd source request
De-pop CC156, CC140, CH102, C288, C478, C720
C765, C778, C1278, C1279, C1304
Change Cap_SMBus R838 and R841 to +3.3V_RUN
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
A0008/30/2012
A00
A00
A00
A00
A00
A00
A00
A00
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (4/4)
EE P.I.R (4/4)
EE P.I.R (4/4)
LA-8831P
LA-8831P
LA-8831P
61 61Thursday, September 13, 2012
61 61Thursday, September 13, 2012
61 61Thursday, September 13, 2012
1
1.0
1.0
1.0
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