MIDI:16-channel multi-timbre receive, General MIDI Level 1
— 2 —
Other functions
Pitch bend range:Adjustable (12 semitones upwards and downwards)
Modulation:Equipped
Transpose:25 steps (–12 semitones to +12 semitones)
Tuning:Adjustable (A4 = approximately 440Hz ± 50 cents)
Terminals
MIDI terminal:IN, OUT
Sustain/Assignable jack:Standard jack (sustain, sostenuto, soft, rhythm start/stop)
Line outL(MONO)/R
Output Impedance: 3 kΩ
Output Voltage: 1.5 V (RMS) MAX
HeadphonesStereo standard jack
Output Impedance: 200 Ω
Output Voltage: 220 mV (RMS) MAX
12 V DC
Floppy disk drive
Type:3.5" FDD
Formats:2DD (720KB MS-DOS format)
2HD (1.44MB MS-DOS format)
Functions:Save and load of user tones, user rhythms, sequencer, and registration
data; playback of SMF; disk formatting; file delete; accompaniment pat-
tern style conversion
Power supply:Dual power supply system
BatteriesSix D-size batteries
Battery lifeApproximately 2 hours continuous operation on alkaline batteries
AC adapter:AD-12
Auto power off:Turns power off approximately six minutes after last key operation. En-
abled under battery power only, can be disabled manually.
Speaker output:5 W + 5 W
Power consumption:12 V18 W
Dimensions:122.5 × 42.3 × 16.7 cm (48 1/4 × 16 11/16 × 6 9/16 inch)
Weight (without batteries):Approximately 9.8 kg (21.6 lbs)
Standard accessories:Music Stand; Pattern Conversion Disk
ELECTRICAL
Current drain with 12 V DC:
No sound output480 mA ± 20 %
Maximum volume1765 mA ± 20 %
with 24 keys from C3 to B4 pressed in Synth-Bass 4 tone
Volume: MAX., Velocity: MAX.
DSP0: Reverb1
Phone output level (Vrms with 32 Ω load each channel):
Use this procedure to return all keyboard settings to what they were when you purchased it. Note that this
procedure clears all data from memory.
• While holding down the ENTER button, turn on keyboard power.
Res
• Press YES to initialize the keyboard or NO to turn on power without changing any settings.
Parameter Initialization
Use this procedure to return all keyboard settings to what they were when you purchased it. Note that this
procedure does not affect user tones, user rhythms, registration memory contents, and display contrast
settings.
• While keyboard power is on, press the [+], [–], and ENTER buttons at the same time.
Adjusting Display Contrast
• Display contrast can be adjust to one of 100 levels for easy viewing.
• Adjusting display contrast helps to make figures easier to read from any viewing angle.
• Within five seconds after pressing the CONTRAST button, press [+] to increase the contrast value (making the display darker) or [–] to decrease it (making the display lighter).
• After you release CONTRAST, the message “Contrast” remains on the display for a few moments, during
which you can change the contrast setting further using [+] and [–] or by inputting a contrast value with the
number keys.
The contrast can be set to a value from 0 to 99. The initial default setting is 50.
et?
GM (General MIDI):
General MIDI standardizes MIDI data to play music with same nuance between different MIDI instruments.
Among GM conformed MIDI instruments, or commercially available musical data, music can be played with
similar tones.
SMF (Standard MIDI File):
SMF is a standard file format for MIDI instruments and computer music software. SMF formatted data can
be played and transported easily among SMF complied instruments or musical data of different manufacturers.
Note: Each key has two contacts, the first conatct 1 and second contact 2.
Key
Second contact 2
First contact 1
NOMENCLATURE OF KEYS
C2C3C4C5C6C7G7E1
— 6 —
FI
KC
SI
BUTTON MATRIX
KI0
KC0
KC1
KC2
KC3
KC4
KC5
KC6
KC7
PWSWPOWER
MODE
RECORD
SONG
PATTERN
DSP
CON-
TRAST
FREE
SESSION
ONE TOUCH
PRESET
V ARIATION/
KI1
INTRO
NORMAL/
FILL-IN
FILL-IN
SYNCHRO/
ENDING
START/
STOP
TEMPO
▼
TEMPO
▲
BANK
KI2
MIXER
SELECT
UPPER1
CH1
UPPER2
CH2
LOWER1
CH3
LOWER2
CH4
ACC V OL
CH5
CHORD1
CH6
CHORD2
CH7
KI3
CHORD3
CH8
BASS
CH9
RHYTHM
CH10
TR1
CH11
TR2
CH12
TR3
CH13
TR4
CH14
TR5
CH15
KI4
A
B
C
D
E
STORE
TRANSPOSE
▼
TRANSPOSE
▲
HARMONIZE
KI5
TR6
CH16
AUTO
ENTER
▲
▼
DISK
KI6
SPLIT
LAYER
RHYTHM
TONE
0
1
4
7
KI7
▼/NO
—
2
5
8
▲/YES
+
3
6
9
KI8
DEMO
SYNTH
TUNE/
MIDI
TOUCH
RESPONSE
LED MATRIX
LED-A
FULL RANGE
CHORD
LED-B
FINGERD
LED-C
CASIO CHORD
— 7 —
MEMORY DEVICES
Each memory device has the following data.
CPU
Internal Memory
3
ROM
512 kbit
4
RAM
16 kbit
LSI9
DSP
LSI3
Working RAM
7
256 kbit
LSI4
RAM1
1
1 Mbit
LSI7
RAM2
2
1 Mbit
LSI8
ROM1
5
32 Mbit
LSI1
ROM2
6
32 Mbit
LSI2
1 RAM1 :
S-RAM for operation program, Register, Pattern, Song
and SMF data from FDD. (Lower part of data bus)
2 RAM2 :
S-RAM for operation program, Register, Pattern, Song
and SMF data from FDD. (Upper part of data bus)
3 Internal ROM of CPU :
Main program data for system operation
4 Internal RAM of CPU :
Work area for system operation
5 ROM1 :
Demo, Accompaniment data, Song, P attern, Synth, Disk
mode
6 ROM2 :
Sound Waveforms/Tone data Digital sound effect
7 Working RAM :
Work area for DSP
RESET CIRCUIT
VDD
From power switch
Battery set
RESET
PWSW
VDD
RES
CPU
HD6433048SA89F
LSI9
NMI
PB0
PA7
RESET
APO
FDD Controller
HD63266F
LSI10
RESET
PW/SW ON
RESET
APO
DVDD
(5V)
Power Supply
Circuit
DVDD
HG51B155FD
Key Controller
TC190C020AF-001
DVDD
DVDD
DSP
LSI3
RESB
DVDD
RESB
LSI6
Initial reset
When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU.
When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU first raises
APO signal to +5 V to generate DVDD voltage, then raises RESET signal to +5 V. During this period the
DSP, the key controller and FDD controller LSIs initialize their internal circuits.
— 8 —
POWER SUPPLY CIRCUIT
The power supply circuit provides various voltages as shown below.
The voltage VDD (+5 V) is provided as long as batteries or AC adaptor is set.
Other voltages are controlled by APO (Auto Power Off) signal from CPU.
LC Filter
(To digital)
(To FDD)
(To LCD)
NMI
APO
PW/ON
APO
(To analog)
CPU
HD6433048SA89F
PA7
LSI9
NMI
PW/SW
The regulator IC BA9700A generates square waveform from pin 5 as PWM (Pulse Wide Modulation).
The LC filter makes stable output voltage (+5 V) for each circuit as shown above.
— 9 —
DSP and DAC CIRCUIT
RA22
Working RAM (256K-bit)
TC55257DFL-70L
LSI4
ROM2
LHMN5KPN
LSI2 (32Mbit)
ROM1
LHMN5KPP
LSI1 (32Mbit)
BOK
EA0 ~
EA14
D0 ~
D15
ED0 ~
ED15
KC0 ~
KC7
SI0 ~ SI9
FI0 ~ FI9
RA0 ~
RA21
RA0 ~ RA21
CS
RA23
CE,OE
A0 ~ A20,NC
Q0 ~ Q15
CE,OE
A0 ~ A20,NC
Q0 ~ Q15
WE
OE
D0 ~ D15
A0 ~ A14
PG
24.576 MHz
DAC
LOUT
ROUT
SORP: Sound data
BOK: Bit clock
WOK1: Word clock
CLK
SILRCK
LRCK0
DOUT
SORP
WOK1
WOKI0 DID0 LRCK0
DSP
HG51B155FD
LSI3
CPU
HD6433048SA89F
LSI9
Key Controller
TC190C020AF-001
LSI16
RD0 ~ RD15
RA0 ~
RA21
D8 ~
D15
Control
data
key
data
key
data
Keyboard
The DSP (Digital Signal Processor) and DAC (Digital Analog Converter) consists of the following circuits.
— 10 —
FDD UNIT (DF354H064C)
FDD Specifications:
1 Memory Capacity (under un-format) : 1.6 MByte
2 Density of track : 5.33 track/mm (135 TPI)
3 Number of track : 77 track/side
4 Number of head : 2
5 Rate of data transfer : 500 kbps
6 Access time (between two tracks) : 3 m seconds
7 Compensation of writing data : 125 n second (all tracks)
8 Rotation speed : 360 Min-1 (rpm) ± 1.5 %
FDD Interface:
Host systemDrive
CN2 connector
Drive Select 1 12
Density Select4
Index8
Motor ON16
Direction18
Step20
Write Data22
Write Gate24
Non connected Pin Numbers of CN2:
2, 6, 10, 14 (Pin #3 is removed to prevent erroneous insertion)
CN1 connector
1
+5 V Return2
+5 V Return3
0 Ω
Signal GND
— 11 —
Drive Frame GND.
LCD BACKLIGHT
DG
CVDD
When voltage CVDD is supplied, transistors Q601 and Q602 start oscillation.
From the oscillation voltage, transformer T601 generates about 600 V which is necessary for lighting the
backlight.
— 12 —
CPU (LSI9: HD6433048SA89F)
The 16 bit CPU contains a 1M-bit ROM, a 16K-bit RAM, eleven 8-bit I/O por ts, an A/D converter, a D/A
converter and serial interfaces. The CPU accesses to the RAM1, RAM2, DSP, Key controller, FDD controller and LCD driver LSI. The CPU also controls buttons, LEDs, bender input and MIDI input/output.
Pin No.TerminalIn/OutFunction
1VCCInVCC (5 V) source.
2 ~ 5PB0 ~ PB3OutData bus for LCD driver.
6PB4OutChip enable signal for LCD driver.
7PB5OutRead/write signal for LCD driver.
8DREQ0—DMA (Direct Memory Access) request.
9PB7OutRegister selection signal for LCD driver.
10RES0InNot used.
11VSSInGround terminal (0 V).
12TXD0OutMIDI signal output.
13, 15 ~ 17 P91, P93~P95InKey input signal from buttons.
55, 59, 60 P52, P61, P62InKey input signal from buttons.
58WAIT—Not used.
61CLKOUTOutClock signal (16 MHz).
62STBY—Not used.
63RESInReset signal at VDD (5 V) supplied.
64NMIInPower ON signal input.
65VSSInGround terminal (0 V).
66, 67EXTAL, XTALInClock (16 MHz) input.
68VCCInVcc (5 V) source.
69AS—Not used.
70RDOutRead signal.
71HWROutWrite signal for upper data bus.
72LWROutWr ite signal for lower data bus.
73 ~ 75MD0 ~ MD2InMode selection terminals.
76, 77AVCC, VREFInPower source and reference voltage for internal A/D, D/A.
78P70InKey input signal from buttons.
79AN1InPitch bender voltage detection.
— 13 —
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