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ATCA-7370/ATCA-7370-S
Installation and Use
P/N: 6806800P54H
January 2015
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©
Copyright 2015 Artesyn Embedded Technologies, Inc.
All rights reserved.
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Artesyn Embedded Technologies, Inc.© 2015 Artesyn Embedded Technologies, Inc. All other product or service names are the
property of their respective owners.
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Microsoft®, Windows® and Windows Me® are registered trademarks of Microsoft Corporation; and Windows XP™ is a trademark of
Microsoft Corporation.
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Industrial Computer Manufacturers Group.
UNIX® is a registered trademark of The Open Group in the United States and other countries.
Notice
While reasonable efforts have been made to assure the accuracy of this document, Artesyn assumes no liability resulting from any
omissions in this document, or from the use of the information obtained therein. Artesyn reserves the right to revise this document
and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or
changes.
Electronic versions of this material may be read online, downloaded for personal use, or referenced in another document as a URL to
an Artesyn website. The text itself may not be published commercially in print or electronic form, edited, translated, or otherwise
altered without the permission of Artesyn.
It is possible that this publication may contain reference to or information about Artesyn products (machines and programs),
programming, or services that are not available in your country. Such references or information must not be construed to mean that
Artesyn intends to announce such Artesyn products, programming, or services in your country.
Limited and Restricted Rights Legend
If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply
unless otherwise agreed to in writing by Artesyn.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (b)(3) of the Rights in
Technical Data clause at DFARS 252.227-7013 (Nov. 1995) and of the Rights in Noncommercial Computer Software and
Documentation clause at DFARS 252.227-7014 (Jun. 1995).
Contact Address
Artesyn Embedded Technologies Artesyn Embedded Technologies
Marketing Communications
2900 S. Diablo Way, Suite 190
Tempe, Arizona 85282
Lilienthalstr. 17-19
85579 Neubiberg/Munich
Germany
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About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Safety Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Sicherheitshinweise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
1.2 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
1.3 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
1.4 Mechanical Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
1.5 Mean Time Between Failures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
1.6 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
1.7 Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2 Hardware Preparation and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.1 Unpacking and Inspecting the Blade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.2 Environmental and Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
2.2.1 Environmental Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
2.2.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2.3 Blade layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.4 Installing the Blade Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.4.1 DIMM Memory Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.4.2 Cave Creek Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.5 Installing and Removing the Blade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
2.5.1 Installing the Blade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
2.5.2 Removing the Blade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3 Controls, Indicators, and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.1 Faceplate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.1.1 LEDs and Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.2 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.2.1 Faceplate Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
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3.2.2 Backplane Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.2.3 Mezzanine Card Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.2.4 On-board Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.2.4.1 Trusted Platform Module (TPM) Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.2.4.2 FPGA JTAG Head . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.3 Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.3.1 PCH Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.3.2 FPGA Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4 BIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.1.1 Update and Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
4.1.2 DRAM Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.1.3 Interrupt Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1.4 PCI Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1.5 I/O Device Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1.5.1 Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1.5.2 Integrated SATA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.1.6 Boot Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.1.6.1 Boot Support for the SAS Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.1.6.2 Network Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
4.1.7 Console or I/O Redirection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.1.8 Serial Over LAN (SOL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.1.9 IPMI Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.1.9.1 Watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.1.10 SMBIOS Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.1.11 LED Behavior During POST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.1.12 BIOS Setup Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.1.12.1 Board Information Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.1.13 USB 2.0 Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.1.14 Supported Operating Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.1.15 SPI Boot Flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.1.16 Serial Console and BIOS Printouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.1.16.1 BIOS Printouts to DRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.1.17 BIOS Interface towards OS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
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4.1.17.1 Proprietary BIOS Data Area (BDA) Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.1.17.2 BIOS CLI Tool - IPMIBPAR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.2 Setup Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.2.1 Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.2.2 Advanced Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.2.2.1 Boot Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.2.2.2 Processor Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.2.2.3 Peripheral Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.2.2.4 HDD Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.2.2.5 Memory Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.2.2.6 South Bridge Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.2.2.7 SMBIOS Event Log . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.2.3 Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.2.4 Boot Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.2.5 Save and Exit Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
5.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
5.2 Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.3 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
5.3.1 DDR3 Main Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
5.4 Platform Controller Hub (PCH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
5.5 PCH I/O Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106
5.6 Ethernet Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.6.1 ATCA 3.0 Base Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.6.2 Fabric Interface ATCA 3.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.6.3 Faceplate Ethernet Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.6.4 Update Channel Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .109
5.7 Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.8 IPMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .109
5.9 Serial Redirection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.10 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110
5.11 Serial ATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.12 IPMI Over LAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.13 USB 2.0 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
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5.14 SMBus Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5.15 Glue Logic FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
6 Maps and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
6.1 Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
6.1.1 PIC (Non-APIC) D31:F0 Interrupt Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
6.1.2 APIC (D31:F0) Interrupt Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
6.1.3 Non-Maskable Interrupt Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
6.2 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
6.2.1 Register Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
6.2.1.1 LPC Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
6.2.1.2 SPI Register Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
6.2.2 POST Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
6.2.3 Super IO Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
6.2.3.1 Entering the Configuration State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
6.2.3.2 Exiting the Configuration State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
6.2.3.3 Configuration Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
6.2.3.4 Super I/O Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
6.2.4 UART1 and UART2 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
6.2.4.1 UART Register Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
6.2.5 UART Registers DLAB=0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
6.2.5.1 Receiver Buffer Register (RBR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133
6.2.5.2 Transmitter Holding Register (THR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
6.2.5.3 Interrupt Enable Register (IER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
6.2.5.4 Interrupt Identification Register (IIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
6.2.5.5 FIFO Control Register (FCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
6.2.5.6 Line Control Register (LCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
6.2.5.7 Modem Control Register (MCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.2.5.8 Line Status Register (LSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.2.5.9 Modem Status Register (MSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
6.2.5.10 Scratch Register (SCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148
6.2.6 Programmable Baud Rate Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148
6.3 FPGA Register Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .149
6.3.1 LPC I/O Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .149
6.3.2 IPMC SPI Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
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6.3.3 Module Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152
6.3.4 Version Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
6.3.5 Serial Redirection Console Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
6.3.6 SOL Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
6.3.7 Serial Routing Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
6.3.8 IPMC Power Level Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
6.3.9 Payload Power Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
6.3.10 I2C Switch Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
6.3.11 Payload Power-Button Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
6.3.12 Reset Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
6.3.12.1 Reset Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157
6.3.12.2 Reset Function Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
6.3.12.3 IPMC Reset Payload Request Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
6.3.12.4 BIOS Reset Payload Request Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160
6.3.12.5 OS Reset Payload Request Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
6.3.12.6 Payload Reset Source for IPMC Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
6.3.12.7 Payload Reset Source for BIOS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
6.3.12.8 Payload Reset Source for OS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
6.3.12.9 IPMC Watchdog Timeout Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164
6.3.12.10IPMC Watchdog Timeout for BIOS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
6.3.12.11IPMC Watchdog Timeout for OS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .165
6.3.12.12FPGA-Payload-Watchdog Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . 165
6.3.12.13FPGA Payload Watchdog Clear Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
6.3.12.14FPGA-IPMC-Watchdog Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
6.3.13 Flash Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
6.3.14 RTM Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
6.3.15 Blue LED Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
6.3.16 User LED Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
6.3.17 Miscellaneous Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .170
6.3.18 Debug Switch and LED Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .170
6.3.19 Scratch Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
6.3.20 POST Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
6.4 Standard Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
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7 Serial Over LAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .177
7.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
7.2 Installing the ipmitool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
7.3 Configuring SOL Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
7.3.1 Using Standard IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
7.3.2 Using ipmitool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .179
7.4 Establishing a SOL Session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
8 Supported IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
8.1 Standard IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
8.1.1 Global IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
8.1.2 System Interface Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
8.1.3 BMC Watchdog Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
8.1.4 SEL Device Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
8.1.5 FRU Inventory Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
8.1.6 Sensor Device Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
8.1.7 Chassis Device Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
8.1.7.1 System Boot Options Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
8.1.8 Event Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
8.1.9 LAN Device Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
8.2 PICMG 3.0 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
8.3 Artesyn Embedded Technologies Specific Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
8.3.1 Set/Get Feature Configuration Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
8.3.1.1 Set Feature Configuration Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
8.3.1.2 Get Feature Configuration Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .201
8.3.2 Serial Output Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202
8.3.2.1 Set Serial Output Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
8.3.2.2 Get Serial Output Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
8.3.3 OEM Set/Get ACPI Power Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
8.3.3.1 OEM Set ACPI Power State (0x17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .205
8.3.3.2 OEM Get ACPI Power State (0x18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
8.3.4 OEM Set/Get Performance Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
8.3.4.1 OEM Set Performance Mode (0x21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
8.3.4.2 OEM Get Performance Mode (0x22) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
8.4 Pigeon Point Specific Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209
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8.4.1 Get Status Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
8.4.2 Get Serial Interface Properties Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
8.4.3 Set Serial Interface Properties Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
8.4.4 Get Debug Level Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .215
8.4.5 Set Debug Level Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
8.4.6 Get Hardware Address Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .217
8.4.7 Set Hardware Address Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
8.4.8 Get Handle Switch Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
8.4.9 Set Handle Switch Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
8.4.10 Get Payload Communication Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
8.4.11 Set Payload Communication Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
8.4.12 Enable Payload Control Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .221
8.4.13 Disable Payload Control Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
8.4.14 Reset IPMC Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
8.4.15 Hang IPMC Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
8.4.16 Graceful Reset Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
8.4.17 Get Payload Shutdown Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
8.4.18 Set Payload Shutdown Time-Out Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
8.4.19 Get Module State Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
8.4.20 Enable Module Site Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .227
8.4.21 Disable Module Site Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .227
8.4.22 Reset Carrier SDR Repository Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
9 FRU Information and Sensor Data Records . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
9.1 FRU Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
9.2 Power Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .230
9.3 Sensor Data Records . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
10 Firmware Upgrade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
10.1 HPM.1 Firmware Upgrade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .245
10.1.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
10.1.2 Installing the ipmitool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .245
10.1.2.1 Update Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
10.1.3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
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10.1.3.1 KCS Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
10.1.3.2 IPMB-0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
10.1.3.3 IPMI Over LAN (BASE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
10.2 IPMC Upgrade . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
10.3 BIOS/FPGA Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
10.4 Upgrade Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
A Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
A.1 Error List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .251
A.1.1 CPU Blade is Not Functioning Properly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
B Related Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
B.1 Artesyn Embedded Technologies - Embedded Computing Documentation . . . . . . . . . . . . . . .253
B.2 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
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Table 1-1 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 1-2 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 1-3 Blade Variants - Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 1-4 Blade Accessories - Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 2-1 Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 2-2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-1 Faceplate LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 3-2 RJ45 Console Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 3-3 USB Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 3-4 Zone 1 Connector P1 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 3-5 Zone 2 Connector J20 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 3-6 Zone 2 Connector J23 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 3-7 Zone 3 Connector J30 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 3-8 Zone 3 Connector J31 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 3-9 Zone 3 Connector J32 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 3-10 Mezzanine Card Connector Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 3-11 Switch SW2 Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 3-12 Switch SW1 Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 3-13 Switch S7 Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 4-1 Network Boot Support Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 4-2 Printout Floating Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 4-3 BIOS CLI Tool - IPMIBPAR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 4-4 Primary Menu Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 4-5 SCT Navigation Keys . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 4-6 Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 4-7 Advanced Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 4-8 Boot Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 4-9 Processor Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 4-10 Peripheral Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 4-11 HDD Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 4-12 Memory Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 4-13 South Bridge Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 4-14 SB USB Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 4-15 SMBIOS Event Log . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Table 4-16 Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 4-17 Boot Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
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Table 4-18 Save and Exit Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
Table 6-1 Interrupt Source Signals List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Table 6-2 Non-APIC (PIC mode/8259 Mode) Interrupt Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
Table 6-3 APIC Mode Interrupt Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118
Table 6-4 NMI Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
Table 6-5 Causes of Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
Table 6-6 Register Default . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
Table 6-7 Register Access Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
Table 6-8 LPC I/O Register Map Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
Table 6-9 IPMC SPI Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
Table 6-10 POST Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Table 6-11 Super I/O Configuration Index Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Table 6-12 Super I/O Configuration Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Table 6-13 Global Configuration Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
Table 6-14 Super IO Logical Device Number Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
Table 6-15 Super IO Device Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
Table 6-16 Super IO LPC Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128
Table 6-17 Global Super IO SERIRQ and Pre-divide Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .128
Table 6-18 Logical Device Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Table 6-19 Logical Device Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Table 6-22 Logical Device Common Decode Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Table 6-20 Logical Device Base IO Address MSB Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Table 6-21 Logical Device Base IO Address LSB Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Table 6-23 Logical Device Primary Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Table 6-24 Logical Device 0x74 Reserved Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Table 6-25 Logical Device 0x75 Reserved Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Table 6-26 Logical Device 0xF0 Reserved Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Table 6-27 UART Register Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Table 6-28 Receiver Buffer Register (RBR) if DLAB=0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Table 6-29 Transmitter Holding Register (THR) if DLAB=0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
Table 6-30 Interrupt Enable Register (IER) if DLAB=0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
Table 6-31 UART Interrupt Priorities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135
Table 6-32 Interrupt Identification Register (IIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135
Table 6-33 Interrupt Identification Register Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136
Table 6-34 FIFO Control Register (FCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
Table 6-35 Line Control Register (LCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138
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Table 6-36 Modem Control Register (MCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Table 6-37 Line Status Register (LSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Table 6-38 Modem Status Register (MSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Table 6-39 Scratch Register (SCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Table 6-40 Divisor Latch LSB Register (DLL), if DLAB=1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Table 6-41 Divisor Latch MSB Register (DLM), if DLAB=1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Table 6-42 FPGA Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Table 6-43 Module Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Table 6-44 Version Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Table 6-45 Serial Redirection Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Table 6-46 SOL Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Table 6-47 Serial Routing Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Table 6-48 IPMC Power Level Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Table 6-49 Payload Power Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Table 6-50 I2C Switch Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Table 6-51 Payload Power-Button Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Table 6-52 Reset Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Table 6-53 Reset Function Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Table 6-54 IPMC Reset Payload Request Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Table 6-55 BIOS Reset Payload Request Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Table 6-56 OS Reset Payload Request Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Table 6-57 Payload Reset Source for IPMC Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Table 6-58 Payload Reset Source for BIOS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Table 6-59 Payload Reset Source for OS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Table 6-60 IPMC Watchdog Timeout Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Table 6-61 IPMC Watchdog Timeout for BIOS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Table 6-62 IPMC Watchdog Timeout for OS Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Table 6-63 FPGA-Payload-Watchdog Threshold Low-byte Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Table 6-64 FPGA-Payload-Watchdog Threshold Low-byte Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Table 6-65 FPGA-Payload-Watchdog Clear Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Table 6-66 FPGA-IPMC-Watchdog Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Table 6-67 Flash Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Table 6-68 RTM Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Table 6-69 Blue LED Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Table 6-70 User LED Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Table 6-71 Miscellaneous Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
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Table 6-72 Debug Switch and LED Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .170
Table 6-73 LPC Scratch Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .171
Table 6-74 POST Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .171
Table 6-75 Component Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .171
Table 6-76 Progress Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .174
Table 6-77 Architectural Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175
Table 7-1 SOL Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .178
Table 8-1 Supported Global IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183
Table 8-2 Supported System Interface Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183
Table 8-3 Supported Watchdog Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184
Table 8-4 Supported SEL Device Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185
Table 8-5 Supported FRU Inventory Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185
Table 8-6 Supported Sensor Device Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
Table 8-7 Supported Chassis Device Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
Table 8-8 Configurable System Boot Option Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .187
Table 8-9 System Boot Options Parameter #96 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .188
Table 8-10 System Boot Options Parameter #97 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .189
Table 8-11 System Boot Options Parameter #98 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .190
Table 8-12 System Boot Options - Parameter #100 - Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192
Table 8-13 System Boot Options Parameter #100 - SET Command Usage . . . . . . . . . . . . . . . . . . . . . .192
Table 8-14 System Boot Options Parameter #100 - GET Command Usage . . . . . . . . . . . . . . . . . . . . . .193
Table 8-15 System Boot Options Parameter #100 - Supported Parameters . . . . . . . . . . . . . . . . . . . . .195
Table 8-16 boot_order Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .196
Table 8-17 Supported Event Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .197
Table 8-18 Supported LAN Device Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .197
Table 8-19 Supported PICMG 3.0 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .198
Table 8-20 Set/Get Feature Configuration Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200
Table 8-21 Set Feature Configuration Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .201
Table 8-22 Get Feature Configuration Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .201
Table 8-23 Feature Selector Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202
Table 8-24 Serial Output Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202
Table 8-25 Set Serial Output Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .203
Table 8-26 Get Serial Output Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .204
Table 8-27 OME Set/Get ACPI Power Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .204
Table 8-28 OEM Set ACPI Power State Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .205
Table 8-29 OEM Get ACPI Power State Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .206
14
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List of Tables
Table 8-30 OEM Set/Get Performance Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
Table 8-31 OEM Set Performance Mode Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
Table 8-32 OEM Get Performance Mode Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Table 8-33 Pigeon Point Extension Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209
Table 8-34 IPMC Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Table 8-35 Get Status Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Table 8-36 Get Serial Interface Properties Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Table 8-37 Set Serial Interface Properties Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Table 8-38 Get Debug Level Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Table 8-39 Set Debug Level Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Table 8-40 Get Hardware Address Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Table 8-41 Set Hardware Address Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Table 8-42 Get Handle Switch Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Table 8-43 Set Handle Switch Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Table 8-44 Get Payload Communication Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Table 8-45 Set Payload Communication Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
Table 8-46 Enable Payload Control Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
Table 8-47 Disable Payload Control Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
Table 8-48 Reset IPMC Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Table 8-49 Hang IPMC Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Table 8-50 Graceful Reset Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Table 8-51 Get Payload Shutdown Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Table 8-52 Set Payload Shutdown Time-Out Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Table 8-53 Get Module State Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Table 8-54 Enable Module Site Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Table 8-55 Disable Module Site Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Table 8-56 Reset Carrier SDR Repository Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Table 9-1 FRU Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Table 9-2 Power Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Table 9-3 Sensor Data Records . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
Table 10-1 HPM Upgrade Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications . . . . . . . . . . . . . . 253
Table B-2 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
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List of Tables
16
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
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List of Figures
Figure 1-1 Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 1-2 Mechanical Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 2-1 Location of Critical Temperature Spots (Blade Top Side) . . . . . . . . . . . . . . . . . . . . . . 50
Figure 2-2 Blade Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 2-3 Cave Creek Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 2-4 Cave Creek Module Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 3-1 Faceplate LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 3-2 TPM Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 3-3 USB 2.0 Flash Disk Module Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 4-1 Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 4-2 Advanced Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Figure 4-3 Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 4-4 Boot Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 4-5 Save and Exit Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Figure 5-1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Figure 5-2 Intel Xeon Processor E5-2648L/C604 Chipset Platform . . . . . . . . . . . . . . . . . . . . . . 105
Figure 5-3 PCH Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 5-4 Overall SMBus Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Figure 6-1 Interrupt Structure on ATCA-7370 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Figure 7-1 SOL Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Figure 8-1 System Boot Options Parameter #100 - Information Flow . . . . . . . . . . . . . . . . . . . 191
Figure 9-1 ATCA-7370 Temperature Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Figure 9-2 ATCA-7370-S Temperature Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
Figure 10-1 IPMC Component Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Figure 10-2 SPI Busses Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
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List of Figures
18
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
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About this Manual
Overview of Contents
This reference guide is intended for users qualified in electronics or electrical engineering.
Users must have a working understanding of Peripheral Component Interconnect (PCI),
AdvancedTCA®, and telecommunications.
The manual contains the following chapters and appendices:
About this Manual on page 19 lists all conventions and abbreviations used in this manual
and outlines the revision history.
Safety Notes on page 27 lists safety notes applicable to the blade.
Sicherheitshinweise on page 33 provides the German translation of the safety notes section.
Introduction on page 39 describes the main features of the blade.
Hardware Preparation and Installation on page 47 outlines the installation requirements,
hardware accessories, switch settings, installation and removal procedures.
Controls, Indicators, and Connectors on page 63 describes external interfaces of the blade.
This includes connectors and LEDs.
BIOS, on page 75 describes the features and setup of BIOS.
Functional Description on page 103 describes the functional blocks of the blade in detail.
This includes a block diagram, description of the main components used and so on.
Maps and Registers on page 115 provides information on the blade’s maps and registers.
Serial Over LAN on page 177 provides information on how to establish a serial-over LAN
session on your blade.
Supported IPMI Commands on page 183 lists all supported IPMI commands.
FRU Information and Sensor Data Records on page 229 provides information on the blade’s
FRU information and sensor data.
Troubleshooting on page 251, lists the errors, and describes the reasons and solutions to
the problems.
Related Documentation on page 253 provides links to further blade-related
documentation.
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
19
Page 20
About this Manual
Abbreviations
This document uses the following abbreviations:
Abbreviation Definition
ACE Asynchronous Communications Element
ATCA Advanced Telecom Computing Architecture
BBS Basic Blade Services
BIOS Basic Input/Output System
DDR Dual Data Rate (type of SDRAM)
DDR3 Double Data Rate 3 synchronous dynamic random access
DR Data Ready
About this Manual
memory (SDRAM) is the name of the new DDR memory
standard that is being developed as the successor to DDR2
SDRAM
20
DRAM Dynamic Random Access Memory
DCTS Delta Clear-To-Send
DDSR Delta Data Set Ready
DDCD Delta Data Carrier Detect
ECC Error Correction Code
EDAC Error Detection and Correction
EEPROM Electrically Erasable Programmable Read Only Memory
EMC Electro-magnetic Compatibility
ESD Electro-static Discharge
FIFO First In/First Out
FRU Field Replaceable Unit
FCR FIFO Control Register
GPIO General Purpose Input/Output
I2C Inter Integrated-Circuit Bus (2-wire serial bus and protocol)
ICH I/O Control Hub (also called "South Bridge")
IER Interrupt Enable Register
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
Page 21
About this Manual
Abbreviation Definition
IIR Interrupt Identification Register
IMC Integrated Memory Controller
IPMB Intelligent Platform Management Bus
IPMB-L The IPMB connecting the carrier IPMC to the AMC module
Intel® QuickPath
Interconnect (Intel®
QPI)
IPMC Intelligent Platform Management Controller
IPMI Intelligent Platform Management Interface
JTAG Joint Test Action Group (test interface for digital logic circuits)
KCS Keyboard Controller Style
LCR Line Control Register
LPC Low Pin Count
LSR Line Status Register
MAC Medium Access Controller
MCR Modem Control Register
MMC Module Management Controller
MP Management Power
MSR Modem Status Register
MTBF Mean Time Between Failures
NEBS Network Equipment Building System
NMI Non-maskable Interrupt
A cache-coherent, link-based Interconnect specification for
Intel processors, chipsets, and I/O bridge components.
NVRAM Non-volatile Random Access Memory
OEM Original Equipment Manufacturer
PCH Platform Controller Hub
PCI-E PCI-Express
PICMG PCI Industrial Computer Manufacturers Group
PLL Phase Locked Loop
POST Power-on Self Test
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
21
Page 22
About this Manual
Abbreviation Definition
RBR Receiver Buffer Register
RTC Real-Time Clock
SATA Serial AT Attachment (high-speed serial interface standard for
SCR Scratch Register
SCT SecureCore Tiano
SDR Sensor Data Record
SDRAM Synchronous Dynamic Random Access Memory
SELV Safety Extra Low Voltage
SIMD Single Instruction Multiple Data
SMBus System Management Bus
SMI System Management Interrupt
About this Manual
storage devices)
SMT Simultaneous Multi Threading
SOL Serial Over Lan
SPD Serial Presence Detect
TERI Trailing Edge Ring indicator
THRE Transmit Holding Register Empty
THR Transmitter Holding Register
TPM Trusted Platform Module
UART Universal Asynchronous Receiver-Transmitter
22
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
Page 23
Conventions
The following table describes the conventions used throughout this manual.
Notation Description
0x00000000 Typical notation for hexadecimal numbers (digits are
0b0000 Same for binary numbers (digits are 0 and 1)
bold Used to emphasize a word
Screen Used for on-screen output and code related elements
Courier + Bold Used to characterize user input and to separate it
Reference Used for references and for table and figure
About this Manual
0 through F), for example used for addresses and
offsets
or commands in body text
from system output
descriptions
File > Exit Notation for selecting a submenu
<text> Notation for variables and keys
[text] Notation for software buttons to click on the screen
... Repeated item for example node 1, node 2, ..., node
.
.
.
.. Ranges, for example: 0..4 means one of the integers
| Logical OR
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
and parameter description
12
Omission of information from example/command
that is not necessary at the time being
0,1,2,3, and 4 (used in registers)
23
Page 24
About this Manual
Notation Description
About this Manual
Indicates a hazardous situation which, if not avoided,
could result in death or serious injury
Indicates a hazardous situation which, if not avoided,
may result in minor or moderate injury
Indicates a property damage message
No danger encountered. Pay attention to important
information
Summary of Changes
Part Number Publication Date Description
6806800P54A August 2012 Initial Version.
6806800P54B August 2012 Updated DoC.
6806800P54C April 2013 This version of the document contains, information
6806800P54D August 2013 Updated Chapter 2, Hardware Preparation and
24
about ATC A-7370-Single board variant. Consequently,
the title has been updated to reflect this change.
Updated Chapter 1, Introduction, on page 39, Chapter
2, Hardware Preparation and Installation, on page 47,
Chapter 5, Functional Description, on page 103, Figure
9.1 on page 229.
Installation, on page 47, Table 2-1, and Table 2-2. Added
Figure 2-1.
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
Page 25
About this Manual
Part Number Publication Date Description
6806800P54E December 2013 Updated Safety Notes.
6806800P54F June 2014 Re-branded to Artesyn.
6806800P54G September 2014 Updated the descriptive text in the note for Figure 1-2
on page 44, Figure 2-2 on page 53, Figure 2-3 on page
56, Figure 5-1 on page 103, Figure 5-2 on page 105,
Figure 5-4 on page 112, and Figure 9-1 on page 231.
6806800P54H January 2015 Added Figure 9-1 and Figure 9-2 in Chapter 9.
Updated Table 8-42 and Table 8-43 in Chapter 8.
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
25
Page 26
About this Manual
About this Manual
26
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
Page 27
Safety Notes
This section provides warnings that precede potentially dangerous procedures throughout
this manual. Instructions contained in the warnings must be followed during all phases of
operation, service, and repair of this equipment. You should also employ all other safety
precautions necessary for the operation of the equipment in your operating environment.
Failure to comply with these precautions or with specific warnings elsewhere in this manual
could result in personal injury or damage to the equipment.
Artesyn Embedded Technologies intends to provide all necessary information to install and
handle the product in this manual. Because of the complexity of this product and its various
uses, we do not guarantee that the given information is complete. If you need additional
information, ask your Artesyn representative.
The product has been designed to meet the standard industrial safety requirements. It must
not be used except in its specific area of office telecommunication industry and industrial
control.
Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering
are authorized to install, remove or maintain the product.
The information given in this manual is meant to complete the knowledge of a specialist and
must not be used as replacement for qualified personnel.
Keep away from live circuits inside the equipment. Operating personnel must not remove
equipment covers. Only factory authorized service personnel or other qualified service
personnel may remove equipment covers for internal subassembly or component replacement
or any internal adjustment.
Do not install substitute parts or perform any unauthorized modification of the equipment or
the warranty may be voided. Contact your local Artesyn representative for service and repair
to make sure that all safety features are maintained.
EMC
The blade has been tested in a standard Artesyn system and found to comply with the limits
for a Class A digital device in this system, pursuant to part 15 of the FCC Rules, EN 55022 Class
A respectively. These limits are designed to provide reasonable protection against harmful
interference when the system is operated in a commercial environment.
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
27
Page 28
Safety Notes
This is a Class A product based on the standard of the Voluntary Control Council for
Interference by Information Technology Interference (VCCI). If this equipment is used in a
domestic environment, radio disturbance may arise. When such trouble occurs, the user may
be required to take corrective actions.
The blade generates and uses radio frequency energy and, if not installed properly and used in
accordance with this guide, may cause harmful interference to radio communications.
Operating the system in a residential area is likely to cause harmful interference, in which case
the user will be required to correct the interference at his own expense.
The USB1, USB2 ports and the COM port are considered as debug/maintenance ports. During
normal operation no cables must be connected to these ports. Cables attached to these ports
during maintenance must not exceed a length of 3m.
Installation
Damage of Circuits
Electrostatic discharge and incorrect blade installation and removal can damage circuits or
shorten their life.
Before touching the blade or electronic components, make sure that you are working in an
ESD-safe environment.
Data Loss
Removing the blade with the blue LED still blinking causes data loss.
Wait until the blue LED is permanently illuminated, before removing the blade.
Damage of Blade and Additional Devices and Modules
Incorrect installation of additional devices or modules may damage the blade or the additional
devices or modules.
Before installing or removing an additional device or module, read the respective
documentation
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Operation
Blade Damage
Blade surface
High humidity and condensation on the blade surface causes short circuits.
Do not operate the blade outside the specified environmental limits. Make sure the blade is
completely dry and there is no moisture on any surface before applying power.
Blade Overheating and Blade Damage
Operating the blade without forced air cooling may lead to blade overheating and thus blade
damage.
When operating the blade, make sure that forced air cooling is available in the shelf.
When operating the blade in areas of electromagnetic radiation ensure that the blade is bolted
on the system and the system is shielded by enclosure.
Safety Notes
Injuries or Short Circuits
Blade or power supply
In case the ORing diodes of the blade fail, the blade may trigger a short circuit between input
line A and input line B so that line A remains powered even if it is disconnected from the power
supply circuit (and vice versa).
To avoid damage or injuries, always check that there is no more voltage on the line that has
been disconnected before continuing your work.
SFP / SFP+ Modules
Personal Injury and Damage of the RTM and SFP Modules
Installing and using SFP modules which are not fully certified and which do not meet all
relevant safety standards may damage the RTM and the SFP modules and may lead to personal
injury.
Only use and install SFP modules which are fully certified and which meet all relevant safety
standards.
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Safety Notes
Personal Injury
Optical SFP modules may be classified as laser products. When installing and using any of these
SFP modules, the regulations which correspond to the respective laser class apply to the whole
RTM. Not complying to these regulations may lead to personal injury.
When installing and using optical SFP modules which are classified as laser products, make
sure to comply to the respective regulations.
Eye Damage
Optical SFP modules may emit laser radiation when no cable is connected. This laser radiation
is harmful to your eyes.
Do not look into the optical lens at any time.
SFP Module Damage
The optical port plug protects the optical fibers against dirt and damage. Dirt and damage can
render the SFP module inoperable.
Only remove the optical plug when you are ready to connect a cable to the SFP module. When
no cable is connected, cover the port with an optical port plug.
RJ-45 Connectors
The RJ-45 connectors on the faceplate must only be used for twisted-pair Ethernet (TPE) and
serial console connections (according to faceplate marking). TPE and serial connections are
considered SELV circuits. Connecting a telephone line (TNV circuit) to such a connector may
destroy your telephone as well as your board. Therefore,
Clearly mark TPE connectors near your working area as network connectors.
Only connect TPE bushing of the system to safety extra low voltage (SELV) circuits.
Make sure that the length of the electric cable connected to a TPE bushing does not
exceed 100 m.
If you have further questions, ask your system administrator.
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Switch Settings
Blade Malfunction
Switches marked as 'reserved' might carry production-related functions and can cause the
blade to malfunction if their setting is changed.
Therefore, do not change settings of switches marked as 'reserved'. The setting of switches
which are not marked as 'reserved' has to be checked and changed before blade installation.
Blade Damage
Setting/resetting the switches during operation can cause blade damage.
Therefore, check and change switch settings before you install the blade.
Battery
Safety Notes
Blade Damage
Wrong battery installation may result in hazardous explosion and blade damage.
Therefore, always use the same type of Lithium battery as is installed and make sure the
battery is installed as described in this manual.
Environment
Always dispose of used blades, system components and RTMs according to your country’s
legislation and manufacturer’s instructions.
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Safety Notes
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Sicherheitshinweise
Dieses Kapitel enthält Hinweise, die potentiell gefährlichen Prozeduren innerhalb dieses
Handbuchs vorrangestellt sind. Beachten Sie unbedingt in allen Phasen des Betriebs, der
Wartung und der Reparatur des Systems die Anweisungen, die in diesen Hinweisen enthalten
sind. Sie sollten außerdem alle anderen Vorsichtsmaßnahmen treffen, die für den Betrieb des
Produktes innerhalb Ihrer Betriebsumgebung notwendig sind. Wenn Sie diese
Vorsichtsmaßnahmen oder Sicherheitshinweise, die an anderer Stelle diese Handbuchs
enthalten sind, nicht beachten, kann das Verletzungen oder Schäden am Produkt zur Folge
haben.
Artesyn Embedded Technologies ist darauf bedacht, alle notwendigen Informationen zum
Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich
jedoch um ein komplexes Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir
die Vollständigkeit der im Handbuch enthaltenen Informationen nicht garantieren. Falls Sie
weitere Informationen benötigen sollten, wenden Sie sich bitte an die für Sie zuständige
Geschäftsstelle von Artesyn.
Das System erfüllt die für die Industrie geforderten Sicherheitsvorschriften und darf
ausschließlich für Anwendungen in der Telekommunikationsindustrie und im Zusammenhang
mit Industriesteuerungen verwendet werden.
Einbau, Wartung und Betrieb dürfen nur von durch Artesyn ausgebildetem oder im Bereich
Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem
Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von
Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen.
Halten Sie sich von stromführenden Leitungen innerhalb des Produktes fern. Entfernen Sie auf
keinen Fall Abdeckungen am Produkt. Nur werksseitig zugelassenes Wartungspersonal oder
anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen, um Komponenten
zu ersetzen oder andere Anpassungen vorzunehmen.
Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt
durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für
Sie zuständige Geschäftsstelle von Artesyn. So stellen Sie sicher, dass alle
sicherheitsrelevanten Aspekte beachtet werden.
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Sicherheitshinweise
EMV
Das Blade wurde in einem Artesyn Standardsystem getestet. Es erfüllt die für digitale Geräte
der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien
Abschnitt 15 bzw. EN 55022 Klasse A. Diese Grenzwerte sollen einen angemessenen Schutz
vor Störstrahlung beim Betrieb des Blades in Gewerbe- sowie Industriegebieten
gewährleisten.
Das Blade arbeitet im Hochfrequenzbereich und erzeugt Störstrahlung. Bei unsachgemäßem
Einbau und anderem als in diesem Handbuch beschriebenen Betrieb können Störungen im
Hochfrequenzbereich auftreten.
Warnung! Dies ist eine Einrichtung der Klasse A. Diese Einrichtung kann im Wohnbereich
Funkstörungen verursachen. In diesem Fall kann vom Betreiber verlangt werden,
angemessene Maßnahmen durchzuführen.
Die nachfolgend aufgeführten Schnittstellen sind Wartungsschnittstellen:
USB1, USB2 und COM
Während des Normalbetriebs darf an diesen Schnittstellen kein Kabel angeschlossen sein. Im
Wartungsfall angeschlossene Kabel dürfen eine Länge von 3m nicht überschreiten.
Installation
Beschädigung von Schaltkreisen
Elektrostatische Entladung und unsachgemäßer Ein- und Ausbau von Blades kann Schaltkreise
beschädigen oder ihre Lebensdauer verkürzen.
Bevor Sie Blades oder elektronische Komponenten berühren, vergewissern Sie sich, daß Sie in
einem ESD-geschützten Bereich arbeiten.
Datenverlust
Wenn Sie das Blade aus dem Shelf herausziehen, und die blaue LED blinkt noch, gehen Daten
verloren.
Warten Sie bis die blaue LED durchgehend leuchtet, bevor Sie das Blade herausziehen.
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Beschädigung des Blades und von Zusatzmodulen
Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Blades und der
Zusatzmodule führen.
Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige Dokumentation.
RJ-45 Stecker
Die RJ-45 Stecker auf der Frontblende dürfen nur für Twisted-Pair-Ethernet (TPE) oder für
Serielle Konsole Verbindungen verwendet werden (entsprechend der Markierung an der
Frontblende). TPE und Serielle Verbindungen sind SELV Kreise. Beachten Sie, dass ein
versehentliches Anschließen einer Telefonleitung (TNV Kreis) an einen solchen TPE Stecker
sowohl das Telefon als auch das Board zerstören kann. Beachten Sie deshalb die folgenden
Hinweise:
Kennzeichnen Sie TPE-Anschlüsse in der Nähe Ihres Arbeitsplatzes deutlich als
Netzwerkanschlüsse.
Sicherheitshinweise
Schließen Sie an TPE-Buchsen ausschließlich SELV-Kreise
(Sicherheitskleinspannungsstromkreise) an.
Die Länge des mit dem Board verbundenen Twisted-Pair Ethernet-Kabels darf 100 m nicht
überschreiten.
Betrieb
Beschädigung des Blades
Hohe Luftfeuchtigkeit und Kondensat auf der Oberfläche des Blades können zu Kurzschlüssen
führen.
Betreiben Sie das Blade nur innerhalb der angegebenen Grenzwerte für die relative
Luftfeuchtigkeit und Temperatur. Stellen Sie vor dem Einschalten des Stroms sicher, dass sich
auf dem Blade kein Kondensat befindet.
Überhitzung und Beschädigung des Blades
Betreiben Sie das Blade ohne Zwangsbelüftung, kann das Blade überhitzt und schließlich
beschädigt werden.
Bevor Sie das Blade betreiben, müssen Sie sicher stellen, dass das Shelf über eine
Zwangskühlung verfügt.
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Sicherheitshinweise
Wenn Sie das Blade in Gebieten mit starker elektromagnetischer Strahlung betreiben, stellen
Sie sicher, dass das Blade mit dem System verschraubt ist und das System durch ein Gehäuse
abgeschirmt wird.
Verletzungen oder Kurzschlüsse
Blade oder Stromversorgung
Falls die ORing Dioden des Blades durchbrennen, kann das Blade einen Kurzschluss zwischen
den Eingangsleitungen A und B verursachen. In diesem Fall ist Leitung A immer noch unter
Spannung, auch wenn sie vom Versorgungskreislauf getrennt ist (und umgekehrt).
Prüfen Sie deshalb immer, ob die Leitung spannungsfrei ist, bevor Sie Ihre Arbeit fortsetzen,
um Schäden oder Verletzungen zu vermeiden.
SFP / SFP+ Modules
Gefahr von Verletzungen sowie von Beschädigung des RTMs und SFP-Modulen
Die Installation und der Betrieb von SFP-Modulen, welche nicht zertifiziert sind und welche
nicht den Sicherheitsstandards entsprechen, kann Verletzungen zur Folge haben sowie zur
Beschädigung des RTMs und von SFP-Modulen führen.
Verwenden Sie daher nur SFP-Module, die zertifiziert sind und die den Sicherheitsstandards
entsprechen.
Verletzungsgefahr
Optische SFP-Module können als Laserprodukte klassifiziert sein. Wenn Sie solche SFP-Module
installieren und betreiben, so gelten die entsprechenden Bestimmungen für Laserprodukte für
das gesamte RTM. Werden diese Bestimmungen nicht eingehalten, so können Verletzungen
die Folge sein.
Wenn Sie SFP-Module betreiben, die als Laserprodukte klassifiziert sind, stellen Sie sicher, dass
die entsprechenden Bestimmungen für Laserprodukte eingehalten werden.
Verletzungsgefahr der Augen
Optische SFP-Module können Laserstrahlen aussenden, wenn kein Kabel angeschlossen ist.
Blicken Sie daher nicht direkt in die Öffnung eines SFP-Moduls, um Verletzungen der Augen zu
vermeiden.
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Beschädigung von SFP-Modulen
Die Schutzkappe eines SFP-Modules dient dazu, die sensible Optik des SFP-Modules gegen
Staub und Schmutz zu schützen.
Entfernen Sie die Schutzkappe nur dann, wenn Sie beabsichtigen, ein Kabel anzuschließen.
Andernfalls belassen Sie die Schutzkappe auf dem SFP-Modul.
Schaltereinstellungen
Fehlfunktion des Blades
Schalter, die mit 'Reserved' gekennzeichnet sind, können mit produktionsrelevanten
Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen
auslösen.
Verstellen Sie nur solche Schalter, die nicht mit 'Reserved' gekennzeichnet sind. Prüfen und
ändern Sie die Einstellungen der nicht mit 'Reserved' gekennzeichneten Schalter, bevor Sie das
Blade installieren.
Sicherheitshinweise
Beschädigung der Blade
Das Verstellen von Schaltern während des laufenden Betriebes kann zur Beschädigung des
Blades führen.
Prüfen und ändern Sie die Schaltereinstellungen, bevor Sie das Blade installieren.
Batterie
Beschädigung des Blades
Ein unsachgemäßer Einbau der Batterie kann gefährliche Explosionen und Beschädigungen
des Blades zur Folge haben.
Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen
Sie die Installationsanleitung.
Umweltschutz
Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in
Ihrem Land gültigen Gesetzgebung und den Empfehlungen des Herstellers.
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Sicherheitshinweise
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Introduction
1.1 Features
The ATCA-7370 is a high-performance ATCA compliant single board computer designed for
demanding storage and processing applications.
A single processor variant of the ATCA-7370 is also available. It is called ATCA-7370-S.
The main features of the ATCA-7370 board are as follows:
Designed for NEBS and ETSI compliance
Dual socket Intel Xeon E5-2648L eight core processor
Memory: Total of eight DDR3 DIMM slots, supports up to 128 GB memory with speed rate
up to DDR3-1600 and four slots in case of single processor variant.
Single slot ATCA form factor (280mm x 322mm)
Chapter 1
Redundant connections to the back plane's Base Interfaces (PICMG3.0) and Fabric
Interfaces (PICMG 3.1 Option1,9)
External Interfaces
Front Panel
– One RJ45 GE Ethernet Port, the other RJ45 GE port (the lower one) is reserved
– Two USB2.0 interfaces
– One serial console
– Reset button
RTM Interface
– Total 36 PCI-E Lanes on three Zone3 connectors
– Intelligent Platform Management Interface (IPMI) bus
– Two SAS interfaces
– One USB interface
Multiple software packages including operating systems
Storage:
– Hot-swappable hard disks
– On-board solid state disk at SATA, up to 256GB(optional)
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Introduction
Cave Creek Mezzanine card for compression/decompression or security (optional)
Hardware RAID 0 and 1 is supported for locally and externally connected disk drives
Next generation communications platform from Intel, codename Crystal Forest with on-
Base interface: Dual 10/100/1000Base-T Ethernet
Fabric Interface: Dual 1G/10Gbps Ethernet interfaces, support PICMG3.1 option 1 and 9
Serial over LAN via AdvancedTCA base interface
Firmware (BIOS, IPMC,FPGA) upgradeable
On-board IPMI management controller (IPMC) implements IPMI version 1.5
On-board Glue Logic FPGA for IPMC extension and on-board Control register
BIOS Chip: Up to 8MB on-board Boot and 8 MB Recovery Boot Flash (SPI)
board Intel C604 chipset Platform Controller Hub (PCH)
1.2 Standard Compliances
The product is designed to meet the following standards.
Table 1-1 Standard Compliances
Standard Description
SN29500/8 Reliability requirements
MIL-HDBK-217F
SR-332
TR-NWT-000357
IEC 60068-2-1/2/3/13/14 Climatic environmental requirements. The product
can only be used in a restricted temperature range.
IEC 60068-2-27/32/35 Mechanical environmental requirements
IEC 60950-1, EN 60950-1, UL/CSA
60950-1
UL 94V-0/1, Oxygen index for PCBs
below 28%
Safety requirements
Flammability
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Table 1-1 Standard Compliances (continued)
Standard Description
EN 55022 EMC requirements on system level
EN 55024
EN 300 386 (v1.4.1): 2008
FCC Part 15, Subpart B
ICES-003: 2004
VCCI V-3/2011.04
AS/NZS CISPR22: 2009
ANSI/IPC-A-610 Rev.B Class 2 Manufacturing requirements
ANSI/IPC-R-700B, ANSI-J-001...003
ISO 8601 Y2K compliance
NEBS Standard GR-63-CORE NEBS level three
NEBS Standard GR-1089 CORE
Attention: ATCA boards require CISPR 22 Class A on
conducted emissions
EMC immunity requirements industrial
EMC for telecom equipment
Project is designed to support NEBS level three. The
compliance tests must be done with the customer
target system.
Introduction
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Introduction
Figure 1-1 Declaration of Conformity
42
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1.3 Mechanical Data
The following table provides details about the blade's mechanical data, such as dimensions and
weight.
Table 1-2 Mechanical Data
Feature Value
Dimensions (width x height x depth) Single slot ATCA
Net weight 2930g (without DIMMs), 2496g (with 4x 8GB DIMMs)
Introduction
30mm x 351mm x 312mm, 8U form factor
Weight (including Artesyn standard
packaging)
4105 g (without DIMMs), 4318 g (with 8x 8GB DIMMs)
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Introduction
1.4 Mechanical Layout
The following graphics illustrate the mechanical layout of the blade.
Figure 1-2 Mechanical Layout
S/N Label
44
Note: On the single processor variant the processor and its DIMM sockets are populated on
the upper side of the board. Components associated with the second processor are not
populated on this product variant.
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1.5 Mean Time Between Failures
The following table specifies the Mean Time Between Failures (MTBF) data.
ATCA-7370 blade 5470 fit (182,815 hours)
RTM-7370 blade 950 fit (1,052,631 hours)
Standard for calculation SR332
The following table specifies the environmental conditions required for the blade.
Quality Level Quality Level II is most common
Environment Typically Ground, Fixed, Controlled
o
Assembly Ambient Temperature 40
Confidence Level 60 %
C
Introduction
1.6 Ordering Information
As of the printing date of this manual, this guide supports the models listed below.
Table 1-3 Blade Variants - Ordering Information
Product Name Description
ATCA-7370 ATCA processor blade with dual 8-core Intel Xeon E5-2648L (1.8GHz),
0GB, 10G support, NSN variant.
ATCA-7370-0GB-S Single Processor Variant
ATCA processor blade with single 8-core Intel® Xeon® processor E52648L (1.8 GHz), 0GB, 10G support.
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Introduction
As of the printing date of this manual, the following board accessories are available.
Table 1-4 Blade Accessories - Ordering Information
Accessory Description
RTM-ATCA-737x RTM for the ATCA-737x product series, 2X GBE (SFP), 2X
slot for optional HDD, NSN variant.
ATCA-7370-ACCEL-MOD Single co-processor module to accelerate cryptography, data
compression, and pattern matching.
1.7 Product Identification
The Figure 1-2 on page 44 shows the location of the serial number label.
46
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Hardware Preparation and Installation
2.1 Unpacking and Inspecting the Blade
This section describes the procedure for packing and inspecting the blade.
Damage of Circuits
Electrostatic discharge and incorrect blade installation and removal can damage circuits or
shorten its life.
Before touching the blade or electronic components, make sure that you are working in an
ESD-safe environment.
Shipment Inspection
Chapter 2
To inspect the shipment, perform the following steps.
1. Verify that you have received all items of your shipment:
ATCA-7370/ATCA-7370-S blade
A printed copy of Quick Start Guide
A printed copy of Safety Notes Summary
Any optional items ordered
2. Check for damage and report any damage or differences to the customer service.
3. Remove the desiccant bag shipped together with the blade and dispose of it according to
your country’s legislation.
The blade is thoroughly inspected before shipment. If any damage occurred during
transportation or any items are missing, contact our customer service immediately.
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Hardware Preparation and Installation
2.2 Environmental and Power Requirements
In order to meet the environmental requirements, the blade must be tested in the system in
which it is to be installed.
Before you power up the blade, calculate the power needed according to the combination of
blade upgrades and accessories.
2.2.1 Environmental Requirements
The environmental conditions must be tested and proven in the shelf configuration used. The
conditions refer to the surrounding of the blade within the user environment.
The environmental requirements of the blade may be further limited down due to
installed accessories, such as hard disks with more restrictive environmental
requirements.
Operating temperatures refer to the temperature of the air circulating around the
blade and not to the actual component temperature.
Blade Surface and Blade Damage
High humidity and condensation on the blade surface causes short circuits.
Do not operate the blade outside the specified environmental limits. Make sure that the
blade is completely dry and there is no moisture on any surface before applying power.
Blade Overheating and Blade Damage
Operating the blade without forced air cooling may lead to blade overheating and thus
blade damage.
When operating the blade, make sure that the forced air cooling is available on the shelf.
48
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Hardware Preparation and Installation
Table 2-1 Environmental Requirements
Requirement Operating Non-Operating
Temperature +5 °C (41 °F) to +40 °C (104 °F) (normal
operation) according to NEBS Standard
GR-63-CORE
-5 °C (23 °F) to +55 °C (131 °F)
(exceptional operation) according to
NEBS Standard GR-63-CORE
Temp. Change +/- 0.25 °C/min according to NEBS
Standard GR-63-CORE
-40 °C (-40 °F) to +70 °C (158 °F) (may be
further limited by installed accessories)
+/- 0.25 °C/min
Rel. Humidity 5% to 90% non-condensing according
to Artesyn-internal environmental
requirements
Vibration 0.1 g from 5 to 100 Hz and back to 5 Hz
at a rate of 0.1 octave/minute
5% to 95% non-condensing according to
Artesyn-internal environmental
requirements
5-20 Hz at 0.01 g
2
/Hz
20-200 Hz at -3.0 dB/octave
2
3
Random 5-20 Hz at 1 m
/Sec
Random 20-200 Hz at -3 m/Sec
Shock Half-sine, 11 m/Sec, 30mSec/Sec
2
Blade level packaging
Half-sine, 6 mSec at 180 m/Sec
Free Fall - 1,200 mm/all edges and corners
1.0 m (packaged) per ETSI 300 019-2-2
(blade level packaging)
100 mm (unpacked) per GR-63-CORE
2
2
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Hardware Preparation and Installation
During the safety qualification of this blade, the following on-board locations were identified
as critical with regards to the maximum temperature during blade operation. To guarantee
proper blade operation and to ensure safety, you have to make sure that the temperatures at
the locations specified in the Figure 2-1 are not exceeded. If not stated otherwise, the
temperatures should be measured by placing a sensor exactly at the given locations.
Figure 2-1 Location of Critical Temperature Spots (Blade Top Side)
50
1. Temperature Spot 1 (on Power Entry Module) Max: 90°C (exact location: on top of the
transformer)
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2. Temperature Spot 2 (on 48V/12V DC/DC Module) Max: 100°C (exact location: in the
geometric middle of the heat spreader)
2.2.2 Power Requirements
The blade's power requirements depend on the installed hardware accessories. If you want to
install accessories on the blade, the load of the respective accessory must be added to that of
the blade. In Table 2-2, you will find typical examples of power requirements with and without
accessories installed.For information on the accessories' power requirements, refer to the
documentation delivered together with the respective accessory or consult your local Artesyn
Embedded Technologies representative for further details.
The blade must be connected to a TNV-2 or a safety-extra-low-voltage (SELV) circuit. A TNV-2
circuit is a circuit whose normal operating voltages exceed the limits for a SELV circuit under
normal operating conditions, and which is not subject to over voltages from
telecommunication networks.
Hardware Preparation and Installation
Table 2-2 Power Requirements
Characteristic Value
Rated Voltage
Exception in the US and Canada
Operating Voltage
Exception in the US and Canada
Max. power consumption of ATCA-7370
(with ATCA-7370-ACC-Module and with RTM-ATCA-
737x including two SAS HDDs)
Max. power consumption of ATCA-7370
(without ATCA-7370-ACC-Module and without RTM)
Max. power consumption of ATCA-7370-s (without
ATCA-7370-ACCEL-MOD and without RTM)
-48 VDC to -60 VDC
-48 VDC
-39 VDC to -72 VDC
-39 VDC to -60 VDC
260W (typ. 220W)
220W (typ. 180W)
140W (typ. 120W)
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Hardware Preparation and Installation
The blade provides two independent power inputs according to the AdvancedTCA
Specification. Each input must be equipped with an additional fuse of max. 90A located either
in the shelf where the blade is installed or the power entry module (PEM).
The power consumption has been measured using specific boards in a configuration
considered to represent the worst-case (with RTM-ATCA-737x and SAS HDD, maximum
memory population, ACC-7370 module) and with software simultaneously exercising as
many functions and interfaces as possible. This includes a particular load software provided
by Intel, designed to stress the processors to reach their theoretical maximum power
specification.
Any difference in the system configuration or the software executed by the processors may
affect the actual power dissipation. Depending on the actual operating configuration and
conditions, customers may see slightly higher power dissipation, or it may even be
significantly lower. There is also a dependency on the batch variance of the major
components like the processor and DIMMs used. Hence, Artesyn does not represent or
warrant that measurement results of a specific board provide guaranteed maximum values
for a series of boards.
52
Note: This power requirement is under room temperature (25oC).
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2.3 Blade layout
Figure 2-2 Blade Layout
Hardware Preparation and Installation
Note: On the single processor variant the processor and its DIMM sockets are populated on the
upper side of the board. Components associated with the second processor are not populated
on this product variant.
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Hardware Preparation and Installation
2.4 Installing the Blade Accessories
The following additional components are available for the blade.
Dual Inline Memory Module (DIMM)
Cave Creek module
These accessories are described in detail in the following sections. For order numbers, refer to
section Ordering Information on page 45.
2.4.1 DIMM Memory Modules
The blade provides up to eight memory slots for main memory DIMM modules. You may install
and/or remove DIMM memory modules in order to adapt the main memory size to your needs.
The corresponding installation/removal procedures are described in this section.
The location of the DIMM memory modules are shown in Figure "Blade Layout" on page 53.
54
ATCA-7370/ATCA-7370-S supports low-voltage DDR3 memory. This is available upon
request.
Damage of Circuits
Electrostatic discharge and incorrect module installation and removal can damage circuits
or shorten its life.
Before touching the module or electronic components, make sure that you are working in
an ESD-safe environment.
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Hardware Preparation and Installation
Installation Procedure
To install a DIMM module:
1. Remove the blade from the system as described in Installing and Removing the Blade on page
59.
2. Open locks of memory module socket.
3. Insert the module carefully into the socket.
As soon as the memory module has been fully inserted, the locks automatically close.
4. If applicable, repeat steps 2 to 3 to install further modules.
Damage of Circuits
Electrostatic discharge and incorrect module installation and removal can damage circuits
or shorten its life.
Before touching the module or electronic components, make sure that you are working in
an ESD-safe environment.
Removal Procedure
To remove a DIMM module:
1. Remove the blade from the system as described in Installing and Removing the Blade on page
59.
2. Open the locks of the socket at both sides.The memory module is automatically lifted up.
3. Remove the module from the socket.
4. Repeat steps 2 to 3 in order to remove further memory modules.
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Hardware Preparation and Installation
2.4.2 Cave Creek Module
This section describes the steps to install/remove the cave creek module. The following figure
illustrates the location of the cave creek module.
Figure 2-3 Cave Creek Module
56
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Hardware Preparation and Installation
Damage of Circuits
Electrostatic discharge and incorrect module installation and removal can damage circuits
or shorten its life.
Before touching the module or electronic components, make sure that you are working in
an ESD-safe environment.
Cave Creek Module Installation
To install the cave creek module:
1. Remove the blade from the system as described in Installing and Removing the Blade on page
59.
2. Align and fasten the four M2.5x 8mm standoffs from bottom side of the cave creek module,
using the four M2.5x 4mm screws.
3. Insert the cave creek module in the socket so that the module's standoffs fit in the blade's
mounting holes.
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Hardware Preparation and Installation
4. Fasten the cave creek module to the blade using the four M2.5x 4mm screws.
5. Reinstall the blade into the system as described in Installing and Removing the Blade on page
59
.
Figure 2-4 Cave Creek Module Installation
58
Cave Creek Module Removal
To remove the cave creek module:
1. Remove the blade from the system as described in Installing and Removing the Blade on page
59.
2. Loosen and remove the four screws that holds the cave creek module.
3. Remove the cave creek module from the blade.
4. Reinstall the blade into the system as described in Installing and Removing the Blade on page
59
.
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Hardware Preparation and Installation
2.5 Installing and Removing the Blade
The blade is fully compatible to the AdvancedTCA standards and is designed to be used in
AdvancedTCA shelves.
The blade can be installed in any AdvancedTCA node slot. Do not install the blade in an
AdvancedTCA hub slot.
Damage of Circuits
Electrostatic discharge and incorrect blade installation and removal can damage circuits or
shorten its life.
Before touching the blade or electronic components, make sure that you are working in an
ESD-safe environment.
Blade Malfunctioning
Incorrect blade installation and removal can result in blade malfunctioning.
When plugging the blade in or removing it, do not press on the faceplate but use the
handles.
2.5.1 Installing the Blade
To install the blade into an AdvancedTCA shelf, proceed as follows.
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Hardware Preparation and Installation
Installation Procedure
The following procedure describes the installation of the blade. It assumes that your system is
powered on. If your system is not powered on, you can disregard the blue LED and thus skip the
respective step. In this case, it is purely a mechanical installation.
1. Ensure that the top and bottom ejector handles are in the outward position by
squeezing the lever and the latch together.
60
2. Insert the blade into the shelf by placing the top and bottom edges of the blade in
the card guides of the shelf. Ensure that the guiding module of shelf and blade are
aligned properly.
3. Apply equal and steady pressure to the blade to carefully slide the blade into the
shelf until you feel resistance. Continue to gently push the blade until the blade
connectors engage.
4. Squeeze the lever and the latch together and hook the lower and the upper handle
into the shelf rail recesses.
5. Fully insert the blade and lock it to the shelf by squeezing the lever and the latch
together, and turning the handles towards the faceplate.
If your shelf is powered on, as soon as the blade is connected to the backplane
power pins, the blue LED is illuminated.
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Hardware Preparation and Installation
When the blade is completely installed, the blue LED starts to blink. This indicates
that the blade has signified its presence to the shelf management controller.
If an RTM is connected to the front blade, make sure that the handles of both the RTM and
the front blade are closed in order to power up the blade’s payload.
6. Wait until the blue LED is switched off, then fasten the faceplate screws, which
secure the blade to the shelf.
When the blue LED is switched OFF and the green LED (IS) is switched ON,
this indicates that the payload has been powered up and the blade is active.
7. Connect cables to the faceplate, if applicable.
2.5.2 Removing the Blade
This section describes how to remove the blade from an AdvancedTCA system.
Damage of Circuits
Electrostatic discharge and incorrect blade installation and removal can damage circuits or
shorten their life.
Before touching the blade or electronic components, make sure that you are working in an
ESD-safe environment.
Blade Malfunctioning
Incorrect blade installation and removal can result in blade malfunctioning.
When plugging the blade in or removing it, do not press on the faceplate but use the
handles.
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Hardware Preparation and Installation
Removal Procedure
The following procedure describes how to remove the blade from the shelf. It assumes that the
system is powered on. If the system is not powered on, you can disregard the blue LED and skip
the respective steps. In that case, it is purely a mechanical procedure.
1. Unlatch the lower handle by squeezing the lever and the latch together and turning
the handle outward just enough to unlatch the handle from the faceplate. Do not
rotate the handle fully outward.
The blue LED blinks indicating that the blade power-down process is ongoing.
2. Wait until the blue LED is illuminated permanently, then unlatch the upper handle
and rotate both handles fully outward.
If the LED continues to blink, a possible reason may be that the upper layer software
rejected the blade extraction request.
62
Data Loss
Removing the blade with the blue LED still blinking causes data loss.
Wait until the blue LED is permanently illuminated, before removing the blade.
3. Remove the faceplate cables, if applicable.
4. Loosen the screws of the faceplate until the blade is detached from the shelf.
5. Remove the blade from the shelf.
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Controls, Indicators, and Connectors
3.1 Faceplate
The following figure illustrates the connectors, keys, and LEDs available on the faceplate:
Figure 3-1 Faceplate LEDs
Chapter 3
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Controls, Indicators, and Connectors
3.1.1 LEDs and Interfaces
The blade's faceplate provides the following interfaces and control elements:
Two USB 2.0 ports
Serial console port to connect to either payload or IPMC serial I/F
Leds
Two Ethernet ports
Reset button
The LEDs on the faceplate are described in the following table:
Table 3-1 Faceplate LEDs
Indicator Color Description
Out of Service LED1 Red or
Amber
In Service LED2 Green or
Red
Out of Service
Red/ optional Amber (controlled by IPMC): This LED is controlled by higher
layer software such as middleware or applications.
Red: "ON" after power up and lamp test finished
Turned "OFF" by OS startup script or application.
In Service
Red/green (controlled by IPMC). If both red and green are lit, it may look
amber): This LED is controlled by higher layer software such as
middleware or applications.
"OFF" after power up and lamp test finished
Turned green "ON" by OS startup script or application.
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Table 3-1 Faceplate LEDs (continued)
Indicator Color Description
Attention LED3 Amber Attention
Amber: This LED is controlled by higher layer software such as middleware
or applications.
"OFF" after power up and lamp test finished
Base Ethernet Green ON: Link up
Blinking: Shows activity
OFF: Link down
The two LEDs are for the base Ethernet interface and are multiplexed with
U1 and U2 using the signal FP_BASE_LED_EN_N signal controlling from
FPGA.
U1, U2, U3 Red User LED
Red: user defined LED by FPGA register 0x57
Controls, Indicators, and Connectors
Hot Swap Blue FRU State Machine
During blade installation
– Blue: On-board IPMC powers up
– Blue (blinking): Blade is communicating with the shelf manager
– Off: Blade is active
During blade removal
– Blue (blinking): Blade is notifying the shelf manager that it is
going to deactivate
– Blue: Blade is ready to be extracted
The "Out of service", "In Service" and "Attention" LEDs are directly controlled by IPMC. A higher
application software can issue "set/get FRU LED state" command to IPMC to access them.
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Controls, Indicators, and Connectors
3.2 Connectors
3.2.1 Faceplate Connectors
Table 3-2 RJ45 Console Connector Pinout
Pin Signal
1RTS
2DTR
3 TXD
4GND
5GND
6 RXD
7DSR
8CTS
Table 3-3 USB Connector Pinout
Pin Signal
1 VP5_USB
2 USB_x_D-
3 USB_x_D+
4GND
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3.2.2 Backplane Connectors
Table 3-4 Zone 1 Connector P1 Pin Assignment
Contact Number Destination Description
1 - 4 Reserved Reserved
5 IPMC ISC PC0 Hardware Address Bit 0
6 IPMC ISC PC1 Hardware Address Bit 1
7 IPMC ISC PC2 Hardware Address Bit 2
8 IPMC ISC PC3 Hardware Address Bit 3
9 IPMC ISC PD4 Hardware Address Bit 4
10 IPMC ISC PD5 Hardware Address Bit 5
Controls, Indicators, and Connectors
11 IPMC ISC PD6 Hardware Address Bit 6
12 IPMC ISC PD7 Hardware Address Bit 7
13 IPMC IMC PD0 IPMB Clock Port A
14 IPMC IMC PD1 IPMB Data Port A
15 IPMC ISC PC5 IPMB Clock Port B
16 IPMC ISC PC4 IPMB Data Port B
17 - 24 Not used Not used
25 Shelf Ground Shelf Ground
26 Logic Ground Logic Ground
27 Power Building Block Enable B
28 Power Building Block Voltage Return A
29 Power Building Block Voltage Return B
30 Power Building Block Early -48V A
31 Power Building Block Early -48V B
32 Power Building Block Enable A
33 Power Building Block -48V A
34 Power Building Block -48V B
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Controls, Indicators, and Connectors
Table 3-5 Zone 2 Connector J20 Pin Assignment
J20
Row # Interface Col AB Col CD Col EF Col GH
1 Backplane Clock CLK1A+ CLK1A - CLK1B+ CLK1B- CLK2A+ CLK2A -
2 Update Channel SAS
& GE Redundancy
3 UPD_P2_TX+UPD_P2_TX-UPD_P2_RX+UPD_P2_RX-UPD_P3_TX+UPD_P3_TX-UPD_P3_RX+UPD_P3_R
4 UPD_GE_TX+UPD_GE_
5 N/A
6 N/A
7 N/A
8 N/A
9 N/A
10 N/A
UPD_P4_TX+UPD_P4_TX-UPD_P4_RX+UPD_P4_R
TX-
UPD_GE_
RX+
X-
UPD_GE_RX-UPD_P1_TX+UPD_P1_TX-UPD_P1_RX+UPD_P1_R
X-
X-
Table 3-6 Zone 2 Connector J23 Pin Assignment
J23
Row # Interface Col AB Col CD Col EF Col GH
1
Fabric Channel 2
2 F2[0]_TX+ F2[0]_TX- F2[0]_RX+ F2[0]_RX- F2[1]_TX+ F2[1]_TX- F2[1]_RX+ F2[1]_RX3 Fabric Channel 1 F1[2]_TX+ F1[2]_TX- F1[2]_RX+ F1[2]_RX- F1[3]_TX+ F1[3]_TX- F1[3]_RX+ F1[3]_RX4 F1[0]_TX+ F1[0]_TX- F1[0]_RX+ F1[0]_RX- F1[1]_TX+ F1[1]_TX- F1[1]_RX+ F1[1]_RX5 Base Channel 1 BI1_DA+ BI1_DA- BI1_DB+ BI1_DB- BI1_DC+ BI1_DC- BI1_DD+ BI1_DD6 Base Channel 2 BI2_DA+ BI2_DA- BI2_DB+ BI2_DB- BI2_DC+ BI2_DC- BI2_DD+ BI2_DD7 N/A NC NC NC NC NC NC NC NC
8 N/A NC NC NC NC NC NC NC NC
9 N/A NC NC NC NC NC NC NC NC
10 N/A NC NC NC NC NC NC NC NC
68
F2[2]_TX+ F2[2]_TX- F2[2]_RX+ F2[2]_RX- F2[3]_TX+ F2[3]_TX- F2[3]_RX+ F2[3]_RX-
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Controls, Indicators, and Connectors
Table 3-7 Zone 3 Connector J30 Pin Assignment
J30
Row # Interface Col AB Col CD Col EF Col GH
1 MISC COM_TXD COM_RXD NC NC NC NCS PS1_N RTM_PG
2 SAS2_TX_P SAS2_TX_N SAS2_RX_P SAS2_RX_N SAS3_TX_P SAS3_TX_N SAS3_RX_P SAS3_RX_N
3 SAS0_TX_P SAS0_TX_N SAS0_RX_P SAS0_RX_N SAS1_TX_P SAS1_TX_N SAS1_RX_P SAS1_RX_N
4 USB_P USB_N SATA_TX+ SATA_TX- SATA_RX+ SATA_RX5
6 PICE2.0 x4 Port10 PCI-
E10_RP[0]
7 PCI-
E10_RP[2]
8 PCI-E CLOCK PCI-
E10_CLKP
9 MISC IPMB_L_SCL IPMB_L_SDA V3P3_M PS0_N RTM_PB_N RTM_GRST_
10 V12P V12P V12P V12P NC RTM_EN_N SMB_CLK SMB_DAT
PCIE10_RN[0]
PCIE10_RN[2]
PCIE10_CLKN
PCIE10_TP[0]
PCIE10_TP[2]
PCI-E_RST NC NC NC NC NC
PCIE10_TN[0]
PCIE10_TN[2]
PCIE10_RP[1]
PCIE10_RP[3]
PCIE10_RN[1]
PCIE10_RN[3]
PCIE10_TP[1]
PCIE10_TP[3]
PCIE10_TN[1]
PCIE10_TN[3]
N
Table 3-8 Zone 3 Connector J31 Pin Assignment
Row #Interf
1 x16
2 PCIE_CPU1_
3 PCIE_CPU1_
4 PCIE_CPU1_
5 PCIE_CPU1_
6 PCIE_CPU1_
7 PCIE_CPU1_
8 PCIE_CPU1_
9 PCIE
10
Col AB Col CD Col EF Col GH
ace
PCIE_CPU1_
PCIE
RX0+
from
CPU1
RX2+
RX4+
RX6+
RX8+
RX10+
RX12+
RX14+
CLK_100M_AB+CLK_100M_
CLK
PCIE_CPU1_
RX0-
PCIE_CPU1_
RX2-
PCIE_CPU1_
RX4-
PCIE_CPU1_
RX6-
PCIE_CPU1_
RX8-
PCIE_CPU1_
RX10-
PCIE_CPU1_
RX12-
PCIE_CPU1_
RX14-
AB-
PCIE_CPU1_
TX0+
PCIE_CPU1_
TX2+
PCIE_CPU1_
TX4+
PCIE_CPU1_
TX6+
PCIE_CPU1_
TX8+
PCIE_CPU1_
TX10+
PCIE_CPU1_
TX12+
PCIE_CPU1_
TX14+
CLK_100M_
CD+
J31
PCIE_CPU1_
TX0-
PCIE_CPU1_
TX2-
PCIE_CPU1_
TX4-
PCIE_CPU1_
TX6-
PCIE_CPU1_
TX8-
PCIE_CPU1_
TX10-
PCIE_CPU1_
TX12-
PCIE_CPU1_
TX14-
CLK_100M_
CD-
PCIE_CPU1_
RX1+
PCIE_CPU1_
RX3+
PCIE_CPU1_
RX5+
PCIE_CPU1_
RX7+
PCIE_CPU1_
RX9+
PCIE_CPU1_
RX11+
PCIE_CPU1_
RX13+
PCIE_CPU1_
RX15+
PCIE_CPU1
_RX1-
PCIE_CPU1
_RX3-
PCIE_CPU1
_RX5-
PCIE_CPU1
_RX7-
PCIE_CPU1
_RX9-
PCIE_CPU1
_RX11-
PCIE_CPU1
_RX13-
PCIE_CPU1
_RX15-
PCIE_CPU1_T
X1+
PCIE_CPU1_T
X3+
PCIE_CPU1_T
X5+
PCIE_CPU1_T
X7+
PCIE_CPU1_T
X9+
PCIE_CPU1_T
X11+
PCIE_CPU1_T
X13+
PCIE_CPU1_T
X15+
PCIE_CPU1_T
X1-
PCIE_CPU1_T
X3-
PCIE_CPU1_T
X5-
PCIE_CPU1_T
X7-
PCIE_CPU1_T
X9-
PCIE_CPU1_T
X11-
PCIE_CPU1_T
X13-
PCIE_CPU1_T
X15-
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Controls, Indicators, and Connectors
Table 3-9 Zone 3 Connector J32 Pin Assignment
J32
Row #Interf
1 PCIE
2 PCIE9_RP[2] PCIE9_RN[2] PCIE9_TP[2] PCIE9_TN[2] PCIE9_RP[3] PCIE9_RN[3] PCIE9_TP[3] PCIE9_TN[3]
3 PCIE
4 PCIE8_RP[2] PCIE8_RN[2] PCIE8_TP[2] PCIE8_TN[2] PCIE8_RP[3] PCIE8_RN[3] PCIE8_TP[3] PCIE8_TN[3]
5 PCIE
6 PCIE7_RP[2] PCIE7_RN[2] PCIE7_TP[2] PCIE7_TN[2] PCIE7_RP[3] PCIE7_RN[3] PCIE7_TP[3] PCIE7_TN[3]
7 PCIE
8 PCIE6_RP[2] PCIE6_RN[2] PCIE6_TP[2] PCIE6_TN[2] PCIE6_RP[3] PCIE6_RN[3] PCIE6_TP[3] PCIE6_TN[3]
9 PCIE
10 V12P V12P V12P PS0_N
Col AB Col CD Col EF Col GH
ace
PCIE9_RP[0] PCIE9_RN[0] PCIE9_TP[0] PCIE9_TN[0] PCIE9_RP[1] PCIE9_RN[1] PCIE9_TP[1] PCIE9_TN[1]
Port9
PCIE8_RP[0] PCIE8_RN[0] PCIE8_TP[0] PCIE8_TN[0] PCIE8_RP[1] PCIE8_RN[1] PCIE8_TP[1] PCIE8_TN[1]
Port8
PCIE7_RP[0] PCIE7_RN[0] PCIE7_TP[0] PCIE7_TN[0] PCIE7_RP[1] PCIE7_RN[1] PCIE7_TP[1] PCIE7_TN[1]
Port7
PCIE6_RP[0] PCIE6_RN[0] PCIE6_TP[0] PCIE6_TN[0] PCIE6_RP[1] PCIE6_RN[1] PCIE6_TP[1] PCIE6_TN[1]
Port6
PCIE9_CLKP PCIE9_CLKN PCIE8_CLKP PCIE8_CLKN PCIE7_CLKP PCIE7_CLKN PCIE6_CLKP PCIE6_CLKN
CLK
3.2.3 Mezzanine Card Connector
Table 3-10 Mezzanine Card Connector Signals
D Signal C Signal B Signal A Signal
1 SMB_SDA 1 SMB_SCI (from
IPMC)
2 VCC3V3_MGMT 2 GND 2 GND 2 GND
3 CRU_Refclk_N 3 CRU_Refclk_P 3 PCIe_refclk_N 3 PCIe_refclk_P
4GND 4GND 4GND 4GND
5 PCIe_TX1_N 5 PCIe_TX1_P 5 PCIe_TX0_N 5 PCIe_TX0_P
6 PCIe_RX1_N 6 PCIe_RX1_P 6 PCIe_RX0_N 6 PCIe_RX0_P
7GND 7GND 7GND 7GND
8 PCIe_TX3_N 8 PCIe_TX3_P 8 PCIe_TX2_N 8 PCIe_TX2_P
9 PCIe_RX3_N 9 PCIe_RX3_P 9 PCIe_RX2_N 9 PCIe_RX2_P
10 GND 10 GND 10 GND 10 GND
70
1 GBE_Refclk_N 1 GBE_Refclk_P
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Controls, Indicators, and Connectors
Table 3-10 Mezzanine Card Connector Signals (continued)
D Signal C Signal B Signal A Signal
11 PCIe_TX5_N 11 PCIe_TX5_P 11 PCIe_TX4_N 11 PCIe_TX4_P
12 PCIe_RX5_N 12 PCIe_RX5_P 12 PCIe_RX4_N 12 PCIe_RX4_P
13 GND 13 GND 13 GND 13 GND
14 PCIe_TX7_N 14 PCIe_TX7_P 14 PCIe_TX6_N 14 PCIe_TX6_P
15 PCIe_RX7_N 15 PCIe_RX7_P 15 PCIe_RX6_N 15 PCIe_RX6_P
16 GND 16 GND 16 GND 16 GND
17 17 17 17
18 GND 18 GND 18 GND 18 GND
19 19 19 19
20 20 20 20
21 21 21 21
22 GND 22 GND 22 GND 22 GND
23 23 23 23
24 24 24 24
25 25 25 25
26 26 26 26
27 27 27 27
28 RESET_N 28 PRSNT_N 28 PWR_EN 28 PWR_GD
29 VCC12 29 VCC12 29 VCC3V3 29 VCC3V3
30 GND 30 GND 30 GND 30 GND
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Controls, Indicators, and Connectors
3.2.4 On-board Connectors
3.2.4.1 Trusted Platform Module (TPM) Header
The TPM header is installed on the board and is used for port 80 card for debug monitor. It is
also reserved for TPM module customization. The head pin pitch is 2.54 mm.
Figure 3-2 TPM Connector Pinout
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3.2.4.2 FPGA JTAG Head
A single row six-pin heads for FPGA programming through JTAG is provided on the board.
Figure 3-3 USB 2.0 Flash Disk Module Connector Pinout
Controls, Indicators, and Connectors
3.3 Switch Settings
Switches reside on the component side 1 of the board and are not covered by any other
component. Its pin 1 is clearly marked on the PCB and by default are "OFF".
3.3.1 PCH Switch
Table 3-11 Switch SW2 Settings
Switch PCH Function Default
SW2.1 GPIO6 ON: Load default BIOS setting OFF
SW2.2 GPIO7 ON: BIOS Crisis Recovery OFF
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Controls, Indicators, and Connectors
3.3.2 FPGA Switch
Table 3-12 Switch SW1 Setting
Switch Function
SW1.1 Manual power enable of Payload of front board.
OFF: IPMC control payload power
ON: force payload power on when the board get inserted
Note: The S7.1 should also be “ON” in order to force the
payload power on.
SW1.2 No definition OFF
SW1.3 No definition OFF
Default
OFF
SW1.4 No definition OFF
Table 3-13 Switch S7 Setting
Switch Function Default
S7.1 ON: Reset IPMC
OFF: IPMC operates normally
Note: when forcing board power on
or downloading FPGA through cable,
the IPMC should be in reset state.
S7.2 FPGA image flash BANK selection
when using cable to download FPGA
image
ON: select recovery BANK (U150)
OFF: select default BANK (U151)
OFF
OFF
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4.1 Features
The Basic Input/Output System (BIOS) provides an interface between the operating system
and the hardware of the blade. It is used for hardware configuration. Before loading the
operating system, BIOS performs basic hardware test, known as Power-On Self Tests (POST)
and prepares the blade for the initial boot-up procedure.
During blade production, identical BIOS images are programmed into both boot flash banks. It
is possible to select boot flash as device to boot from. You can do this via an IPMI command. For
further details refer Chapter 8, Supported IPMI Commands, on page 183.
The BIOS used on the blade is based on the Phoenix UEFI BIOS with several Artesyn extensions
integrated. Its main features are as follows:
Initialize CPU, chipset and memory
Initialize PCI devices
Chapter 4
Setup utility for setting configuration data
IPMC support
Serial console redirection for remote blade access
Boot operation system
The BIOS complies with the following specifications:
UEFI Specification 2.0
Plug and Play BIOS Specification 1.0A
PCI BIOS Specification 2.1
System Management BIOS (SMBIOS) Specification 2.3
BIOS Boot Specification 1.01
PXE 2.1
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SMP 1.4
ACPI 4.0
The BIOS contains online documentation which describes in detail the available menu
options. Therefore, the description in this manual is limited to the main BIOS functions.
The BIOS setup program is required to configure the blade hardware. This configuration is
necessary for operating the blade and its connected peripherals. The configuration data is
stored in the same flash device from where the board boots.
When you are not sure about configuration settings, restore the default values. This option is
provided in case a value has been changed and you wish to reset settings. To restore the default
values, press <F9> key in setup.
Loading the BIOS default values affect all setup items and reset options that are
previously altered.
If you set the default values, the displayed default values take effect only after the BIOS
setup is saved and closed.
4.1.1 Update and Recovery
The ATCA-7370 has two different ways to update the BIOS.
Flash tool (FCU and ipmitool in Linux) is used for normal upgrade mode.
USB CD-ROM or USB flash device is used in BIOS recovery modes.
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4.1.2 DRAM Support
The BIOS supports the following features of the memory controller:
Auto-sizing - The BIOS reads the Serial Presence Detect (SPD) data from the memory
modules and automatically configures the chipset accordingly.
Error Correction Code (ECC) Support
– Single Bit Errors (SBE) can be detected, corrected and logged. Multi-Bit Errors (MBE)
can be detected but not corrected.
– By default, the BIOS enables ECC support in the chipset. However the BIOS setup menu
provides an option to enable or disable ECC.
– ECC Error Report Support: ATCA-7370 supports ECC error reporting. When an ECC
error occurs, the memory controller hardware increments an ECC error count and
triggers the System Management Interrupt (SMI) to let BIOS or OS handle the ECC
error.
BIOS
– The ECC counter is cleared at power cycle reset. The counter is preserved during a cold
reset, warm reset and S3 suspend/resume.
– The SMI routine is used to handle ECC error report on both the BIOS and OS. The ECC
error log is stored in the BIOS SPI Flash. After Linux is booted up, the Error Detection
and Correction Module (EDAC) is also used to count the ECC error.
– Correctable ECC logging and threshold setting in "BIOS setup / Advanced":
Menu Item Default Description
Memory ECC
Error Log
Correctable
ECC Logging
Threshold
Memory
Configuration /
Correctable
ECC Flooding
Threshold
Both This item selects the ECC runtime errors which
are to be logged in the SMBIOS event log.
1 This item is used to enter the correctable error
threshold value if "Memory ECC Error Log" is
not disabled. The logging threshold is based
per memory rank, not per DIMM or overall.
100 This item is used to set the error logging limit
value per second if "Memory ECC Error Log" is
not disabled. If the number of correctable ECC
error logs produced per second reaches the
flood threshold, the correctable ECC error
reporting is disabled. The flood threshold is an
overall setting.
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Example:
Set threshold to 10.
Given a dual rank DIMM and if 5 errors occur in rank 0 DIMM and 5 errors in rank 1
DIMM, then no ECC event is recorded.
Given a dual rank DIMM and if all the 10 errors occur in one single rank i.e. either rank
0 or rank 1 DIMM, then an ECC event is recorded.
Available memory space below 4GB boundary - The ATCA-7370 provides 3.25 GB memory
space below 4 GB boundary. The memory map below 4GB is listed in the following table:
Address range Content
F000_0000 ~ FFFF_FFFF Flash range
RCRB register
APIC register etc
E000_0000 ~ EFFF_FFFF 256MB PCIe extend memory space
D000_0000 ~ DFFF_FFFF PCIe BAR MMIO
0000_0000 ~ CFFF_FFFF 3.25GB available physical memory
space
The memory test is in the Intel Memory Reference Code (MRC) and uses hardware
controller intrinsic functions. For more information on MRC, see chapter 7.13 of Intel Xeon
Processor E5-1600/2400/2600/4600 Product Families System Agent BIOS Specification 1.01
document (document number 489625).
Artesyn recommends inserting memory modules of the same type into all slots of the
ATCA-7370. With mixed memory, like different model, voltage, or frequency, the system
may run in a degraded performance. Though not recommended, a certain combination is
possible with the following restrictions:
– A mix of different sizes
– A mix of 1.5V and 1.35V modules: all will be configured with 1.5V
– A mix of 1600MHz and 1333MHz: all will run with 1333MHz
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4.1.3 Interrupt Routing
The BIOS provides the interrupt routing to the operating system through the following
interfaces:
PCI IRQ routing table (non-ACPI environment)
Multi processor table (non-ACPI environment)
ACPI_PRT packages (ACPI environment)
ACPI Multiple APIC description Table (ACPI environment)
4.1.4 PCI Initialization
The BIOS supports PCI BIOS Specification Revision 2.1.
During Power On Self Test (POST), the BIOS identifies all PCI-to-PCI bridges and all PCI devices
with a header Type 1 in the system. It then initializes them according to their resource
requirements.
BIOS
If the PCI’s option ROM is detected, it will be executed and its function implemented. The
network option ROM adds new boot option to the BIOS boot table. The SAS option ROM shows
SAS configuration utility menu which lets the end user create RAID volume.
4.1.5 I/O Device Configuration
4.1.5.1 Serial Ports
The ATCA-7370 supports two serial ports in OS, but supports only one serial port for console
redirection in the BIOS. The default value is 3F8h/IRQ4.
4.1.5.2 Integrated SATA Controller
The BIOS provides setup items to configure the embedded serial ATA controller for debugging
purposes.It also supports hard disk auto typing. The BIOS automatically determines the proper
geometry for hard disks by reading the information from the drive.
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4.1.6 Boot Options
The ATCA-7370 supports the BIOS Boot Specification 1.01. The BIOS identifies all IPL (BAID,
BEV) devices and BCV devices (hard drives, USB sticks) in the system and will attempt to boot
them in the order specified in startup.
The following boot devices are integrated in the BIOS:
USB devices (sticks, hard drives, CD-ROM)
Network (BEV)
SAS HDD connected to C604 chipset
SATA connected to C604 chipset
EFI Shell
The default boot order is as follows:
Attached USB CD-ROM
Attached USB devices on the external USB port
SAS HDD
SATA HDD
Base Ethernet Interfaces
If the BIOS does not find any ready bootable device, it will loop on the source list until a boot
device becomes ready. After 10 loops, the BIOS initiates a cold reset and retries again or when
configured the BMC watchdog.
The BIOS organizes the devices in groups: CD-ROM, HDD, network, floppy, SAS HDD. Any
device can be set as the first boot device by raising it to the first boot device of its device group,
then raising that group to the first boot group.
The boot order for a certain device and its device group can be set even in the absence of that
device. The order is preserved. When the device is added later, it will be available at the
specified boot order.
4.1.6.1 Boot Support for the SAS Controller
The BIOS contains an option ROM SAS controller on the payload. Supports Legacy boot from
SAS HDDs.
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BIOS
The ATCA-7370 supports four SAS ports. Two local SAS ports are located in the RTM module,
the other two SAS ports are connected to the external ports of the RTM. The SAS physical port
number is assigned as follows:
P0 - Local SAS 1 which is far from RTM zone 3 connector
P1 - Local SAS 2 which is near from RTM zone 3 connector
P2 - External SAS 1
P3 - External SAS 2
The BIOS and Linux follow the SAS port physical number to assign sequence number. For
example, BIOS and Linux will assign sequence number as following:
Physical port BIOS Linux
P0 SAS0 sda
P1 SAS1 sdb
P2 SAS2 sdc
P3 SAS3 sdd
4.1.6.2 Network Boot
The BIOS contains a classic PXE Option ROM (OpROMs).
The following table summarizes the network boot support status:
Table 4-1 Network Boot Support Status
Ethernet Interface
Base Network Interface 1 (i350 - 1) Yes
Base Network Interface 2 (i350 - 2) Yes
Front Panel Network Interface (i350 - 3) Yes
Update Channel Network Interface (i350 - 4) No
Fabric Network Interface 1 (82599EB - 1) Yes
Fabric Network Interface 2(82599EB - 2) Yes
PXE Boot
Support
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4.1.7 Console or I/O Redirection
The Console redirection or I/O redirection to a COM port allows to configure the BIOS through
the setup menu even in the absence of a VGA adapter. The following option is configurable
through the BIOS setup:
Option Description
Baudrate Supports 9600 baud, 19200 baud, 38400 baud, and 115200 baud.
The default value is 9600.
The serial port 1 is fully compliant to industry standard 16550 asynchronous communication
controllers and is integrated in the Glue Logic FPGA.
4.1.8 Serial Over LAN (SOL)
The BIOS writes to FPGA register in the COM port number where the console redirection is
completed.
The BIOS sets FPGA register 0x603 bit 0 to high (Serial reduction control register) to indicate
that the BIOS uses serial port 1 for SOL function. Further steps to initialize SOL is completed by
IPMC.
4.1.9 IPMI Support
The ATCA-7370 BIOS provides the following IPMI support:
Checks if the IPMI controller is active. If not, it will display an appropriate error message.
Reads self-test result from the IPMI controller display. It will display an error message if the
self-test fails.
Sets initial timestamps for IPMI events
Sends system firmware progress to the IPMI.
Logs boot errors to the IPMI event log.
Sends OS boot events.
Reads slot information from the IPMI controller and fills the DMI structure Type 1 UUID.
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The only supported interface is Keyboard Controller Style (KCS). The IPMI base address and
interrupt is provided to OS via SMBIOS structure type38 and is tested with Linux OpenIPMI
driver.
4.1.9.1 Watchdogs
The watchdogs in ATCA-7370 are implemented by BMC watchdog.
The BIOS uses BMC watchdog in two phases.
BIOS phase
OS phase
The BMC watchdog for BIOS phase is started by the BMC automatically after the payload board
is powered on. The BIOS can disable BMC watchdog through the BIOS setup menu. If BMC
watchdog for BIOS is enabled, it will be disabled when BIOS setup menu is invoked boot to shell
or boot to OS. Timer value for BIOS phases is also configurable through BIOS setup menu. The
default time value is set to three minutes and the BMC watchdog for BIOS phase is enabled by
default.
BIOS
The BIOS can disable the BMC watchdog for OS loading phases through the BIOS setup. Timer
value for OS loading phases is also configurable through the BIOS setup. The default timer value
is five minutes, and the BMC watchdog for OS phase is disabled by default.
If BMC watchdog times out in the BIOS phase, BMC will switch the BIOS bank.
4.1.10 SMBIOS Support
The BIOS includes SMBIOS structures according to SMBIOS 2.4 and IPMI1.5 specifications.
4.1.11 LED Behavior During POST
After power up/reset and while BIOS runs, the LEDs are used to signalize the power up/ BIOS
phases. The state of LEDs is defined so that in case of a hang, the LEDs clearly indicate in which
boot up phase the hang occurred. In general, to indicate the POST is in progress, the BIOS
toggles the user LED for every POST task it executes. After the completion of the POST, the BIOS
switches off the LEDs. The LEDs marked with B1/U1,B2/U2 and U3 are used for this purpose.
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4.1.12 BIOS Setup Layout
The BIOS Setup default is aligned with the ATCA-7370 BIOS defaults.
4.1.12.1 Board Information Display
The BIOS displays the following board related information in the BIOS setup under "Board Info".
Current System (label for the loaded BIOS defaults set)
BIOS version
BIOS build date
IPMI Firmware Version
FPGA Version (On-board FPGA version)
BIOS Source (boot flash device bank)
4.1.13 USB 2.0 Ports
The ATCA-7370 supports three external 2.0 ports. All USB ports support low-speed, full-speed
and high-speed using the USB 2.0 Enhanced Host Controller Interface (EHCI).
4.1.14 Supported Operating Systems
The ATCA-7370 supports the following operating systems. DOS is used for debugging.
WRS PNE LE 4.3 Linux and higher
Red Hat Enterprise Linux 6.x
4.1.15 SPI Boot Flash
The SPI boot flash contains a descriptor mode image with all required parameters as described
in Intel®Patsburg chipset SPI Flash Programming Guide Revision 1.6 (Intel Confidential).
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4.1.16 Serial Console and BIOS Printouts
The BIOS initializes the serial port and uses the serial port as output console. The default
settings for the serial port are as follows:
Baud rate: 9600
8 data bits
No parity
1 stop bits
Flow control: None
The BIOS printout does not cause any significant delay to boot up. Default terminal emulation
is VT-100. The ATCA-7370 vendor, Phoenix, specifies and documents the terminal hot keys and
keystroke mapping for VT-100, ANSI and VT-UTF8.
The BIOS prints all errors found during BIOS phase. In addition to errors, BIOS prints the
information contained in the Board Information to console.
BIOS
4.1.16.1 BIOS Printouts to DRAM
The BIOS console printouts are stored in a specific area of the DRAM. The printouts are
accessible by the OS, allowing the use of the startup information for debugging and
troubleshooting. Storing the optional ROM printouts is not required. All printouts from the
serial console are logged into the DRAM buffer.
A simple structure is used to locate the printouts buffer and define its size. This floating
structure is located between addresses E000h and FFFFFh.
Table 4-2 Printout Floating Structure
Offset (in
Field
SIGNATURE 0 32 The ASCII string represented by "_CP_" which serves
VERSION 4 16 Version (low byte = minor, high byte = major).
PHYSICAL ADDRESS
POINTER
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
bytes:bits)
6 32 The address of beginning of the CP table. All zeros if
Length (in
bits) Description
as a search key for locating the pointer structure.
Version 1.00 (0100h) is defined.
the CP table does not exist.
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Table 4-2 Printout Floating Structure (continued)
Offset (in
Field
BUFFER SIZE 10 16 Printouts buffer size in bytes.
LENGTH 12 8 The length of the floating pointer structure table in
CHECKSUM 13 8 A checksum of the complete pointer structure. All
bytes:bits)
Length (in
bits) Description
bytes. The version 1.00 structure is 14 bytes long; so
this field contains 0Eh.
bytes specified by the length field, including
CHECKSUM and reserved bytes, must add up to
zero.
4.1.17 BIOS Interface towards OS
4.1.17.1 Proprietary BIOS Data Area (BDA) Bytes
The BIOS provides control for warm or cold reset types through the BIOS Data Area (BDA). The
OS requires following BDA bytes:
40:00 I/O addresses of four COM ports
40:72 BIOS warm reset flag.
40:D0 BIOS warm reset counter.
4.1.17.2 BIOS CLI Tool - IPMIBPAR
The IPMIBPAR tool is used to change the IPMI Boot Parameter list when Linux is up and running.
It supports the following options.
Table 4-3 BIOS CLI Tool - IPMIBPAR
Option Description
-d Enable debug output
-a xx IPMB Address, if not present local IPMC is used
-i Get device ID
-g Get IPMI Boot Parameter USER area
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Table 4-3 BIOS CLI Tool - IPMIBPAR (continued)
Option Description
-s file Store IPMI Boot Parameter (USER area), read
from file
-h Help
4.2 Setup Utility
The BIOS incorporates a setup utility that allows you to alter a variety of system options. This
section describes the operation of the setup utility, which explains the various options available
through a set of hierarchical menus. All options are not available with the product, and some
options depend on BIOS customizations.
The current settings are stored in the NVRAM area, and any changes can be copied back to this
area through the Exit Menu.
BIOS
To start the setup utility, press <F2> key during the early stages of POST after the power up.
This functionality operates when the USB keyboard is enabled, and through the console
redirection facility enabled.
The following table briefly describes the Primary Menus options, and most of the Primary
Menus have sub-menus.
Table 4-4 Primary Menu Description
Menu Options
Main Provides system information, date, and time
Advanced Advanced features including Boot, Processor, Peripheral, USB, Memory,
South Bridge and SMBIOS event log settings.
Security Supervisor and User password options.
Boot Boot priority order.
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Table 4-4 Primary Menu Description (continued)
Menu Options
Exit Save with or without changes, Loads or saves default settings.
The Phoenix Secure Core Tiano (SCT) navigation can be accomplished using a combination of
keys. These keys include the function keys, <Enter>,< Esc>, Arrow keys, etc.,. The following
table describes the SCT navigation keys.
Table 4-5 SCT Navigation Keys
Key Description
ENTER The <Enter> key allows to select an option, to edit its value or access a sub-menu.
><
Left/Right
^v
Up/Down
+Plus/Minus
Tab The <Tab> key allows to select fields.
ESC The <Esc> key allows to discard any changes made and exit the SCT Setup.
Function
keys
F1 General Help
F9 Load Optimized Defaults
F10 Save ESC and Exit
The Left and Right arrow keys allow to select a screen or menu.
For example, Main screen, Advanced screen, Exit screen, etc.,.
The Up and Down arrow keys allow to select an item or sub-screen.
The Plus and Minus keys allow to change the field value of a particular setup item.
For example, Date and Time.
When you are in a sub-menu, The <Esc> key allows you to exit to the upper menu.
When other function keys become available, they are displayed at the right of the screen
along with their intended function.
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4.2.1 Main Menu
The figure below shows the Main Menu options.
Figure 4-1 Main Menu
BIOS
Table 4-6 Main Menu
Field Description
System Date Sets the time and date (month/day/year format). To change
System Time
System
Information
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
these values, go to each field and enter the desired value. Press
the <Tab> key to move from hour to minute, minute to second,
month to day, or day to year. There is no default value.
Gives the BIOS version, CPU type, memory type size, etc.,
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BIOS
4.2.2 Advanced Menu
The figure below shows the Advanced Menu options.
Figure 4-2 Advanced Menu
90
Table 4-7 Advanced Menu
Field Description
Boot Configuration Set boot configuration. See section Boot Configuration
Processor Configuration Set CPU configuration. See section Processor Configuration
Peripheral Configuration Set system peripheral configuration. See section Peripheral
Configuration.
HDD Configuration Set hard drive and controller configuration. See section HDD
Configuration.
Memory Configuration Displays and provides options to change the memory settings. See
section Memory Configuration.
South Bridge Configuration Set south bridge configuration. See section South Bridge
Configuration.
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Table 4-7 Advanced Menu (continued)
Field Description
SMBIOS Event Log Set SMBIOS configuration. See section SMBIOS Event Log.
4.2.2.1 Boot Configuration
The table below lists the Boot Configuration options.
Table 4-8 Boot Configuration
Field Description
System Reset Type Enable Warm Reset support, which controls next reset type. Set to
BIOS
"Cold Reset", to change next reset type to cold reset; Set to "Warm
Reset", to change next reset type to warm reset.
Options: Warm Reset and Cold Reset.
Default is Warm Reset.
Warm Reset Counter Sets the default value of Warm Reset Counter. Range: 0 ~ 65535.
Default is 5.
RPB Terminal Type Emulation: ANSI: Extended ASCII char set.
VT100: ASCII char set.
VT100+: Extends VT100 to support color, function keys, etc.
UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more
bytes.
Options: ANSI, VT100, VT100+ and UTF8.
Default is VT100.
RPB Baud rate Selects serial port transmission speed. The speed must be
matched on the other side. Long or noisy lines may require lower
speeds.
Options: 9600, 19200, 38400, 57600 and 115200.
Default is 9600.
Front Network Boot Controls execution of the Option ROM for the Front Panel Ethernet
controller.
Options: Disabled and Enabled.
Default is Disabled.
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Table 4-8 Boot Configuration (continued)
Field Description
Base Network Boot Controls execution of the Option ROM for the Base Ethernet
controller.
Options: Disabled and Enabled.
Default is Enabled.
Fabric Network Boot Controls execution of the Option ROM for the Fabric Interface
Ethernet.
Options: Disabled and Enabled.
Default is Disabled.
ARTM Network Boot Controls execution of the Option ROM for the Ethernet on the
ARTM.
Options: Disabled and Enabled.
Default is Disabled.
ARTM SAS Boot Controls execution of the Option ROM for the SAS controller on
the ARTM.
Options: Disabled and Enabled.
Default is Enabled.
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Boot from USB Devices Enable or Disable booting from USB Devices. Options: Disabled
and Enabled.
Default is Enabled.
BIOS Watchdog Enable or Disable BIOS POST Watchdog.
Options: Disabled and Enabled.
Default is Enabled.
BIOS Watchdog
Timeout
OS Boot Watchdog Enable or Disable O/S Watchdog Timer. It is not available if the OS
OS Boot Watchdog
Timeout
Choose Timeout value for BIOS POST Watchdog Expiration value.
It is not available if the BIOS Watchdog is disabled.
Range: 180 ~ 6000.
Default is 180.
Watchdog is disabled.
Options: Disabled and Enabled.
Default is Disabled.
Choose Timeout value for OS Boot Watchdog Timer.
Range: 180 ~ 6000.
Default is 300.
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4.2.2.2 Processor Configuration
The table below lists the Processor Configuration options.
Table 4-9 Processor Configuration
Field Description
Active Processor Cores Number of cores to enable in each processor package. Options: ALL, 1, 2,
3, 4, 5, 6, 7.
Default is ALL.
Intel(R) HT Technology Enabled for Windows XP and Linux (OS optimized for Hyper-Threading
Technology) and Disabled for other OS (OS not optimized for HyperThreading Technology). When disabled, only one thread per enabled core
is enabled. Options: Disabled and Enabled.
Default is Disabled.
CPU Flex Ratio Override Enable or Disable CPU Flex Ratio Programming.
Option: Disabled and Enabled.
Default is Disabled.
BIOS
CPU Flex Ratio Settings Allows for selecting the CPU ratio value, this value must be between Max
efficiency ratio and Max non-turbo ratio. Range: 12 ~ 30.
If "CPU Flex Ratio Override" is disabled, the CPU Flex Ratio Settings menu
item is hidden. To view this menu item set "Advanced > Processor
Configuration > CPU Flex Ratio Override" to enable.
Default is 18.
Enabled XD Enabled Execute Disabled functionality. Also known as Data Execution
Prevention (DEP).
Options: Disabled and Enabled.
Default is Disabled.
Intel(R) Virtualization
Technology
Intel(R) SpeedStep(tm) Enable processor performance states (P-States).
Turbo Mode Enable Processor Turbo Mode. TM must also be enabled.
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54H)
When enabled, a VMM utilizes the additional hardware capabilities.
Options: Disabled and Enabled.
Default is Enabled.
Options: Disabled and Enabled.
Default is Enabled.
Options: Disabled and Enabled.
Default is Disabled.
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Table 4-9 Processor Configuration (continued)
Field Description
C-States Enable processor idle power saving states (C-States). Options: Disabled
and Enabled.
Default is Enabled.
4.2.2.3 Peripheral Configuration
The table below lists the Peripheral Configuration options.
Table 4-10 Peripheral Configuration
Field Description
Spread Spectrum Clock Enable/Disable Spread Spectrum.
Options: Disabled and Enabled.
Default is Enabled.
RTM power policy Select RTM power policy. Disable for RTM as an independent FRU, or
4.2.2.4 HDD Configuration
The table below lists the HDD Configuration options.
Table 4-11 HDD Configuration
Field Description
SATA Interface Combination Select the SATA controllers operation mode.
Serial ATA Port 0 / Hard Disk 0 Displays the identity of the device attached.
Serial ATA Port 1 / Hard Disk 1
Serial ATA Port 2 / Hard Disk 2
SAS HDD 1
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enable for RTM Activate/Deactivate with front board.
Options: Disabled and Enabled.
Default is Disabled.
Options: IDE and AHCI.
Default is AHCI.
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Table 4-11 HDD Configuration (continued)
Field Description
SAS HDD 2 Displays the identity of the device attached.
SAS HDD 3
SAS HDD 4
4.2.2.5 Memory Configuration
The table below lists the Memory Configuration options.
Table 4-12 Memory Configuration
Field Description
DDR Refresh Allows override selection of the DDR3 refresh rate for normal
BIOS
operation.
Options: Auto, 7.8us and 3.9us.
Default is Auto.
DDR Vdd Limit Select DDR Vdd voltage. When DDR Vdd Limit is set to ’auto’, then
based on the following conditions the memory voltage can be either
1.5V or 1.35V:
- If all memory modules support 1.5V, then the BIOS set memory
voltage to 1.5V.
- If all memory modules support 1.35V, then the BIOS set memory
voltage to 1.35V.
- If some of the memory module support 1.35V and other support
1.5V, then the BIOS set memory voltage to 1.5V.
Options: Auto and 1.5V.
Default is Auto.
ECC Support Error Correction And Checking (ECC) mechanism support.
Options: Disabled and Enabled.
Default is Enabled.
Memory ECC Error Log Select ECC Runtime errors type to be logged in SMBIOS event log.
Select type include Correctable Error (CE), Uncorrectable Error (UC),
both CE and UC error (Both). Options: Disabled, CE, UC, and Both.
Default is Both.
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Table 4-12 Memory Configuration (continued)
Field Description
Correctable ECC Logging
Threshold
Enter the correctable error threshold value if Runtime Error Logging
option is enabled.
Range: 1 ~ 32767.
Default is 1.
Correctable ECC Flooding
Threshold
Enter the Error Logging Limit value if Runtime Error Logging option is
enabled.
Range: 1 ~ 65535.
Default is 20.
4.2.2.6 South Bridge Configuration
The table below lists the South Bridge Configuration options.
Table 4-13 South Bridge Configuration
Field Description
SB USB Config Set USB configuration. See SB USB Configuration.
4.2.2.6.1 SB USB Configuration
The table below lists the SB USB Configuration options.
Table 4-14 SB USB Configuration
Field Description
USB1 Control Enable or disable Front Panel USB port 1.
Options: Disabled and Enabled.
Default is Enabled.
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USB2 Control Enable or disable Front Panel USB port 2.
Options: Disabled and Enabled.
Default is Enabled.
RTM USB Control Enable or disable RTM USB port.
Options: Disabled and Enabled.
Default is Enabled.
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4.2.2.7 SMBIOS Event Log
The table below lists the SMBIOS Event Log options.
Table 4-15 SMBIOS Event Log
Field Description
Event Log Enable or disable SMBIOS Event Log.
View SMBIOS event log View SMBIOS event log.
BIOS
Option: Disabled and Enabled.
Default is Enabled.
Mark SMBIOS events as
read
Clears SMBIOS events Clears SMBIOS events.
Mark SMBIOS events as read. Marked SMBIOS events will not be displayed.
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4.2.3 Security Menu
The figure below shows the Security Menu options.
Figure 4-3 Security Menu
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Table 4-16 Security Menu
Field Description
Set Supervisor Password Set Setup Supervisor Password.
Set User Password Set Setup User Password.
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4.2.4 Boot Menu
The figure below shows the Boot Menu options.
Figure 4-4 Boot Menu
BIOS
Table 4-17 Boot Menu
Field Description
Boot Priority Order Sets the order of the devices group.
CD/ DVD Drive Sets the order of the CD/ DVD devices in CD/ DVD group.
FDD Drive: Sets the order of the USB floppy drive devices in floppy group.
USB Drive Sets the order of the USB HDD devices in USB group.
SAS HDD Drive Sets the order of the SAS HDD devices in SAS HDD group.
SATA HDD Drive Sets the order of the SATA HDD devices in SATA HDD group.
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Table 4-17 Boot Menu (continued)
Field Description
Network Card Sets the order of the Network Card devices in Network Card group.
Internal Shell Sets the order of internal UEFI shell.
4.2.5 Save and Exit Menu
The figure below shows the Save and Exit Menu options.
Figure 4-5 Save and Exit Menu
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Table 4-18 Save and Exit Menu
Field Description
Exit Saving Changes This option is same as pressing <F10> key. Saves all changes of all menus,
then exits the setup configure driver. The option finally resets the system
automatically.
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