Apple X1782 Schematics

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

7

6 5 4 3

X1782 MLB SCHEMATIC

2 1

CK

ECNREV DESCRIPTION OF REVISION

DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE

APPD

DATE

2020-01-2400218246376 ENGINEERING RELEASED

D

1
2

1
2

4
4
5

5

6
6 7
7 8
8
9

9

10
10
11
12

12

13
13 14
14

15

TABLE OF CONTENTS
SYSTEM PCB SUMMARY
PD PARTS3
CPU GFX
CPU MISC/JTAG/CFG/RSVD
CPU LPDDR3 INTERFACE
CPU & PCH POWER
CPU & PCH GROUNDS
CPU CORE DECOUPLING
CPU GT DECOUPLING
PCH DECOUPLING
PCH AUDIO/LPC/SPI/SMBUS
PCH POWER MANAGEMENT
PCH PCIE/USB/CLKS

61
62
63
64

67 KEYBOARD & TRACKPAD 1
68
69
70

65 71

7266
67
68
69
7011

74 VR GT & GTX IMVP

76

77

78
71 79
72
73
74

80

81

82

KEYBOARD & TRACKPAD 2
BATTERY CONN, 3V3 G3H RTC VR
PBUS SUPPLY & BATTERY CHARGER
VR CORE & SA IMVP CTRL
VR CORE & SA IMVP

VR 5V, 3V3
VR EOPIO EDRAM
PMIC BUCKS AND SWS
PMIC LDOS
PMIC GPIOS & CONTROL
VR VDDQ VCCIO
POWER FETS

X1412_SHAN

05/17/2019

D

C

15
16
17
18
19
20

22
23
24
25
26
27
28

16
18
19
20
22
23
2421

26
27
28
29
30
31

PCH SPI/UART/GPIO
CPU/PCH MERGED XDP
CHIPSET SUPPORT 1
CHIPSET SUPPORT 2
LPDDR3 VREF MARGINING
LPDDR3 DRAM CHANNEL A (00-31)
LPDDR3 DRAM CHANNEL A (32-63)
LPDDR3 DRAM CHANNEL B (00-31)
LPDDR3 DRAM CHANNEL B (32-63)
LPDDR3 DRAM TERMINATION
USB-C HIGH SPEED 1
USB-C HIGH SPEED 2
USB-C SUPPORT
USB-C PORT CONTROLLER A

75
76
77

84

85

86
78 87

8879
80

89 S4E<3>

9081
82
83
84
85
86
87
88

124

125

135

136

137 DESENSE 3

138

LCD BACKLIGHT DRIVER
EDP DISPLAY CONNECTOR
S4E<0>
S4E<1>
S4E<2>

C

OCARINA PMIC & NAND VCC VR & VDDIO1 SWCH
SSD SUPPORT9625
FCT
PROBE POINTS
DESENSE 1
DESENSE 2

DESENSE 4

B

29
30
31
32
33
34
35
36
37
38
39

32
33
36
37
38
39
40 SOC AOP/AON/SMC
41
42
43
44

4540
41 46
42

47

USB-C PORT CONTROLLER B
USB-C CONNECTOR A
WIFI/BT SUPPORT
WIFI/BT MODULE 1
WIFI/BT MODULE 2
SOC GPIO/SEP/USB/DDR/TEST

SOC ISP/I2C/UART/SPI/I2S
SOC PCIE
SOC POWER 1
SOC POWER 2
SOC POWER 3
SOC GROUND
SOC SHARED SUPPORT

J223_METE
J223_METE
J223_METE

05/14/2019
05/14/2019
05/14/2019

89
90
91
92
93
94
95
96
97
98

140
141
400
401
403
405
406
407
410
500

DEV SUPPORT 1
DEV SUPPORT 2
BOM CONFIGURATION
BOM CONFIGURATION
BOM GROUPS
BOM VARIANT TABLES
BOM VARIANT TABLES
BOM VARIANT TABLES
BOM ALTERNATES

B

BOARD RULES

A

43
44
45
46
47
48
49
50
51
52
53
54
55
56

48

49

50

51

52

53

54

55

56

57

58

59

60

62

SOC PROJECT SUPPORT
T151
SECURE ELEMENT
T139 SUPPORT
I2C CONNECTIONS 1
I2C CONNECTIONS 2
POWER SENSORS HIGH SIDE
POWER SENSORS LOAD SIDE
POWER SENSORS EXTENDED
POWER SENSORS EXTENDED 2
THERMAL SENSORS
POWER SENSORS EXTENDED 3
FANS/SMC/AMUX SUPPORT
AUDIO PLACEHOLDER

A

DRAWING TITLE

SCHEM,MLB,X1782

8

57
58
59
60

63

64

65

66

AUDIO JACK CODEC
AUDIO LEFT AMPLIFIERS
AUDIO RIGHT AMPLIFIERS
AUDIO FLEX CONNECTORS

LAST_MODIFICATION=Fri Jan 17 17:25:04 2020

3

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

1 OF 500

SHEET

1 OF 98

124567

SIZEDRAWING NUMBER

D

678

3 245

1

D

DESIGN

J223/MLB 051-05309 820-01987 056-09380

J213/FLEX_AUDIOJACK

J680/FLEX_USBC

J130/FLEX_BMU_SIGNAL

DESCRIPTION

POR CFL MLB
AUDIO JACK,

AMR, AND MESA
LEFT SIDE USB

TONGUE FLEX

SIGNALS TO

BMU

SCHEMATIC

051-04122

051-03140

MCOBOARD

PANEL

057-01595-D

821-02091

821-01646

056-07548-27

N/A

N/A056-05483-A

821-01726051-01247 056-05589-A N/A

D

C

J130/FLEX_BMU_PWR

J130/FLEX_TCON_MLB_A

J213/FLEX_TRACKPAD

J130/FLEX_KB

J213/FLEX_3MIC

POWER TO/FROM

BMU

DISPLAYPORT FROM

MLB TO TCON

MLB TO

TRACKPAD

KB FLEX FOR ALL

3 KB TYPES

MIC FLEX

051-01195

051-01897

821-00583

821-00981

821-02218051-04335

821-01046051-02011

821-02265051-04441

056-02919-A

056-02852-A

N/A

C

N/A

N/A056-07655-08

N/A056-03725-B

N/A056-07754-24

B

J79/GRAPE_FLEX

DFR DAUGHTER FLEX

DFR TOUCH FLEX

DFR DAUGHTER

FLEX

051-01338

VENDOR

821-00681

VENDOR

056-02220-A

N/A

N/A099-14398

B

A

8

A

PAGE TITLE

SYSTEM PCB SUMMARY

DRAWING NUMBER

051-05309

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

REVISION

6.0.0

BRANCH

pvt

PAGE

2 OF 500

SHEET

2 OF 98

1

SIZE

D

678

3 245

1

D

TOP SIDE STANDOFFS

OMIT_TABLE

Z0400

2.8OD1.2ID-1.49H-SM

1

2

CRITICAL

OMIT_TABLE

Z0401

2.8OD1.2ID-1.49H-SM

1

2

CRITICAL

OMIT_TABLE

Z0402

2.8OD1.2ID-1.49H-SM

1

2

CRITICAL

860-01216

EAST OF NAND ALIGNED WITH
BOTTOM SIDE STANDOFF

860-01216

NORTH OF NAND

860-01216

NORTH OF NAND

USB-C BOSS

CRITICAL

Z0420

3.4OD1.75ID-1.12H-SM

1

CRITICAL

Z0421

3.4OD1.75ID-1.12H-SM

1

DFR BOSS

CRITICAL

Z0430

3.4OD1.75ID-1.5H-SM

1

860-00392

860-00392

860-01484

DFR WASHER

CRITICAL

Z0431

4.75OD2.73ID-H0.2

RING-TH

1

860-01519

WIFI WASHER

CRITICAL

Z0432

4.75OD2.73ID-H0.2

RING-TH

1

POGO PINS BACKLIGHT

CRITICAL

PP0400

POGO-2.3OD-4.06H-SM

SM-1

1

870-09670

POGO PIN DISPLAY

CRITICAL

PP0420

POGO-2.3OD-4.0H-SM

SM-1

1

870-09667

POGO PINS DRAM

CRITICAL

MLB MTG HOLES 2.1X3.36 MM

CRITICAL

ZT0420

TH-NSP

1

SL-2.1X3.51-4.6X6.01

CRITICAL

ZT0421

TH-NSP

1

SL-2.1X3.51-4.6X6.01

CRITICAL

ZT0422

TH-NSP

1

SL-2.1X3.51-4.6X6.01

998-19711

NEAR RIGHT SPKR CONNECTOR

998-19711

NEAR TRACKPAD CONNECTOR

998-19711

NEAR LEFT SPKR CONNECTOR

D

C

B

OMIT_TABLE

Z0404

2.8OD1.2ID-1.49H-SM

1

2

CRITICAL

OMIT_TABLE

860-01216

FAR SIDE NEAR AJ CONN

Z0405

2.8OD1.2ID-1.49H-SM

1

2

CRITICAL

OMIT_TABLE

860-01216

SOUTH OF NAND

Z0406

2.8OD1.2ID-1.49H-SM

1

2

CRITICAL

860-01216

NORTH OF NAND

BOTTOM SIDE TALL STANDOFF

OMIT_TABLE

Z0460

2.8OD1.2ID-3.15H-SM

1

860-01485

2

EAST OF NAND ALIGNED WITH
TOP SIDE STANDOFF

POGO PIN HEAT PIPE

CRITICAL

TRACKPAD BOSS

CRITICAL

Z0440

3.5OD1.85ID-1.41H-SM

1

860-00381

CRITICAL

Z0441

3.5OD1.85ID-1.41H-SM

1

860-00381

DISPLAY BOSS

CRITICAL

Z0450

2.7X1.8R-1.4ID-0.91H-SM

1

860-00469

CRITICAL

Z0451

2.7X1.8R-1.4ID-0.91H-SM

1

860-00469

AJ FLEX COWLING BOSS

CRITICAL

Z0470

3.5OD1.85ID-1.92H-SM

1

860-00382

860-01519

POGO PIN FAN

CRITICAL

PP0430

POGO-2.3OD-4.0H-SM

SM-1

1

870-09667

SHIELD CAN ALIGMENT HOLES

CRITICAL

ZT0441

TH-NSP

1

SL-1.2X0.4-1.5X0.7

CRITICAL

ZT0442

TH-NSP

1

SL-1.2X0.4-1.5X0.7

CRITICAL

ZT0443

TH-NSP

1

SL-1.2X0.4-1.5X0.7

CRITICAL

ZT0444

TH-NSP

1

SL-1.2X0.4-1.5X0.7

CRITICAL

ZT0445

TH-NSP

1

SL-1.2X0.4-1.5X0.7

PP0410

POGO-2.3OD-4.0H-SM

SM-1

1

CRITICAL

PP0411

POGO-2.3OD-4.0H-SM

SM-1

1

998-04440

998-04440

998-04440

998-04440

998-04440

870-09667

870-09667

CPU THERM STAGE HOLES 3.15 MM

CRITICAL

ZT0400

3P9R3P15

1

998-0845

CORNER NEAREST KEYBOARD

CPU THERM STAGE HOLES 3.6 MM

CRITICAL

ZT0401

4.0R3.6-NSP

1

CRITICAL

998-03850

ZT0402

4.0R3.6-NSP

1

CRITICAL

998-03850

ZT0403

4.0R3.6-NSP

1

998-03850

FAN MTG HOLE 2.0X2.6 MM

CRITICAL

ZT0430

TH-NSP

1

SL-2.6X2.0-4.7X4.1

998-03974

C

B

PP0499

POGO-2.3OD-4.0H-SM

SM-1

1

870-09667

NOTE: REFER TO BOM TABLES. ONLY SOLDERED PARTS REMAIN IN RAMP/PVT SMT BOM. OTHERS MOVED TO POST-SMT ENCLOSURE BOM

USB-C SHIELD

806-24341

1
1 USBC_CAN_TAPE870-08656

MEGA SHIELD

604-27117

1

SHIELD CAN,HOLES,TITAN RIDGE,X1781

TAPE,NON COND,STIFFENER,TITAN RIDGE,CAN,X1533

MEGA CAN,INSULATED,X1781

MEGA_CAN CRITICAL

CRITICALUSBC_CAN
CRITICAL

USBC_SHLD
USBC_TAPE

MEGA_SHLD

LIQUID SPILL INDICATOR

4825-00493

CPU SLEDS

806-14839

CRITICAL

ZT0446

1

SL-1.2X0.4-1.5X0.7

LSI,BLACK,REEL,X1030

SLED,METAL,MATT NICKEL,X940

TH-NSP

998-04440

SLED1,SLED2 CRITICAL2

SHIELD CAN ALIGNMENT SLOTS DRAM

CRITICAL

SL0490

TH-NSP

1

SL-1.2X0.4-1.5X0.7

CRITICAL

SL0491

TH-NSP

1

SL-1.2X0.4-1.5X0.7

2X PLATED SLOTS IN MEM AREA DUE TO

SPACE CONSTRAINTS <RDAR://44382678>
ALL OTHER SHIELD ALIGNMENT SLOTS ARE
NPTH + GND RING FOR BETTER TOLERANCE

CRITICALLSI1,LSI2,LSI3,LSI4

LSI

CPU_SLEDS

998-04440

998-04440

A

DRAM SHIELD TOP

806-24340
870-07840 1

1

FENCE,DRAM,UNIV,X1781

TAPE,COND,DRAM,UNIV,X1533

DRAM SHIELD BOTTOM

806-24339

8

1

SHIELD CAN,HOLES,DRAM,UNIV,X1781

TAPE,NON COND,STIFFENER,DRAM,CAN

DRAM_TOP_FENCE CRITICAL

DRAM_TOP_FENCE_TAPE

DRAM_BOT_CAN

DRAM_BOT_CAN_TAPE

CRITICAL

CRITICAL
CRITICAL1870-08657

DRAM_TOP_FENC
DRAM_TOP_TAPE

DRAM_BOT_CAN

DRAM_BOT_TAPE

67

TOP SIDE STANDOFFS

860-01216

6

BOSS,STANDOFF,MLB,X1533

BOTTOM SIDE STANDOFFS

860-01485

1

BOSS,STANDOFF,MLB,TALL,X1533

Z0400-Z0402,Z0404-Z0406

Z0460

CRITICAL

CRITICAL

STANDOFFS_TOP

STANDOFFS_BOT

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

PD PARTS

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=MECHANICALS

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

4 OF 500

SHEET

3 OF 98

1

SIZE

D

678

3 245

1

D

C

PPVCCIO_S0_CPU

PLACE_NEAR=U0500.AM6:15.24MM

1

R0530

24.9

1%
1/20W
MF
201

2

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

27 4

25

25

43 4

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

IN

IN

IN

IN

DP_X_SNK0_ML_C_N<0>
DP_X_SNK0_ML_C_P<0>
DP_X_SNK0_ML_C_N<1>
DP_X_SNK0_ML_C_P<1>
DP_X_SNK0_ML_C_N<2>
DP_X_SNK0_ML_C_P<2>
DP_X_SNK0_ML_C_N<3>
DP_X_SNK0_ML_C_P<3>

DP_X_SNK1_ML_C_N<0>
DP_X_SNK1_ML_C_P<0>
DP_X_SNK1_ML_C_N<1>
DP_X_SNK1_ML_C_P<1>
DP_X_SNK1_ML_C_N<2>
DP_X_SNK1_ML_C_P<2>
DP_X_SNK1_ML_C_N<3>
DP_X_SNK1_ML_C_P<3>

UPC_XB_FAULT_L

DP_X_SNK0_HPD
DP_X_SNK1_HPD

18

18

TEST_NOA_N_10
TEST_NOA_N_11

XDP_DP_INT_HPD

EDP_COMP

AL5
AL6
AJ5
AJ6
AF6
AF5
AE5
AE6

AC4
AC3
AC1
AC2
AE4
AE3
AE1
AE2

CK9

CN6

CM6
CP7

CP6
CM7

AM6

DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
DDI1_TXN[3]
DDI1_TXP[3]

DDI2_TXN[0]
DDI2_TXP[0]
DDI2_TXN[1]
DDI2_TXP[1]
DDI2_TXN[2]
DDI2_TXP[2]
DDI2_TXN[3]
DDI2_TXP[3]

DISPLAY SIDEBANDS

GPP_E12_USB2_OC3*

GPP_E13/DDPB_HPD0

GPP_E14/DDPC_HPD1
GPP_E15/DPPD_HPD2

GPP_E16/DPPE_HPD3
GPP_E17/EDP_HPD

DISP_RCOMP

U0500

CFL-U

4+3E

BGA

SYM 1 OF 20

OMIT_TABLE

DDI

EDP

EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUX_N
EDP_AUX_P

DISP_UTILS

DDI1_AUX_N
DDI1_AUX_P
DDI2_AUX_N
DDI2_AUX_P
DDI3_AUX_N
DDI3_AUX_P

GPP_E7/CPU_GP1

GPP_E8/SATALED*

GPP_E9/USB2_OC0*
GPP_E10/USB2_OC1*
GPP_E11/USB2_OC2*

EDP_BKLTEN

EDP_BKLTCTL

EDP_VDDEN

AG4
AG3
AG2
AG1
AJ4
AJ3
AJ2
AJ1

AH4
AH3

AM7

AC7
AC6
AD4
AD3
AG7
AG6

CN3
CN7
CK6
CK5
CK8

CK11
CH11
CG11

EDP_ML_N<0>
EDP_ML_P<0>
EDP_ML_N<1>
EDP_ML_P<1>
EDP_ML_N<2>
EDP_ML_P<2>
EDP_ML_N<3>
EDP_ML_P<3>

EDP_AUXCH_N
EDP_AUXCH_P

NC

DP_X_SNK0_AUXCH_C_N
DP_X_SNK0_AUXCH_C_P
DP_X_SNK1_AUXCH_C_N
DP_X_SNK1_AUXCH_C_P

NC
NC

XDP_PCH_OBSDATA_A3
XDP_PCH_OBSDATA_B0
XDP_USB_EXTC_OC_L
XDP_USB_EXTD_OC_L
UPC_XA_FAULT_L

EDP_BKLT_EN
EDP_BKLT_PWM
EDP_PANEL_PWR_EN

D

76

OUT

76

OUT

76

OUT

76

OUT

76

OUT

76

OUT

76

OUT

76

OUT

76

BI

76

BI

25

BI

25

BI

25

BI

25

BI

16

OUT

16

OUT

4 87 83 73 9 7

4

27 4

IN

OUT
OUT
OUT

83 75 4

83 76 4

83 76 4

C

B

PP3V3_S5

U0500

CFL-U

4+3E

BGA

AL2

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

89 83 74 73 71

69 47 43 42 18 14 13 12 11 7 5

BV25

RSVD RSVD

AN2

RSVD

AN4

RSVD

AT3

RSVD

AU3

RSVD

H4

RSVD
RSVD

CG1

RSVD

CG2

RSVD

AL1

RSVD

AL3

RSVD

AL4

RSVD

AM3

RSVD

AM4

RSVD

AN1

RSVD

AN3

RSVD

AY9

RSVD

BB9

RSVD

SYM 20 OF 20

SPARE

OMIT_TABLE

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

CR3
CR4
CR35
CP3
G1
G2
H3
W3
Y3
BB24
BC24
BC28
BK35
BK36
BT8
BT9
BV24
BP8
BP9

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

B

A

R0550
R0551
R0552
R0553

R0557
R0540
R0541
R0542

100K
100K
100K
100K

100K
100K
100K
100K

21
21

5% 2011/20W

21

5% MF

21

21

21

21

21

1/20W 2015% MF

MF

MF 2015% 1/20W

2015% 1/20W MF

UPC_XB_FAULT_L

XDP_USB_EXTC_OC_L

UPC_XA_FAULT_L

2011/20W

XDP_USB_EXTD_OC_L

XDP_DP_INT_HPD

EDP_BKLT_EN

2011/20W5% MF

EDP_BKLT_PWM

2011/20W5% MF

EDP_PANEL_PWR_EN

201MF5% 1/20W

27 4

27 4

4

4

43 4

83 75 4

83 76 4

83 76 4

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

CPU GFX

SIZE

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

A

D

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

5 OF 500

SHEET

4 OF 98

8

67

35 4

2

1

D

42

42

BI
BI

PP1V_S0SW

7 9 16 71 83

PLACE_NEAR=R0611:1MM

R0610

1K

5%

1/20W

MF

201

CPU_PECI
CPU_PROCHOT_L

1

PLACE_NEAR=U4750.4:13MM

2

R0613
R0611

PLACE_NEAR=U0500.Y4:38MM

2 1

678

TP0600

A

PLACE_SIDE=BOTTOM

PLACE_NEAR=DS0601.A:13MM

PP1V_S3

7 9 17 18 42 65 69 70 83

PLACE_NEAR=U0500.BJ1:25MM

1K

5%

1/20W

MF

201

1

2

R0612

72 83

OUT

21

43

300

5% 1/20W MF 201

201MF1/20W5%

CPU_PECI_R

17 72 83 85

OUT

PLACE_NEAR=U7800.L6:13MM

1

R0614

49.9

1%
1/20W
MF
201

2

CPU_CATERR_L

CPU_PROCHOT_R_L

83

PM_THRMTRIP_L

84

BI

XDP_BPM_L<0>
NC_XDP_BPM_L<1>
NC_XDP_BPM_L<2>
NC_XDP_BPM_L<3>

PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP

OPC_RCOMP

TP-P5

NC

1

U0500

CFL-U

AA4
AR1

Y4

BJ1

E1

U1
U2
U3
U4

BP27
BW25

L5
N5

CATERR*
PECI
PROCHOT*
THRMTRIP*
SKTOCC*

BPM[0]*
BPM[1]*
BPM[2]*
BPM[3]*

PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP

4+3E

BGA

SYM 4 OF 20

OMIT_TABLE

JTAG

CPU MISC

PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST*

PCH_TCK
PCH_TDI
PCH_TDO

PCH_TMS
PCH_TRST*
PCH_JTAGX

T6
U6
Y5
T5
AB6

W6
U5
W5
P5
Y6
P6

3 245

PP3V3_S5

74 83 89

4 7 11 12 13 14 18 42 43 47
69 71 73

DBGLED

1

R0690

750K

1%
1/20W
MF
201

2

DBGLED

R0691

1K

5%

1/20W

MF

201

1

2

1

CATERR_LED_ACATERR_LED_G

DS0601

A

VALUE=GRN-90MCD-5MA-2.85V

PLACE_SIDE=BOTTOM
SILK_PART=CATERR

0402

DBGLED

K

CATERR_LED_K

DBGLED

6

D

CRITICAL

D

VER-1

5

G S

D

CRITICAL

DBGLED

3

Q0601

SSM6N15AFEAP

SOT563

4

Q0601

XDP_CPU_TCK
XDP_CPU_TDI
XDP_CPU_TDO
XDP_CPU_TMS
XDP_CPU_TRST_L

XDP_PCH_TCK
XDP_PCH_TDI
XDP_PCH_TDO
XDP_PCH_TMS
XDP_PCH_TRST_L
PCH_JTAGX

OUT

OUT

IN
IN

IN
IN

IN
IN

IN
IN

BI

16

16

16

16

16

16

16

16

16

16

16

VER-1

2

G S

SSM6N15AFEAP

SOT563

1

C

B

1%

1/20W

MF

201

1

2

R0681

49.9

PLACE_NEAR=U0500.BP27:12.7MM

PLACE_NEAR=U0500.BW25:12.7MM

R0682

49.9

PLACE_NEAR=U0500.L5:12.7MM

1%

1/20W

MF

201

1

2

CFG<4> :EDP ENABLE/DISABLE: 1 = DISABLED 0 = ENABLED

16

BI

CPU_CFG<4>

EDP_ENABLE

1K

5%

1/20W

MF

201

1%

1/20W

MF

201

1

2

1

2

R0634

PLACE_NEAR=U0500.AB5:13MM

R0680

49.9

1%

1/20W

MF

201

1

2

1

R0683

49.9

1%

1/20W

MF

201

PLACE_NEAR=U0500.N5:12.7MM

16

BI

16

BI
BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

16

BI

R0684

49.9

2

CPU_CFG<0>
CPU_CFG<1>
CPU_CFG<2>
CPU_CFG<3>

CPU_CFG<5>
CPU_CFG<6>
CPU_CFG<7>
CPU_CFG<8>
CPU_CFG<9>
CPU_CFG<10>
CPU_CFG<11>
CPU_CFG<12>
CPU_CFG<13>
CPU_CFG<14>
CPU_CFG<15>

CPU_CFG<16>
CPU_CFG<17>

CPU_CFG<18>
CPU_CFG<19>

CPU_CFG_RCOMP

16

OUT

ITP_PMODE
TEST_CPU_A35

18

T4
R4
T3
R3
J4
M4
J3
M3
R2
N2
R1
N1
J2
L2
J1
L1

L3
L4

N3
N4

AB5

W4

A35

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[16]
CFG[17]

CFG[18]
CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD_TP

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

U0500

SYM 19 OF 20

RESERVED

OMIT_TABLE

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

CFL-U

4+3E

BGA

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

TP

TP
TP

B35
A34

BJ34
D34

BP36

BP35
BR18

NC_CPU_B35
NC_CPU_A34

TEST_CPU_BJ34
TEST_CPU_D34

NC_CPU_BP36

NC_CPU_BP35
NC_CPU_BR18

C

18

18

B

A

TEST_CPU_F37

18

TEST_CPU_BJ36

18

F37

BJ36

RSVD_TP

RSVD_TP

TP1

TP

ZVM*

RSVD_TP
RSVD_TP

MSM*

UFS_RESET*

INPUT3VSEL

IST_TRIG

BP34
BK34

AH26

F34
CN36

AJ27

AR3

BT27

CP36

NC_CPU_BP34
NC_CPU_BK34

CPU_ZVM_L
TEST_CPU_F34

TEST_CPU_CN36

NC_CPU_MSM_L

NC

CPU_INPUT3VSEL

CPU_IST_TRIG

TP0630

A

TP-P5

PLACE_SIDE=BOTTOM

For iFDIM test

CONNECT TO OPC VRS

69

OUT

18

18

CONNECT TO EOPIO VRS. Not used with combined VR for OPC/EOPIO

A

SYNC_DATE=SYNC_MASTER=

1

NOSTUFF

1

R0632

5%
1/20W
MF
0201

2

1

R0631

47K0

5%
1/20W
MF
201

2

PAGE TITLE

CPU MISC/JTAG/CFG/RSVD

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

SIZE

D

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

6 OF 500

SHEET

5 OF 98

8

67

35 4

2

1

678

3 245

1

D

C

B

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<2>
MEM_A_DQ<3>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<6>
MEM_A_DQ<7>
MEM_A_DQ<8>
MEM_A_DQ<9>
MEM_A_DQ<10>
MEM_A_DQ<11>
MEM_A_DQ<12>
MEM_A_DQ<13>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<17>
MEM_A_DQ<18>
MEM_A_DQ<19>
MEM_A_DQ<20>
MEM_A_DQ<21>
MEM_A_DQ<22>
MEM_A_DQ<23>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<26>
MEM_A_DQ<27>
MEM_A_DQ<28>
MEM_A_DQ<29>
MEM_A_DQ<30>
MEM_A_DQ<31>
MEM_A_DQ<32>
MEM_A_DQ<33>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<36>
MEM_A_DQ<37>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<42>
MEM_A_DQ<43>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<46>
MEM_A_DQ<47>
MEM_A_DQ<48>
MEM_A_DQ<49>
MEM_A_DQ<50>
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>

A26
D26
D28
C28
B26
C26
B28
A28
B30
D30
B33
D32
A30
C30
B32
C32
J22
H25
G22
H22
F25
J25
G25
F22
D22
C22
C24
D24
A22
B22
A24
B24
H37
H34
K34
K35
H36
H35
K36
K37
N36
N34
R37
R34
N37
N35
R36
R35
G31
G32
H29
H28
G28
G29
H31
H32
L31
L32
N29
N28
L28
L29
N31
N32

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]
DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]
DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]

U0500

CFL-U

4+3E

BGA

SYM 2 OF 20

LPDDR3 NON-INTERLEAVED0

OMIT_TABLE

DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKP[1]
DDR0_CKN[1]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS*[0]
DDR0_CS*[1]

DDR0_ODT[0]

NC/DDR0_ODT[1]

DDR0_CAA[0]
DDR0_CAA[1]
DDR0_CAA[2]
DDR0_CAA[3]
DDR0_CAA[4]
DDR0_CAA[5]
DDR0_CAA[6]
DDR0_CAA[7]
DDR0_CAA[8]
DDR0_CAA[9]

DDR0_CAB[0]
DDR0_CAB[1]
DDR0_CAB[2]
DDR0_CAB[3]
DDR0_CAB[4]
DDR0_CAB[5]
DDR0_CAB[6]
DDR0_CAB[7]
DDR0_CAB[8]
DDR0_CAB[9]

DDR0_DQSN[0]
DDR0_DQSN[1]
DDR0_DQSN[2]
DDR0_DQSN[3]
DDR0_DQSN[4]
DDR0_DQSN[5]
DDR0_DQSN[6]
DDR0_DQSN[7]

DDR0_DQSP[0]
DDR0_DQSP[1]
DDR0_DQSP[2]
DDR0_DQSP[3]
DDR0_DQSP[4]
DDR0_DQSP[5]
DDR0_DQSP[6]
DDR0_DQSP[7]

NC/DDR0_ALERT_L

NC/DDR0_PAR

NC/DDR0_MA[3]
NC/DDR0_MA[4]

DDR_VREF_CA

DDR0_VREF_DQ[0]
DDR0_VREF_DQ[1]

DDR1_VREF_DQ

DDR_VTT_CNTL

V31
V32
T31
T32

U36
U37
U34
U35

AE32
AF32

AE31
AF31

AB35
W36
AA37
AB34
AA36
V34
AA34
W34
V35
W35

AC32
AB32
AC31
Y32
W32
AC34
AB31
Y31
AC36
AC37

C27
D31
H24
C23
J35
P34
G30
L30

D27
C31
G24
D23
J34
P35
H30
N30

W37
W31

AC35
AA35

F36

D35
D37
E36

C35

NC

NC

NC
NC

NC

MEM_A_CLK_P<0>
MEM_A_CLK_N<0>
MEM_A_CLK_P<1>
MEM_A_CLK_N<1>

MEM_A_CKE<0>
MEM_A_CKE<1>
MEM_A_CKE<2>
MEM_A_CKE<3>

MEM_A_CS_L<0>
MEM_A_CS_L<1>

MEM_A_ODT<0>

MEM_A_CAA<0>
MEM_A_CAA<1>
MEM_A_CAA<2>
MEM_A_CAA<3>
MEM_A_CAA<4>
MEM_A_CAA<5>
MEM_A_CAA<6>
MEM_A_CAA<7>
MEM_A_CAA<8>
MEM_A_CAA<9>

MEM_A_CAB<0>
MEM_A_CAB<1>
MEM_A_CAB<2>
MEM_A_CAB<3>
MEM_A_CAB<4>
MEM_A_CAB<5>
MEM_A_CAB<6>
MEM_A_CAB<7>
MEM_A_CAB<8>
MEM_A_CAB<9>

MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_N<4>
MEM_A_DQS_N<5>
MEM_A_DQS_N<6>
MEM_A_DQS_N<7>

MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_A_DQS_P<4>
MEM_A_DQS_P<5>
MEM_A_DQS_P<6>
MEM_A_DQS_P<7>

CPU_DDDR0_ALERT_L

CPU_DIMM_VREFCA
CPU_DIMMA_VREFDQ

CPU_DIMMB_VREFDQ
PM_MEMVTT_EN

OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

OUT
OUT

OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

20

BI

20

BI

21

BI

21

BI

20

BI

20

BI

21

BI

21

BI

20

BI

20

BI

21

BI

21

BI

20

BI

20

BI

21

BI

21

BI

R0703

19

OUT

19

OUT

19

OUT

73

OUT

24 20

24 20

24 21

24 21

24 20

24 20

24 21

24 21

24 20

24 20

24 20

24 20

24 20

24 20

24 20

24 20

24 20

24 20

24 21

24 21

24 21

24 21

24 21

24 21

24 21

24 21

24 21

24 21

24 21 20

24 21 20

24 21 20

0

5%

1/20W

MF

0201

U0500

CFL-U

4+3E

BGA

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

22

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

BI

23

21

23

23

23

23

23

23

23

23

23

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

MEM_B_DQ<0>
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<51>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>

AN35
AN34
AR35
AR34
AN37
AN36
AR36
AR37
AU35
AU34
AW35
AW34
AU37
AU36
AW36
AW37
AJ29
AJ30
AM32
AM31
AM30
AM29
AJ31
AJ32
AR31
AR32
AV30
AV29
AR30
AR29
AV32
AV31
BA35
BA34
BC35
BC34
BA37
BA36
BC36
BC37
BE35
BE34
BG35
BG34
BE37
BE36
BG36
BG37
BA32
BA31
BD31
BD32
BA30
BA29
BD29
BD30
BG31
BG32
BK32
BK31
BG29
BG30
BK30
BK29

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]
DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]

SYM 3 OF 20

LPDDR3 NON-INTERLEAVED

OMIT_TABLE

DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKP[1]
DDR1_CKN[1]

DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]

DDR1_CS*[0]
DDR1_CS*[1]

DDR1_ODT[0]

NC/DDR1_ODT[1]

DDR1_CAA[0]
DDR1_CAA[1]
DDR1_CAA[2]
DDR1_CAA[3]
DDR1_CAA[4]
DDR1_CAA[5]
DDR1_CAA[6]
DDR1_CAA[7]
DDR1_CAA[8]
DDR1_CAA[9]

DDR1_CAB[0]
DDR1_CAB[1]
DDR1_CAB[2]
DDR1_CAB[3]
DDR1_CAB[4]
DDR1_CAB[5]
DDR1_CAB[6]
DDR1_CAB[7]
DDR1_CAB[8]
DDR1_CAB[9]

DDR1_DQSN[0]
DDR1_DQSN[1]
DDR1_DQSN[2]
DDR1_DQSN[3]
DDR1_DQSN[4]
DDR1_DQSN[5]
DDR1_DQSN[6]
DDR1_DQSN[7]

DDR1_DQSP[0]
DDR1_DQSP[1]
DDR1_DQSP[2]
DDR1_DQSP[3]
DDR1_DQSP[4]
DDR1_DQSP[5]
DDR1_DQSP[6]
DDR1_DQSP[7]

NC/DDR1_ALERT_L

NC/DDR1_PAR

NC/DDR1_MA[3]
NC/DDR1_MA[4]

DRAM_RESET*

DDR_COMP[0]
DDR_COMP[1]
DDR_COMP[2]

AF29
AF28
AE29
AE28

T28
T29
V28
V29

AL37
AL35

AL36
AL34

AF35
AB29
AE37
AE36
AC29
W29
AB28
AC28
W28
Y28

AK35
AK34
AJ35
AJ34
AJ37
AF34
AJ36
AG34
AG35
AG36

AP35
AV34
AL31
AU31
BB35
BF34
BC31
BH31

AP34
AV35
AL30
AU30
BB34
BF35
BC30
BH30

Y29
AE34

AG37
AE35

BU31

BN28
BN27
BN29

MEM_B_CLK_P<0>
MEM_B_CLK_N<0>
MEM_B_CLK_P<1>
MEM_B_CLK_N<1>

MEM_B_CKE<0>
MEM_B_CKE<1>
MEM_B_CKE<2>
MEM_B_CKE<3>

MEM_B_CS_L<0>
MEM_B_CS_L<1>

MEM_B_ODT<0>

NC

MEM_B_CAA<0>
MEM_B_CAA<1>
MEM_B_CAA<2>
MEM_B_CAA<3>
MEM_B_CAA<4>
MEM_B_CAA<5>
MEM_B_CAA<6>
MEM_B_CAA<7>
MEM_B_CAA<8>
MEM_B_CAA<9>

MEM_B_CAB<0>
MEM_B_CAB<1>
MEM_B_CAB<2>
MEM_B_CAB<3>
MEM_B_CAB<4>
MEM_B_CAB<5>
MEM_B_CAB<6>
MEM_B_CAB<7>
MEM_B_CAB<8>
MEM_B_CAB<9>

MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>

MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>

CPU_DDDR1_ALERT_L

NC

NC
NC

CPU_DRAM_RESET_L

CPU_DDR_RCOMP<0>
CPU_DDR_RCOMP<1>
CPU_DDR_RCOMP<2>

R0704

0

OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

OUT
OUT

OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

5%

1/20W

MF

0201

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

24 22

24 22

24 23

24 23

24 22

24 22

24 23

24 23

24 23 22

24 23 22

24 23 22

24 22

24 22

24 22

24 22

24 22

24 22

24 22

24 22

24 22

24 22

24 23

24 23

24 23

24 23

24 23

24 23

24 23

24 23

24 23

24 23

22

22

23

23

22

22

23

23

22

22

23

23

22

22

23

23

21

PP1V2_S3_CPUDDR

1

R0705

470

5%
1/20W
MF
201

2

D

C

B

88 83 50 9 7

A

BOM_COST_GROUP=CPU & CHIPSET

1

2

PLACE_NEAR=U0500.BN29:6MM

PAGE TITLE

PLACE_NEAR=U0500.BN27:6MM

CPU LPDDR3 INTERFACE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

1

R0700

162

1%
1/20W
MF
201

R0701

80.6

2

PLACE_NEAR=U0500.BN28:6MM

Apple Inc.

1%
1/20W
MF
201

1

R0702

200

1%
1/20W
MF
201

2

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

SHEET

6.0.0

pvt

7 OF 500

6 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

C

B

A

PLACE_NEAR=U0500.BU15:30MM

86 83 70 54 11

86 83 73 70 54 16 11 7

11

11

47 43 42 18 14 13 12 11 7 5 4

XW0801
XW0802
XW0803
XW0804

88 83 50 9 6

83 70 69 65 42 18 17 9 7 5

83 71 16 9 5

83 74 9

83 70 69 65 42 18 17 9 7 5

R0850

R0852

2 1

0

21

0

PP1V2_S3_CPUDDR

PP1V_S3

PP1V_S0SW

PP1V2_S0SW

PP1V_S3

NO_XNET_CONNECTION=1

PLACE_NEAR=R7819.2:5MM

PVPCORES5_FB_P

5%0201 1/20W

NO_XNET_CONNECTION=1

PLACE_NEAR=R7821.2:5MM

MF

PVPCORES5_FB_N

02011/20W MF5%

PVCC_FB_N
PVCC_FB_P

54

NO_XNET_CONNECTION=1

XW0850

2

SM

1

NO_XNET_CONNECTION=1

PLACE_NEAR=XW0850::5mm

2

XW0852

SM

1

PPVPCORE_S5

PP1V_PRIM

PP1V05_PRIMSW_PCH_VCCAMPHYPLL_F

PP1V05_PRIM_PCH_VCCAPLL_AUD_F

PP1V05_S5_PCH_VCCDSW

11

89 83 74 73 71 69

1

C0824

4.7UF

20%

6.3V

2

X5R-CERM1
402

BYPASS=U0500.CP25::5MM

SHORT-L8-SM

21

SHORT-L8-SM

21

SHORT-L8-SM

21

SHORT-L8-SM

21

11

PP3V3_S5

PP1V8_PRIM_PCH_VCCHDA_F

11

PP1V24_S5_PCH_VCCDPHY

PLACE_NEAR=U0500.CC12:5MM

PP1V05_PRIM_PCH_VCCDUSB_XW

PLACE_NEAR=U0500.BR12:5MM

PP1V05_PRIM_PCH_VCCA19P2_XW

PLACE_NEAR=U0500.BP14:5MM

PP1V05_PRIM_PCH_VCCABCLK_XW

PLACE_NEAR=U0500.BU12:5MM

PP1V05_PRIM_PCH_VCCASRC_XW
PP1V05_PRIM_PCH_VCCAXTAL_F

OUT

OUT

70

70

AD36
AH32
AH36
AM36
AN32
AW32
AY36
BE32
BH36

R32
Y36

BP11

BP2

BG1
BG2
BG3

BL27
BM26

BR11
BT11

BU15
BU22
BV15
BV16
BV18
BV19
BV20
BV22
BW20
BW22
CA12
CA16
CA18
CA19
CA20
CB12
CB14
CB15

BV12
BV14
BW12
BW14
BY12
BY14

BV2

BR14
BR15
BT12
BU14

BT24

BR24
BT23

BT20

BV23

BY23
BY24
CA23
CA24

CP25

CC12

BR12

BP14

BU12

CP5

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VCCST
VCCST

VCCSTG
VCCSTG
VCCSTG

VCCPLL_OC
VCCPLL_OC

VCCPLL
VCCPLL

VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE

VCCPRIM_MPHY_1P05
VCCPRIM_MPHY_1P05
VCCPRIM_MPHY_1P05
VCCPRIM_MPHY_1P05
VCCPRIM_MPHY_1P05
VCCPRIM_MPHY_1P05

VCCAMPHYPLL_1P05

VCCAPLL_1P05
VCCAPLL_1P05
VCCAPLL_1P05
VCCAPLL_1P05

VCCDSW_1P05

VCCDSW_3P3
VCCDSW_3P3

VCCHDA

VCCSPI

VCCDPHY_1P24
VCCDPHY_1P24
VCCDPHY_1P24
VCCDPHY_1P24

VCCDPHY_EC_1P24

VCCDUSB_1P05

VCCA_19P2_1P05

VCCA_BCLK_1P05

VCCA_SRC_1P05

VCCA_XTAL_1P05

SYM 14 OF 20

OMIT_TABLE

U0500

CFL-U

4+3E

BGA

POWER 3

U0500

CFL-U

4+3E

BGA

SYM 15 OF 20

POWER 4

OMIT_TABLE

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO_SENSE
VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05

VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8

VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

AK24
AK26
AL24
AL25
AL26
AL27
AM25
AM27
BH24
BH25
BH26
BH27
BJ24
BJ26
BP16
BP18

BG10
BG8
BH9
BJ10
BJ8
BJ9
BK25
BK27
BK8
BL10
BL24
BL26
BL8
BL9
BM24
BN25

BP28
BP29

BE7
BG7

VCCRTC

DCPRTC

PPVCCIO_S0_CPU

PPVCCSA_S0_CPU

PLACE_NEAR=U0500::13MM

1

R0804

100

5%
1/20W
MF
201

2

CPU_VCCSASENSE_N
CPU_VCCSASENSE_P

PLACE_NEAR=U0500::13MM

1

R0803

100

5%
1/20W
MF
201

2

BP20
BP22
BR20
BT18
BT19
BT22
BU18
BU19
BW16
BW18
BW19
BY16
BY20
CA14

CC15
CC18
CC19
CD15
CD16
CD18
CD19
CP17
CP23

BP23
BW23
CB16
CB22
CB23
CC22
CC23
CD22
CD23
CP29

BR23

BP24

CB36
CB35

PP1V_PRIM

PLACE_NEAR=U0500.BP20:30MM

2

XW0853

SM

1

P1VPRIM_FB_R P1VPRIM_FB

54

PP1V8_S5

PP3V3_S5

PP3V_G3H_RTC

PPDCPRTC_PCH

NC_PCH_CORE_VID0
NC_PCH_CORE_VID1

11

87 83 73 9 4

87 83 66 52 9

PLACE_NEAR=U0500::13MM

1

R0801

100

5%
1/20W
MF
201

2

CPU_VCCIOSENSE_P
CPU_VCCIOSENSE_N

65

OUT

65

OUT

PLACE_NEAR=R7820.2:5MM

PLACE_NEAR=U0500::13MM

1

R0802

100

5%
1/20W
MF
201

2

86 83 73 70 54 16 11 7

R0853

0

21

5%

1/20W

MF

0201

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

42 32 18 17 16 15 14 13 12 11 7

83 74 73 72 70 69 65 53 47

86 83 69 9

69

69

47 43 42 18 14 13 12 11 7 5 4

CPU_VCCEOPIOSENSE_P

OUT

CPU_VCCEOPIOSENSE_N

OUT

89 83 74 73 71 69

83 71 13 11

87 83 66 50 9

PPVCC_S0_CPU

OUT
OUT

PP1V8_S5

PPVCCEDRAM_S0_CPU

PLACE_NEAR=U0500::13MM

R0823

100

1/20W

PLACE_NEAR=U0500::13MM

R0824

100

1/20W

OUT

5%
MF

201

5%
MF

201

73

73

1

2

1

2

70

AN10
AN24
AN26
AN27

AN9

AP2
AP24
AP26

AP9
AR10
AR25
AR27

AR5

AR6

AR7

AR8
AT24
AT26

AT9
AU24
AU25
AU26
AU27

AU5

AU6

AU7

AU8

AU9
AV10

AV2
AV27

AV5

AV7
AW10
AW24
AW25
AW26

V24

W25

Y24

Y25

AA24
AA26
AB25
AC24
AC25
AC26
AD24
AD26

V25

T25

VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

VCC_OPC_1P8
VCC_OPC_1P8
VCC_OPC_1P8
VCC_OPC_1P8

VCCEOPIO
VCCEOPIO
VCCEOPIO
VCCEOPIO
VCCEOPIO
VCCEOPIO
VCCEOPIO
VCCEOPIO

VCCEOPIO_SENSE
VSSEOPIO_SENSE

U0500

CFL-U

4+3E

BGA

SYM 12 OF 20

POWER 1

OMIT_TABLE

VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC

VCC_SENSE
VSS_SENSE

VIDALERT*

VIDSCK

VIDSOUT

AW27
AW5
AW6
AW7
AW8
AW9
AY24
AY26
BA25
BA27
BA5
BA7
BA8
BB2
BB26
BC10
BC26
BC27
BC5
BC6
BC7
BC9
BD10
BD25
BD27
BD5
BD8
BE24
BE25
BE26
BE27
BE9
BF2
BF24
BF26
BF9
BG27

K12
K14
K15
K17
K18
K20
L25
M24
M26
P24
R24
P26
R25
R26

AN6
AN5

AA3
AA1
AA2

87 83 67 50 10

65

OUT

65

OUT

PLACE_NEAR=U0500::13MM

1

R0825

100

5%
1/20W
MF
201

2

CPU_VCCSENSE_P
CPU_VCCSENSE_N

CPU_VIDALERT_R_L
CPU_VIDSCLK_R
CPU_VIDSOUT_R

BOM_COST_GROUP=CPU & CHIPSET

PPVCCGT_S0_CPU

PLACE_NEAR=U0500::13MM

R0811

CPU_VCCGTSENSE_P
CPU_VCCGTSENSE_N

PLACE_NEAR=U0500::13MM

R0812

65

OUT

65

OUT

PLACE_NEAR=U0500::13MM

1

R0826

100

5%
1/20W
MF
201

2

R0829
R0830
R0831

100

5%

1/20W

MF

201

100

5%

1/20W

MF

201

U0500

CFL-U

56

1%

1/20W

MF

201

SYM 13 OF 20

POWER 2

OMIT_TABLE

1

2

1

2

1

2

220

21

0

21

0

21

PAGE TITLE

A11

VCCGT

A12

VCCGT

A14

VCCGT

A15

VCCGT

A17

VCCGT

A18

VCCGT

A20

VCCGT

A5

VCCGT

A6

VCCGT

A8

VCCGT

AA9

VCCGT

AB10

AE10

AF10

AJ10

AL10

PLACE_NEAR=U0500::13MM

VCCGT

AB2

VCCGT

AB8

VCCGT

AB9

VCCGT

AC8

VCCGT

AD9

VCCGT
VCCGT

AE8

VCCGT

AE9

VCCGT
VCCGT

AF2

VCCGT

AF8

VCCGT

AG8

VCCGT

AG9

VCCGT

AH9

VCCGT
VCCGT

AJ8

VCCGT

AK2

VCCGT

AK9

VCCGT
VCCGT

AL8

VCCGT

AL9

VCCGT

AM8

VCCGT

B11

VCCGT

B14

VCCGT

B17

VCCGT

B20

VCCGT

B3

VCCGT

B4

VCCGT

B6

VCCGT

B8

VCCGT

C11

VCCGT

C12

VCCGT

C14

VCCGT

C15

VCCGT

C17

VCCGT

C18

VCCGT

C2

VCCGT

C20

VCCGT

C3

VCCGT

C6

VCCGT

C7

VCCGT

C8

VCCGT

D11

VCCGT

D12

VCCGT

D14

VCCGT

D15

VCCGT

D17

VCCGT

D18

VCCGT

E3

VCCGT_SENSE

D2

VSSGT_SENSE

R0827

PLACE_NEAR=U0500.AA3:12.7MM

201 1% 1/20WMF

PLACE_NEAR=U0500.AA1:12.7MM

0201 5% MF 1/20W

PLACE_NEAR=U0500.AA2:12.7MM

0201 5% MF 1/20W

CPU & PCH POWER

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

4+3E

BGA

PP1V_S3

PLACE_NEAR=U0500::13MM

1

R0828

100

1%
1/20W
MF
201

2

CPU_VIDALERT_L
CPU_VIDSCLK
CPU_VIDSOUT

DRAWING NUMBER

REVISION

BRANCH

PAGE

SHEET

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

D20
D4
D7
E4
F11
F14
F17
F20
F5
F6
F7
F8
G11
G12
G14
G15
G17
G18
G20
H11
H12
H14
H15
H17
H18
H20
H5
H6
H7
H8
J11
J14
J17
J20
J7
J8
K11
K2
L10
L7
L8
M9
N10
N7
N8
N9
P2
P8
R9
T10
T8
T9
U10
U8
V2
V9
W8
W9
Y10
Y8

051-05309

8 OF 500

7 OF 98

IN

OUT

BI

6.0.0

pvt

65

65

65

D

C

B

83 70 69 65 42 18 17 9 7 5

A

SYNC_DATE=SYNC_MASTER=

SIZE

D

8

67

35 4

2

1

678

3 245

1

D

C

B

A

A3

A4
A32
A36
AB3
AB4
AB7

AB27
AB30
AB33
AB36

AC5

AC10
AC27
AC30
AD33
AD35

AE7

AE24
AE25
AE26
AE27
AE30

AF3
AF4
AF7

AF25
AF27
AF30
AF33
AF36

AG5

AG10
AG24
AG26
AH24
AH25
AH27
AH28
AH29
AH30
AH31
AH33
AH35

AJ7

AJ25
AJ28

AK3
AK4

AK33
AK36

AL7

AL28
AL29
AL32

AM5

AM10
AM28
AM33
AM35

AN7
AN8

AN25
AN28
AN29
AN30
AN31

AP3
AP4

AP33

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U0500

CFL-U

4+3E

BGA

SYM 16 OF 20

GND1

OMIT_TABLE

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AP36
AR4
AR28
AT4
AT33
AT35
AT36
AU4
AU10
AU28
AU29
AU32
AV3
AV4
AV6
AV8
AV25
AV28
AV33
AV36
AW1
AW3
AW4
AW28
AW29
AW30
AW31
AY4
AY33
AY35
B2
B5
B7
B9
B12
B15
B18
B21
B23
B25
B27
B29
B31
B34
B36
B37
BA3
BA4
BA6
BA10
BA28
BB3
BB4
BB33
BB36
BC4
BC8
BC25
BC29
BC32
BD4
BD6
BD7
BD28
BD33
BD35
BD36
BE3
BE4
BE8

BE10
BE28
BE29
BE30
BE31

BF3

BF4
BF33
BF36

BG4
BG25
BG28
BH28
BH29
BH32
BH33
BH35

BJ7

BK2

BK3

BK4

BK7
BK10
BK28
BK33

BL7
BL25
BL28
BL29
BL30
BL31
BL32

BM9
BM33
BM35
BM36

BN7
BN30

BP3

BP4

BP7
BP12
BP15
BP19
BP25
BP32
BP33

BR16
BR19
BR22
BR25

BT5
BT14
BT15
BT16
BT25
BT28
BT33
BT35
BT36

BU7
BU11
BU16
BU20
BU23
BU24
BU25

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U0500

CFL-U

4+3E

BGA

SYM 17 OF 20

GND2

OMIT_TABLE

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BV3
BV4
BV11
BV31
BV33
BW7
BW11
BW15
BW24
BY5
BY11
BY15
BY18
BY19
BY22
BY25
BY28
BY33
BY35
BY36
C1
C4
C9
C21
C25
C29
C33
C34
C36
C37
CA11
CA15
CA22
CA25
CB2
CB3
CB4
CB7
CB11
CB18
CB19
CB20
CB24
CB25
CB33
CC7
CC11
CC14
CC16
CC20
CC24
CC25
CC28
CC31
CD11
CD12
CD14
CD20
CD24
CD25
CE7
CE33
CE35
CE36
CF2
CF3
CF4
CF11
CF14

CF19
CF23
CF28

CG7
CG33
CH31

CJ2

CJ3

CJ4
CJ11
CJ14
CJ19
CJ23
CJ28
CJ33
CJ35
CJ36

CK1

CK4

CK7
CK37

CL2

CM1

CM4

CM5

CM9
CM13
CM17
CM21
CM25
CM29
CM31
CM33
CM37

CN1

CN2

CN5

CN9
CN13
CN17
CN21
CN25
CN29
CN37

CP1

CP2

CP9
CP11
CP13
CP15
CP19
CP21
CP27
CP35
CP37

CR2

CR6
CR34
CR36

D1
D5
D6
D8

D9
D21
D25

E9
E23
E27
E29
E31
E33
E35

F2

F3

F4
F12
F15
F18
F21
F24
F33

G3

G4

G9
G21

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U0500

CFL-U

4+3E

BGA

SYM 18 OF 20

GND 3

OMIT_TABLE

BOM_COST_GROUP=CPU & CHIPSET

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

G27
G33
G35
G36
H9
H21
H27
J5
J6
J12
J15
J18
J21
J24
J33
J36
K3
K4
K9
K21
K22
K24
K25
K27
K28
K29
K30
K31
K32
L6
L27
L33
L35
L36
N6
N25
N27
P3
P4
P7
P10
P33
P36
R27
R28
R29
R30
R31
T7
T27
T30
T33
T35
T36
U7
U24
U26
V3
V4
V26
V27
V30
V33
V36
W7
W10
W27
W30
Y7
Y26
Y27
Y30
Y33
Y35

PAGE TITLE

CPU & PCH Grounds

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

9 OF 500

SHEET

8 OF 98

6.0.0

pvt

SIZE

D

D

C

B

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

83 66 50 7

PPVCC_S0_CPU

87

CRITICAL

1

C10G0

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C10G1

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C10H1

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C10G3

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C10G4

220UF

20%
2V

2

ELEC
SM

88 83 50 7 6

PP1V2_S3_CPUDDR

1

C1070

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1050

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1052

1UF

20%

6.3V

2

X6S-CERM
0201

BacksidePrimary

1

C1051

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1053

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1071

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1064

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1054

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1065

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1055

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1066

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1060

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1061

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1062

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1063

20UF

20%

2.5V

2

X6S-CERM
0402-1

D

C

1

C1010

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1020

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1030

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1011

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1021

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1031

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1012

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1022

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1032

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1013

20UF

20%

2.5V

2

X6S-CERM

1

C1023

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1033

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1014

20UF

20%

2.5V

2

X6S-CERM
04020402

1

C1024

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1034

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1015

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1025

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1035

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1016

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1026

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1036

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1017

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1027

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1037

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1018

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1028

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1038

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1019

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1029

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1039

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1040

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1041

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1042

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1043

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1044

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C1045

20UF

20%

2.5V

2

X6S-CERM
0402-1

87 83 73 7 4

PPVCCIO_S0_CPU

1

C1080

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1090

20UF

20%

2.5V

2

X6S-CERM
0402-1

CRITICAL

1

C1086

220UF

20%
2V

2

ELEC
SM

1

C1081

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1091

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1092

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1093

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1087

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

C1094

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1082

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1095

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1083

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1084

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1085

1UF

20%

6.3V

2

X6S-CERM
0201

C

B

86 83 69 7

1

2

1

2

PPVCCEDRAM_S0_CPU

C1000

1UF

20%

6.3V
X6S-CERM
0201

C100I

1UF

20%

6.3V
X6S-CERM
0201

1

C1001

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100J

1UF

20%

6.3V

2

X6S-CERM
0201

CRITICAL

1

C10H2

220UF

20%
2V

2

ELEC
SM

1

C1002

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100K

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1003

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100L

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1004

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100M

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1005

1UF

20%

6.3V

2

X6S-CERM

1

C100N

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1006

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100O

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1007

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100P

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1008

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100Q

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1009

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100R

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100A

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100S

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100B

1UF

20%

6.3V

2

X6S-CERM
02010201

1

C100T

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100C

1UF

20%

6.3V

2

X6S-CERM
0201 0201

1

C100U

1UF

20%

6.3V

2

X6S-CERM
0201

1

2

1

2

C100D

1UF

20%

6.3V
X6S-CERM

C100V

1UF

20%

6.3V
X6S-CERM
0201 0201

1

C100E

1UF 1UF

20%

6.3V

2

X6S-CERM
0201

1

C100W

1UF

20%

6.3V

2

X6S-CERM X6S-CERM

1

C100F

20%

6.3V

2

X6S-CERM
0201

1

C100X

1UF

20%

6.3V

2

0201

1

C100G

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100Y

1UF

20%

6.3V

2

X6S-CERM
0201

1

C100H

1UF

20%

6.3V

2

X6S-CERM
0201

87 83 66 52 7

PPVCCSA_S0_CPU

CRITICAL

1

C10H0

220UF

20%
2V

2

ELEC
SM

NOSTUFF

1

C10B0

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10B6

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10B1

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10B7

20UF

20%

2.5V

2

X6S-CERM
0402-1

NOSTUFF

1

C10B2

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10B3

20UF

20%

2.5V

2

X6S-CERM
0402-1

B

A

1

C10D0

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10D1

1UF

20%

6.3V

2

X6S-CERM
0201

83 70 69 65 42 18 17 9 7 5 83 74 7 83 70 69 65 42 18 17 9 7 5

PP1V_S3 PP1V2_S0SW PP1V_S3

1

C10F0

1UF

20%

6.3V

2

X6S-CERM

1

C10H3

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10D2

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10E0

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10D3

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10F1

1UF

20%

6.3V

2

X6S-CERM
02010201

1

C10E1

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10D4

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10E2

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10D5

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10E3

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10D6

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10E4

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C10F2

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10E5

20UF

20%

2.5V

2

X6S-CERM
0402-1

83 71 16 7 5

PP1V_S0SW

1

C10F3

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10A0

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10A1

1UF

20%

6.3V

2

X6S-CERM
0201

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

IV ALL RIGHTS RESERVED

1

C10A2

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10A3

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10A4

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10A5

1UF

20%

6.3V

2

X6S-CERM
0201

1

C10A6

1UF

20%

6.3V

2

X6S-CERM
0201

CPU Core Decoupling

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

BRANCH

PAGE

10 OF 500

SHEET

9 OF 98

pvt

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

87 83 67 50 7

PPVCCGT_S0_CPU

1

C1162

220UF

20%
2V

2

ELEC
SM

CRITICAL

NOSTUFF

1

C1110

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1111

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1163

220UF

20%
2V

2

ELEC
SM

CRITICAL

NOSTUFF

1

C1112

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1113

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1164

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C1114

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1115

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1190

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C1116

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1117

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1191

220UF

20%
2V

2

ELEC
SM

CRITICAL

1

C1118

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1119

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1124

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1125

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1126

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1127

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1128

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1129

20UF

20%

2.5V

2

X6S-CERM
0402

D

C

1

C1170

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1140

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1171

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1141

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1172

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1142

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1173

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1143

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1174

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1144

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1175

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1145

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1176

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1146

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1177

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1147

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1184

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1148

20UF

20%

2.5V

2

X6S-CERM
0402-1

1

C1187

20UF

20%

2.5V

2

X6S-CERM
0402

NOSTUFF

1

C1149

20UF

20%

2.5V

2

X6S-CERM
0402-1

C

B

NOSTUFF

1

C1150

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1100

1UF

20%

6.3V

2

0201

1

C110G

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1151

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1101

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110H

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1152

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1102

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110I

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1153

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1103

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110J

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1154

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1104

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110K

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1155

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1105

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110L

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1156

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1106

1UF

20%

2

X6S-CERM
0201

1

C110M

1UF

20%

6.3V

2

X6S-CERM
0201

NOSTUFF

1

C1157

20UF

20%

2.5V

2

X6S-CERM
0402

1

C1107

1UF

20%

6.3V6.3V

2

X6S-CERM
0201

1

C110N

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1108

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110O

1UF

20%

6.3V

2

X6S-CERM
0201

1

C1109

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110P

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110A

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110Q

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110B

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110R

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110C

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110S

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110D

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110T

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110E

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110U

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110F

1UF

20%

6.3V

2

X6S-CERMX6S-CERM
0201

1

C110V

1UF

20%

6.3V

2

X6S-CERM
0201

B

A

8

1

C110W

1UF

20%

6.3V

2

X6S-CERM
0201

1

C110X

1UF

20%

6.3V

2

X6S-CERM
0201

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

CPU GT Decoupling

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

11 OF 500

SHEET

10 OF 98

1

SIZE

D

678

3 245

1

FILTERS

D

C

86 83 70 54 7

86 83 73 70 54 16 11 7

86 83 73 70 54 16 11 7

PPVPCORE_S5

PP1V_PRIM

PP1V_PRIM

NOSTUFF

1

C1200

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.BV18::3MM

1

C1201

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.BP20::3MM

CRITICAL

1

C1203

20UF

20%

6.3V

2

CERM-X5R
0402

BYPASS=U0500.BV12::12MM

47 43 42 18 14 13 12 11 7 5 4

89 83 74 73 71 69

83 71 13 7

PP3V3_S5

PP1V05_S5_PCH_VCCDSW

7

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP3V_G3H_RTC

NOSTUFF

1

C1221

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.BR24::3MM

1

C1232

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.BT24::3MM

1

C1227

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.BR23::3MM

1

C1228

0.1UF

10%
10V

2

X5R-CERM
0201

BYPASS=U0500.BR23::3MM

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

86 83 73 70 54 16 11 7

PP1V8_S5

PP1V_PRIM

RAIL SIDE

1

2

1

2

C1265

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

C1267

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

L1260

220-OHM-0.7A-0.28-OHM

21

0402-1

U0500.BT20::10mm

L1261

220-OHM-0.7A-0.28-OHM

21

0402-1

U0500.BR15::3mm

PCH SIDE

1

C1226

2.0PF

+/-0.1PF
25V

2

C0G-CERM
0201

BYPASS=U0500.BT20::10mm

1

C1262

2.0PF

+/-0.1PF
25V

2

C0G-CERM
0201

BYPASS=U0500.BR15::3mm

1

C1260

4.7UF

20%

6.3V

2

X5R-CERM1
402

BYPASS=U0500.BT20::10MM

1

C1261

4.7UF

20%

6.3V

2

X5R-CERM1
402

BYPASS=U0500.BR15::3MM

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V8_PRIM_PCH_VCCHDA_F

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V05_PRIM_PCH_VCCAPLL_AUD_F

D

7

7

C

B

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

47 43 42 18 14 13 12 11 7 5 4

89 83 74 73 71 69

PP1V8_S5

PP3V3_S5

NOSTUFF

1

C1205

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.CP17::3MM

1

C1206

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.CP23::3MM

NOSTUFF

1

C1207

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

BYPASS=U0500.CD23::7MM

1

C1208

0.1UF

10%
10V

2

X5R-CERM
0201

BYPASS=U0500.CP29::3MM

PPDCPRTC_PCH

7

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C1231

0.1UF

10%
10V

2

X5R-CERM
0201

BYPASS=U0500.BP24::3MM

86 83 73 70 54 16 11 7

86 83 73 70 54 16 11 7

PP1V_PRIM

PP1V_PRIM

R1250

0

21

5%
1/16W
MF-LF

402

R1253

0

21

5%
1/16W
MF-LF

402

CRITICAL

1

C1250

20UF

20%

6.3V

2

CERM-X5R
0402

BYPASS=U0500.BV2::5MM

CRITICAL

1

C1253

20UF

20%

6.3V

2

CERM-X5R
0402

CRITICAL

1

C1251

20UF

20%

6.3V

2

CERM-X5R
0402

BYPASS=U0500.BV2::4MM

CRITICAL

1

C1254

20UF

20%

6.3V

2

CERM-X5R
0402

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V05_PRIMSW_PCH_VCCAMPHYPLL_F

1

C1252

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.BV2::3MM

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V05_PRIM_PCH_VCCAXTAL_F

1

C1255

1UF

20%

6.3V

2

X6S-CERM
0201

BYPASS=U0500.CP5::3MM

7

7

B

BYPASS=U0500.CP5::3MM

BYPASS=U0500.CP5::3MM

A

8

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

PCH Decoupling

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

12 OF 500

SHEET

11 OF 98

1

SIZE

D

678

3 245

1

D

C

MLB_RAMCFG0

12

MLB_RAMCFG1

12

MLB_RAMCFG2

12

MLB_RAMCFG3

12

MLB_RAMCFG4

12

MEMORY CONFIGURATION STRAPS:

(PCH INTERNAL PULL-UPS ARE TO 1.8V)

RAMCFG4_L

1

R1334

1K

5%
1/20W
MF
201

2

RAMCFG3_L

1

R1333

1K

5%
1/20W
MF
201

2

RAMCFG2_L

1

R1332

1K

5%
1/20W
MF
201

2

RAMCFG1_L

1

R1331

1K

5%
1/20W
MF
201

2

25 12

RAMCFG0_L

1

R1330

1K

5%
1/20W
MF
201

2

OUT

JTAG_TBT_X_TMS

PCH_DDPB_CTRLDATA

12

JTAG_TBT_T_TMS

12

PCH_DDPC_CTRLDATA

12

MLB_RAMCFG0

12

MLB_RAMCFG1

12

PCH_STRP_JTAGODTDIS

12

NC_PCH_I2S0_SYNC
NC_PCH_I2S0_CLK
NC_HDA_SDOUT
NC_PCH_I2S0_D2R

NC

NC_PCH_I2S1_CLK
NC_PCH_GPP_D17

NC
NC

NC_PCH_GPP_D11

NC_PCH_STRP_TOPBLK_SWP_L

NC_PCH_GPP_F0
NC_PCH_GPP_F1
NC_PCH_GPP_F2

NC_PCH_GPP_F3
NC_PCH_I2C_UPC_SDA
NC_PCH_I2C_UPC_SCL

NC_PCH_GPP_H6

NC_PCH_GPP_H7

NC_PCH_GPP_H8

NC_PCH_GPP_H9

NC_PCH_GPP_H10

NC_PCH_GPP_H11

BN34
BN37
BN36
BN35
BL36
BL35
CK25
BL37
BL34

CC8
CC9
CH4
CH3

CM24
CN23

CM22
CP22

CF35

CP20
CK19
CG17
CN20
CF27
CF29
CH27
CH28
CJ30
CJ31
CJ27
CJ29

AUDIO

HDA_SYNC/I2S0_SFRM
HDA_BCLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST*/I2S1_SCLK
GPP_D17/DMIC_CLK1
I2S1_SFRM
I2S1_TXD

GPP_E18/DPPB_CTRLCLK
GPP_E19/DPPB_CTRLDATA
GPP_E20/DPPC_CTRLCLK
GPP_E21/DPPC_CTRLDATA

GPP_D13/ISH_UART0_RXD/

SML0BDATA/I2C4B_SDA

GPP_D14/ISH_UART0_TXD/

SML0BCLK/I2C4B_SCL

GPP_D11
GPP_D12

GPP_B14/SPKR

GPP_F0/CNV_PA_BLANKING
GPP_F1
GPP_F2
GPP_F3
GPP_H4/I2C2_SDA
GPP_H5/I2C2_SCL
GPP_H6/I2C3_SDA
GPP_H7/I2C3_SCL
GPP_H8/I2C4_SDA
GPP_H9/I2C4_SCL
GPP_H10/I2C5_SDA/ISH_I2C2_SDA
GPP_H11/I2C5_SCL/ISH_I2C2_SCL

(STRAP)

(STRAP)

(STRAP)

(BSSB_CLK)

(BSSB_DATA_IN)

U0500

CFL-U

4+3E

BGA

SYM 7 OF 20

OMIT_TABLE

(1.8V)

SDIO/SDXC

GPP_F18/EMMC_DATA6
GPP_F19/EMMC_DATA7

GPP_F20/EMMC_RCLK

GPP_F21/EMMC_CLK

GPP_F22/EMMC_RESET*

GPP_F23

GPP_G0/SD_CMD

GPP_G1/SD3_DATA0

GPP_A17/SD_VDD1_PWR_EN*/ISH_GP7

GPP_A16/SD_1P8_SEL

SD_1P8_RCOMP
SD_3P3_RCOMP

(1.8V)

GPP_F17/EMMC_DATA5

GPP_H12/M2_SKT2/CFG[0]
GPP_H13/M2_SKT2/CFG[1]
GPP_H14/M2_SKT2/CFG[2]
GPP_H15/M2_SKT2/CFG[3]

GPP_H16/DDPF_CTRLCLK
GPP_H17/DDPF_CTRLDATA
GPP_H18/CPU_C10_GATE*

GPP_H19/TIMESYNC[0]

GPP_H20/IMGCLKOUT[1]

GPP_H21
GPP_H22
GPP_H23

CP18
CM18
CM16
CP16
CN16
CF17
CH36
CL35

BW36
BY31

CK33
CM34

CR18

CR28
CP28
CN28
CM28
CR26
CP26
CN27
CM27
CH25
CF25
CN26
CM26

ALL GPP_F* PINS ARE 1.8V ONLY!

NC_PCH_GPP_F18
NC_PCH_GPP_F19
NC_PCH_GPP_F20
NC_PCH_GPP_F21
NC_PCH_GPP_F22
NC_PCH_GPP_F23
TBT_X_CIO_PWR_EN
TBT_X_USB_PWR_EN

OUT
OUT

NC_PCH_GPP_A17
NC_PCH_GPP_A16

SD_RCOMP

R1370

NC_PCH_GPP_F17

JTAG_ISP_TCK
JTAG_ISP_TDI
JTAG_ISP_TDO
TBT_POC_RESET
NC_PCH_GPP_H16
NC_PCH_DDPF_CTRLDATA
CPU_C10_GATE_L
PCH_WLAN_AUDIO_SYNC
NC_PCH_GPP_H20
PCH_STRP_XTAL_24MHZ
NC_PCH_GPP_H22
PCH_STRP_SPIROM_SAF

12

12

OUT
OUT

IN

OUT

OUT

IN

200

1%

1/20W

MF

201

25 12

25 12

25 12

18 12

29 28 25 12

29 28 25 12

PLACE_NEAR=U0500.CK33:12.7MM

1

2

29 28 12

83 74 73 71 12

D

C

B

PP3V3_S5

R1399

R1346
R1355
R1356
R1359
R1347

R1366
R1367
R1368

R1340
R1341

R1358

1K

100K

10K
10K
10K

100K

100K
100K
100K

2.2K

2.2K
10K

NOSTUFF

89 83 74 73 71

NOSTUFF

21

21
21
21

5% 201MF1/20W

21
21

21
21

5% 201MF1/20W

21

21
21

21

69 47 43 42 18 14 13 11 7 5 4

1/20W 201MF5%

1/20W

U0500

CFL-U

4+3E

BGA

SYM 5 OF 20

OMIT_TABLE

SPI-FLASH

SMBUS,SMLINK

(STRAP)

LPC

SPI-TOUCH

C LINK

(STRAP)

GPP_C0/SMBCLK

GPP_C1/SMBDATA

(STRAP)

GPP_B23/SML1ALERT*/PCHHOT*

GPP_A5/LFRAME*/ESPI_CS*

GPP_A14/SUS_STAT*/ESPI_RESET*

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_C2/SMBALERT*

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT*

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN*

NC
NC
NC

CH37
CF37
CF36
CF34
CG34
CG36
CG35
CH34

CR12
CP12
CN12
CM12
CM23
CR24
CG23

CH7
CH8
CH9

BV29
BV28

SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0*
SPI0_CS1*
SPI0_CS2*

GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS*
GPP_C23/UART2_CTS*
GPP_D15/ISH_UART0_RTS*
GPP_D16/ISH_UART0_CTS*
GPP_D21/SPI1_IO2

CL_CLK
CL_DATA
CL_RST*

GPP_A0/RCIN*
GPP_A6/SERIRQ

IO1

IO0

TP_SPI_PCHROM_CLK
NC_SPI_PCHROM_MISO

SPI_PCHROM_MOSI

12

16 12

MF1/20W5%

201

PCH_STRP_SPIROM_SAF

12

SPI_PCHROM_IO<2>
SPI_PCHROM_IO<3>

12

TP_SPI_PCHROM_CS_L
NC_SPI_CS1_L
NC_SPI_CS2_L

201MF1/20W5%
201MF1/20W5%

JTAG_TBT_X_TMS
JTAG_TBT_T_TMS
JTAG_ISP_TDO

CPU_C10_GATE_L

PCH_STRP_JTAGODTDIS

201MF1/20W5%

SPI_PCHROM_MOSI

201MF5%

SPI_PCHROM_IO<2>
SPI_PCHROM_IO<3>

201MF1/20W5%

201MF1/20W5%
201MF1/20W5%

PCH_DDPB_CTRLDATA
PCH_DDPC_CTRLDATA

ENABLE DPPB/C INTERFACES

12

12

12

12

12

12

25 12

25 12

16 12

83 27 12

83 27 12

83 74 73 71 12

IN

OUT

PCH_UART_DEBUG_D2R
PCH_UART_DEBUG_R2D

NC_PCH_GPP_C22

PCH_UART2_CTS_L

12

MLB_RAMCFG2

12

MLB_RAMCFG3

12

MLB_RAMCFG4

12

18 12

PCH_BT_AUDIO_SYNC
PCH_GPP_A6

201MF1/20W5%

CK14
CH15
CJ15

CH14
CF15
CG15

CN15
CM15
CC34

CA29
BY29
BY27
BV27
CA28
CA27

BV32
BV30
BY30

SMBUS_PCH_CLK
SMBUS_PCH_DATA
NC_PCH_STRP_TLSCONF

SML_PCH_0_CLK
SML_PCH_0_DATA
PCH_STRP_ESPI

SML_PCH_1_CLK
SML_PCH_1_DATA

NC_PCH_STRP_BSSB_SEL_GPIO

ESPI_IO_PCH<0>
ESPI_IO_PCH<1>
ESPI_IO_PCH<2>
ESPI_IO_PCH<3>
ESPI_CS_PCH_L

R1320
R1321
R1322
R1323
R1324

ESPI_RESET_L
ESPI_CLK60M_R

R1327

NC_PCH_GPP_A10
NC_PCH_GPP_A8

12

OUT

OUT

OUT

BI

BI

BI

20
20
20
20
20

22

47

47

47

47

47 12

47 12

21
21
21
21
21

21

201MF1/20W5%
201MF1/20W5%
201MF1/20W5%
201MF1/20W5%
201MF1/20W5%

201MF1/20W5%

ESPI_IO<0>
ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>
ESPI_CS_L

ESPI_CLK60M

OUT
OUT

OUT

BI
BI
BI
BI

35 12

35 12

35 12

35 12

35 12

35 12

35 12

B

A

PP1V8_S5

R1344
R1345
R1352
R1353
R1363
R1365

R1348
R1349
R1350
R1351
R1357

R1369

R1375
R1376

PM_SLP_S3_L

R1371
R1372

R1360
R1361
R1354
R1362
R1364

R1374

100K

1K
47K
47K

1K

1K

100K
100K
100K
100K
100K

100K

2.2K

2.2K

100K
100K

100K
100K

47K

100K
100K

100K

1/20W

1/20W 201MF5%

47 42 32 18 17 16 15 14 13 11 7

MF 2015%
MF

83 74 73 72 70 69 65 53

NOSTUFF

21
21
21
21
21

5% 1/20W MF 201

21

21
21
21
21
21

21

NOSTUFF

21

21

89 83 25 15 13

21
21

21
21
21
21

5% 201MF1/20W

21

21

PCH_BT_AUDIO_SYNC

PCH_STRP_ESPI

2011/20W5%
201MF1/20W5%
201MF1/20W5%

PCH_UART_DEBUG_D2R
PCH_UART_DEBUG_R2D
PCH_STRP_SPIROM_SAF

PCH_STRP_XTAL_24MHZ

201MF1/20W5%

ESPI_IO<0>

201MF1/20W5%
201MF1/20W5%
201MF1/20W5%

ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>
ESPI_CS_L

201MF1/20W5%

PCH_WLAN_AUDIO_SYNC

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

SML_PCH_1_CLK
SML_PCH_1_DATA

TBT_X_CIO_PWR_EN

201MF1/20W5%

TBT_X_USB_PWR_EN

201MF1/20W5%

JTAG_ISP_TCK

201MF1/20W5%

JTAG_ISP_TDI

201MF1/20W5%

PCH_UART2_CTS_L

201MF1/20W5%

TBT_POC_RESET

PCH_WLAN_AUDIO_SYNC

201MF1/20W5%

PCH_BT_AUDIO_SYNC

201MF1/20W5%

12

12

12

12

ESPI ANALYZER CONNECTOR

18 12

83 27 12

83 27 12

35 12

35 12

35 12

35 12

35 12

18 12

47 12

47 12

29 28 25 12

29 28 25 12

25 12

25 12

29 28 12

18 12

18 12

35 12 35 12

35 12

35 12

35 12

35 12

ESPI_IO<0>
ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>
ESPI_CS_L

R1380
R1381
R1382
R1383
R1384

ESPI_DBG
ESPI_DBG
ESPI_DBG
ESPI_DBG
ESPI_DBG

43
43
43
43

21

1/20W 5% MF 201

21
21
21
21

ESPI_IO_DBG<0>
ESPI_IO_DBG<1>

201MF5%1/20W

ESPI_IO_DBG<2>

201MF1/20W 5%

ESPI_IO_DBG<3>

201MF1/20W 5%

ESPI_DBG_CS_L

201MF1/20W435%

BOM_COST_GROUP=CPU & CHIPSET

516S00115

505070-1222

J1301

M-ST-SM

1413

21
43
65
87
109

NC

15

1211

16

ESPI_DBG

ESPI_RESET_L

NC

ESPI_CLK60M_DBG

NC
NC
NC

43

21

ESPI_CLK60M

201 MF 1/20W 5%

R1385

ESPI_DBG

PAGE TITLE

PCH AUDIO/LPC/SPI/SMBUS

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

35 12

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

13 OF 500

SHEET

12 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

18

IN

CPU_VCCST_PWRGD

VCCST_PWRGD 1V TOLERANT

83 42 16

PLACE_NEAR=U0500.CN10:5mm

IN

C1400

100PF

5%
25V
C0G

0201

1

2

R1406

1%

60.4

201

PLACE_NEAR=U0500.BJ2:38mm

MF

21
1/20W

83 18 17 15 13

83 42 16 13

83 42

83 42

83 42 16 13

OUT

IN

IN
IN
IN

PLT_RST_L
PM_SYSRST_L
PM_RSMRST_L

TP_CPU_PWRGD
CPU_VCCST_PWRGD_R

PM_PCH_SYS_PWROK
PM_PCH_PWROK
PM_RSMRST_L

NC_PCH_GPP_A13
NC_PCH_GPP_A15

PCIE_WAKE_L

13

PCH_LAN_WAKE_L

13

NC_PCH_LANPHYPC
PCH_STRP_GPD7

13

BJ35
CN10
BR36

AR2
BJ2

CR10
BP31
BP30

BV34
BY32

BU30
BU32
BU34
BV35

U0500

SYM 11 OF 20

SYSTEM POWER MANAGEMENT

OMIT_TABLE

GPP_B13/PLTRST*
SYS_RESET*
RSMRST*

PROCPWRGD
VCCST_PWRGOOD

SYS_PWROK
PCH_PWROK
DSW_PWROK

GPP_A13/SUSWARN*/SUSPWRDACK
GPP_A15/SUSACK*

WAKE*
GPD2/LAN_WAKE*
GPD11/LANPHYPC
GPD7

(1V ONLY)

CFL-U

4+3E

BGA

GPP_B12/SLP_S0*

GPD4/SLP_S3*
GPD5/SLP_S4*

GPD10/SLP_S5*

SLP_SUS*
SLP_LAN*

GPD9/SLP_WLAN*

GPD6/SLP_A*

GPD3/PWRBTN*

GPD1/ACPRESENT

GPD0/BATLOW*

GPP_A11/PME*

INTRUDER*

GPP_B11/EXT_PWR_GATE*

GPP_B2/VRALERT*

BJ37
BU36
BU27
BT29

BU29
BT31
BT30
BU37

BU28
BU35
BV36

CA32
BR35

CC37
CC36

PM_SLP_S0_3V3_L

PM_SLP_S3_L
PM_SLP_S4_L
PM_SLP_S5_L

PM_SLP_SUS_L

NC

NC_PCH_SLP_WLAN_L
NC_PCH_SLP_A_L

PCH_PWRBTN_L
SPIROM_USE_MLB
PCH_BATLOW_L

NC_PCH_GPP_A11
PCH_INTRUDER_L

PCH_HSIO_PWR_EN
NC_PCH_GPP_B2

13

13

13

13

OUT
OUT
OUT
OUT

IN

D

18 13

89 83 25 15 13 12

89 83 13

89 83 13

PP3V_G3H_RTC

83 72 16 13

1

R1401

1M

5%
1/20W
MF
201

2

83 71 11 7

C

C

B

A

PP1V8_S5

R1461
R1446
R1445

PP3V3_S5

R1440
R1441
R1451
R1452
R1453
R1459
R1463

R1460
R1444
R1454
R1455
R1456
R1457
R1458

16 15 14 12 11 7

1K
100K
100K

100K
100K
100K

10K
100K
100K

10K

100K
100K
100K
100K
100K
100K
100K

NOTE: =PM_SLP_S0_L HAS INTERNAL PULL-UP BEFORE RSMRST_L IS RELEASED.
THIS CAUSES A VOLTAGE DIVIDER WITH THE PULL-DOWN HERE.
THE SIGNAL IS DRIVEN HI AFTER RSMRST_L IS RELEASED.

21
21
21

21
21
21
21
21
21
21

21
21
21
21
21
21
21

1/20W5% MF
1/20W 2015%

5% 2011/20W MF

1/20W 2015%

5% MF1/20W

1/20W5% MF 201

5%

1/20W5% MF 201

1/20W5% 201MF

1/20W 201

5%

1/20W 201MF

5% 1/20W MF 201

5% 1/20W MF 201

1/20W5% 201MF

MF

MF

MF1/20W5% 201

MF5%

MF1/20W 2015%

201

89 83 74 73 71

201

2011/20W MF

2011/20W MF5%

83 74 73 72 70 69 65 53

PCH_STRP_CNV_DISABLE
PCH_SWD_SOC_CLK
PCH_SWD_SOC_IO

SPIROM_USE_MLB
PCH_STRP_GPD7

PCH_BATLOW_L
PCIE_WAKE_L
PCH_LAN_WAKE_L
PCH_HSIO_PWR_EN
PCH_PWRBTN_L

PLT_RST_L
SOC_SWD_MUX_SEL_PCH
PM_SLP_S5_L
PM_SLP_S4_L
PM_SLP_S3_L

PM_SLP_S0_3V3_L

PM_SLP_SUS_L

47 42 32 18 17

69 47 43 42 18 14 12 11 7 5 4

13

13

13

13

13

13

13

13

13

13

U0500

CFL-U

4+3E

BGA

CR30

NC

CP30

NC

CM30

NC

CN30

NC

CN32

NC

CM32

NC

CP33

NC

CN33

NC

changed

83 72 16 13

83 18 17 15 13

83 13

89 83 13

89 83 13

89 83 25 15 13 12

18 13

CNV_WR_D0N
CNV_WR_D0P
CNV_WR_D1N
CNV_WR_D1P

CNV_WT_D0N
CNV_WT_D0P
CNV_WT_D1N
CNV_WT_D1P

SYM 9 OF 20

OMIT_TABLE

CNV

(1.8V)

CNV_WR_CLKN
CNV_WR_CLKP

CNV_WT_CLKN
CNV_WT_CLKP

CNV_WT_RCOMP[0]
CNV_WT_RCOMP[1]

GPP_D0/SPI1_CS0*/BK0/SBK0

EMMC

GPP_F7/CNV_RGI_RSP
GPP_F8/CNV_MFUART2_RXD
GPP_F9/CNV_MFUART2_TXD

GPP_F10

GPP_F11/EMMC_CMD
GPP_F12/EMMC_DATA0
GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2

GPP_F15/EMMC_DATA3
GPP_F16/EMMC_DATA4

GPP_F6/CNV_RGI_DT

EMMC_RCOMP

CN31
CP31

CP34
CN34

CP32
CR32

CG20

CH19
CJ17
CH17
CK17
CR16
CR20
CM20
CN19

CM19
CN18
CG19

CK15

NC
NC

NC
NC

CSI2_COMP

NC

NC_PCH_GPP_F7
NC_PCH_GPP_F8
NC_PCH_GPP_F9
NC_PCH_GPP_F10
PCH_BT_ROM_BOOT_L
PCH_SWD_SOC_CLK
PCH_SWD_SOC_IO
SOC_SWD_MUX_SEL_PCH

DP_INT_HPD_MASK
NC_PCH_GPP_F16
PCH_STRP_CNV_DISABLE

EMMC_RCOMP

1

R1481

200

1%
1/20W
MF
201

2

PLACE_NEAR=U0500.CP32:12.7MM

1

R1480

100

1%
1/20W
MF
201

2

ALL GPP_F* PINS ARE 1.8V ONLY!

changed

32

OUT

13

13

83 13

IN

13

PLACE_NEAR=U0500.CK15:12.7MM

43 35

CKPLUS_WAIVE=CLK_DATA_CON

changed

changed

PAGE TITLE

PCH POWER MANAGEMENT

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

SIZE

D

B

A

SYNC_DATE=SYNC_MASTER=

6.0.0

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

IV ALL RIGHTS RESERVED

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

BRANCH

pvt

PAGE

14 OF 500

SHEET

13 OF 98

8

67

35 4

2

1

D

C

B

EXT A (SS,DCI)

FIXTURE USB-A

AIRPORT

EXT USB-A

THUNDERBOLT X LANE 0

THUNDERBOLT X LANE 1

THUNDERBOLT X LANE 2

THUNDERBOLT X LANE 3

PLACE_NEAR=U0500.CE6:12.7mm

100

1%

1/20W

MF

201

1

2

R1504

27

27

27

27

83

83

83

83

32

32

32

32

83

83

83

83

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

27

16

16

IN
IN
OUT
OUT

IN
IN
OUT
OUT

IN

IN
OUT
OUT

IN
IN
OUT
OUT

IN
IN
OUT
OUT

IN
IN
OUT
OUT

IN
IN
OUT
OUT

IN
IN
OUT
OUT

OUT
IN

678

USB3_BSSB_D2R_N
USB3_BSSB_D2R_P
USB3_BSSB_R2D_C_N
USB3_BSSB_R2D_C_P

TP_USB3_EXTC_D2R_N
TP_USB3_EXTC_D2R_P
TP_USB3_EXTC_R2D_C_N
TP_USB3_EXTC_R2D_C_P

PCH_PCIE_WLAN_D2R_N
PCH_PCIE_WLAN_D2R_P
PCH_PCIE_WLAN_R2D_C_N
PCH_PCIE_WLAN_R2D_C_P

USB3_EXTD_D2R_N
USB3_EXTD_D2R_P
USB3_EXTD_R2D_C_N
USB3_EXTD_R2D_C_P

PCIE_TBT_X_D2R_N<0>
PCIE_TBT_X_D2R_P<0>
PCIE_TBT_X_R2D_C_N<0>
PCIE_TBT_X_R2D_C_P<0>

PCIE_TBT_X_D2R_N<1>
PCIE_TBT_X_D2R_P<1>
PCIE_TBT_X_R2D_C_N<1>
PCIE_TBT_X_R2D_C_P<1>

PCIE_TBT_X_D2R_N<2>
PCIE_TBT_X_D2R_P<2>
PCIE_TBT_X_R2D_C_N<2>
PCIE_TBT_X_R2D_C_P<2>

PCIE_TBT_X_D2R_N<3>
PCIE_TBT_X_D2R_P<3>
PCIE_TBT_X_R2D_C_N<3>
PCIE_TBT_X_R2D_C_P<3>

PCH_PCIE_RCOMP_N
PCH_PCIE_RCOMP_P

XDP_CPU_PRDY_L
XDP_CPU_PREQ_L

PCH_GPP_A7

14

NC
NC
NC
NC

NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

CB5
CB6
CA4
CA3

BY8
BY9
CA2
CA1

BY7
BY6
BY4
BY3

BW6
BW5
BW2
BW1

BW9
BW8
BW4
BW3

BU6
BU5
BU4
BU3

BT7
BT6
BU2
BU1

BU9
BU8
BT4
BT3

BP5
BP6
BR2
BR1

BN6
BN5
BR4
BR3

CE6
CE5

W1
W2

CC32

BN10

BN8
BN4
BN3
BL6
BL5
BN2
BN1

PCIE1_RXN/USB31_1_RXN
PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN
PCIE1_TXP/USB31_1_TXP

PCIE2_RXN/USB31_2_RXN
PCIE2_RXP/USB31_2_RXP
PCIE2_TXN/USB31_2_TXN
PCIE2_TXP/USB31_2_TXP

PCIE3_RXN/USB31_3_RXN
PCIE3_RXP/USB31_3_RXP
PCIE3_TXN/USB31_3_TXN
PCIE3_TXP/USB31_3_TXP

PCIE4_RXN/USB31_4_RXN
PCIE4_RXP/USB31_4_RXP
PCIE4_TXN/USB31_4_TXN
PCIE4_TXP/USB31_4_TXP

PCIE5_RXN/USB31_5_RXN
PCIE5_RXP/USB31_5_RXP
PCIE5_TXN/USB31_5_TXN
PCIE5_TXP/USB31_5_TXP

PCIE6_RXN/USB31_6_RXN
PCIE6_RXP/USB31_6_RXP
PCIE6_TXN/USB31_6_TXN
PCIE6_TXP/USB31_6_TXP

PCIE7_RXN
PCIE7_RXP
PCIE7_TXN
PCIE7_TXP

PCIE8_RXN
PCIE8_RXP
PCIE8_TXN
PCIE8_TXP

PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP

PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP

PCIE_RCOMP_N
PCIE_RCOMP_P

PROC_PRDY*
PROC_PREQ*

GPP_A7/PIRQA*

PCIE11_RXN/SATA0_RXN
PCIE11_RXP/SATA0_RXP
PCIE11_TXN/SATA0_TXN
PCIE11_TXP/SATA0_TXP
PCIE12_RXN/SATA1A_RXN
PCIE12_RXP/SATA1A_RXP
PCIE12_TXN/SATA1A_TXN
PCIE12_TXP/SATA1A_TXP

U0500

CFL-U

4+3E

BGA

SYM 8 OF 20

OMIT_TABLE

USB2

PCIE/USB3/SATA

PCIE13_RXN
PCIE13_RXP
PCIE13_TXN
PCIE13_TXP

PCIE14_RXN
PCIE14_RXP
PCIE14_TXN
PCIE14_TXP

PCIE15_RXN/SATA1B_RXN
PCIE15_RXP/SATA1B_RXP
PCIE15_TXN/SATA1B_TXN
PCIE15_TXP/SATA1B_TXP

PCIE16_RXN/SATA2_RXN
PCIE16_RXP/SATA2_RXP
PCIE16_TXN/SATA2_TXN
PCIE16_TXP/SATA2_TXP

USB2_1N
USB2_1P

USB2_2N
USB2_2P

USB2_3N
USB2_3P

USB2_4N
USB2_4P

USB2_5N
USB2_5P

USB2_6N
USB2_6P

USB2_7N
USB2_7P

USB2_8N
USB2_8P

USB2_9N
USB2_9P

USB2_10N
USB2_10P

USB2_COMP

USB2_ID

USB2_VBUSSENSE

GPP_E3/CPU_GP0
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2

GPP_D22/SPI1_IO3
GPP_D23/I2S_MCLK

GPP_D18/DMIC_DATA1

GPP_D19/DMIC_CLK0

GPP_D20/DMIC_DATA0

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

BK6
BK5
BM4
BM3

BJ6
BJ5
BL2
BL1

BG5
BG6
BL4
BL3

BE5
BE6
BJ4
BJ3

CE3
CE4

CE1
CE2

CG3
CG4

CD3
CD4

CG5
CG6

CC1
CC2

CG8
CG9

CB8
CB9

CH5
CH6

CC3
CC4

CC5
CE8
CC6

CE9
CP8
CR8
CM8

CH23
CK23

CJ25
CP24
CN24

CN8
CM10
CP10

PCIE_SOC_D2R_N<0>
PCIE_SOC_D2R_P<0>
PCIE_SOC_R2D_C_N<0>
PCIE_SOC_R2D_C_P<0>

PCIE_SOC_D2R_N<1>
PCIE_SOC_D2R_P<1>
PCIE_SOC_R2D_C_N<1>
PCIE_SOC_R2D_C_P<1>

PCIE_SOC_D2R_N<2>
PCIE_SOC_D2R_P<2>
PCIE_SOC_R2D_C_N<2>
PCIE_SOC_R2D_C_P<2>

PCIE_SOC_D2R_N<3>
PCIE_SOC_D2R_P<3>
PCIE_SOC_R2D_C_N<3>
PCIE_SOC_R2D_C_P<3>

USB_EXTA_N
USB_EXTA_P

NC_USB_EXTBN
NC_USB_EXTBP

NC_USB_EXTCN
NC_USB_EXTCP

TP_USB_FIXT2_N
TP_USB_FIXT2_P

NC_USB_EXTDN
NC_USB_EXTDP

USB2_UPC_PCH_XA_N
USB2_UPC_PCH_XA_P

NC_TP_USB_UPC_PCH_TA_N
NC_TP_USB_UPC_PCH_TA_P

USB2_UPC_PCH_XB_N
USB2_UPC_PCH_XB_P

NC_TP_USB_UPC_PCH_TB_N
NC_TP_USB_UPC_PCH_TB_P

TP_USB_FIXT1_N
TP_USB_FIXT1_P

PCH_USB2_COMP

PCH_USB2_VBUSSENSE
XDP_PCH_OBSFN_C1

XDP_PCH_OBSDATA_A0
XDP_PCH_OBSDATA_A1
XDP_PCH_OBSDATA_A2

NC_SDCONN_OC_L
NC_PCH_ENET_LOW_PWR

NC_PCH_GPP_D18
NC_PCH_GPP_D19
NC_PCH_GPP_D20

XDP_PCH_OBSDATA_D1
XDP_PCH_OBSDATA_D2
XDP_PCH_OBSDATA_D3

3 245

37

IN

37

IN
OUT
OUT

IN

IN
OUT
OUT

IN

IN
OUT
OUT

IN

IN
OUT
OUT

BI

BI

BI

BI

BI

BI

BI

BI

IN
IN
IN
IN

IN
IN
IN

43

43

37

37

43

43

37

37

43

43

37

37

43

43

BI
BI

83

83

28

28

29

29

83

83

16

16

16

16

16

16

16

SOC LANE 0

SOC LANE 1

SOC LANE 2

SOC LANE 3

TO TP

NOT USED

NOT USED

TP FOR FIXTURE

NOT USED

XA RP

NOT USED

XB RP

NOT USED

TP FOR FIXTURE

(GROUNDED PER CFL EDS)

1

R1503

1K

5%
1/20W
MF
201

2

PLACE_NEAR=U0500.CC6:12.7MM

1

R1501

113

1%
1/20W
MF
201

2

PLACE_NEAR=U0500.CC5:12.7MM

1

D

C

B

A

PP3V3_S5

R1531
R1532

PP1V8_S5

R1533
R1534

R1521

R1520

NOSTUFF

89 83 74 73 71

47K
10K

47K
47K

0

PLACE_NEAR=U0500.CM3:25.4mm

60.4

PLACE_NEAR=U0500.CJ1:25.4mm

21

21

21
21

21

21

69 47 43 42 18 13 12 11 7 5 4

83 74 73 72 70 69 65 53

5%

1% MF1/20W 201

U0500

CFL-U

4+3E

BGA

SYM 10 OF 20

ANY CLKREQ CAN MAP TO ANY CLK.
ANY CLKREQ OR CLK CAN MAP TO ANY PCIE PORT.
UNUSED CLKREQS AND CLKS SHOULD BE DISABLED.
PER SKYLAKE PDG, SKYLAKE PCH EDS.

MF1/20W 2015%

201MF1/20W5%

TBT_X_CLKREQ_L

PCH_GPP_A7

14

84 37

84 37

37 14

25 14

84 25

84 25

25 14

OUT
OUT

IN

OUT
OUT

IN

PCIE_CLK100M_SOC_N
PCIE_CLK100M_SOC_P
SOC_CLKREQ_L

PCIE_CLK100M_TBT_X_N
PCIE_CLK100M_TBT_X_P
TBT_X_CLKREQ_L

NC_PCIE_CLK100M0N
NC_PCIE_CLK100M0P
NC_DEBUG_CLKREQ0_L

NC_PCIE_CLK100M3N
NC_PCIE_CLK100M3P
NC_DEBUG_CLKREQ3_L

47 42 32 18 17 16 15 13 12 11 7

32

OUT

MF1/20W 2015%
MF1/20W 2015%

SOC_CLKREQ_L
PCH_WLAN_CLKREQ_L

37 14

32 14

32

32 14

OUT

IN

PCH_PCIE_CLK100M_WLAN_N
PCH_PCIE_CLK100M_WLAN_P
PCH_WLAN_CLKREQ_L

NC_PCIE_CLK100M5N
NC_PCIE_CLK100M5P
NC_DEBUG_CLKREQ5_L

MF1/20W 0201

PCH_CLKIN_XTAL

PCH_DIFFCLK_BIASREF

14

14

AW2
AY3

CF32

BC1
BC2

CE32

BD3
BC3

CF30

BH3
BH4

CE31

BA1
BA2

CE30

BE1
BE2

CF31

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0*

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
GPP_B6/SRCCLKREQ1*

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
GPP_B7/SRCCLKREQ2*

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
GPP_B8/SRCCLKREQ3*

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
GPP_B9/SRCCLKREQ4*

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5*

CLOCK SIGNALS

OMIT_TABLE

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL_IN

XTAL_OUT

CLKIN_XTAL

CLK_BIASREF

RTCX1
RTCX2

SRTCRST*

RTCRST*

AU1
AU2

BT32

CK3
CK2

CM3
CJ1

BN31
BN32

BR37
BR34

NC_ITPXDP_CLK100MN
NC_ITPXDP_CLK100MP

NC_PCH_CLK32K_SUS
PCH_CLK24M_XTALIN

PCH_CLK24M_XTALOUT
PCH_CLKIN_XTAL

PCH_DIFFCLK_BIASREF

NC_TP_PCH_RTCX2_OUT
PCH_RTC_RESET_L

OUT

IN

IN

17

17

14

14

83 72

R1572

127K

1%

1/20W

MF

201

R1573

100K

1

2

1/20W

PLACE_NEAR=U0500.BN31:5MM
PLACE_NEAR=U0500.BN31:5MM

1%
MF

201

21

PMU_CLK32K_PCHPMU_CLK32K_PCH_1V0

BOM_COST_GROUP=CPU & CHIPSET

72

IN

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

PCH PCIE/USB/CLKS

DRAWING NUMBER

051-05309

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

6.0.0

BRANCH

pvt

PAGE

15 OF 500

SHEET

14 OF 98

A

SIZE

D

8

67

35 4

2

1

678

3 245

1

D

C

83 18 17 13

34 15

85 35

PLT_RST_L

IN

R1675

PCH_SOC_SYNC

OUT

SOC_PERST_L

OUT

NC_PCH_BT_UART_D2R

IN

NC_PCH_BT_UART_R2D

OUT

NC_PCH_BT_UART_RTS_L

OUT

NC_PCH_BT_UART_CTS_L

IN

100K

5%

1/20W

MF

201

D

ALL GPP_F* PINS ARE 1.8V ONLY!

1

1

2

R1676

100K

5%
1/20W
MF
201

2

NC_PCH_ENETSD_RESET_L
PCH_STRP_NO_REBOOT

15

NC_PCH_GPP_B19
NC_PCH_GPP_B20
NC_PCH_GPP_B21
NC_PCH_STRP_BOOT_SPI_L

NC_PCH_GPP_C16
NC_PCH_GPP_C17
NC_PCH_GPP_C18
NC_PCH_GPP_C19

NC_PCH_GPP_C12
NC_PCH_GPP_C13

NC_PCH_GPP_C14
NC_PCH_GPP_C15

NC_MEM_OK
NC_PCH_DDPD_CTRLDATA

NC_PCH_I2S_BT_CLK
NC_PCH_I2S_BT_SYNC

NC_PCH_I2S_BT_R2D
NC_PCH_I2S_BT_D2R

CC27
CE28
CE27
CE29

CA31
CC29
CC30
CA30

CR14
CP14
CN14
CM14

CM11
CN11
CK12
CJ12

CG12
CH12

CF12
CG14

CP4
CN4

CH32
CJ32

CH29
CH30

U0500

GPP_B15/GSPI0_CS0*
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI

GPP_B19/GSPI1_CS0*
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI

GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS*
GPP_C11/UART0_CTS*

GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL

GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD

GPP_C14/UART1_RTS*/ISH_UART1_RTS*
GPP_C15/UART1_CTS*/ISH_UART1_CTS*

GPP_E22/DPPD_CTRLCLK
GPP_E23/DPPD_CTRLDATA

GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK

GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO

(STRAP)

(STRAP)

SYM 6 OF 20

OMIT_TABLE

CFL-U

4+3E

BGA

(1.8V)
(1.8V)

(1.8V)

ISHLPSS

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_D1/SPI1_CLK

GPP_D2/SPI1_MISO_IO1

GPP_D3/SPI1_MOSI_IO0

GPP_D4/IMGCLKOUT0

GPP_F4/CNV_BRI_DT

GPP_F5/CNV_BRI_RSP

GPP_G6/SD_CLK

GPP_D9

GPP_D10

GPP_G7/SD_WP

GPP_G2/SD3_DATA1
GPP_G3/SD3_DATA2

GPP_G4/SD_DATA3

GPP_G5/SD_CD*

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

GPP_A12/ISH_GP6/BM_BUSY*/

SX_EXIT_HOLDOFF*

CK22
CH20
CH22
CJ22

CF20
CG22

CF22
CG25

CJ20
CK20

CK36
CN22
CR22
CK34

CL36
CM35
CN35
CH35

BW35
BW34
CA37
CA36
CA35
CA34
BW37

NC_PCH_GPP_D5
NC_PCH_GPP_D6
NC_PCH_GPP_D7
NC_PCH_UPC_I2C_INT_L

NC_PCH_GPP_D1
NC_PCH_GPP_D2

NC_PCH_GPP_D3
NC_PCH_GPP_D4

NC_PCH_GPP_F4
NC_PCH_GPP_F5

NC_TBT_X_DPMUX_SEL
TBT_X_PLUG_EVENT_L
TBT_T_PLUG_EVENT_L
NC_TBT_T_DPMUX_SEL

NC_TBT_T_CIO_PWR_EN
NC_TBT_T_USB_PWR_EN
TBT_X_PCI_RESET_L
NC_TBT_T_PCI_RESET_L

NC_PCH_GPP_A18
NC_PCH_GPP_A19
NC_PCH_GPP_A20
NC_PCH_GPP_A21
NC_BTI2SMUX_SEL_PCH
NC_PCH_BT_DEV_WAKE
NC_PCH_GPP_A12

R1671

100K

5%

1/20W

MF

201

PM_SLP_S3_L

1

2

1

R1670

100K

5%
1/20W
MF
201

2

OUT

IN

25

25 18

89 83 25 13 12

C

B

32

PCH_WLAN_PERST_L

OUT

PCH_WLAN_DEV_WAKE

15

CB34
CC35

GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

B

A

PP1V8_S5

R1656

R1677
R1674

1K

100K
100K

83 74 73 72 70 69 65 53

21

47 42 32 18 17 16 14 13 12 11 7

1/20W5% MF 201

PCH_STRP_NO_REBOOT

15

PAGE TITLE

A

SYNC_DATE=SYNC_MASTER=

PCH SPI/UART/GPIO

DRAWING NUMBER

051-05309

21

21

1/20W5% MF

MF5% 2011/20W

201

PCH_WLAN_DEV_WAKE

PCH_SOC_SYNC

15

34 15

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

IV ALL RIGHTS RESERVED

Apple Inc.

REVISION

6.0.0

BRANCH

pvt

PAGE

16 OF 500

SHEET

15 OF 98

SIZE

D

8

67

35 4

2

1

678

3 245

1

Primary / Merged (CPU/PCH) Micro2-XDP

NOTE: This is not the standard XDP pinout.
Use with 921-0133 Adapter Flex to
support chipset debug.

D

C

83 42 13

83 72 13

16 5

86 83 73 70 54 11 7

PP1V_PRIM

XDP_CONN:YES

J1800

DF40RC-60DP-0.4V

NO_XNET_CONNECTION

PULLS CFG<3> LOW
WHEN XDP PRESENT

PLACE_NEAR=U0500.BR36:18MM

XDP:YES

R1801

1K

5%

1/20W

MF

201

XDP_PRESENT_CPU

14

BI

14

1

2

IN

5

IN

5

IN

5

IN

5

IN

5

IN

5

IN

5

IN

5

IN

XDP_CPU_PREQ_L
XDP_CPU_PRDY_L

CPU_CFG<0>
CPU_CFG<1>

CPU_CFG<2>
CPU_CFG<3>

NC
NC

CPU_CFG<4>
CPU_CFG<5>

CPU_CFG<6>
CPU_CFG<7>

XDP_PIN_1

OBSFN_A0
OBSFN_A1

OBSDATA_A0
OBSDATA_A1

OBSDATA_A2
OBSDATA_A3

OBSFN_B0
OBSFN_B1

OBSDATA_B0
OBSDATA_B1

OBSDATA_B2
OBSDATA_B3

XDP:YES

IN

OUT

OUT

PM_RSMRST_L
PCH_PWRBTN_L

XDP_CPU_TCK

R1800

R1802

1K

10

XDP:YES

PLACE_NEAR=U0500.BU28:8MM

21

21

1/20W5% MF 201

XDP_CPU_PWRBTN_L

1/20W5% 201MF

XDP:YES

PLACE_NEAR=J1800.42:28MM

16 5

XDP_PCH_TCK

OUT

XDP_PM_RSMRST_L

10%
10V

0201

1

2

C1804

0.1UF

X5R-CERM

NC
NC

NC
NC

HOOK0
HOOK1

VCC_OBS_AB

HOOK2
HOOK3

SDA

SCL
TCK1
TCK0

XDP:YES

5

PCH_JTAGX

OUT

R1835

0

21

MF5%

PLACE_NEAR=J1800.58:28MM

02011/20W

PLACE_NEAR=J1800.44:28MM

XDP:YES

C1800

0.1UF

10%
10V

X5R-CERM

0201

1

2

M-ST-SM1

62

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
42 41
44 43
46 45
48 47
50 49
52 51
54 53
56 55
58 57
60 59

64 63

61

518S0847

OBSFN_C0
OBSFN_C1

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSFN_D0
OBSFN_D1

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7

TDO
TRSTn
TDI
TMS
XDP_PRESENT#

XDP:YES

1

C1801

0.1UF

10%
10V

2

X5R-CERM
0201

PLACE_NEAR=J1800.43:28MM

CPU_CFG<17>
CPU_CFG<16>

CPU_CFG<8>
CPU_CFG<9>

CPU_CFG<10>
CPU_CFG<11>

CPU_CFG<19>
CPU_CFG<18>

CPU_CFG<12>
CPU_CFG<13>

CPU_CFG<14>
CPU_CFG<15>

NC
NC

XDP_DBRESET_L

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

XDP_PCH_TDO

16 5

XDP_PCH_TDI

5

5

5

5

5

5

5

5

5

5

1

R1830

2

1K

5%
1/20W
MF
201

5

5

PLACE_NEAR=J1800.45:32MM

16 5

XDP_PCH_TMS

16 5

XDP_CPU_TDO

16 5

XDP_CPU_TCK

16 5

XDP_PCH_TCK

16 5

PLACE_NEAR=U0500.W5:28MM

PLACE_NEAR=U0500.U5:28MM

PLACE_NEAR=U0500.P5:28MM

PLACE_NEAR=U0500.Y5:28MM

PLACE_NEAR=U0500.T6:28MM

PLACE_NEAR=U0500.W6:28MM

R1890

R1891

R1892

R1810

R1813

R1897

100

51

51

100

51

51

ITP_PMODE

1

C1806

0.1UF

10%
10V

2

X5R-CERM
0201

R1806

XDP:YES

PLACE_NEAR=J1800.47:28MM

ROUTE IN STAR TOPOLOGY FROM XDP CONNECTOR.

R1821
R1822
R1823
R1824

0

XDP:YES

0

0

XDP:YES

0

XDP:YES

0

XDP:YES

21

21

5% MF1/20W

21

5% MF 02011/20W

21

1/20W

0201

21

PM_SYSRST_L

5%
MF

XDP_CPU_TDO

MF1/20W5%

0201

XDP_CPU_TRST_L

0201

XDP_CPU_TDI

XDP_CPU_TMS

0201MF5% 1/20W

XDP_PCH_TDO

83 71 9 7 5

XDP:YES

XDP:YES

XDP:YES

XDP:YES

XDP:YES

NOSTUFF

5

IN

BI

16 5

IN

5

OUT

5

OUT

5

OUT

16 5

IN

12

12

12

12

PP1V_S0SW

12

12

1/20W5%

5% MF1/20W

83 42 13

MF5% 1/20W

201

201

MF5% 1/20W

2011/20W MF5%

201

MF5% 1/20W

201MF

201

D

C

B

14

14

14

14

14

14

14

PLACE NEARS FOR R1801, R1821, R1822, R1823, R1824

REQUIRE UPDATE FOR P1 PER <RDAR://42934724>

XDP_PCH_TRST_L
XDP_PCH_TDI
XDP_PCH_TMS

XDP_PRESENT_L

OUT

OUT

OUT

OUT

5

16 5

16 5

35

PCH XDP Signals

B

These signals do not connect to the Primary (Merged) XDP connector in this architecture.
The PDG puts them on a secondary XDP connector that is only needed in some PCH debugging situation.
They are listed here to show their secondary XDP functions and to provide test points for signals that are not used elsewhere.

PCH/XDP Signals

BI

BI

BI

4

BI

4

BI

BI

BI

BI

BI

XDP_PCH_OBSDATA_A0
XDP_PCH_OBSDATA_A1
XDP_PCH_OBSDATA_A2
XDP_PCH_OBSDATA_A3
XDP_PCH_OBSDATA_B0
XDP_PCH_OBSDATA_D1
XDP_PCH_OBSDATA_D2
XDP_PCH_OBSDATA_D3
XDP_PCH_OBSFN_C1

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

1

TP

TP-P6

TP1868
TP1869
TP1870
TP1871
TP1872
TP1878
TP1879
TP1880
TP1881

Non-XDP Signals

42 32 18 17 15 14 13 12 11 7

83 74 73 72 70 69 65 53 47

PP1V8_S5

XDP:YES

R1850

100K

1/20W

5%
MF

201

1

2

NC

6

VCC

U1830

74AUP1G07GF

SOT891

2

(OD)

1

GND

3

XDP:YES

4

YA

NCNC

SPI_IO2_STRAP_L

5

NC

XDP:YES

1

C1830

0.1UF

10%
10V

2

X5R-CERM
0201

XDP:YES

R1831

1.5K

1/20W

PLACE_NEAR=U0500.CF34:10MM

NO_XNET_CONNECTION=1

PULL STRAP LOW WHEN XDP IS PLUGGED IN.
(UNDOCUMENTED STRAP FUNCTION)

5%
MF

201

21

SPI_PCHROM_IO<2>

(STRAP TO PCH)

OUT

12

A

Unused GPIOs have TPs.

8

NEED TO CONNECT TO VCCST, *STG POWER LOGIC

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

CPU/PCH Merged XDP

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DEBUG

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

18 OF 500

SHEET

16 OF 98

1

SIZE

D

CRITICAL

24MHz CLOCK

678

3 245

1

D

C1907

9.5PF

21

+/-0.1PF

50V

CER-C0G

0201

42

CRITICAL

C1908

9.5PF

21

+/-0.1PF

50V

CER-C0G

0201

R1900

0

5%
MF

0201

21

1

R1901

200K

1%
1/20W
MF
201

2

PLACE_NEAR=U0500.CK2:25.4mm

PCH_CLK24M_XTALIN

PCH_CLK24M_XTALOUT_R PCH_CLK24M_XTALOUT

1/20W

CRITICAL

31

Y1900

24MHZ-10PPM-8PF-40OHM

2.5X2.0MM-SM

NOTE: 30 PPM or better required for SKL PCH

OUT

IN

14

14

D

C

85 83 72 5

83 18 15 13

IN

IN

THRMTRIP# ISOLATION & LEVEL-SHIFT TO 1V8

C1900

0.1UF

X5R-CERM

PM_THRMTRIP_L

PLT_RST_L

10%
10V

PP1V8_S5PP1V_S3

1

2

1

C1901

0.1UF

10%
10V

2

X5R-CERM
02010201

83 74 73 72 70 69 65 53

U1900

8

1

3

7

5

4

2

74AXP1T57

SOT833

6

CPU_SMC_THRMTRIP_L

NOSTUFF

1

R1902

100K

5%
1/20W
MF
201

2

47 42 32 18 16 15 14 13 12 11 7 83 70 69 65 42 18 9 7 5

OUT

C

35

B

B

A

8

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

Chipset Support 1

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

19 OF 500

SHEET

17 OF 98

1

SIZE

D

PLATFORM RESET LEVEL-SHIFTER TO 3V3

678

3 245

1

D

83 18 17 15 13

69 47 43 42 14 13 12 11 7 5 4

PLT_RST_L

IN

89 83 74 73 71

PP3V3_S5

1

C2006

0.1UF

10%
16V

2

X5R-CERM
0201

1

2

U2002

74AUP1T97

5

SOT891

4

6

3

R2003

100K

5%

1/20W

MF

201

1

2

SLP_S0# LEVEL SHIFTER TO 1V8

PLT_RST_3V3_L

100K

2 1

R2000

5% 2011/20W MF

TBT_X_PCI_RESET_L

OUT

BT AUDIO SYNC BUFFER

D

58 57 55 51 48 47 45 44 43 18

25 15

83 18 17 15 13

IN

PLT_RST_L

83 76 74 68 62 61 60 59

PP1V8_G3S

1

OE

6

VCC

U2021

SN74LVC1G126DRYR-M

LLP

C2021

0.1UF

10%
16V

X5R-CERM

0201

1

2

C

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

13

IN OUT

PM_SLP_S0_3V3_L

PP1V8_S5

1

C2010

0.1UF

10%
16V

2

X5R-CERM
0201

U2010

74AUP1G34GX

5

SOT1226

2

NC

1

NC

4

3

PM_SLP_S0_L

1

R2001

100K

5%
1/20W
MF
201

2

VCCST_PWRGD LEVEL SHIFTER TO 1VALL_SYS_PWRGD QUALIFIER &

NC

4

Y

PCH_BT_AUDIO_SYNC

OUT

12

32

IN

89 83 72 35

BT_AUDIO_SYNC

1

R2023

10K

5%
1/20W
MF
201

2

2

A

GND

3

NC

5

NOSTUFF

R2022

0

21

5%

1/20W

MF

0201

C

B

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

42 35

83 72

SMC_RSMRST_L

IN

ALL_SYS_PWRGD

IN

PP1V8_S5

C2009

0.1UF

X5R-CERM

0201

10%
16V

1

2

2

B

1

A

NC

5

NC

NOSTUFF

R2007

0

5%

1/20W

MF

0201

U2009

74LVC1G08FZ4

DFN1410-COMBO

6

4

Y

3

21

C2007

1

R2004

1M

5%
1/20W
MF
201

2

0.1UF

10%
16V

X5R-CERM

0201

83 70 69 65 42 17 9 7 5

1

2

6

VCC

U2003

74AUP1G07GF

SOT891

2

NC NC

1

GND

3

4

YA

NCNC

CPU_VCCST_PWRGD

5

ALL_SYS_PWRGD_R

PP1V_S3

1

R2094

1K

5%
1/20W
MF
201

2

OUT

OUT

13

WLAN AUDIO SYNC BUFFER

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

83 18 17 15 13

34 32

69 65

IN

IN

PLT_RST_L

WLAN_AUDIO_SYNC

1

R2020

100K

5%
1/20W
MF
201

2

PP1V8_G3S

SN74LVC1G126DRYR-M

1

OE

2

A

6

VCC

U2020

LLP

GND

3

NC

5

Y

NC

C2020

0.1UF

10%
16V

X5R-CERM

0201

4

PCH_WLAN_AUDIO_SYNC

1

2

12

OUT

B

A

NOSTUFF

R2021

0

21

5%

1/20W

MF

0201

TPs for Chipset Debug Pins

P2MM

SM

5

IN

5

IN

5

IN

5

IN

5

IN

5

IN

5

IN

4

IN

4

IN

TEST_CPU_D34

TEST_CPU_BJ34

TEST_CPU_A35

TEST_CPU_F37

TEST_CPU_BJ36

TEST_CPU_F34

TEST_CPU_CN36

TEST_NOA_N_10

TEST_NOA_N_11

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

PP2001

PP2002

PP2003

PP2004

PP2005

PP2006

PP2007

PP2008

PP2009

BOM_COST_GROUP=CPU & CHIPSET

PAGE TITLE

CHIPSET SUPPORT 2

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

20 OF 500

SHEET

18 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

C

B

6

IN

6

IN

6 23 22 21 20

IN

NOTE: CPU has single output for VREFCA.
VREFCA. Connected to 4 DRAMs.

CPU_DIMMA_VREFDQ

CPU_DIMMB_VREFDQ

CPU_DIMM_VREFCA

CPU-Based Margining

VRef Dividers

R2223

10

21

1%

1/20W

MF

201

1

C2220

0.022UF

10%

6.3V

2

X5R-CERM
0201

MEM_VREFDQ_A_RC

R2243

10

21

1%

1/20W

MF

201

1

C2240

0.022UF

10%

6.3V

2

X5R-CERM
0201

MEM_VREFDQ_B_RC

R2263

5.1

1/20W

0201

1

C2260

0.022UF

10%

6.3V

2

X5R-CERM
0201

MEM_VREFCA_RC

21
1%
MF

PLACE_NEAR=R2221.2:1mm

1%

1/20W

MF

201

1

2

R2222

8.2K

R2220

24.9

1/20W

PLACE_NEAR=R2241.2:1mm

R2242

1%
MF

201

21

8.2K

1%

1/20W

MF

201

1

2

R2240

24.9

1/20W

PLACE_NEAR=R2261.2:1mm

R2262

1%
MF

201

21

8.2K

1%

1/20W

MF

201

1

2

R2260

24.9

1/20W

1%
MF

201

21

PP1V2_S3

1

R2221

8.2K

1%
1/20W
MF
201

2

PP0V6_S3_MEM_VREFDQ_A

1

R2241

8.2K

1%
1/20W
MF
201

2

PP0V6_S3_MEM_VREFDQ_B

1

R2261

8.2K

1%
1/20W
MF
201

2

PP0V6_S3_MEM_VREFCA_A

D

88 83 74 73 50 23 22 21 20

21 20

C

23 22

B

A

8

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

A

LPDDR3 VREF MARGINING

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

22 OF 500

SHEET

19 OF 98

1

SIZE

D

D

678

3 245

1

LPDDR3 CHANNEL A (0-31)

D

C

B

R2300

243

1%

1/20W

MF

201

1

2

R2301

243

1%

1/20W

MF

201

U2300

LPDDR3-1600-32GB

EDFB232A1MA

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 21 6

24 21 6

24 21 6

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN

IN
IN

IN
IN

IN

MEM_A_CAA<0>
MEM_A_CAA<1>
MEM_A_CAA<2>
MEM_A_CAA<3>
MEM_A_CAA<4>
MEM_A_CAA<5>
MEM_A_CAA<6>
MEM_A_CAA<7>
MEM_A_CAA<8>
MEM_A_CAA<9>

MEM_A_CKE<0>
MEM_A_CKE<1>

MEM_A_CLK_P<0>
MEM_A_CLK_N<0>

MEM_A_CS_L<0>
MEM_A_CS_L<1>

MEM_A_ODT<0>

MEM_A_ZQ<0>
MEM_A_ZQ<1>

1

23 22 21 19

21 19

2

C2340

0.047UF

1

10%

6.3V
2

X5R
201

88 83 74 73 50 23 22 21 20 19

1

2

PP0V6_S3_MEM_VREFCA_A
PP0V6_S3_MEM_VREFDQ_A

C2341

0.047UF

10%

6.3V
X5R
201

PP1V2_S3

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

1

C2300

0.1UF

10%
16V

2

X5R-CERM
0201

R2
P2
N2
N3
M3
F3
E3
E2
D2
C2

K3
K4

J3
J2

L3
L4

L8
G8
P8
D8

J8

B3
B4

H4

J11

A1

A2
A12
A13

B1
B13

T1
T13

U1

U2
U12
U13

CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9

CKE0
CKE1

CK_T
CK_C

CS0*
CS1*

DM0
DM1
DM2
DM3

ODT

ZQ0
ZQ1

VREFCA
VREFDQ

NU

1

2

OMIT_TABLE

C2301

0.1UF 1UF

10%
16V
X5R-CERM
0201

FBGA

SYM 1 OF 2

CRITICAL

1

C2302

1UF

20%
10V

2

X5R
0201

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0_C
DQS1_C
DQS2_C
DQS3_C

DQS0_T
DQS1_T
DQS2_T
DQS3_T

NC

P9
N9
N10
N11
M8
M9
M10
M11
F11
F10
F9
F8
E11
E10
E9
D9
T8
T9
T10
T11
R8
R9
R10
R11
C11
C10
C9
C8
B11
B10
B9
B8

L11
G11
P11
D11

L10
G10
P10
D10

C4
K9
R3

NC
NC
NC

1

C2303

1UF

20%
10V

2

X5R
0201

MEM_A_DQ<15> PP1V8_S3_MEM
MEM_A_DQ<14>
MEM_A_DQ<9>
MEM_A_DQ<12>
MEM_A_DQ<11>
MEM_A_DQ<10>
MEM_A_DQ<13>
MEM_A_DQ<8>
MEM_A_DQ<32>
MEM_A_DQ<37>
MEM_A_DQ<34>
MEM_A_DQ<33>
MEM_A_DQ<36>
MEM_A_DQ<35>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<7>
MEM_A_DQ<3>
MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<6>
MEM_A_DQ<2>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<47>
MEM_A_DQ<42>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<43>
MEM_A_DQ<46>

MEM_A_DQS_N<1>
MEM_A_DQS_N<4>
MEM_A_DQS_N<0>
MEM_A_DQS_N<5>

MEM_A_DQS_P<1>
MEM_A_DQS_P<4>
MEM_A_DQS_P<0>
MEM_A_DQS_P<5>

1

C2304

20%
10V

2

X5R
0201

1

C2305

1UF

20%
10V

2

X5R
0201

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI

BI
BI
BI
BI

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

1

C2306

10UF

20%
10V

2

X5R-CERM
0402-7

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

1

C2307

10UF

20%
10V

2

X5R-CERM
0402-7

PP1V2_S3

PP1V2_S3

PP1V2_S3

A3
A4
A5
A6

A10

U3
U4
U5
U6

U10

A8
A9
D4
D5
D6
G5
H5
H6

H12

J5
J6
K5
K6

K12

L5
P4
P5
P6
U8
U9

F2
G2
H3
L2
M2

A11
C12

E8
E12
G12

H8

H9
H11

J9
J10

K8
K11
L12

N8
N12
R12
U11

LPDDR3-1600-32GB

VDD1

VDD2

VDDCA

VDDQ

U2300

EDFB232A1MA

FBGA

SYM 2 OF 2

OMIT_TABLE

CRITICAL

VSS

VSSCA

VSSQ

B2
B5
C5
E4
E5
F5
J12
K2
L6
M5
N4
N5
R4
R5
T2
T3
T4
T5
H2

C3
D3
F4
G3
G4
P3
M4
J4

B6
B12
C6
D12
E6
F6
F12
G6
G9
H10
K10
L9
M6
M12
N6
P12
R6
T6
T12

C

B

A

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

PP1V2_S3

PP1V2_S3

PP1V8_S3_MEM

1

C2320

1UF

20%
10V

2

X5R
0201

1

C2310

1UF

20%

2

X5R
0201

1

C2330

1UF

20%
10V

2

X5R
0201

1

C2321

1UF

20%
10V

2

X5R
0201

1

C2311

1UF

20%
10V10V

2

X5R
0201

1

C2331

1UF 10UF

20%
10V

2

X5R
0201

1

C2322

2

1

C2312

2

1

C2332

2

1UF

20%
10V
X5R
0201

10UF

20%
10V
X5R-CERM
0402-7

20%
10V
X5R-CERM
0402-7

1

C2323

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2333

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2324

10UF

20%
10V

2

X5R-CERM
0402-7

PLACEMENT_NOTE:

10uF caps are shared between DRAM.
Distribute evenly.

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DRAM

IV ALL RIGHTS RESERVED

LPDDR3 DRAM Channel A (00-31)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

23 OF 500

SHEET

20 OF 98

A

SIZE

D

6.0.0

pvt

8

67

35 4

2

1

D

678

3 245

1

LPDDR3 CHANNEL A (32-63)

D

C

B

R2400

243

1%

1/20W

MF

201

1

2

R2401

243

1%

1/20W

MF

201

U2400

LPDDR3-1600-32GB

EDFB232A1MA

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 20 6

24 20 6

24 20 6

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN

IN
IN

IN
IN

IN

MEM_A_CAB<0>
MEM_A_CAB<1>
MEM_A_CAB<2>
MEM_A_CAB<3>
MEM_A_CAB<4>
MEM_A_CAB<5>
MEM_A_CAB<6>
MEM_A_CAB<7>
MEM_A_CAB<8>
MEM_A_CAB<9>

MEM_A_CKE<2>
MEM_A_CKE<3>

MEM_A_CLK_P<1>
MEM_A_CLK_N<1>

MEM_A_CS_L<0>
MEM_A_CS_L<1>

MEM_A_ODT<0>

MEM_A_ZQ<2>
MEM_A_ZQ<3>

1

23 22 20 19

20 19

2

C2440

0.047UF

1

10%

6.3V
2

X5R
201

88 83 74 73 50 23 22 21 20 19

1

2

PP0V6_S3_MEM_VREFCA_A
PP0V6_S3_MEM_VREFDQ_A

C2441

0.047UF

10%

6.3V
X5R
201

PP1V2_S3

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

1

C2400

0.1UF

10%
16V

2

X5R-CERM
0201

R2
P2
N2
N3
M3
F3
E3
E2
D2
C2

K3
K4

J3
J2

L3
L4

L8
G8
P8
D8

J8

B3
B4

H4

J11

A1

A2
A12
A13

B1
B13

T1
T13

U1

U2
U12
U13

CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9

CKE0
CKE1

CK_T
CK_C

CS0*
CS1*

DM0
DM1
DM2
DM3

ODT

ZQ0
ZQ1

VREFCA
VREFDQ

NU

1

2

OMIT_TABLE

C2401

0.1UF

10%
16V
X5R-CERM
0201

FBGA

SYM 1 OF 2

CRITICAL

1

C2402

1UF

20%
10V

2

X5R
0201

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0_C
DQS1_C
DQS2_C
DQS3_C

DQS0_T
DQS1_T
DQS2_T
DQS3_T

NC

P9
N9
N10
N11
M8
M9
M10
M11
F11
F10
F9
F8
E11
E10
E9
D9
T8
T9
T10
T11
R8
R9
R10
R11
C11
C10
C9
C8
B11
B10
B9
B8

L11
G11
P11
D11

L10
G10
P10
D10

C4
K9
R3

NC
NC
NC

1

C2403

20%
10V

2

X5R
0201

MEM_A_DQ<48> PP1V8_S3_MEM
MEM_A_DQ<51>
MEM_A_DQ<50>
MEM_A_DQ<55>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<49>
MEM_A_DQ<22>
MEM_A_DQ<18>
MEM_A_DQ<21>
MEM_A_DQ<17>
MEM_A_DQ<20>
MEM_A_DQ<23>
MEM_A_DQ<19>
MEM_A_DQ<16>
MEM_A_DQ<59>
MEM_A_DQ<63>
MEM_A_DQ<57>
MEM_A_DQ<56>
MEM_A_DQ<58>
MEM_A_DQ<62>
MEM_A_DQ<61>
MEM_A_DQ<60>
MEM_A_DQ<27>
MEM_A_DQ<31>
MEM_A_DQ<29>
MEM_A_DQ<25>
MEM_A_DQ<30>
MEM_A_DQ<26>
MEM_A_DQ<28>
MEM_A_DQ<24>

MEM_A_DQS_N<6>
MEM_A_DQS_N<2>
MEM_A_DQS_N<7>
MEM_A_DQS_N<3>

MEM_A_DQS_P<6>
MEM_A_DQS_P<2>
MEM_A_DQS_P<7>
MEM_A_DQS_P<3>

1

C2404

1UF1UF

20%
10V

2

X5R
0201

1

C2405

1UF

20%
10V

2

X5R
0201

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI

BI
BI
BI
BI

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

1

C2406

10UF

20%
10V

2

X5R-CERM
0402-7

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

1

C2407

10UF

20%
10V

2

X5R-CERM
0402-7

PP1V2_S3

PP1V2_S3

PP1V2_S3

A3
A4
A5
A6

A10

U3
U4
U5
U6

U10

A8
A9
D4
D5
D6
G5
H5
H6

H12

J5
J6
K5
K6

K12

L5
P4
P5
P6
U8
U9

F2
G2
H3
L2
M2

A11
C12

E8
E12
G12

H8

H9
H11

J9
J10

K8
K11
L12

N8
N12
R12
U11

LPDDR3-1600-32GB

VDD1

VDD2

VDDCA

VDDQ

U2400

EDFB232A1MA

FBGA

SYM 2 OF 2

OMIT_TABLE

CRITICAL

VSS

VSSCA

VSSQ

B2
B5
C5
E4
E5
F5
J12
K2
L6
M5
N4
N5
R4
R5
T2
T3
T4
T5
H2

C3
D3
F4
G3
G4
P3
M4
J4

B6
B12
C6
D12
E6
F6
F12
G6
G9
H10
K10
L9
M6
M12
N6
P12
R6
T6
T12

C

B

A

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

PP1V2_S3

PP1V2_S3

PP1V8_S3_MEM

1

C2420

1UF

20%
10V

2

X5R
0201

1

C2410

1UF

20%
10V

2

X5R
0201

1

C2430

1UF

20%
10V

2

X5R
0201

1

C2421

1UF

20%
10V

2

X5R
0201

1

C2411

1UF

20%
10V

2

X5R
0201

1

C2431

1UF

20%
10V

2

X5R
0201

1

C2422

1UF

20%
10V

2

X5R
0201

1

C2412

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2432

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2423

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2433

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2424

10UF

20%
10V

2

X5R-CERM
0402-7

PLACEMENT_NOTE:

10uF caps are shared between DRAM.
Distribute evenly.

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DRAM

IV ALL RIGHTS RESERVED

LPDDR3 DRAM Channel A (32-63)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

24 OF 500

SHEET

21 OF 98

6.0.0

pvt

SYNC_DATE=SYNC_MASTER=

SIZE

A

D

8

67

35 4

2

1

D

678

3 245

1

LPDDR3 CHANNEL B (0-31)

D

C

B

R2500

243

1%

1/20W

MF

201

1

2

R2501

243

1%

1/20W

MF

201

U2500

LPDDR3-1600-32GB

EDFB232A1MA

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 23 6

24 23 6

24 23 6

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN

IN
IN

IN
IN

IN

MEM_B_CAA<0>
MEM_B_CAA<1>
MEM_B_CAA<2>
MEM_B_CAA<3>
MEM_B_CAA<4>
MEM_B_CAA<5>
MEM_B_CAA<6>
MEM_B_CAA<7>
MEM_B_CAA<8>
MEM_B_CAA<9>

MEM_B_CKE<0>
MEM_B_CKE<1>

MEM_B_CLK_P<0>
MEM_B_CLK_N<0>

MEM_B_CS_L<0>
MEM_B_CS_L<1>

MEM_B_ODT<0>

MEM_B_ZQ<0>
MEM_B_ZQ<1>

1

23 21 20 19

23 19

2

C2540

0.047UF

1

10%

6.3V
2

X5R
201

88 83 74 73 50 23 22 21 20 19

1

2

PP0V6_S3_MEM_VREFCA_A
PP0V6_S3_MEM_VREFDQ_B

C2541

0.047UF

10%

6.3V
X5R
201

PP1V2_S3

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

1

C2500

0.1UF

10%
16V

2

X5R-CERM
0201

R2
P2
N2
N3
M3
F3
E3
E2
D2
C2

K3
K4

J3
J2

L3
L4

L8
G8
P8
D8

J8

B3
B4

H4

J11

A1

A2
A12
A13

B1
B13

T1
T13

U1

U2
U12
U13

CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9

CKE0
CKE1

CK_T
CK_C

CS0*
CS1*

DM0
DM1
DM2
DM3

ODT

ZQ0
ZQ1

VREFCA
VREFDQ

NU

1

2

OMIT_TABLE

C2501

0.1UF

10%
16V
X5R-CERM
0201

FBGA

SYM 1 OF 2

CRITICAL

1

C2502

1UF

20%
10V

2

X5R
0201

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0_C
DQS1_C
DQS2_C
DQS3_C

DQS0_T
DQS1_T
DQS2_T
DQS3_T

NC

P9
N9
N10
N11
M8
M9
M10
M11
F11
F10
F9
F8
E11
E10
E9
D9
T8
T9
T10
T11
R8
R9
R10
R11
C11
C10
C9
C8
B11
B10
B9
B8

L11
G11
P11
D11

L10
G10
P10
D10

C4
K9
R3

NC
NC
NC

1

C2503

20%
10V

2

X5R
0201

MEM_B_DQ<7> PP1V8_S3_MEM
MEM_B_DQ<2>
MEM_B_DQ<6>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<0>
MEM_B_DQ<1>
MEM_B_DQ<39>
MEM_B_DQ<33>
MEM_B_DQ<32>
MEM_B_DQ<36>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<38>
MEM_B_DQ<37>
MEM_B_DQ<8>
MEM_B_DQ<13>
MEM_B_DQ<15>
MEM_B_DQ<10>
MEM_B_DQ<9>
MEM_B_DQ<12>
MEM_B_DQ<14>
MEM_B_DQ<11>
MEM_B_DQ<40>
MEM_B_DQ<44>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<45>
MEM_B_DQ<47>
MEM_B_DQ<46>
MEM_B_DQ<41>

MEM_B_DQS_N<0>
MEM_B_DQS_N<4>
MEM_B_DQS_N<1>
MEM_B_DQS_N<5>

MEM_B_DQS_P<0>
MEM_B_DQS_P<4>
MEM_B_DQS_P<1>
MEM_B_DQS_P<5>

1

C2504

1UF1UF

20%
10V

2

X5R
0201

1

C2505

1UF

20%
10V

2

X5R
0201

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI

BI
BI
BI
BI

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

1

C2506

10UF

20%
10V

2

X5R-CERM
0402-7

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

1

C2507

10UF

20%
10V

2

X5R-CERM
0402-7

PP1V2_S3

PP1V2_S3

PP1V2_S3

A3
A4
A5
A6

A10

U3
U4
U5
U6

U10

A8
A9
D4
D5
D6
G5
H5
H6

H12

J5
J6
K5
K6

K12

L5
P4
P5
P6
U8
U9

F2
G2
H3
L2
M2

A11
C12

E8
E12
G12

H8

H9
H11

J9
J10

K8
K11
L12

N8
N12
R12
U11

LPDDR3-1600-32GB

VDD1

VDD2

VDDCA

VDDQ

U2500

EDFB232A1MA

FBGA

SYM 2 OF 2

OMIT_TABLE

CRITICAL

VSS

VSSCA

VSSQ

B2
B5
C5
E4
E5
F5
J12
K2
L6
M5
N4
N5
R4
R5
T2
T3
T4
T5
H2

C3
D3
F4
G3
G4
P3
M4
J4

B6
B12
C6
D12
E6
F6
F12
G6
G9
H10
K10
L9
M6
M12
N6
P12
R6
T6
T12

C

B

A

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

PP1V2_S3

PP1V2_S3

PP1V8_S3_MEM

1

C2520

1UF

20%
10V

2

X5R
0201

1

C2510

1UF

20%
10V

2

X5R
0201

1

C2530

1UF

20%

2

X5R
0201

1

C2521

1UF

20%
10V

2

X5R
0201

1

C2511

1UF

20%
10V

2

X5R
0201

1

C2531

1UF

20%
10V10V

2

X5R
0201

1

C2522

1UF

20%
10V

2

X5R
0201

1

C2512

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2532

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2523

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2533

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2524

10UF

20%
10V

2

X5R-CERM
0402-7

PLACEMENT_NOTE:

10uF caps are shared between DRAM.
Distribute evenly.

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DRAM

IV ALL RIGHTS RESERVED

LPDDR3 DRAM Channel B (00-31)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

25 OF 500

SHEET

22 OF 98

6.0.0

pvt

SYNC_DATE=SYNC_MASTER=

SIZE

A

D

8

67

35 4

2

1

D

678

3 245

1

LPDDR3 CHANNEL B (32-63)

D

C

B

R2600

243

1%

1/20W

MF

201

1

2

R2601

243

1%

1/20W

MF

201

U2600

LPDDR3-1600-32GB

EDFB232A1MA

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 6

24 22 6

24 22 6

24 22 6

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN

IN
IN

IN
IN

IN

MEM_B_CAB<0>
MEM_B_CAB<1>
MEM_B_CAB<2>
MEM_B_CAB<3>
MEM_B_CAB<4>
MEM_B_CAB<5>
MEM_B_CAB<6>
MEM_B_CAB<7>
MEM_B_CAB<8>
MEM_B_CAB<9>

MEM_B_CKE<2>
MEM_B_CKE<3>

MEM_B_CLK_P<1>
MEM_B_CLK_N<1>

MEM_B_CS_L<0>
MEM_B_CS_L<1>

MEM_B_ODT<0>

MEM_B_ZQ<2>
MEM_B_ZQ<3>

1

22 21 20 19

22 19

2

C2640

0.047UF

1

10%

6.3V
2

X5R
201

88 83 74 73 50 23 22 21 20 19

1

2

PP0V6_S3_MEM_VREFCA_A
PP0V6_S3_MEM_VREFDQ_B

C2641

0.047UF

10%

6.3V
X5R
201

PP1V2_S3

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

1

C2600

0.1UF

10%
16V

2

X5R-CERM
0201

R2
P2
N2
N3
M3
F3
E3
E2
D2
C2

K3
K4

J3
J2

L3
L4

L8
G8
P8
D8

J8

B3
B4

H4

J11

A1

A2
A12
A13

B1
B13

T1
T13

U1

U2
U12
U13

CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9

CKE0
CKE1

CK_T
CK_C

CS0*
CS1*

DM0
DM1
DM2
DM3

ODT

ZQ0
ZQ1

VREFCA
VREFDQ

NU

1

2

OMIT_TABLE

C2601

0.1UF

10%
16V
X5R-CERM
0201

FBGA

SYM 1 OF 2

CRITICAL

1

C2602

1UF

20%
10V

2

X5R
0201

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0_C
DQS1_C
DQS2_C
DQS3_C

DQS0_T
DQS1_T
DQS2_T
DQS3_T

NC

P9
N9
N10
N11
M8
M9
M10
M11
F11
F10
F9
F8
E11
E10
E9
D9
T8
T9
T10
T11
R8
R9
R10
R11
C11
C10
C9
C8
B11
B10
B9
B8

L11
G11
P11
D11

L10
G10
P10
D10

C4
K9
R3

NC
NC
NC

1

C2603

1UF

20%
10V

2

X5R
0201

MEM_B_DQ<48> PP1V8_S3_MEM
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<54>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<51>
MEM_B_DQ<55>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<18>
MEM_B_DQ<63>
MEM_B_DQ<62>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<58>
MEM_B_DQ<61>
MEM_B_DQ<57>
MEM_B_DQ<56>
MEM_B_DQ<27>
MEM_B_DQ<31>
MEM_B_DQ<28>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<30>
MEM_B_DQ<29>
MEM_B_DQ<24>

MEM_B_DQS_N<6>
MEM_B_DQS_N<2>
MEM_B_DQS_N<7>
MEM_B_DQS_N<3>

MEM_B_DQS_P<6>
MEM_B_DQS_P<2>
MEM_B_DQS_P<7>
MEM_B_DQS_P<3>

1

C2604

1UF

20%
10V

2

X5R
0201

1

C2605

1UF

20%
10V

2

X5R
0201

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI

BI
BI
BI
BI

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

1

C2606

10UF

20%
10V

2

X5R-CERM
0402-7

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

1

C2607

10UF

20%
10V

2

X5R-CERM
0402-7

PP1V2_S3

PP1V2_S3

PP1V2_S3

A3
A4
A5
A6

A10

U3
U4
U5
U6

U10

A8
A9
D4
D5
D6
G5
H5
H6

H12

J5
J6
K5
K6

K12

L5
P4
P5
P6
U8
U9

F2
G2
H3
L2
M2

A11
C12

E8
E12
G12

H8

H9
H11

J9
J10

K8
K11
L12

N8
N12
R12
U11

LPDDR3-1600-32GB

VDD1

VDD2

VDDCA

VDDQ

U2600

EDFB232A1MA

FBGA

SYM 2 OF 2

OMIT_TABLE

CRITICAL

VSS

VSSCA

VSSQ

B2
B5
C5
E4
E5
F5
J12
K2
L6
M5
N4
N5
R4
R5
T2
T3
T4
T5
H2

C3
D3
F4
G3
G4
P3
M4
J4

B6
B12
C6
D12
E6
F6
F12
G6
G9
H10
K10
L9
M6
M12
N6
P12
R6
T6
T12

C

B

A

88 83 74 73 50 23 22 21 20 19

88 83 74 73 50 23 22 21 20 19

88 83 51 23 22 21 20

PP1V2_S3

PP1V2_S3

PP1V8_S3_MEM

1

C2620

1UF

20%
10V

2

X5R
0201

1

C2610

1UF

20%
10V

2

X5R
0201

1

C2630

1UF

20%
10V

2

X5R
0201

1

C2621

1UF

20%
10V

2

X5R
0201

1

C2611

1UF

20%
10V

2

X5R
0201

1

C2631

1UF

20%
10V

2

X5R
0201

1

C2622

1UF

20%
10V

2

X5R
0201

1

C2612

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2632

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2623

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2633

10UF

20%
10V

2

X5R-CERM
0402-7

1

C2624

10UF

20%
10V

2

X5R-CERM
0402-7

PLACEMENT_NOTE:

10uF caps are shared between DRAM.
Distribute evenly.

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DRAM

IV ALL RIGHTS RESERVED

LPDDR3 DRAM Channel B (32-63)

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

26 OF 500

SHEET

23 OF 98

6.0.0

pvt

SYNC_DATE=SYNC_MASTER=

SIZE

A

D

8

67

35 4

2

1

678

3 245

1

D

C

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

20 6

21 6

21 6

21

21 6

21 6

21 6

21 6

21 6

21 6

21 6

21 6

21 6

21 6

21 6

21 20 6

21 20 6

21 20 6

Intel recommends 68 Ohm for CMD/ADDR, 80 Ohm for CTRL/CKE, 38 Ohm for CLK

88 83 73 24 88 83 73 24

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

6

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

MEM_A_CAA<9>
MEM_A_CAA<8>
MEM_A_CAA<6>
MEM_A_CAA<7>
MEM_A_CAA<5>
MEM_A_CLK_P<0>
MEM_A_CLK_N<0>
MEM_A_CKE<1>
MEM_A_CKE<0>
MEM_A_CAA<4>
MEM_A_CAA<3>
MEM_A_CAA<2>
MEM_A_CAA<1>
MEM_A_CAA<0>
MEM_A_CAB<9>
MEM_A_CAB<8>
MEM_A_CAB<6>
MEM_A_CAB<7>
MEM_A_CAB<5>
MEM_A_CLK_P<1>
MEM_A_CLK_N<1>
MEM_A_CKE<2>
MEM_A_CKE<3>
MEM_A_CAB<4>
MEM_A_CAB<2>
MEM_A_CAB<3>
MEM_A_CAB<1>
MEM_A_CAB<0>
MEM_A_CS_L<0>
MEM_A_CS_L<1>
MEM_A_ODT<0>

R2700
R2701
R2702
R2703
R2704
R2705
R2706
R2707
R2708
R2709
R2710
R2711
R2712
R2713
R2714
R2715
R2716
R2717
R2718
R2719
R2720
R2721
R2722
R2723
R2724
R2725
R2726
R2727
R2728
R2729
R2730

68
68
68
68
68
39
39
82
82
68
68
68
68
68
68
68
68
68
68
39
39
82
82
68
68
68
68
68
82
82
82

PP0V6_S0_DDRVTT

21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21

1/20W MF2011%

1/20W1%

1% MF

1/20W 201 MF1%

1/20W 201 MF1%

1%

1/20W MF201
1/20W MF1%

1% 201 MF

1/20W

1% MF1/20W

201 MF1/20W1%

201 MF1/20W1%

201 MF1/20W1%

201 MF1/20W1%

201 MF1/20W1%
201 MF1/20W1%

2011/20W
201 MF1% 1/20W
201 MF1/20W1%

2011/20W1%
201 MF1/20W1%
2011/20W1%

2011/20W1%

201

201
201 MF1% 1/20W

MF2011/20W1%

MF2011/20W1%
MF2011/20W1%

MF2011/20W1%

MF2011/20W1%
MF2011/20W1%

MF2011/20W1%

MF201

MF2011/20W1%

MF

MF
MF2011/20W1%
MF

1

C2700

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2701

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2703

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2705

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2707

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2709

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2702

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2704

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2706

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2708

0.47UF

20%
4V

2

CERM-X5R-1
201

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

22 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 6

23 22 6

23 22 6

23 22 6

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

MEM_B_CAA<9>
MEM_B_CAA<8>
MEM_B_CAA<7>
MEM_B_CAA<6>
MEM_B_CAA<5>
MEM_B_CLK_P<0>
MEM_B_CLK_N<0>
MEM_B_CKE<1>
MEM_B_CKE<0>
MEM_B_CAA<4>
MEM_B_CAA<2>
MEM_B_CAA<3>
MEM_B_CAA<1>
MEM_B_CAA<0>
MEM_B_CAB<9>
MEM_B_CAB<8>
MEM_B_CAB<7>
MEM_B_CAB<6>
MEM_B_CAB<5>
MEM_B_CLK_N<1>
MEM_B_CLK_P<1>
MEM_B_CKE<2>
MEM_B_CKE<3>
MEM_B_CAB<4>
MEM_B_CAB<2>
MEM_B_CAB<3>
MEM_B_CAB<1>
MEM_B_CAB<0>
MEM_B_CS_L<0>
MEM_B_CS_L<1>
MEM_B_ODT<0>

R2740
R2741
R2742
R2743
R2744
R2745
R2746
R2747
R2748
R2749
R2750
R2751
R2752
R2753
R2754
R2755
R2756
R2757
R2758
R2759
R2760
R2761
R2762
R2763
R2764
R2765
R2766
R2767
R2768
R2769
R2770

68
68
68
68
68
39
39
82
82
68
68
68
68
68
68
68
68
68
68
39
39
82
82
68
68
68
68
68
82
82
82

PP0V6_S0_DDRVTT

21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21

1% 201 MF1/20W

201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%

201 MF1/20W1%

201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%
201 MF1/20W1%

D

MF2011/20W1%
MF2011/20W1%
MF2011/20W1%
MF2011/20W1%
MF2011/20W1%
MF2011/20W1%
MF2011/20W1%
MF2011/20W1%
MF2011/20W1%

MF1/20W 2011%
MF2011/20W1%
MF2011/20W1%

MF2011/20W1%

MF2011/20W1%
MF2011/20W1%

1

C2710

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2711

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2713

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2715

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2717

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2719

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2712

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2714

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2716

0.47UF

20%
4V

2

CERM-X5R-1
201

1

C2718

0.47UF

20%
4V

2

CERM-X5R-1
201

C

B

CRITICAL

1

C2720

20UF

20%

6.3V

2

CERM-X5R
0402

CRITICAL

1

C2740

20UF

20%

6.3V

2

CERM-X5R
0402

B

A

8

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

A

LPDDR3 DRAM Termination

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DRAM

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

27 OF 500

SHEET

24 OF 98

1

SIZE

D

678

3 245

1

D

C

B

A

1

R2890

3.3K

5%
1/20W
MF
201

2

TBT_X_SPI_CLK

27

TBT_X_SPI_CS_L

27

TBT_X_ROM_WP_L

25

TBT_X_ROM_HOLD_L

4

4

4

4

4

4

4

4

4

BI

4

BI

4

4

4

4

4

4

4

4

4

BI

4

BI

100K

10K

NOSTUFF

100K

100K

100K

100K

100K

100K

DP_X_SNK0_ML_C_P<0>

IN

DP_X_SNK0_ML_C_N<0>

IN

DP_X_SNK0_ML_C_P<1>

IN

DP_X_SNK0_ML_C_N<1>

IN

DP_X_SNK0_ML_C_P<2>

IN

DP_X_SNK0_ML_C_N<2>

IN

DP_X_SNK0_ML_C_P<3>

IN

DP_X_SNK0_ML_C_N<3>

IN

DP_X_SNK0_AUXCH_C_P

DP_X_SNK0_AUXCH_C_N

DP_X_SNK1_ML_C_P<0>

IN

DP_X_SNK1_ML_C_N<0>

IN

DP_X_SNK1_ML_C_P<1>

IN

DP_X_SNK1_ML_C_N<1>

IN

DP_X_SNK1_ML_C_P<2>

IN

DP_X_SNK1_ML_C_N<2>

IN

DP_X_SNK1_ML_C_P<3>

IN

DP_X_SNK1_ML_C_N<3>

IN

DP_X_SNK1_AUXCH_C_P

DP_X_SNK1_AUXCH_C_N

21

21

PU for NVM

21

5% 1/20W MF 201

21

5% MF1/20W 201

21

21

21

21

R2891

R2864

MF

R2839

MF1/20W

R2863
R2873
R2862

MF1/20W5% 201

R2872

1/20W5% MF

R2860

1/20W5% MF

R2861

1/20W

MF5% 201

1

3.3K

5%

1/20W

MF

201

1

2

R2893

3.3K

5%
1/20W
MF
201

2

6

CLK

1

CS*

3

WP*(IO2)

7

HOLD*(IO3)

PP3V3_TBT_X_SX

2011/20W5%

2015%

TBT_X_BATLOW_L

TBT_X_TMU_CLK_IN

TBT_X_TMU_CLK_OUT

DP_XA_HPD

201

201

DP_XB_HPD

TBT_XA_USB2_MXCTL

TBT_XB_USB2_MXCTL

PP3V3_UPC_XB_LDO

5%

1/20W

MF

201

1

2

R2892

3.3K

8

VCC

U2890

8MBIT-3.0V

W25Q80DVUXIE

USON

DI(IO0)
DO(IO1)

5
2

OMIT_TABLE

CRITICAL

GND EPAD

9

4

SNK0 AC Coupling

C2820

0.22UF

C2821

0.22UF

C2822

0.22UF

C2823

0.22UF

C2824

0.22UF

C2825

0.22UF

C2826

0.22UF

C2827

0.22UF

C2828

0.22UF

C2829

0.22UF

21
X5R

21
20% 6.3V 0201

X5R
21
X5R

21
X5R
21

20% 02016.3V
X5R

21
X5R
21

20% 6.3V 0201
X5R

21
20% 6.3V 0201

X5R

21
X5R

21
X5R

DP_X_SNK0_ML_P<0>

6.3V 020120%

DP_X_SNK0_ML_N<0>

DP_X_SNK0_ML_P<1>

DP_X_SNK0_ML_N<1>

6.3V

DP_X_SNK0_ML_P<2>

DP_X_SNK0_ML_N<2>

DP_X_SNK0_ML_P<3>

DP_X_SNK0_ML_N<3>

DP_X_SNK0_AUXCH_P

DP_X_SNK0_AUXCH_N

SNK1 AC Coupling

C2830

0.22UF

C2831

0.22UF

C2832

0.22UF

C2833

0.22UF

C2834

0.22UF

C2835

0.22UF

C2836

0.22UF

C2837

0.22UF

C2838

0.22UF

C2839

0.22UF

21
20%

X5R
21
20%

X5R
21

20%
X5R

21
X5R
21
X5R

21
20%

X5R
21
X5R

21
X5R

21
X5R

21
X5R

25

25

25

25

25

DP_X_SNK1_ML_P<0>

6.3V 0201

DP_X_SNK1_ML_N<0>

DP_X_SNK1_ML_P<1>

DP_X_SNK1_ML_N<1>

6.3V 020120%

DP_X_SNK1_ML_P<2>

6.3V

DP_X_SNK1_ML_N<2>

DP_X_SNK1_ML_P<3>

6.3V20%

DP_X_SNK1_ML_N<3>

6.3V 020120%

DP_X_SNK1_AUXCH_P

6.3V 020120%

DP_X_SNK1_AUXCH_N

6.3V 020120%

74 29 28 26 25

28 25

29 25

1

C2890

1UF

10%

6.3V

2

CERM
402

TBT_X_SPI_MOSI
TBT_X_SPI_MISO

02016.3V20%

020120%

02016.3V20%

02016.3V20%

02016.3V20%

02016.3V

02016.3V

020120%

02016.3V

0201

29 27 25

V23
V22

P23
P22

K23
K22

F23
F22

T4

N16Y6

AB21
AC21

AC19
AB19

AB17
AC17

AC15
AB15

N4
N5

R5

W1
W2

W4
Y1
Y2
AA1
W6

V2
V1
V5
V4
U2
U1
T5

E5

D22
D23

Y18
W16
W18
Y16

B7
A7

A9
B9

A11
B11

A13
B13

L4
L5

E19
D19

T1

M5

R1
F19

B23

AB23

D5

H5

J9
J11

V8

PCIE_TBT_X_D2R_C_P<0>
PCIE_TBT_X_D2R_C_N<0>

PCIE_TBT_X_D2R_C_P<1>
PCIE_TBT_X_D2R_C_N<1>

PCIE_TBT_X_D2R_C_P<2>
PCIE_TBT_X_D2R_C_N<2>

PCIE_TBT_X_D2R_C_P<3>
PCIE_TBT_X_D2R_C_N<3>

TBT_X_PCI_RESET_L
TBT_X_PCIE_BIAS

NC_DP_X_SRC_ML_P<0>
NC_DP_X_SRC_ML_N<0>

NC_DP_X_SRC_ML_P<1>
NC_DP_X_SRC_ML_N<1>

NC_DP_X_SRC_ML_P<2>
NC_DP_X_SRC_ML_N<2>

NC_DP_X_SRC_ML_P<3>
NC_DP_X_SRC_ML_N<3>

NC_DP_X_SRC_AUX_P
NC_DP_X_SRC_AUX_N

DP_X_SRC_HPD

TBT_X_HDMI_DDC_DATA
TBT_X_HDMI_DDC_CLK

TBT_X_ROM_WP_L

TBT_X_TMU_CLK_OUT
TBT_WAKE_3V3_L
TBT_X_PLUG_EVENT_L

TBT_X_TMU_CLK_IN

I2C_TBT_X_SCL

I2C_TBT_X_SDA

TBT_X_USB_PWR_EN

TBT_X_CIO_PWR_EN
TBT_X_BATLOW_L

PM_SLP_S3_L

TBT_X_RTD3_PWR_EN

USBC_X_RESET_L

TBT_X_XTAL25M_IN

TBT_X_XTAL25M_OUT

UPC_X_SPI_MOSI
UPC_X_SPI_MISO
UPC_X_SPI_CS_L
UPC_X_SPI_CLK

USBC_XB_D2R_P<2>

USBC_XB_D2R_N<2>
USBC_XB_R2D_CR_P<2>

USBC_XB_R2D_CR_N<2>

USBC_XB_R2D_CR_P<1>
USBC_XB_R2D_CR_N<1>

USBC_XB_D2R_P<1>
USBC_XB_D2R_N<1>

USBC_XB_AUXLSX1

USBC_XB_AUXLSX2

NC
NC

DP_XB_HPD

I2C_TBT_XB_INT_L

TBT_XB_USB2_MXCTL
TBT_XB_USB2_RBIAS

NC

NC

NC

NC
NC

TBTTHMSNS_D1_P

USE NEAREST GND BALL

(V9) FOR THERM_D_N

27

27

27

27

IN

PLACE_NEAR=U2800.F19:2MM

1

R2853

200

1%
1/20W
MF
201

2

To SPI Flash

BI
BI

29 25

25

53

OUT

BOM_COST_GROUP=TBT

27

OUT

27

OUT

27

OUT

27

OUT

D

27

OUT

27

OUT

27

OUT

27

OUT

PLACE_NEAR=U2800.N16:2MM

25

18 15

R2851

3.01K

1%

1/20W

MF

201

27

27

1

R2834

2

89 83 15 13 12

2.2K

5%
1/20W
MF
201

BI

27

15

29 28 12

PU at PCH

29 28 12

29

27

27

30

30

30

30

30

30

30

30

PP3V3_TBT_X_SX

NOSTUFF

1

R2837

2.2K

5%
1/20W
MF
201

2

IN

PAGE TITLE

21

29 27

29

PP3V3_UPC_XB_LDO

29 27 25

C

PP3V3_TBT_X_SX

1

R2835

2.2K

5%
1/20W
MF
201

2

28 27

BI

29 28 27

1

R2810

100K

5%
1/20W
MF
201

2

74 29 28 26 25

B

74 29 28 26 25

A

SYNC_DATE=SYNC_MASTER=

IN

27

OUT
OUT

25

25

OUT
OUT

IN
IN

25

IN

IN

IN

OUT

IN
IN

OUT
OUT

OUT
OUT

IN
IN

84 29

84 29

USB-C HIGH SPEED 1

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

28 OF 500

SHEET

25 OF 98

27

27

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

25

14

OUT

74 29 28 26 25

PLACE_NEAR=U2800.H19:2MM

TBT_X_CLKREQ_L

R2854

1/20W

PLACE_NEAR=U2800.J5:2MM
PLACE_NEAR=U2800.J6:2MM

4

R2830

4

R2831

1

R2825

100

5%
1/20W
MF
201

2

PP3V3_TBT_X_SX

R2836

28 27

TBT_XA_USB2_RBIAS

1

200

1%
MF

201

2

TF

R2828

1/20W

201

OUT

1

100K

5%

1/20W

MF

201

2

OUT

1

100K

5%

1/20W

MF

201

2

NOSTUFF

1

2.2K

5%

1/20W

MF

201

2

IN

1/20W

R2855

1K

21
5%
MF

1

R2829

100

5%
1/20W
MF
201

2

21

4.75K

0.5%
0201

27

27

27

27

27

27

27

27

84 14

84 14

12

12

12

12

30

30

30

30

30

30

30

84 28

84 28

28 25

PCIE_TBT_X_R2D_P<0>

IN

PCIE_TBT_X_R2D_N<0>

IN

PCIE_TBT_X_R2D_P<1>

IN

PCIE_TBT_X_R2D_N<1>

IN

PCIE_TBT_X_R2D_P<2>

IN

PCIE_TBT_X_R2D_N<2>

IN

PCIE_TBT_X_R2D_P<3>

IN

PCIE_TBT_X_R2D_N<3>

IN

PCIE_CLK100M_TBT_X_P

IN

PCIE_CLK100M_TBT_X_N

IN

TBT_X_CLKREQ_R_L

DP_X_SNK0_ML_P<0>

25

DP_X_SNK0_ML_N<0>

25

DP_X_SNK0_ML_P<1>

25

DP_X_SNK0_ML_N<1>

25

DP_X_SNK0_ML_P<2>

25

DP_X_SNK0_ML_N<2>

25

DP_X_SNK0_ML_P<3>

25

DP_X_SNK0_ML_N<3>

25

DP_X_SNK0_AUXCH_P

25

DP_X_SNK0_AUXCH_N

25

DP_X_SNK0_HPD
DP_X_SNK1_ML_P<0>

25

DP_X_SNK1_ML_N<0>

25

DP_X_SNK1_ML_P<1>

25

DP_X_SNK1_ML_N<1>

25

DP_X_SNK1_ML_P<2>

25

DP_X_SNK1_ML_N<2>

25

DP_X_SNK1_ML_P<3>

25

DP_X_SNK1_ML_N<3>

25

DP_X_SNK1_AUXCH_P

25

DP_X_SNK1_AUXCH_N

25

DP_X_SNK1_HPD

JTAG_ISP_TDI

IN

JTAG_TBT_X_TMS

IN

JTAG_ISP_TCK

IN

OUT

JTAG_ISP_TDO
TBT_X_TEST_EN

TBT_X_TEST_PWR_GOOD

USBC_XA_D2R_P<2>

IN

USBC_XA_D2R_N<2>

IN

USBC_XA_R2D_CR_P<2>

OUT

USBC_XA_R2D_CR_N<2>

OUT

USBC_XA_R2D_CR_P<1>

OUT
OUT

BI
BI

USBC_XA_R2D_CR_N<1>

USBC_XA_D2R_P<1>

IN

USBC_XA_D2R_N<1>

IN

USBC_XA_AUXLSX1
USBC_XA_AUXLSX2

DP_XA_HPD

IN

I2C_TBT_XA_INT_L

TBT_XA_USB2_MXCTL

25

TBT_X_RBIAS
TBT_X_RSENSE

NC
NC
NC
NC

NC
NC

Y23
Y22

T23
T22

M23
M22

H23
H22

V19
T19

AC7
AB7

AB9
AC9

AC11
AB11

AB13
AC13

N1
N2

AA2

A5
B5

B3
A3

C2
C1

E2
E1

P1
P2

Y4

AC5
AB5
AC3
AB3

W20
Y20
W19
Y19

R4
W5

A15
B15

A17
B17

A19
B19

B21
A21

H4
J4

E20
D20

T2

M4

R2

H19

J6
J5

A23

A1

AC23

AC1

D4

L8

PCIE_RX0_P
PCIE_RX0_N

PCIE_RX1_P
PCIE_RX1_N

PCIE_RX2_P
PCIE_RX2_N

PCIE_RX3_P
PCIE_RX3_N

PCIE_REFCLK_100_IN_P
PCIE_REFCLK_100_IN_N
PCIE_CLKREQ*

DPSNK1_ML0_P
DPSNK1_ML0_N

DPSNK1_ML1_P
DPSNK1_ML1_N

DPSNK1_ML2_P
DPSNK1_ML2_N

DPSNK1_ML3_P
DPSNK1_ML3_N

DPSNK1_AUX_P
DPSNK1_AUX_N

SNK1_HPD

DPSNK2_ML0_P
DPSNK2_ML0_N

DPSNK2_ML1_P
DPSNK2_ML1_N

DPSNK2_ML2_P
DPSNK2_ML2_N

DPSNK2_ML3_P
DPSNK2_ML3_N

DPSNK2_AUX_P
DPSNK2_AUX_N

SNK2_HPD

U0_SSTXP1
U0_SSTXN1
U0_SSRXP1
U0_SSRXN1

TDI
TMS
TCK
TDO

TEST_EN
TEST_PWR_GOOD

ASSRXP2
ASSRXN2

ASSTXP2
ASSTXN2

ASSTXP1
ASSTXN1

ASSRXP1
ASSRXN1

ASBU1
ASBU2

PA_USB2_D_P
PA_USB2_D_N

PA_HPD

PA_I2C_INT

PA_USB2_MXCTL
PA_USB2_RBIAS

RBIAS
RSENSE

PA_MONDC

PB_MONDC

PC_MONDC

USB_MONDC

TEST_EDM

FUSE_VQPS_64

U2800

TITAN-RIDGE-DP

CSP

SYM 1 OF 2

OMIT_TABLE

CRITICAL

PCIE GEN3

SINK PORT 1SINK PORT 2

USBSSJTAG

TBT PORT A

DEBUG

SOURCE PORT

LC GPIOPOC GPIOFLASH

TBT PORT B

PCIE_TX0_P
PCIE_TX0_N

PCIE_TX1_P
PCIE_TX1_N

PCIE_TX2_P
PCIE_TX2_N

PCIE_TX3_P
PCIE_TX3_N

PERST*

PCIE_RBIAS

DPSRC_ML0_P
DPSRC_ML0_N

DPSRC_ML1_P
DPSRC_ML1_N

DPSRC_ML2_P
DPSRC_ML2_N

DPSRC_ML3_P
DPSRC_ML3_N

DPSRC_AUX_P
DPSRC_AUX_N

DPSRC_HPD

GPIO_0
GPIO_1

EE_WP*

TMU_CLKOUT

WAKE*

CIO_PLUG_EVENT*

TMU_CLKIN

I2C_SCL
I2C_SDA

USB_FORCE_PWR

FORCE_PWR

BATLOW*
SLP_S3*

RTD3_PWR_EN

RESET*

XTAL_25_IN

XTAL_25_OUT

EE_DI

EE_DO
EE_CS*
EE_CLK

BSSRXp2
BSSRXn2

BSSTXp2
BSSTXn2

BSSTXp1
BSSTXn1

BSSRXp1
BSSRXn1

BSBU1
BSBU2

PB_USB2_D_P
PB_USB2_D_N

PB_HPD

PB_I2C_INT
PB_USB2_MXCTL
PB_USB2_RBIAS

USB2_ATEST

PCIE_ATEST

MONDC_SVR

VGA_RES

ATEST_P
ATEST_N

THERMDA

8

67

35 4

2

1

678

3 245

1

D

C

B

A

88 26

PP0V9_TBT_X_SVR

1

C2930

4UF

20%

6.3V

2

CER-X5R
0201

1

2

1

C2931

4UF

20%

6.3V
CER-X5R
0201

SOURCED BY INTERNAL SWITCH

1

2

C2932

4UF

20%

6.3V

2

CER-X5R

1

C2968

10UF

20%

6.3V

2

CERM-X5R
0402-4

C2984

1.0UF

20%

6.3V
X5R
0201-1

1

C2934

4UF

20%

6.3V

2

CER-X5R

1

C2964

1.0UF

20%

6.3V

2

X5R
0201-1

1

C2985

1.0UF

20%

6.3V

2

X5R
0201-1

SOURCED BY INTERNAL SWITCH

1

C2936

2

1

C2965

1.0UF

20%

6.3V

2

X5R
0201-1

SOURCED BY INTERNAL SWITCH

4UF

20%

6.3V
CER-X5R
0201

1

C2966

1.0UF

20%

6.3V

2

X5R
0201-1

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=3.3V

1

C2920

1.0UF

20%

6.3V

2

X5R
0201-1

1

2

SOURCED BY INTERNAL SWITCH

C2935

2.2UF

20%

6.3V
CER-X5R
02010201

1

C2967

2

1.0UF

20%

6.3V
X5R
0201-1

1

C2933

2.2UF

20%

6.3V

2

CER-X5R
02010201

PP0V9_TBT_X_PCIE

MIN_LINE_WIDTH=0.2000

MIN_NECK_WIDTH=0.1000
VOLTAGE=0.9V

MIN_LINE_WIDTH=0.2000

MIN_NECK_WIDTH=0.1000

VOLTAGE=3.3V

PP3V3_TBT_X_ANA
PP3V3_TBT_X_ANA_PCIE
PP3V3_TBT_X_ANA_USB2

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=3.3V

1

C2921

1.0UF

20%

6.3V

2

X5R
0201-1

SOURCED BY
INTERNAL SWITCH

H11

H9
H12
H13
H15
H16

T12
T13
T15

N6

T11

T9

E8

J18

L19
M19

L18
M18
M16

E16
L16
H18

W11
Y11

Y5
W12
Y12

Y8
AB4
AC4
C23
C22
W13
AB2

D6
W15
Y15

A4

B4

F2

D2

F1

D1

B1

B2
E18
V11
V12
V13

M6
N19
N18
E12
E13
F11
F12
F13
F15
J16

A2

F8

A6

A8

B8
AB8

AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC6
AC8
B10

AC10
AC12
AC14
AC16
AC18
AC20
AC22

B12

B14
B16
B18
B20
B22

D8

D9
A10
D11
D12

VCC0P9_SVR_PAB_ANA

VCC0P9_SVR_PC_ANA

VCC0P9_SVR_DPAUX_ANA

VCC0P9_SVR_USB_ANA

VCC0P9_SVR_BRD_SENSE

VCC0P9_PCIE

VCC0P9_ANA_PCIE_1

VCC0P9_ANA_PCIE_2

VCC3P3_ANA
VCC3P3_ANA_PCIE
VCC3P3_ANA_USB2

VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA

VSS

N15

VSS

L15

V18

VSS

VSS

F4

VSS

R9

U2800

TITAN-RIDGE-DP

CSP

SYM 2 OF 2

OMIT_TABLE

CRITICAL

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

M9

L9

R12

L12

M15

R15

VSS

M1

VCC3P3_SVR

VCC0P9_SVR

VCC0P9_LVR_SENSE

VSS

VSS

VSS

VSS

V16

M12

N9

N12

M2

VCC3P3_LC

VCC3P3_SX

VCC3P3_S0

VCC3P3A

SVR_IND

SVR_VSS

VCC0P9_LC

VCC0P9_LVR

VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA

VSS

VSS

VSS

T6

T18

V6

F18
R6

L6

E6

G1
G2
H2

R8
R11
L11
M8
M13
R16
R13
J13
L13
N8
N11
N13
T8
T16
M11

L1
L2
K1
K2

J1
J2
H1

J8
H8
H6

D13

D15
D16
D18
E9
E11
E15
A12
E22
E23
F9
F20
F16
G22
G23
A14
H20
J19
J20
J22
A16
J23
L20
L22
L23
A18
M20
N20
N22
N23
R18
A20
R19
R20
R22
R23
T20
U23
U22
A22
V9
V15
V20
W8
B6
W9
W22
W23
Y9
Y13
AA22
AA23
AB6
E4
J15
AB1
AC2
F5
F6
J12

PP3V3_TBT_X_LC
PP3V3_TBT_X_SX

1

C2991

1.0UF

20%

6.3V

2

X5R
0201-1

1

C2975

10UF

20%

6.3V

2

CERM-X5R
0402-4

BYPASS=U2800.G1:J1:10MM

PP0V9_TBT_X_SVR

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0.9V

0.68UH-20%-6.1A-0.020OHM

VR0V9_IND_TBT_X

SWITCH_NODE=TRUE
DIDT=TRUE

PP0V9_TBT_X_LC

PP0V9_TBT_X_LVR

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0.9V

Add XW or alias on
support page

XW

XW2900

SM

PLACE_NEAR=U2800.V9:6MM

NO_XNET_CONNECTION=1

1

C2976

10UF

20%

6.3V

2

CERM-X5R
0402-4

C2992

1.0UF

20%

6.3V
X5R

27

21

VOLTAGE=3.449
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C2977

10UF

20%

6.3V

2

CERM-X5R
0402-4

CRITICAL

L2950

21

1210

SOURCED BY

1

2

C2993

TBTTHMSNS_D1_N

INTERNAL SWITCH

1.0UF

20%

6.3V
X5R

0201-1

SOURCED BY

74 29 28 25

FROM USB-C PORT
CONTROLLER (UPC)

1

C2981

1.0UF

20%

C2990

1.0UF

20%

6.3V
X5R

0201-1

1

2

C2994

47UF

20%

6.3V

CER-X5R

0603

1

C2995

2

47UF

20%

6.3V

CER-X5R

0603

1

2

6.3V

2

X5R
0201-1

PP3V3_TBT_X_S0

1

C2978

10UF

20%

6.3V

2

CERM-X5R
0402-4

1

C2917

12PF

5%
25V

2

NP0-C0G
0201

1

C2950

10UF

20%
25V

2

X5R-CERM
0603

20%

6.3V

1

2

C2955

10UF

20%

6.3V

CERM-X5R

0402-40201-1

2x 10uF outside BGA area

1

C2954

10UF

2

CERM-X5R

0402-4

1

C2910

4UF

20%

6.3V

2

CER-X5R
0201

1

C2951

47UF

20%

6.3V

2

CER-X5R
0603

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0.945

1

2

1

C2911

4UF

20%

6.3V

2

CER-X5R
0201 0201

1

C2952

47UF

20%

6.3V

2

CER-X5R
0603

1

2

20%

6.3V
X5R
0201-1

1

C2913

4UF

20%

6.3V

2

CER-X5R
0201

C2912

4UF

20%

6.3V
CER-X5R

INTERNAL SWITCHING VR OUTPUT

1

C2982

1.0UF

2

P0V9_TBT_X_SVR_AGND

MIN_LINE_WIDTH=0.0910
MIN_NECK_WIDTH=0.0910
VOLTAGE=0V

53

OUT

PAGE TITLE

1

C2914

4UF

20%

6.3V

2

CER-X5R
0201

(SEE INTEL LAYOUT GUIDELINES)

1

C2983

1.0UF

20%

6.3V

2

X5R
0201-1

88 51 27

1

C2915

4UF

20%

6.3V

2

CER-X5R
0201

ISOLATE GND OF SVR_IND CAPS

AND GND OF VCC3P3_SVR CAPS

FROM SYSTEM GND IN LAYOUT

1

C2980

1.0UF

20%

6.3V

2

X5R
0201-1

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=3.3V

1

C2916

4UF

20%

6.3V

2

CER-X5R
0201

INTERNAL SWITCH

88 26

D

C

B

A

SYNC_DATE=SYNC_MASTER=

USB-C HIGH SPEED 2

SIZE

D

BOM_COST_GROUP=TBT

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

29 OF 500

SHEET

26 OF 98

8

67

35 4

2

1

678

3 245

1

D

70 62 43 42 40 37

83 72

87 83 30 28

PP1V8_AWAKE

PP20V_USBC_XA_VBUS

<rdar://25149752>

NOSTUFF

Ridge 0.9V SVR XW

P0V9_TBT_X_SVR_AGND

26

DP SRC OPTIONS

DP_X_SRC_HPD

25

USB VBUS Detect

R3081

0

21

0201MF 1/20W5%

R3080

30K

21

5%

1/20W

MF

201

XW3001

NO_XNET_CONNECTION=1

R3040

100K

1/20W

5%
MF

201

21

SOC_USB_VBUS

I1023

K

D3001

BZT52C3V0LP-COMBO

DFN1006

A

NOSTUFF

SHORT-L6-SM

21

DEBUG PATHS

PCH USB3 (DCI)

14

OUT

83 34

14

14

14

OUT

IN

IN

USB3_BSSB_D2R_P

USB3_BSSB_D2R_N

USB3_BSSB_R2D_C_P

USB3_BSSB_R2D_C_N

H9M

89 28

89 28

OUT

BI

SWD_SOC_DEBUG_SWCLK

SWD_SOC_DEBUG_SWDIO

PCH UART 2

83 12

83 12

IN

OUT

PCH_UART_DEBUG_R2D

PCH_UART_DEBUG_D2R

R3012
R3013

C3010
C3011

PLACE_NEAR=U3100.G16:5MM

R3014

R3015

PLACE_NEAR=U3100.F15:5MM

PLACE_NEAR=U3100.D15:5MM

R3016
R3017

0

21

0

21

0.1UF

21

0.1UF

21

1/20W

5%

10% 0201

10% X5R-CERM 020116V

0

0

21

0

21

PCH_UART_DEBUG_R_R2D

5% 1/20W MF 0201

0

21

PCH_UART_DEBUG_R_D2R

PLACE_NEAR=U3100.D19:5MM

XB UPC DBG [3:0]

USB3_BSSB_D2R_R_P

0201MF5%

USB3_BSSB_D2R_R_N

0201MF1/20W

USB3_BSSB_R2D_P

X5R-CERM16V

USB3_BSSB_R2D_N

XB UPC DBG [5:4]

21

SWD_SOC_SWCLK_XB

1/20W 02015% MF

SWD_SOC_SWDIO_XB

5% 0201

MF1/20W

XA UPC DBG [7:6]

1/20W5% 0201

MF

OUT

IN

IN

IN

OUT

OUT

IN

BI

28

28

PP3V3_TBT_X_S0

83 29

83 29

83 29

83 29

83 29

83 29

83 47 35 29

83 47 35 29

FOR LAYOUT PURPOSES: DIRECTLY CONNECT TO XB
THEN BRANCH OFF TO XA AND ARKANOID CONNECTOR

PLACE_NEAR=U3200.B7:7MM

I2C_UPC_SDA

I2C_UPC_SCL

PLACE_NEAR=U3200.A6:7MM

X ACE-SMC I2C SERIES R'S

RIDGE PULL UP/DOWN

88 51 26

R3043

R3044

R3045
R3046

100K

100K

21

TBT_X_HDMI_DDC_CLK

21

TBT_X_HDMI_DDC_DATA

1/20W

0

21

0

21

MF

CKPLUS_WAIVE=I2C_PULLUP

I2C_UPC_X_SDA2

5% 1/20W

CKPLUS_WAIVE=I2C_PULLUP

I2C_UPC_X_SCL2

1/20W MF5%

R3094

USBC_AARDVARKANOID

R3086

2011/20W5%

25

R3087
R3088

201MF5%

25

ROM

TBT_X_SPI_CLK
TBT_X_SPI_CS_L
TBT_X_SPI_MOSI
TBT_X_SPI_MISO

0201MF

0201

25

OUT

25

OUT

25

OUT

25

28 27

28 27

R3089

R3095
R3096
R3097
R3098

R3090
R3091
R3092
R3093

USBC_ARKANOID

100

15
15

15

15

21

15

21

15

21

15

21

15

21

15

21

15

21

15

21

ARKANOID

21

TBT_X_SPI_ARK_CLK

201MF5% 1/20W

AARDVARKANOID

21

TBT_X_SPI_DBG_CLK

21

TBT_X_SPI_DBG_CS_L

21

TBT_X_SPI_DBG_MOSI

21

TBT_X_SPI_DBG_MISO

MF 2011/20W5%

MF1/20W 2015%

201MF5%151/20W

2015% MF1/20W

XB ACE

UPC_XB_SPI_CLK

5%

201MF1/20W

UPC_XB_SPI_CS_L

1/20W5% 201

MF

UPC_XB_SPI_MOSI

1/20W5%

MF 201

UPC_XB_SPI_MISO

1/20W

MF 2015%

TR

UPC_X_SPI_CLK

1/20W5%

UPC_X_SPI_CS_L

1/20W5% 201MF

UPC_X_SPI_MOSI
UPC_X_SPI_MISO

201MF

201MF1/20W5%

201MF1/20W5%

27

OUTIN

OUT

IN

IN

IN

IN

IN

IN

27

27

27

27

29

29

29

29

25

25

25

25

USBC_AARDVARKANOID

USBC_AARDVARKANOID

USBC_AARDVARKANOID

D

USB2 OC

R3047

C

B

74 72 71 70 64
42 40 34 29 28
63 60 47 44 43

89 86 83 81

25

25

IN

OUT

TBT_X_XTAL25M_OUT

TBT_X_XTAL25M_IN

PP1V8_SLPS2R

TBT_WAKE_L

SMC HAS IPU

RIDGE TBT X ARKANOID CONN

SIGNALS CAN BE CONNECTED AT ICT TP

TR XTAL

CRITICAL

Y3000

25MHZ-25PPM-20PF-50OHM

2.00X1.60-SM

1

G

2

S

3

D

Q3001

DMN2250UFB

DFN1006-3

NOTE:J3001 IS DELETED DUE

TO SPACE LIMITATION.

42

PP3V3_G3H_RTC

21

R3065

100K

1/20W
5%

TBT_WAKE_3V3_L

0

21

UPC_XA_FAULT_L_R

MF1/20W5% 0201

28

Ridge PCIE Caps

C

ACE2 PULL DOWNS

UPC_XA_FAULT_L

4

R3048

0

21

UPC_XB_FAULT_L

1

C3002

20PF

31

5%
25V

2

C0G
0201

0201
C0G

2

25V
5%

20PF

1

C3003

R3039
R3038
R3037
R3036
R3035
R3034
R3033

89 86

72 71 63
50 29 28
61 57 54
83 76 74

R3032
R3031
R3030

MF201

R3029
R3028

25 35

INOUT

R3027
R3026
R3025
R3024
R3023
R3022
R3021
R3020

100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K

0
0
0
0

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

1/20W5% MF 201

1/20W MF 201

5%

5% 1/20W 201MF

1/20W

5% MF1/20W

5% 1/20W MF 201

5% 1/20W MF 201

5% 1/20W 201

5% 1/20W MF 201

5% 1/20W MF

1/20W

5% MF 2011/20W

1/20W5% MF 201

5%

NOSTUFF
NOSTUFF

MF5% 201

201MF1/20W5%

201

MF

201

2015% MF

201MF1/20W

201MF1/20W5%

02011/20W MF5%

02011/20W MF5%

0201MF1/20W5%

0201MF1/20W5%

PD_UPC_XA_GPIO4
PD_UPC_XB_GPIO1
PD_UPC_XB_GPIO4
PD_UPC_XB_GPIO9
PD_UPC_XB_GPIO10
PD_UPC_X_5V_EN
SPARE_UPC_XA_USB3_RN
SPARE_UPC_XA_USB3_RP
SPARE_UPC_XB_USB3_RN
SPARE_UPC_XB_USB3_RP
SPARE_UPC_XB_USB2_RN
SPARE_UPC_XB_USB2_RP
SPARE_UPC_XA_DBG0_R
SPARE_UPC_XA_DBG1_R
SPARE_UPC_XA_DBG2_R
SPARE_UPC_XA_DBG3_R
UPC_XA_VDDIO_CFG
UPC_XB_VDDIO_CFG
UPC_XA_RESET
UPC_XB_RESET

28

29

29

29

29

29 28

28

28

29

29

29

29

28

28

28

28

28

29

28

29

4

UPC_XB_FAULT_L_R

02015% MF1/20W

29

25

25

25

25

25

25

25

25

14

14

14

14

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

PCIE_TBT_X_D2R_C_P<0>

0201 X5R 20%

6.3V

PCIE_TBT_X_D2R_C_N<0>

0201 X5R 6.3V 20%

PCIE_TBT_X_D2R_C_P<1>

0201 X5R 6.3V 20%

PCIE_TBT_X_D2R_C_N<1>

0201 X5R 6.3V 20%

PCIE_TBT_X_D2R_C_P<2>

0201 X5R 6.3V 20%

PCIE_TBT_X_D2R_C_N<2>

X5R0201 6.3V 20%

PCIE_TBT_X_D2R_C_P<3>

0201 X5R 6.3V

PCIE_TBT_X_D2R_C_N<3>

0201 6.3VX5R

PCIE_TBT_X_R2D_C_P<0>

0201 X5R 6.3V 20%

PCIE_TBT_X_R2D_C_N<0>

0201 X5R 6.3V 20%

PCIE_TBT_X_R2D_C_P<1>

0201 X5R 6.3V 20%

PCIE_TBT_X_R2D_C_N<1>

0201 X5R 6.3V 20%

D2R

2 1

2 1

2 1

2 1

2 1

2 1

2 1

20%

2 1

20%

R2D

2 1

2 1

2 1

2 1

C3050

0.22UF

C3051

0.22UF

C3052

0.22UF

C3053

0.22UF

C3054

0.22UF

C3055

0.22UF

C3056

0.22UF

C3057

0.22UF

C3040

0.22UF

C3041

0.22UF

C3042

0.22UF

C3043

0.22UF

PCIE_TBT_X_D2R_P<0>

PCIE_TBT_X_D2R_N<0>

PCIE_TBT_X_D2R_P<1>

PCIE_TBT_X_D2R_N<1>

PCIE_TBT_X_D2R_P<2>

PCIE_TBT_X_D2R_N<2>

PCIE_TBT_X_D2R_P<3>

PCIE_TBT_X_D2R_N<3>

PCIE_TBT_X_R2D_P<0>

PCIE_TBT_X_R2D_N<0>

PCIE_TBT_X_R2D_P<1>

PCIE_TBT_X_R2D_N<1>

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

14

14

14

14

14

14

14

14

B

25

25

25

25

A

29 25

28 27

28 27

47 35 29 28

27

29 28

ACE2 ARKANOID DEBUG CONN

I2C_TBT_XB_INT_L
I2C_UPC_X_SCL2
I2C_UPC_X_SDA2
UPC_I2C_INT_L
TBT_X_SPI_ARK_CLK
UPC_XA_UART_TX

USBC_ARKANOID

J3000

505070-1222

M-ST-SM

1413

21
43
65
87
109
1211

15

16

I2C_TBT_XA_INT_L
I2C_TBT_X_SDA
I2C_TBT_X_SCL
UPC_XA_SER_DBG
UPC_XB_SER_DBG
UPC_XA_UART_RX

14

14

14

IN

IN

IN

PCIE_TBT_X_R2D_C_P<2>

6.3V0201 X5R 20%

PCIE_TBT_X_R2D_C_N<2>

0201 X5R 6.3V 20%

PCIE_TBT_X_R2D_C_P<3>

0201 X5R 6.3V 20%

2 1

2 1

2 1

FUSES FOR UPC

AARDVARKANOID CONN

F3000

14

IN

PCIE_TBT_X_R2D_C_N<3>

0201 X5R 6.3V 20%

6A-32V

NO 3D BODY PART USED PER <RDAR://48050692>

PPDCIN_G3H

10%
35V

0201

10%
35V

0201

1

2

1

2

0603-1

F3001

6A-32V

0603-1

OMIT_TABLE

J3002

505070-1222

28 25

29 28 27 25

29 28 27 25

84 28

84 29

29 28

29 25

29

29

27

29 28 27 25

29 28 27 25

PP3V3_UPC_XB_LDO

UPC_XB_SWD_DATA
UPC_XB_SWD_CLK
TBT_X_SPI_DBG_MISO
I2C_TBT_X_SDA
I2C_TBT_X_SCL

15

SM

1413

21
43
65
87
109
1211

16

TBT_X_SPI_DBG_CS_L
TBT_X_SPI_DBG_CLK
TBT_X_SPI_DBG_MOSI
UPC_XA_SWD_CLK
UPC_XA_SWD_DATA

PP3V3_UPC_XA_LDO

27

27

27

28

28

28

C3020

0.1UF

CER-X5R

C3021

0.1UF

CER-X5R

21

PPDCIN_XA_G3H_F

PLACE_NEAR=U3100:5MM

CRITICAL

740S00053

21

PPDCIN_XB_G3H_F

PLACE_NEAR=U3200:5MM

CRITICAL

87 28

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

87 29

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=TBT

IV ALL RIGHTS RESERVED

2 1

C3044

0.22UF

C3045

0.22UF

C3046

0.22UF

C3047

0.22UF

USB-C SUPPORT

Apple Inc.

PCIE_TBT_X_R2D_P<2>

PCIE_TBT_X_R2D_N<2>

PCIE_TBT_X_R2D_P<3>

PCIE_TBT_X_R2D_N<3>

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

30 OF 500

SHEET

27 OF 98

OUT

OUT

OUT

OUT

6.0.0
pvt

25

25

25

25

A

SIZE

D

8

67

35 4

2

1

678

PRIMARY USB-C PORT CONTROLLER (UPC) [FRONT LEFT]

3 245

1

D

C

GND I2C_ADDR
PRIMARY ONLY

R3103

REAR PORT:

CONNECT UPC SPI TO ROM

FRONT PORT:

GROUND UPC SPI

15K

0.1%
1/20W
TF-LF

0201

1

2

TO SMC

C3101

1UF

10%
35V
X5R

0402

PP20V_USBC_XA_VBUS

1

2

27 28 30 83 87

<CVBUS>

D

27 28 87

PP3V3_G3H_RTCPPDCIN_XA_G3H_F

MAX 100UF TOTAL ON RAIL

20%

6.3V

1

2

29 46 50 51 52 54 55 68 75 83
86

PP5V_G3S

C3100

10UF

CERM-X5R

0402-1

<CVIN_3V3>

NOSTUFF

1

C3111

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

K9

L10

M9

K11

N10

PP_5V0

L12

M11

N12

<CPP_5V0>

27

12 29

IN
IN

UPC_XA_RESET
TBT_POC_RESET
NC_USBC_XA_RESET_L

27 84

34 72 83 89

12 25 29

27 29

27

27

12 25 29

29 35 83

29 63 72 83 85

34 83

34 72 83 89

27 28

OUT

IN

IN
OUT
BI
OUT

IN
OUT
OUT

IN
OUT

IN

UPC_XA_SER_DBG

PMU_ACTIVE_READY
TBT_X_CIO_PWR_EN
PD_UPC_X_5V_EN
PD_UPC_XA_GPIO4
UPC_XA_FAULT_L_R
TBT_X_USB_PWR_EN
SOC_DOCK_CONNECT
UPC_PMU_RESET
SOC_DFU_STATUS
SOC_FORCE_DFU

PP3V3_UPC_XA_LDO

UPC_XA_R_OSC
I2C_UPC_XA_DBG_CTL_SDA

28

I2C_UPC_XA_DBG_CTL_SCL

28

25 27 29

BI

25 27 29

BI

25 27

OUT

27

BI

27

BI

27 47

29 35

OUT

I2C_TBT_X_SDA
I2C_TBT_X_SCL
I2C_TBT_XA_INT_L

I2C_UPC_X_SDA2
I2C_UPC_X_SCL2
UPC_I2C_INT_L

B13
A14
B17

A2
B1

D1
F1
C2
E2
B3
C4
D3
E4
F3
F7

A18

M19
M21

A16
B15

B5
A4
D7

B7
A6
C8

B9
B11
A10

A8

HRESET
MRESET
RESET*

GPIO0

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10

BUSPOWER

I2C_ADDR
R_OSC

I2CM_SDA_CNFG
I2CM_SCL_CNFG

I2C_SDA1
I2C_SCL1
I2C_IRQ1*

I2C_SDA2
I2C_SCL2
I2C_IRQ2*

SPI_CLK
SPI_MOSI
SPI_MISO
SPI_SSZ

(LDO_CORE)
(LDO_3V3)
(LDO_3V3)

(T.B.D.)

(VDDIO)
(LDO_3V3)
(LDO_3V3)
(LDO_3V3)
(LDO_3V3)
(LDO_3V3)
(VDDIO, PMOS O/D)
(VDDIO)
(VDDIO)
(VDDIO)

(LDO_3V3)

(LDO_3V3)
(LDO_CORE)

(LDO_3V3, 4K IPU)
(LDO_3V3, 4K IPU)

(LDO_3V3)
(LDO_3V3)
(N/A, NMOS O/D)

(VDDIO)
(VDDIO)
(N/A, NMOS O/D)

DIGITAL CORE I/O & CONTROL

M13

N14

PP_CABLE

G2

G4

H1

H3

J2

J4

K1

K3

PP_HV

M1

L4

L2

OMIT_TABLE

U3100

CD3217

FCBGA

VER-2

CRITICAL

M3

N2

N4

POWER

TYPE-C

G6

G8

H5

H7

J6

J8

K5

K7

VBUS

L6

L8

M5

M7

N8

N6

VDDIO_CFG

LDO_3V3

VIN_3V3

VDDIO

VIN_LV

VOUT_LV

VRET

SS

LDO_CORE

C_CC1

C_CC2

RPD_G1
RPD_G2

C_USB_TP
C_USB_TN

C_USB_BP
C_USB_BN

C_SBU1
C_SBU2

C20

A12
D11

C22
D21

L20
L18

C16

L22

E22

M15
N16

M17
N18

L14
L16

K19
K21

J20
J22

J16
H15

20%
X5R

1

2

C3102

1.0UF

6.3V

0201-1

<CVDDIO>

UPC_XA_VDDIO_CFG

PP3V3_TBT_X_SX

UPC_XA_SS

PP1V5_UPC_XA_LDO_CORE

USBC_XA_CC1

USBC_XA_CC2

USBC_XA_CC1
USBC_XA_CC2

USBC_XA_USB_TOP_P
USBC_XA_USB_TOP_N

USBC_XA_USB_BOT_P
USBC_XA_USB_BOT_N

USBC_XA_SBU1
USBC_XA_SBU2

PP1V8_SLPS2R

27

PP3V3_UPC_XA_LDO

25 26 29 74

1

C3105

10UF

20%

6.3V

2

CERM-X5R
0402-1

<CLDO_CORE>

28 30 83

BI

28 30 83

BI

30

BI

30

BI

30

BI

30

BI

30 83

BI

30 83

BI

1

C3109

0.68UF

5%

6.3V

2

X6S
0402

<CSS>

27 29 50 54 57 61 63 71 72 74
76 83 86 89

27 29 34 40 42 43 44 47 60 63
64 70 71 72 74 81 83 86 89

1

C3114

220PF

10%
16V

2

CER-X7R
0201

1

C3113

220PF

10%
16V

2

CER-X7R
0201

1

C3108

10UF

20%

6.3V

2

CERM-X5R
0402-1

<CLDO_3V3>

28 30 83

BI

28 30 83

BI

27 28

C

B

14

BI

14

BI

PP3V3_UPC_XA_LDO

USB2_UPC_PCH_XA_P

USB2_UPC_PCH_XA_N

27 28

L3100

90-OHM-0.1A

EXCX4CE

SYM_VER-1

1

4

32

PLACE_NEAR=U3100:5MM

29

29

84

27

27

27 28

27

83 89

83 89

27

27

25

25 84

25

27

27

27

27

27 89

27 89

27

27

BI
BI

IN

OUT

BI
BI
BI
BI

BI
BI

OUT

BI
BI
BI
BI
OUT
BI

IN

OUT

UPC_XA_SWD_DATA
UPC_XA_SWD_CLK

UPC_XA_UART_RX
UPC_XA_UART_TX

USB2_UPC_PCH_XA_F_P
USB2_UPC_PCH_XA_F_N

USB_SOC_TYPEC_P
USB_SOC_TYPEC_N
SPARE_UPC_XA_USB3_RP
SPARE_UPC_XA_USB3_RN

USBC_XA_AUXLSX1
USBC_XA_AUXLSX2

DP_XA_HPD

SPARE_UPC_XA_DBG0_R
SPARE_UPC_XA_DBG1_R
SPARE_UPC_XA_DBG2_R
SPARE_UPC_XA_DBG3_R
SWD_SOC_DEBUG_SWCLK
SWD_SOC_DEBUG_SWDIO
PCH_UART_DEBUG_R_R2D
PCH_UART_DEBUG_R_D2R

E20
E16

B19
A20

H19
H21
G20
G22
F19
F21

J12
H11

C12

G12
F11

E8
E12
G16
F15
D15
D19

SWD_DATA
SWD_CLK

UART_RX
UART_TX

USB_RP1_P
USB_RP1_N
USB_RP2_P
USB_RP2_N
USB_RP3_P
USB_RP3_N

AUX_P
AUX_N

HPD

DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7

(LDO_3V3)
(LDO_3V3)

(LDO_3V3)
(LDO_3V3)

(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)

B

DNU
DNU
DNU

GNDPORT_MUX

GND

DNU
DNU
DNU

E18
C18
F5
D5
D17
G18

PPDCIN_XA_G3H_F
PP20V_USBC_XA_VBUS

27 28 87

27 28 30 83 87

A

1M

1M

1M

R3109

21

5% MF 201

1/20W

R3108

21

1/20W5% MF

21

R3105

MF1/20W5% 201

8

I2C_UPC_XA_DBG_CTL_SCL

I2C_UPC_XA_DBG_CTL_SDA

201

UPC_XA_UART_RX

27 28 29

28

28

A22

H9

N20

B21

K15

N22

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

USB-C PORT CONTROLLER A

DRAWING NUMBER

051-05309

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=USB-C

67

35 4

IV ALL RIGHTS RESERVED

2

REVISION

6.0.0

BRANCH

pvt

PAGE

31 OF 500

SHEET

28 OF 98

1

SIZE

D

678

SECONDARY USB-C PORT CONTROLLER (UPC) [REAR LEFT]

3 245

1

D

C

CRITICAL

R3203

REAR PORT:

CONNECT UPC SPI TO ROM

FRONT PORT:

GROUND UPC SPI

87 29 27

83 75 68 55 54 52 51 50 46 28

28 12

84 27

28 25 12

28 27

28 25 12

83 35 28

85 83 72 63 28

29 27 25

1

15K

0.1%
1/20W
TF-LF

0201

2

28 27 25

28 27 25

27 25

83 47 35 27

83 47 35 27

47 35 28 27

86

27

25

27

27

27

27

27

27

27

27

27

PPDCIN_XB_G3H_F

MAX 100UF TOTAL ON RAIL

PP5V_G3S

IN
IN

OUT

OUT

BI

IN
OUT
BI
OUT

IN
OUT
OUT
BI
BI

IN

UPC_XB_RESET

TBT_POC_RESET
USBC_X_RESET_L

UPC_XB_SER_DBG

PD_UPC_XB_GPIO1
TBT_X_CIO_PWR_EN
PD_UPC_X_5V_EN
PD_UPC_XB_GPIO4
UPC_XB_FAULT_L_R
TBT_X_USB_PWR_EN
SOC_DOCK_CONNECT
UPC_PMU_RESET
PD_UPC_XB_GPIO9
PD_UPC_XB_GPIO10

PP3V3_UPC_XB_LDO

NC_UPC_XB_I2C_ADDR

UPC_XB_R_OSC
I2C_UPC_XB_DBG_CTL_SDA

29

I2C_UPC_XB_DBG_CTL_SCL

29

BI
BI
OUT

BI
BI
OUT

OUT
OUT

IN
OUT

I2C_TBT_X_SDA
I2C_TBT_X_SCL
I2C_TBT_XB_INT_L

I2C_UPC_SDA
I2C_UPC_SCL
UPC_I2C_INT_L

UPC_XB_SPI_CLK
UPC_XB_SPI_MOSI
UPC_XB_SPI_MISO
UPC_XB_SPI_CS_L

NOSTUFF

1

C3211

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

<CPP_5V0>

B13
A14
B17

A2
B1

D1
F1
C2
E2
B3
C4
D3
E4
F3
F7

A18

M19
M21

A16
B15

B5
A4
D7

B7
A6
C8

B9
B11
A10

A8

N10

M9

L10

K9

HRESET
MRESET
RESET*

GPIO0

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10

BUSPOWER

I2C_ADDR
R_OSC

I2CM_SDA_CNFG
I2CM_SCL_CNFG

I2C_SDA1
I2C_SCL1
I2C_IRQ1*

I2C_SDA2
I2C_SCL2
I2C_IRQ2*

SPI_CLK
SPI_MOSI
SPI_MISO
SPI_SSZ

N14

N12

M11

L12

K11

PP_5V0

(LDO_CORE)
(LDO_3V3)
(LDO_3V3)

(T.B.D.)

(VDDIO)
(LDO_3V3)
(LDO_3V3)
(LDO_3V3)
(LDO_3V3)
(LDO_3V3)
(VDDIO, PMOS O/D)
(VDDIO)
(VDDIO)
(VDDIO)

(LDO_3V3)

(LDO_3V3)
(LDO_CORE)

(LDO_3V3, 4K IPU)
(LDO_3V3, 4K IPU)

(LDO_3V3)
(LDO_3V3)
(N/A, NMOS O/D)

(VDDIO)
(VDDIO)
(N/A, NMOS O/D)

DIGITAL CORE I/O & CONTROL

G4

G2

M13

PP_CABLE

H1

H3

J2

J4

K1

K3

PP_HV

M3

M1

L4

L2

OMIT_TABLE

U3200

CD3217

FCBGA

VER-2

CRITICAL

N2

N4

POWER

TYPE-C

G6

G8

H5

H7

J6

J8

K5

K7

VBUS

L6

L8

M5

M7

N8

N6

VDDIO_CFG

LDO_3V3

VIN_3V3

VDDIO

VIN_LV

VOUT_LV

VRET

SS

LDO_CORE

C_CC1

C_CC2

RPD_G1
RPD_G2

C_USB_TP
C_USB_TN

C_USB_BP
C_USB_BN

C_SBU1
C_SBU2

C20

A12
D11

C22
D21

L20
L18

C16

L22

E22

M15
N16

M17
N18

L14
L16

K19
K21

J20
J22

J16
H15

1UF

10%
35V
X5R

0402

1

2

C3201

<CVBUS>

20%

6.3V

1

2

C3200

10UF

CERM-X5R

0402-1

<CVIN_3V3>

20%
X5R

1

2

C3202

1.0UF

6.3V

0201-1

<CVDDIO>

UPC_XB_VDDIO_CFG
PP3V3_UPC_XB_LDO

PP3V3_TBT_X_SX

UPC_XB_SS

PP1V5_UPC_XB_LDO_CORE

USBC_XB_CC1

USBC_XB_CC2

USBC_XB_CC1
USBC_XB_CC2

USBC_XB_USB_TOP_P
USBC_XB_USB_TOP_N

USBC_XB_USB_BOT_P
USBC_XB_USB_BOT_N

USBC_XB_SBU1
USBC_XB_SBU2

PP20V_USBC_XB_VBUS

PP3V3_G3H_RTC

PP1V8_SLPS2R

27

74 28 26 25

1

C3205

10UF

20%

6.3V

2

CERM-X5R
0402-1

<CLDO_CORE>

BI
BI

BI
BI

BI
BI

BI
BI

83 30 29

83 30 29

30

30

30

30

83 30

83 30

1

C3209

0.68UF

5%

6.3V

2

X6S
0402

<CSS>

1

C3214

220PF

2

10%
16V
CER-X7R
0201

87 83 30 29

89 86 83 76

BI

BI

1

C3213

220PF

10%
16V

2

CER-X7R
0201

D

74 72 71 63 61 57 54 50 28 27

63 60 47 44 43 42 40 34 28 27

89 86 83 81 74 72 71 70 64

29 27 25

1

C3208

10UF

20%

6.3V

2

CERM-X5R
0402-1

<CLDO_3V3>

C

83 30 29

83 30 29

B

14

14

BI

BI

USB2_UPC_PCH_XB_P

USB2_UPC_PCH_XB_N

PP3V3_UPC_XB_LDO

UPC_XB_SWD_DATA
UPC_XB_SWD_CLK

UPC_XA_UART_TX
UPC_XA_UART_RX

L3200

90-OHM-0.1A

EXCX4CE

SYM_VER-1

1

27

BI

27

BI

29 28 27

4

28 27

IN

OUT

USB2_UPC_PCH_XB_F_P

32

PLACE_NEAR=U3100:5MM

29 27 25

27

27

27

27

84 25

84 25

25

83 27

83 27

83 27

83 27

83 27

83 27

89

89

BI
BI
BI
BI

BI
BI

OUT

OUT
OUT

IN

IN
OUT
BI

IN
OUT

USB2_UPC_PCH_XB_F_N

SPARE_UPC_XB_USB2_RP
SPARE_UPC_XB_USB2_RN
SPARE_UPC_XB_USB3_RP
SPARE_UPC_XB_USB3_RN

USBC_XB_AUXLSX1
USBC_XB_AUXLSX2

DP_XB_HPD

USB3_BSSB_D2R_R_P
USB3_BSSB_D2R_R_N
USB3_BSSB_R2D_P
USB3_BSSB_R2D_N
SWD_SOC_SWCLK_XB
SWD_SOC_SWDIO_XB
SMC_DEBUGPRT_R_TX
SMC_DEBUGPRT_R_RX

E20
E16

B19
A20

H19
H21
G20
G22
F19
F21

J12
H11

C12

G12
F11

E8
E12
G16
F15
D15
D19

SWD_DATA
SWD_CLK

UART_RX
UART_TX

USB_RP1_P
USB_RP1_N
USB_RP2_P
USB_RP2_N
USB_RP3_P
USB_RP3_N

AUX_P
AUX_N

HPD

DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7

(VDDIO, IPU)
(VDDIO, IPU)

(LDO_3V3)
(LDO_3V3)

(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)
(T.B.D.)

B

DNU
DNU
DNU

GNDPORT_MUX

GND

DNU
DNU
DNU

E18
C18
F5
D5
D17
G18

PPDCIN_XB_G3H_F
PP20V_USBC_XB_VBUS

87 29 27

87 83 30 29

A

1M

1M

1M

R3209

21

5% 201

1/20W MF

R3208

21

5% 2011/20W

21

R3205

5% MF1/20W

MF

201

8

I2C_UPC_XB_DBG_CTL_SCL

I2C_UPC_XB_DBG_CTL_SDA

UPC_XA_UART_TX

H9

N20

A22

29

29

29 28 27

67

B21

K15

N22

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

A

USB-C PORT CONTROLLER B

DRAWING NUMBER

051-05309

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=USB-C

35 4

IV ALL RIGHTS RESERVED

2

REVISION

6.0.0

BRANCH

pvt

PAGE

32 OF 500

SHEET

29 OF 98

1

SIZE

D

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

678

3 245

1

D

C

B

CC1

TBT_R2D0

TBT_D2R0

SBU2
USB2 BOT

USB2 BOT

SBU1

TBT_R2D1

TBT_D2R1

CC2

NSR20F40NX_G

29 83

BI

25

IN

25

IN

25

25

29 83

29

29

OUT

OUT

BI
BI
BI

USBC_XB_D2R_N<1>

USBC_XB_D2R_P<1>
USBC_XB_SBU2

USBC_XB_USB_BOT_N
USBC_XB_USB_BOT_P

D3386

28

BI

28

BI

28 83

BI

25

25

25

25

28 83

IN

IN

OUT

OUT
BI

USBC_XA_R2D_CR_P<2>

USBC_XA_R2D_CR_N<2>

USBC_XA_CC2

21

GND_VOID=TRUE

D3374

SESDL2011

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

27 28 30 83 87

CRITICAL

PP20V_USBC_XA_VBUS

K

DSN2-THICKSTNCL

D3300

DSN2

A

29 83 87

USBC_XB_CC1

USBC_XB_R2D_CR_N<1>

USBC_XB_R2D_CR_P<1>

21

21

D3371

SESDL2011

SESDL2011

GND_VOID=TRUE

DSN2-THICKSTNCL

GND_VOID=TRUE

DSN2-THICKSTNCL

USBC_XA_USB_BOT_N
USBC_XA_USB_BOT_P

USBC_XA_SBU1

USBC_XA_D2R_P<2>

USBC_XA_D2R_N<2>

21

GND_VOID=TRUE

D3375

SESDL2011

DSN2-THICKSTNCL

21

GND_VOID=TRUE

D3376

SESDL2011

DSN2-THICKSTNCL

K

D3301

A

PP20V_USBC_XB_VBUS

NSR20F40NX_G

GND_VOID=TRUE

R3371

GND_VOID=TRUE

R3370

GND_VOID=TRUE

R3352

GND_VOID=TRUE GND_VOID=TRUE

R3353

21

D3372

SESDL2011

DSN2-THICKSTNCL

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

21

GND_VOID=TRUE

GND_VOID=TRUE

21

D3373

SESDL2011

R3373

1

5%

1/20W

R3372

R3326

1

5% 1/20W

R3327

1

1/20W

5%

GND_VOID=TRUE

DSN2-THICKSTNCL

GND_VOID=TRUE

2

21

GND_VOID=TRUE

2

MF 201

2

MF

D3377

SESDL2011

1610-COMBO

ESDA25P35-1U1M-COMBO

DSN2-THICKSTNCL

PLACE_NEAR=J3300.53:5mm

NOSTUFF

CRITICAL

K

D3370

DSN2

A

GND_VOID=TRUE

21

2

5%

GND_VOID=TRUE

21

2

5%

1/20W

GND_VOID=TRUE

21

5% 1/20W MF 201

21

2

201MF

GND_VOID=TRUE

2

2011/20W5% MF

2

GND_VOID=TRUE

2

201

DZ3301

ESDL20-1BF4

USBC_XB_D2R_R_N<1>

2

USBC_XB_D2R_R_P<1>

2

1/20W

GND_VOID=TRUE

D3354

ESD-SLP-COMBO

USBC_XA_R2D_C_P<2>

USBC_XA_R2D_C_N<2>

USBC_XA_D2R_R_P<2>

USBC_XA_D2R_R_N<2>

21

0201

201MF1/20W

USBC_XB_R2D_C_P<1>

USBC_XB_R2D_C_N<1>

201MF

MF 2015%

GND_VOID=TRUE

2

X3DFN2

1

GND_VOID=TRUE

2

X3DFN2

2

1

GND_VOID=TRUE

GND_VOID=TRUE

2

D3312

1

ESD-SLP-COMBO

1

GND_VOID=TRUE

C3381

GND_VOID=TRUE

C3380

X3DFN2

D3349

DZ3350

ESDL20-1BF4

ESD-SLP-COMBO

GND_VOID=TRUE

25V X5R

GND_VOID=TRUE

C3383

C3382

GND_VOID=TRUE

X3DFN2

GND_VOID=TRUE

21

0.33UF

21

0.33UF

25V 10%

D3328

DZ3303

ESDL20-1BF4

0201

ESD-SLP-COMBO

<RDAR://52485973>
<RDAR://48380003>

D3399

TVS2200

WSON

4

IN

5

IN

6

IN

GND

GND

GND

3

2

1

K

1610-COMBO

ESDA25P35-1U1M-COMBO

D3302

A

NOSTUFF

GND_VOID=TRUE

C3391

GND_VOID=TRUE

C3390

21

21

21

0201

C3373

10% 0201

C3372

25V10%

GND_VOID=TRUE

25V10%

21

R3325

220K

EPAD

7

0.33UF

25V10% 0201

0.33UF

10% 25V

GND_VOID=TRUE

2015% 1/20W

2

MF

R3351

1

220K

GND_VOID=TRUE

21

0.22UF

GND_VOID=TRUE

21

0.22UF

X5R 0201

CER-X5R

CER-X5R

201MF

GND_VOID=TRUE

2

2

GND_VOID=TRUE

1

1

1/20W

5%

GND_VOID=TRUE

21

21

GND_VOID=TRUE

CER-X5R

GND_VOID=TRUE

GND_VOID=TRUE

2

1

0.22UF

0.22UF

0201CER-X5R

GND_VOID=TRUE

2015% 1/20W MF

R3350

220K

R3349

220K

PLACE_NEAR=J3300.3:5mm

GND_VOID=TRUE

2011/20W MF5%

USBC_XA_R2D_P<2>

USBC_XA_R2D_N<2>

USBC_XA_D2R_CR_P<2>

0201

USBC_XA_D2R_CR_N<2>

0201

2011/20W

2015%

GND_VOID=TRUE

2

2

MF

R3324

220K

R3329

5%

MF

1/20W

220K

GND_VOID=TRUE

R3328

1

1

220K

PLACE VBUS CAP NEAR EACH VBUS PIN

X5R 020125V10%

USBC_XB_D2R_CR_N<1>

USBC_XB_D2R_CR_P<1>

GND_VOID=TRUE

2

2

R3348

1

1

220K

MF 2015%

1/20W

020110% 25V X5R

21

2011/20W MF5%

DZ3352

ESDL20-1BF4

<RDAR://52485973>
<RDAR://48380003>

D3398

TVS2200

WSON

4

IN

5

IN

6

IN

GND

GND

GND

3

2

1

USBC_XB_R2D_N<1>

USBC_XB_R2D_P<1>

0201

EPAD

7

20875-056E-01

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

J3300

F-ST-SM

PWR

SIGNAL

PWR

GND

5857

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241
4443
4645

GND_VOID=TRUE

4847

GND_VOID=TRUE

5049
5251
5453
5655

6059

6261
6463
6665
6867
7069
7271
7473
7675
7877
8079
8281
8483
8685

TP_USBC_PP20V_XB

USBC_XB_R2D_N<2>

USBC_XB_R2D_P<2>

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

USBC_XA_D2R_CR_P<1>
USBC_XA_D2R_CR_N<1>

TP_USBC_PP20V_XA

USBC_XA_R2D_P<1>
USBC_XA_R2D_N<1>

83

GND_VOID=TRUE

2

2

R3319

1

1

5% 201MF1/20W

220K

83

OUT

GND_VOID=TRUE GND_VOID=TRUE

C3392

GND_VOID=TRUE GND_VOID=TRUE

C3393

USBC_XB_D2R_CR_N<2>
USBC_XB_D2R_CR_P<2>

GND_VOID=TRUE

GND_VOID=TRUE

201

2

2

R3354

1

1

1/20W5% MF

220K

GND_VOID=TRUE GND_VOID=TRUE

C3370

GND_VOID=TRUE

C3371

GND_VOID=TRUE

201

MF

R3318

R3321

5% 1/20W

220K

220K

R3358

220K

10%25V X5R

C3384

C3385

25V

GND_VOID=TRUE

201

2

2

MF5%

1

1

1/20W

GND_VOID=TRUE

201

MF

R3356

1/20W

1/20W 2015% MF

5%

220K

21

0.22UF

GND_VOID=TRUE

21

0.22UF

X5R10%25V

GND_VOID=TRUE

10%25V CER-X5R 0201

GND_VOID=TRUE

10% 0201

GND_VOID=TRUE

MF

R3320

1/20W5% 201

220K

21

10%25V X5R 0201

10%25V X5R 0201

C3386
C3387

GND_VOID=TRUE

2

2

0.22UF

21

0.22UF

10%25V CER-X5R

10%25V CER-X5R 0201

GND_VOID=TRUE

201

MF1/20W

R3355

1

1

5%

220K

0201

0201

GND_VOID=TRUE

21

0.33UF

GND_VOID=TRUE

21

0.33UF

CER-X5R

0201

DZ3300

ESDL20-1BF4

USBC_XB_R2D_C_N<2>

USBC_XB_R2D_C_P<2>

GND_VOID=TRUEGND_VOID=TRUE

21

0.33UF

0201

21

0.33UF

GND_VOID=TRUE

GND_VOID=TRUE

21

X3DFN2

DZ3353

D3358

ESDL20-1BF4

0201

ESD-SLP-COMBO

USBC_XA_R2D_C_P<1>

USBC_XA_R2D_C_N<1>

USBC_XA_D2R_R_P<1>

USBC_XA_D2R_R_N<1>

GND_VOID=TRUE

21

X3DFN2

2

2

D3304

1

1

ESD-SLP-COMBO

R3376
R3377

GND_VOID=TRUE

USBC_XB_D2R_R_N<2>
USBC_XB_D2R_R_P<2>

GND_VOID=TRUE

2

2

X3DFN2

0201

D3360

1

1

ESD-SLP-COMBO

GND_VOID=TRUE

R3374

GND_VOID=TRUE

R3375

5% MF1/20W

5% MF 2011/20W

GND_VOID=TRUE

R3323

1/20W MF 2015%

GND_VOID=TRUE

R3322

GND_VOID=TRUE

X3DFN2

21

D3329

DZ3302

ESDL20-1BF4

ESD-SLP-COMBO

PLACE_NEAR=J3300.52:5mm

PP20V_USBC_XA_VBUS

GND_VOID=TRUE

R3359
R3357

GND_VOID=TRUE

21

5%1/20W

5% MF 2011/20W

GND_VOID=TRUE GND_VOID=TRUE

GND_VOID=TRUE

21

MF 201

21

5%1/20W MF 201

5%1/20W MF 201

DZ3351

ESDL20-1BF4

PLACE_NEAR=J3300.6:5mm

21

2

201

21

2

5%1/20W MF 201

0201

GND_VOID=TRUE

GND_VOID=TRUE

21

2

21

2

2

2

21

2

21

2

21

D3382

SESDL2011

GND_VOID=TRUE

GND_VOID=TRUE

21

GND_VOID=TRUE

D3378

SESDL2011

USBC_XB_CC2
USBC_XB_R2D_CR_N<2>

USBC_XB_R2D_CR_P<2>

GND_VOID=TRUE

USBC_XB_USB_TOP_P
USBC_XB_USB_TOP_N
USBC_XB_D2R_N<2>

GND_VOID=TRUE

USBC_XB_D2R_P<2>

USBC_XB_SBU1

21

D3383

SESDL2011

GND_VOID=TRUE

DSN2-THICKSTNCL

D3384

SESDL2011

GND_VOID=TRUE

DSN2-THICKSTNCL

USBC_XA_SBU2

USBC_XA_R2D_CR_P<1>

USBC_XA_R2D_CR_N<1>

USBC_XA_USB_TOP_P
USBC_XA_USB_TOP_N

USBC_XA_D2R_P<1>

USBC_XA_D2R_N<1>

USBC_XA_CC1

21

GND_VOID=TRUE

D3379

DSN2-THICKSTNCL

SESDL2011

27 28 30 83 87

D3380

SESDL2011

DSN2-THICKSTNCL

21

GND_VOID=TRUE

DSN2-THICKSTNCL

21

GND_VOID=TRUE

DSN2-THICKSTNCL

OUT

OUT

21

D3385

SESDL2011

21

GND_VOID=TRUE

D3381

SESDL2011

DSN2-THICKSTNCL

29 83

BI

25

IN

25

IN

29

BI

29

BI

25

25

29 83

BI

GND_VOID=TRUE

DSN2-THICKSTNCL

28 83

BI

25

IN

25

IN

28

BI

28

BI

25

OUT

CC2

TBT_R2D1

USB2 TOP

TBT_D2R1

SBU1

SBU2

TBT_R2D0

USB2 BOT

TBT_D2R0

25

OUT

BI

28 83

CC1

D

C

B

A

8

LAST CHANGE: Wed Apr 1 22:57:37 2015

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

USB-C CONNECTOR A

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=USB-C

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

33 OF 500

SHEET

30 OF 98

1

SIZE

D

678

3 245

1

D

D

C

C

B

B

A

8

SYNC_MASTER=J223_METE SYNC_DATE=05/14/2019

PAGE TITLE

A

WIFI/BT SUPPORT

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=WIRELESS

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

36 OF 500

SHEET

31 OF 98

1

SIZE

D

678

3 245

1

D

C

83 50 32

32

PP3V3_G3S_WLANBT

1

2

PCH_WLAN_CLKREQ_R_L

PLACE_NEAR=U3701.16:2MM

C3713

12PF

5%
25V
NP0-C0G
0201

PLACE_NEAR=U3701.16:2MM

1

C3714

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

R3711

1K

21

5%

1/20W

MF

201

PLACE_NEAR=U3701.6:2.5MM

1

C3715

12PF

5%
25V

2

NP0-C0G
0201

PLACE_NEAR=U3701.6:2MM

1

C3716

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PCH_WLAN_CLKREQ_L

PLACE_NEAR=U3701.28:2MM

1

C3717

12PF

5%
25V

2

NP0-C0G
0201

14

BI

83

50 32

PLACE_NEAR=U3701.28:2MM

1

C3718

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 51 32

PP3V3_G3S_WLANBT

PLACE_NEAR=U3701.64:5MM

1

C3724

10UF

20%

6.3V

2

CERM-X5R
0402-4

PLACE_NEAR=U3701.76:2MM

1

C3719

12PF

2

5%
25V
NP0-C0G
0201

1

2

PLACE_NEAR=U3701.76:2MM

1

C3720

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PP1V8_G3S_WLANBT

PLACE_NEAR=U3701.65:5MM

C3725

10UF

20%

6.3V
CERM-X5R
0402-4

1

R3715

100K

5%
1/20W
MF
201

2

36

IN

43 36

43 36

34 18

33 32

33 32

36 33 32

STRAP PINS

36

OUT
IN
OUT

OUT

IN
IN

IN

|
|
|
|

33

33

1

R3714

2

__

__|

83 72

35 33

72

1

C3721

10UF

20%

6.3V

2

CERM-X5R
0402-4

BI
BI

100K

5%
1/20W
MF
201

50_ANT_C0
50_ANT_C1

WLAN_SROM_CLK
WLAN_SROM_CS_R

32

WLAN_SROM_DIN

32

WLAN_SROM_DOUT

32

UART_WLAN_R2D_RTS_L
UART_WLAN_D2R_CTS_L
UART_WLAN_R2D
UART_WLAN_D2R

WLAN_AUDIO_SYNC

TP_WLAN_JTAG_TDI
TP_WLAN_JTAG_TDO
TP_WLAN_JTAG_SEL

32

TP_WLAN_JTAG_TCK

32

WLAN_THROTTLE
TP_WLAN_JTAG_TRST_L

32

BT_INTERFACE_SEL

32

WLAN_SROM_STRAP

32

WLAN_SROM_SIZE

32

IN

OUT

IN

PMU_CLK32K_WLANBT
WLBT_HOST_WAKE

WLBT_HOST_WAKE TOGGLES FOR BOTH BT AND WLAN WAKE

WLAN_PWR_EN

1

C3722

10UF

20%

6.3V

2

CERM-X5R
0402-4

NC

NC

24
80

141
142

68
69

46
43
44
45

121

57
59

70
143
132
133
131

136

60

61

120

109

56

110

66

65

64

VBAT

VBAT

VBAT

ANT_C0
ANT_C1

SPROM_CLK
SPROM_CS
SPROM_MI
SPROM_MO

WL_FAST_UART_CTS
WL_FAST_UART_RTS
WL_FAST_UART_RX
WL_FAST_UART_TX

WLAN_TIME_SYNC

CXT_A/JTAG_TD1
CXT_B/JTAG_TDO
JTAG_SEL
JTAG_SEL_BS
JTAG_TCK
JTAG_TMS
JTAG_TRST*

GPIO_14
GPIO_17
GPIO_20

LHL_GPIO2

LPO_IN

WL_HOST_WAKE

WL_REG_ON

GPIO13
GPIO15
GPIO18
GPIO19

DO NOT CONNECT
GPIO2 (HI-Z)
GPIO3 (HI-Z)
GPIO6 (HI-Z)

(HI-Z)
(HI-Z)
(HI-Z, WEAK PU <1SEC )

PD 50K

17

16

139

138

137

VBAT

VBAT

VBAT

VBAT_2P4GHZ_BTPA

VBAT_2P4GHZ_BTPA

U3701

LBEE5XV1SA-255

LGA

SYM 1 OF 4

SAPPORO

CRITICAL

GPIO10 (HI-Z)
GPIO11 (HI-Z)
GPIO8 (HI-Z)
GPIO9 (HI-Z)

GPIO12 (HI-Z)

GPIO4 (HI-Z)
GPIO5 (HI-Z)

GPIO0 (HI-Z)

77

76

29

28

7

6

VBAT_5GHZ_C0

VBAT_5GHZ_C0

VBAT_5GHZ_C1

VBAT_5GHZ_C1

VBAT_2P4GHZ_C0C1

VBAT_2P4GHZ_C0C1

PD 50K
PD 50K
PD 50K
PD 50K

PU 50K
PU 50K
PU 50K
PU 50K

PD 50K
PU 50K
PU 50K
PU 50K

PD 50K
PD 50K
PD 50K
PD 50K

PD 50K

PD 50K

0.1UF SHUNT CAPACITORS FOR FEM BIAS PINS ARE INSIDE THE MODULE

PP1V8_G3S_WLANBT

PLACE_NEAR=U3701.71:1MM

1

C3700

12PF

5%
25V

2

NP0-C0G
0201

IN
IN

32

32

32

32

32

32

IN

42 18 17 16 15 14 13 12 11 7

83 74 73 72 70 69 65 53 47

NC
NC
NC
NC

18

OUT

32

32

36

OUT

36

IN

NC

NC

32 14

32 14

15

NOSTUFF

R3720

144

71

VDDIO_1P8V

VDDIO_1P8V

PCIE_REFCLK_N
PCIE_REFCLK_P

PCIE_RXD_N
PCIE_RXD_P
PCIE_TXD_N
PCIE_TXD_P

PCI_PME*

PCIE_CLKREQ*

PCIE_PERST*

BT_SF_CLK

BT_SF_CS*
BT_SF_MISO
BT_SF_MOSI

BT_UART_CTS*
BT_UART_RTS*

BT_UART_RX
BT_UART_TX

BT_GPIO_2

BT_GPIO_3

BT_GPIO_4

BT_GPIO_5

BT_I2S_CLK

BT_I2S_DI

BT_I2S_DO

BT_I2S_WS

BT_DEV_WAKE

BT_HOST_WAKE

1

C3723

0.1UF

10%

6.3V

2

CERM-X5R
0201

128

PCH_PCIE_CLK100M_WLAN_N

53

PCH_PCIE_CLK100M_WLAN_P

126

PCH_PCIE_WLAN_R2D_N

51

PCH_PCIE_WLAN_R2D_P

124

PCH_PCIE_WLAN_D2R_C_N

49

PCH_PCIE_WLAN_D2R_C_P

135

PCIE_PME_L

58

PCH_WLAN_CLKREQ_R_L

134

PCH_WLAN_PERST_L

114
113
115
37

117
40
39
119

36
112
38
116

34
35
32
33

118

42

BT_HOST_WAKE IS NOT USED
WLBT_HOST_WAKE TOGGLES FOR BOTH BT AND WLAN WAKE

BT_SPI2_CLK
BT_SPI2_CSN
BT_SPI2_MISO
BT_SPI2_MOSI

32

32

32

32

BT_GPIO_2
BT_AUDIO_SYNC
BT_GPIO_4
BT_GPIO_5

UART_BT_LH_D2R
NC_I2S_BT_R2D
NC_I2S_BT_D2R
UART_BT_LH_R2D

BT_DEV_WAKE NOT TOGGLED WHEN BT OVER PCIE ENABLED

1

C3704

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PP1V8_S5

BT_SFLASH_STRAP
HIGH: SFLASH

LOW: NO SFLASH

0

21

PCH_BT_ROM_BOOT_L

5%

1/20W

MF

0201

PP3719

P5MM-SP

BT_SPI2_MISO

32

BT_SPI2_MOSI

32

83 51 32

36 33 32

33 32

33 32

1

R3704

10K

5%

1/20W

MF

201

2

13

IN

32 14

32 14

BT_SPI2_CLK

32

BT_SPI2_CSN

32

BT_GPIO_5

32

BT_GPIO_4

32

PCIE_PME_L

32

TP_WLAN_JTAG_TRST_L

32

WLAN_THROTTLE

(TP_WLAN_JTAG_TMS)

TP_WLAN_JTAG_TCK

32

TP_WLAN_JTAG_SEL

32

TP_WLAN_JTAG_TDO

(TP_WLAN_JTAG_TDO)

TP_WLAN_JTAG_TDI

(TP_WLAN_JTAG_TDI)

WLAN_SROM_CLK

32

WLAN_SROM_CS

32

WLAN_SROM_DIN

32

WLAN_SROM_DOUT

32

PCH_PCIE_CLK100M_WLAN_N

PLACE TP3701 AND TP3702
ON THE BOTTOM SIDE
FOR PCIE PROBE ACCESS

PCH_PCIE_CLK100M_WLAN_P

1

PP3718

P5MM-SP

1

PP3717

P5MM-SP

1

PP3716

P5MM-SP

1

PP3715

P5MM-SP

1

PP3714

P5MM-SP

1

PP3713

P5MM-SP

1

TP3712

1

TP-P5

TP3711

1

TP-P5

TP3710

1

TP-P5

TP3709

1

TP-P5

TP3708

1

TP-P5

TP3707

1

TP-P5

TP3706

1

TP-P5

TP3705

1

TP-P5

TP3704

1

TP-P5

TP3703

1

TP-P5

TP3701

P2MM

1

TP3702

P2MM

1

PP

PP

PP

PP

PP

PP

PP

SM

PP

SM

PP

SM-SP

SM-SP

SM-SP

SM-SP

SM-SP

SM-SP

SM-SP

A

A

A

A

A

A

A

A

A

A

D

C

B

BOOT_STRAPS

83 51 32

TP_WLAN_JTAG_SEL

32

PP1V8_G3S_WLANBT

32

WLAN_SROM_STRAP

WLAN_SROM_STRAP: BT_INTERFACE_SEL
LOW: OTP
HIGH: SROM

R3700

10K

5%

1/20W

MF

201

PD 50K

BT_REG_ON

111

DO NOT TOGGLE WHEN BT OVER PCIE ENABLED

NC

SCHEMATIC LAYOUT SYMBOL IS 339S00586

PLACE C3706 AND C3707 ON THE BOTTOM SIDE FOR PCIE PROBE ACCESS

U3701.124:8MM

10K

5%

1/20W

MF

201

1

2

PCH_PCIE_WLAN_D2R_C_N

32

PCH_PCIE_WLAN_D2R_C_P

32

C3706

U3701.49:8MM

C3707

2 1

2 1

0.1UF

6.3V 0201CERM-X5R10%

0.1UF

6.3V

PCH_PCIE_WLAN_D2R_N

PCH_PCIE_WLAN_D2R_P

0201CERM-X5R10%

OUT

OUT

14

14

B

1

R3702

1K

0.5%
1/20W
MF
0201

2

32

R3713

NOSTUFF

BT_INTERFACE_SEL

LOW: (DEFAULT): PCIE
HIGH: UART

PLACE C3708 AND C3709 ON THE BOTTOM SIDE FOR PCIE PROBE ACCESS

U3701.126:8MM

1

2

PCH_PCIE_WLAN_R2D_N

32

PCH_PCIE_WLAN_R2D_P

32

C3708

U3701.51:8MM

C3709

2 1

2 1

0.1UF

0.1UF

PCH_PCIE_WLAN_R2D_C_N

0201CERM-X5R6.3V10%

PCH_PCIE_WLAN_R2D_C_P

0201CERM-X5R6.3V10%

IN

IN

14

14

A

WLAN_JTAG_SEL:
LOW: Some JTAG are GPIOs
HIGH: JTAG Enabled

WLAN_SROM_SIZE

32

1

R3705

1K

0.5%
1/20W
MF
0201

2

WLAN_SROM_SIZE:
LOW: 16 KBIT
HIGH: 4 KBIT

WLAN_SROM_CS_R

32

R3717

1/20W

10K

5%
MF

201

83 51 32

PP1V8_G3S_WLANBT

8

VCC

U3710

CAS93C86B

R3718

1K

2 1

0.5%

1/20W

MF

0201

1

WLAN_SROM_DOUT

32

32

WLAN_SROM_CS
WLAN_SROM_CLK

32

NC

1

CS

2

SK

7

PE

UDFN8

ORG

OMIT_TABLE

EPADGND

9

5

43

DODI

WLAN_SROM_DIN

6

WLAN_SROM_ORG

PLACE_NEAR=U3710.8:2MM

1

C3711

0.1UF

10%

6.3V

2

CERM-X5R
0201

R3712

10K

1/20W

32

5%
MF

201

83 51 32

1

R3751

2

PP1V8_G3S_WLANBT

100K

5%

1/20W

MF

201

1

2

R3752

100K

5%

1/20W

MF

201

10K

5%

1/20W

MF

201

1

2

1

2

R3753

R3754

1K

5%
MF

201

21

BT_SPI2_CSN

32

1/20W

BT_SFLASH_WP_L

WLAN SERIAL EEPROM

2

BT_SFLASH_HOLD_L

BLUETOOTH SERIAL FLASH

8

VCC

U3750

4MBIT-1.8V

MX25U4035FZUI

BT_SPI2_CLK

32

BT_SFLASH_CS_L

6

SCLK

1

CS*

3

WP*/SIO2

7

HOLD*/SIO3

USON

OMIT_TABLE

GND

4

SI/SIO0

SO/SIO1

THRM

PAD

9

NC

PLACE_NEAR=U3750.8:2.8MM

1

C3710

0.1UF

10%

6.3V

2

CERM-X5R
0201

5

BT_SPI2_MOSI

2

BT_SPI2_MISO

PLACE_NEAR=U3750.8:4MM

1

C3712

10UF

20%

6.3V

2

CERM-X5R
0402-4

32

32

BOM_COST_GROUP=WIRELESS

PAGE TITLE

WIFI/BT MODULE 1

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

37 OF 500

SHEET

32 OF 98

SYNC_DATE=05/14/2019SYNC_MASTER=J223_METE

SIZE

D

A

8

67

35 4

2

1

678

3 245

1

D

C

B

A

10
11
12
13
14
15
18
19
20
21
22
23
25
26
27
30
31
41
47
48
50
52
54
55
62
63
67
72
73
74
75
78
79
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98

99
100
101
102
103
104
105
106
107
108
122
123
125
127
129
130
140
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159

U3701

U3701

LBEE5XV1SA-255

LGA

1

GND

2

GND

3

GND

4

GND

5

GND

8

GND

9

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

SYM 2 OF 4

OMIT_TABLE

CRITICAL

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249

250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

LGA

SYM 3 OF 4

OMIT_TABLE

CRITICAL

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429

430
431
432
433
434
435
436
437
438
439
440
441
442

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

WIRELESS MODULE GND PINS

R3805

R3804

R3803

R3801

U3701

LBEE5XV1SA-255LBEE5XV1SA-255

SYM 4 OF 4

OMIT_TABLE

CRITICAL

1/20W MF

1/20W

201

201

201

MF1/20W

201

MF

21

100K

5%MF1/20W

21

100K

5%

21

100K

5%

21

100K

5%

NOSTUFF

GND
GND
GND
GND
GND
GND
GND
GND
GND

443
444
445
446
447
448
449
450
451

WLAN_THROTTLE

TP_WLAN_JTAG_TDI

TP_WLAN_JTAG_TDO

WLBT_HOST_WAKE

36 32

32

32

35 32

RF CONNECTORS

CRITICAL

J3810

20449-001E-03

20449-001E-03

F-ST-SM

4

3

2

CRITICAL

J3820

F-ST-SM

4

3

2

1

50_ANT_C0

1

50_ANT_C1

BI

BI

32

32

SYNC_MASTER=J223_METE SYNC_DATE=05/14/2019

PAGE TITLE

WIFI/BT MODULE 2

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

D

C

B

A

6.0.0

BOM_COST_GROUP=WIRELESS

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

38 OF 500

SHEET

33 OF 98

8

67

35 4

2

1

Note IPU/IPD represents SW configured state, not HW default

678

3 245

1

D

C

57

45

15

44

44

42

59 58

59 58

42

62

82 80 79 78 77

45

42

42

42

83 81 43

83 46

IN

OUT

IN
IN

OUT

IN
IN

OUT

IN
OUT
OUT
OUT

IN

IN

IN
OUT

IN

NC_PLCAM_TX_THROTTLE

43

NC_GNSS_HOST_TIME

43

NC_GNSS_DEV_WAKE

43

CODEC_INT_L
SE_CTLR_FW_DWLD
PCH_SOC_SYNC
MESA_INT
MESA_PWR_EN
NC_SOC_WLAN_DEV_WAKE

43

BOARD_REV0
SPKRAMP_INT_L
SPKRAMP_RESET_L
BOARD_REV1
TPAD_SPI_EN
SSD_BFH
SE_DEV_WAKE
BOOT_CONFIG0
BOOT_CONFIG1
BOOT_CONFIG2
SSD_PMU_RESET_L
DFR_DISP_INT

A13
A12
B12

AC33

L32
P32
R33
N30
M32
P33
M30
M33
T28
P29
H29
G33
E28
N28
J28
E33
T30

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20

(IPD)
(IPD)

(IPU)

(IPD)

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 3 OF 17

GPIO/TEST/MISC

(IPD)

TMR32_PWM0
TMR32_PWM1
TMR32_PWM2

CFSB

FORCE_DFU

DFU_STATUS

HOLD_RESET

ANALOGMUX_OUT

TST_CLKOUT

TESTMODE

DROOP

SOCHOT

XO0
XI0

F33
J29
G28

H28

U28
N33

F28

AH33
L28
C12

F29
G30

AP20
AP21

WLAN_AUDIO_SYNC
DFR_PWR_EN
SOC_KBD_BKLT_PWM_R

PMU_ACTIVE_READY
SOC_FORCE_DFU

SOC_DFU_STATUS
SOC_HOLD_RESET
TP_SOC_AMUXOUT

TP_SOC_TST_CLKOUT
SOC_TESTMODE

PMU_DROOP_L
SOC_SOCHOT_L

SOC_XTAL24M_OUT
SOC_XTAL24M_IN

IN

OUT

83 75

IN

IN

OUT

34

43

43

34

IN

OUT

1

R3940

511K

1%
1/20W
MF
201

2

72
83

34
72
85

32 18

83 46

83 28

89 83 72 28

89 83 72 28

R3941

0

21

SOC_XTAL24M_OUT_R

5%

1/20W

MF

0201

Y3940

1.60X1.20MM-SM

24MHZ-30PPM-9.5PF-60OHM

D

C

B

42

42

60

60

60

89 83

89 83

83 27

BI
OUT

OUT
OUT
OUT

BI
BI

IN

I2C_SEP_SDA
I2C_SEP_SCL

SEP_CAM_DISABLE_L
SEP_DMIC_DISABLE_L
SEP_DISABLE_STROBE

USB_SOC_P
USB_SOC_N

NC_SOC_USB_ID

43

SOC_USB_VBUS
SOC_USB_REXT

1

R3960

200

1%
1/20W
MF
201

2

AP4

SEP_I2C0_SDA

AN4

SEP_I2C0_SCL

AP5

SEP_SPI0_MISO

AN5

SEP_SPI0_MOSI

AM5

SEP_SPI0_SCLK

B20

USB_DP

A20

USB_DM

D20

USB_ID

E20

USB_VBUS

F22

USB_REXT

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 7 OF 18

SEP/USB/DDR

(IPD)

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

DDR0_ZQ
DDR3_ZQ

DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*

DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE

H2
E32
AH2
AH32

N4
AC30

H4
E30
AH4
AH30

G2
D31
AJ2
AJ32

240

1%

1/20W

MF

201

1

2

R3970

SOC_DDR0_RREF
SOC_DDR1_RREF
SOC_DDR2_RREF
SOC_DDR3_RREF

SOC_DDR0_ZQ
SOC_DDR3_ZQ

AON_SLEEP1_RESET_L

PMU_SYS_ALIVE

R3971

240

1%

1/20W

MF

201

NC GND

240

1%
MF

201

4312

1

2

1

C3941

12PF

5%
25V

2

CERM
0201

R3974

240

1%

1/20W

201

PP1V1_SLPDDR

240

1%

1/20W

MFMF

201

1

2

1

2

R3975

83 71 40 39

B

C3940

12PF

240

1/20W

201

35

1

1%
MF

2

1

2

R3972

IN

IN

1

5%

25V

2

CERM
0201

R3973

85 83 82 81 72 35

1/20W

A

PP1V8_SLPS2R

R3939
R3934

R3937

47K

10K
10K

8

21

5% 201

21
21

1/20W MF5%

5% MF1/20W 201

MF1/20W

63 60 47 44 43 42 40 29 28 27

89 86 83 81 74 72 71 70 64

SOC_SOCHOT_L

SOC_HOLD_RESET

201

SOC_TESTMODE

34

34

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

SOC GPIO/SEP/USB/DDR/TEST

DRAWING NUMBER

051-05309

85 83 72 34

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SOC

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

39 OF 500

SHEET

34 OF 98

1

SIZE

D

D

678

84 43

43

85 15

84 43

IN
IN

IN

OUT

NC_WLAN_CONTEXT_A

43

NC_WLAN_CONTEXT_B

43

ACCEL_INT1
ACCEL_INT2
SE_HOST_WAKE_R

45

SOC_PERST_L

NC_ALTIMETER_INT

43

SPI_ACCEL_CS_L

NC_SPI_ALTIMETER_CS_L

43

NC_I2C_AOP_SCL

43

NC_I2C_AOP_SDA

43

B5

AOP_FUNC[0]

D4

AOP_FUNC[1]

G1

AOP_FUNC[2]

C5

AOP_FUNC[3]

D1

AOP_FUNC[4]

E4

AOP_FUNC[5]

C4

AOP_FUNC[6]

F4

AOP_FUNC[7]

E1

AOP_FUNC[8]

H6

AOP_I2C0_SCL

G6

AOP_I2C0_SDA

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 6 OF 17

(IPD)
(IPD)

AOP

(IPU)

(IPD)
(IPD)

AOP_PDM_CLK0
AOP_PDM_CLK1
AOP_PDM_CLK2
AOP_PDM_CLK3
AOP_PDM_CLK4

AOP_PDM_DATA0
AOP_PDM_DATA1

AOP_SPI_MOSI
AOP_SPI_SCLK
AOP_SPI_MISO

N6
J6
F5
F2
J4

F1
J1

A5
E5
C2

PDM_DMIC_CLK0_R
PDM_DMIC_CLK1_R
TP_SMC_FIXTURE_MODE_L
NC_PLCAM_PROX_INT_L
NC_PLCAM_ROMEO_B2B_DETECT

PDM_DMIC_DATA0
PDM_DMIC_DATA1

SPI_AOP_SENSOR_MOSI_R
SPI_AOP_SENSOR_CLK_R
SPI_AOP_SENSOR_MISO

83

43

43

OUT
OUT

OUT
OUT

IN
IN

IN

3 245

43

43

60

60

43

43

1

D

84 43

C

72

72

85 83 72 60

OUT
BI

IN

SPMI_CLK
SPMI_DATA

PMU_COLD_RESET_L

PLACE_NEAR=U3900.AA6:5MM

R4036
R4037

PLACE_NEAR=U7800.M7:5MM

20
20

R4039

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

83 46

21
21

83 72

4.7K

21

201MF1/20W5%

17

16

57

62

72

201MF1/20W5%
201MF1/20W5%

IN
IN

IN
OUT
OUT

IN

IN

IN

DFR_TOUCH_INT_L

CPU_SMC_THRMTRIP_L
NC_SMC_GFX_SELF_THROTTLE

43

NC_SMC_TOPBLK_SWP_L

43

XDP_PRESENT_L
CODEC_RESET_L
NC_BT_DEV_WAKE

NC_PCIEDN_WAKE_L

43

NC_ENET_LOW_PWR

43

TPAD_SPI_INT_L

NC_SDCONN_STATE_CHANGE_L

43

NC_ENET_MEDIA_SENSE

43

PMU_INT_L
SPMI_CLK_R

SPMI_DATA_R
PMU_CLK32K_SOC
SOC_COLD_RESET_L

83

AG6

AON_GPIO0

AB6

AON_GPIO1

AL1

AON_GPIO2

AH5

AON_GPIO3

AG1

AON_GPIO4

AL4

AON_GPIO5

AK4

AON_GPIO6

AD6

AON_GPIO7

AM1

AON_GPIO8

AJ6

AON_GPIO9

AK5

AON_GPIO10

AJ1

AON_GPIO11

AL6

AON_GPIO12

AA6

AON_SPMI_SCLK

AK2

AON_SPMI_SDATA

AK6

RT_CLK32768

AG4

COLD_RESET*

AF4

CFSB_AON

(IPU)

(IPU)

FCCSP

TMIB21B0-B7

SYM 5 OF 17

AON

(IPU)
(IPU)
(IPU)

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

(IPD)

JTAG_TRST*

JTAG_SEL

DOCK_CONNECT

AON_SWD0_TMS
AON_SWD1_TMS

AON_SWD01_TCK

AON_SLEEP1_RESET*

WDOG

AF6
AH1
AE6
AK1
AH6
Y8

AJ5

AF2
AE4
AE5

AF5

AC6

SWD_SOC_SWCLK
SWD_SOC_SWDIO
DEBUG_JTAG_SOC_TDI
DEBUG_JTAG_SOC_TDO
TP_JTAG_SOC_TRST_L
SOC_JTAG_SEL

(DAP=0, TAP=1)

SOC_DOCK_CONNECT
NC_SOC_WLAN_JTAG_TMS

NC_MESA_MENUKEY_L
NC_SOC_WLAN_JTAG_TCK

SOC_WDOG
AON_SLEEP1_RESET_L

OUT

OUT

OUT

IN

IN

IN

BI

83

35

43

43

43

89

83

83

34

89

83 35 29 28

85 83 72

C

B

A

R4046
R4047

10K

100K

COLD_RESET and CFSB_AON requires isolation per <rdar://30222445>

OMIT_TABLE

CRITICAL

PLACE_NEAR=U3900.R4:5MM
PLACE_NEAR=U3900.R1:5MM
PLACE_NEAR=U3900.T5:5MM
PLACE_NEAR=U3900.T6:5MM

12

BI

12

BI

12

BI

12

BI

21
21

ESPI_IO<0>
ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>

SOC_JTAG_SEL

201MF1/20W5%

SOC_DOCK_CONNECT

201MF1/20W5%

R4050
R4051
R4052
R4053

20
20
20
20

35

83 35 29 28

21
21
21
21

85 83 82 81 72 34

12

12

12

42

42

42

42

42 18

83 42

89 83 72 18

65 43 42

83 47 29 27

83 47 29 27

47

47

47

47

47

47

83 72 47

83 72 47

47

47

81 47

81 47

201MF1/20W5%
201MF1/20W5%
201MF1/20W5%
201MF1/20W5%

IN
IN
IN

IN

OUT

OUT
OUT

OUT
OUT

IN

BI

IN

OUT
BI

OUT
BI

OUT
BI

OUT
BI

OUT
BI

OUT
BI

OUT
BI

ESPI_IO_R<0>
ESPI_IO_R<1>
ESPI_IO_R<2>
ESPI_IO_R<3>
ESPI_CLK60M
ESPI_CS_L
ESPI_RESET_L

SMC_PECI_RX
SMC_PECI_TX

SMC_PCH_PWROK
SMC_PCH_SYS_PWROK

SMC_RSMRST_L
SMC_SYSRST_L

PM_SLP_S0_L
SMC_PROCHOT_L

PMU_SYS_ALIVE
I2C_UPC_SCL

I2C_UPC_SDA
I2C_SNS0_S0_SCL

I2C_SNS0_S0_SDA
I2C_THMSNS_SCL

I2C_THMSNS_SDA
I2C_DISP_SCL

I2C_DISP_SDA
I2C_PWR_SCL

I2C_PWR_SDA
I2C_SENSE_SCL

I2C_SENSE_SDA
I2C_SSD_SCL

I2C_SSD_SDA

R4

SMC_ESPI_IO0

R1

SMC_ESPI_IO1

T5

SMC_ESPI_IO2

T6

SMC_ESPI_IO3

P2

SMC_ESPI_CLK

T4

SMC_ESPI_CS*

T2

SMC_ESPI_RESET*

M6

SMC_PECI_IN

R6

SMC_PECI_OUT

U7

PCH_PWROK

U8

SYS_PWROK

U1

RSMRST*

U5

SYS_RESET*

W1

SLP_S0B

P6

PROCHOT*

W6

SYS_ALIVE

K4

SMC_I2C0_SCL

H1

SMC_I2C0_SDA

L4

SMC_I2C1_SCL

L5

SMC_I2C1_SDA

M4

SMC_I2C2_SCL

K1

SMC_I2C2_SDA

L2

SMC_I2C3_SCL

P5

SMC_I2C3_SDA

L1

SMC_I2C4_SCL

M1

SMC_I2C4_SDA

N1

SMC_I2C5_SCL

N2

SMC_I2C5_SDA

P1

SMC_I2C6_SCL

P4

SMC_I2C6_SDA

POP-1GB-20NM-M-SCK

TMIB21B0-B7

SYM 9 OF 17

(IPD)

(IPD)

(IPD)

U3900

FCCSP

SMC

(IPU)
(IPU)
(IPU)

(IPU)

(IPD)
(IPD)

SMC_GPIO0
SMC_GPIO1
SMC_GPIO2
SMC_GPIO3
SMC_GPIO4
SMC_GPIO5
SMC_GPIO6
SMC_GPIO7
SMC_GPIO8

SMC_GPIO9
SMC_GPIO10
SMC_GPIO11
SMC_GPIO12
SMC_GPIO13
SMC_GPIO14

SMC_GPIO_15

SMC_ADC0
SMC_ADC1
SMC_ADC2
SMC_ADC3
SMC_ADC4
SMC_ADC5
SMC_ADC6
SMC_ADC7

REFP_ADC
REFM_ADC

SMC_PWM0

SMC_TACH0

SMC_PWM1

SMC_TACH1

SMC_PWM2

SMC_UART0_RXD
SMC_UART0_TXD

SWD_OUT0_TCK
SWD_OUT0_TMS

SWD_OUT1_TCK
SWD_OUT1_TMS

V4
V8
V6
U4
V7
U6
V1
W5
AC1
AB2
AB1
AA4
W8
AA1
AC2
K2

AE1
Y5
AE2
AB5
Y7
AD4
AF1
Y6

AC5
AC4

E2
K6

N5
L6

K5

U2
T1

AB4
Y1

AD1
W7

CODEC_WAKE_L
NC_BT_HOST_WAKE
WLBT_HOST_WAKE
DP_INT_HPD_MASK
SMC_LID_RIGHT
NC_PCC_EVENT
NC_TPAD_VIBE_L
TPAD_KBD_WAKE_L
SMC_LID_LEFT
NC_SPI_DESCRIPTOR_OVERRIDE_L
NC_DISP_GCON_INT_L
NC_PCH_GCON_INT_L
TPAD_ACTUATOR_DISABLE_L
TBT_WAKE_L
UPC_I2C_INT_L
DP_INT_HPD_L

SMC_CPU_HS_ISENSE
SMC_PBUS_VSENSE
SMC_BMON_ISENSE
SMC_DCIN_ISENSE
SMC_DCIN_VSENSE
SMC_PP3V3_WLANBT_ISENSE
SMC_PP1V8_WLANBT_ISENSE
SMC_CALPE_ISENSE

PP1V25_SLPS2R_SMC_AVREF
GND_SMC_AVSS

SMC_FAN_0_PWM
SMC_FAN_0_TACH

NC_SMC_FAN_1_PWM
NC_SMC_FAN_1_TACH

NC_SMC_LED_ONEWIRE
SMC_DEBUGPRT_RX

SMC_DEBUGPRT_TX
SSD0_SWCLK

SSD0_SWDIO
NC_SSD1_SWCLK_UART_R2D

NC_SSD1_SWDIO_UART_D2R

42

43

43

43

43

43

43

43

43

43

43

OUT

OUT

OUT

OUT

IN
IN
IN

IN

IN
IN

IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

IN

IN

BI

BI

57

27

43

49

49

49

49

49

50

51

52

55

62

33 32

43 13

83 43

83 62

83 43

B

47 29 28 27

52 51 50 49 42

1

PLACE_NEAR=U3900.AC4:4MM

60 55

XW4089

SM

2

89 83

89 83

82 80 79 78 77

82 80 79 78 77

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

SOC AOP/AON/SMC

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

6.0.0

BOM_COST_GROUP=SOC

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

40 OF 500

SHEET

35 OF 98

8

67

35 4

2

1

D

678

3 245

1

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

84 76

84 76

84 76

84 76

46

46

46

46

IN
IN

IN
IN

OUT
OUT

OUT
OUT

MIPI_FTCAM_DATA_P<0>
MIPI_FTCAM_DATA_N<0>

MIPI_FTCAM_CLK_P
MIPI_FTCAM_CLK_N

MIPI_DFR_DATA_P
MIPI_DFR_DATA_N

MIPI_DFR_CLK_P
MIPI_DFR_CLK_N

SOC_MIPI0C_REXT

SOC_MIPI1C_REXT

SOC_MIPID_REXT

B24

MIPI0C_DATA0_P

A24

MIPI0C_DATA0_N

B22

MIPI0C_DATA1_P

A22

MIPI0C_DATA1_N

B23

MIPI0C_CLK_P

A23

MIPI0C_CLK_N

B25

MIPI1C_DATA0_P

A25

MIPI1C_DATA0_N

B27

MIPI1C_DATA1_P

A27

MIPI1C_DATA1_N

B26

MIPI1C_CLK_P

A26

MIPI1C_CLK_N

B30

MIPID_DATA0_P

A30

MIPID_DATA0_N

B29

MIPID_CLK_P

A29

MIPID_CLK_N

F23

MIPI0C_REXT

F25

MIPI1C_REXT

F26

MIPID_REXT

FCCSP

TMIB21B0-B7

SYM 4 OF 17

ISP

ISP_I2C0_SDA
ISP_I2C0_SCL

ISP_I2C1_SDA
ISP_I2C1_SCL

SENSOR0_CLK
SENSOR0_RST

SENSOR0_ISTRB

SENSOR1_CLK
SENSOR1_RST

SENSOR1_ISTRB

SENSOR2_CLK
SENSOR2_RST

(IPD)

SENSOR_INT

DISP_TE

DISP_VSYNC

CLK32K_OUT

AC28
AD33

AA29
AD30

AF32
AF30
AC29

AA28
AB30
AA30

AB28
AD28
W28

D33

L30

AF29

I2C_FTCAM_SDA
I2C_FTCAM_SCL

NC_I2C_PLCAM_SDA
NC_I2C_PLCAM_SCL

NC_FTCAM_CLK12M_R
NC_FTCAM_RESET_L
DFR_TOUCH_RESET_L

NC_PLCAM_RX_CLK12M_R
NC_PLCAM_RX_RESET_L
DFR_DISP_RESET_L

NC_PLCAM_TX_CLK12M_R
NC_PLCAM_TX_RESET_L
NC_PLCAM_TX_INT

DFR_DISP_TE
BOARD_REV2
DFR_TOUCH_CLK32K_RESET_L

43

43

43

43

43

43

43

43

43

OUT

OUT

OUT

IN

IN

OUT

BI

48

48

D

83 46

83 46

83 46

42

83 46

C

B

1

R4100

4.02K

1%
1/20W
MF
201

2

PLACE_NEAR=U3900.F23:5MM

1

R4101

4.02K

1%
1/20W
MF
201

2

PLACE_NEAR=U3900.F25:5MM

58 48

58 48

59 48

59 48

57 48

57 48

48

48

48

48

83 59

83 58

45

45

45

45

BI
OUT

BI
OUT

BI
OUT

BI
OUT

BI
OUT

IN
IN

IN

OUT

IN

OUT

1

R4102

4.02K

1%
1/20W
MF
201

2

PLACE_NEAR=U3900.F26:5MM

I2C_SPKRAMP_L_SDA
I2C_SPKRAMP_L_SCL

I2C_SPKRAMP_R_SDA
I2C_SPKRAMP_R_SCL

I2C_CODEC_SDA
I2C_CODEC_SCL

I2C_ALS_SDA
I2C_ALS_SCL

I2C_DFR_SDA
I2C_DFR_SCL

NC_I2C_SOC_5_SDA

43

NC_I2C_SOC_5_SCL

43

SPKR_ID1
SPKR_ID0

SOC_DEBUGPRT_RX

83

SOC_DEBUGPRT_TX

83

UART_SE_D2R
UART_SE_R2D
UART_SE_D2R_CTS_L
UART_SE_R2D_RTS_L

NC_UART_BT_D2R

43

NC_UART_BT_R2D

43

NC_UART_BT_D2R_CTS_L

43

NC_UART_BT_R2D_RTS_L

43

W33
U30

AB32

V30

H30
P28

V28

AB33

L33
R29

M29
R30

J33
L29

V32
U32

B15
A15
D13
E12

F32
F30
M28
K28

I2C0_SDA
I2C0_SCL

I2C1_SDA
I2C1_SCL

I2C2_SDA
I2C2_SCL

I2C3_SDA
I2C3_SCL

I2C4_SDA
I2C4_SCL

I2C5_SDA
I2C5_SCL

I2C6_SDA
I2C6_SCL

UART0_RXD
UART0_TXD

UART1_RXD
UART1_TXD
UART1_CTS*
UART1_RTS*

UART2_RXD
UART2_TXD
UART2_CTS*
UART2_RTS*

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 2 OF 17

I2C/UART/SPI/I2S

(IPU)
(IPU)

(IPU)

(IPU)

(IPD)

SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN

SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN

SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN

SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN

I2S0_DIN
I2S0_DOUT
I2S0_BCLK
I2S0_LRCK

I2S0_MCK

I2S1_DIN
I2S1_DOUT
I2S1_BCLK
I2S1_LRCK

I2S1_MCK

AN6
AM4
AN3
AP6

K30
J30
K33
R28

B17
C17
D16
A17

C14
D15
C16
A16

Y28
AC32
Y29
AE32
AM33

C18
E17
D17
B18
D18

SPI_SOCROM_MISO
SPI_SOCROM_MOSI_R
SPI_SOCROM_CLK_R
SPI_SOCROM_CS_L

SPI_TPAD_MISO
SPI_TPAD_MOSI_R
SPI_TPAD_CLK_R
SPI_TPAD_CS_L

SPI_MESA_MISO
SPI_MESA_MOSI_R
SPI_MESA_CLK_R
WLAN_THROTTLE

SPI_DFR_MISO
SPI_DFR_MOSI_R
SPI_DFR_CLK_R
SPI_DFR_CS_L

I2S_SPKRAMP_L_D2R
I2S_SPKRAMP_L_R2D_R
I2S_SPKRAMP_L_BCLK_R
I2S_SPKRAMP_L_LRCLK
NC_DFR_TOUCH_RSVD

I2S_SPKRAMP_R_D2R
I2S_SPKRAMP_R_R2D_R
I2S_SPKRAMP_R_BCLK_R
I2S_SPKRAMP_R_LRCLK
NC_PCHROM_SW_EN

43

43

IN

OUT

IN
OUT
OUT
OUT

IN
OUT
OUT
OUT

IN
OUT
OUT
OUT

IN
OUT
OUT
OUT

IN
OUT
OUT
OUT

42

42

43

43

62

44

43

43

43

43

43

43

43

43

43

43

43

43

C

PLACE_NEAR=U3900.AM4:5MM
PLACE_NEAR=U3900.AN3:5MM

R4171
R4172

43 42

33 32

83 46

20
20

21
21

SPI_SOCROM_MOSI

201MF1/20W5%

SPI_SOCROM_CLK

201MF1/20W5%

OUT
OUT

42

42

B

59 58

A

32

32

43 32

32

43 32

32

IN

OUT

IN

OUT

IN

OUT

UART_BT_LH_D2R
UART_BT_LH_R2D
NC_UART_GNSS_D2R_CTS_L

43

NC_UART_GNSS_R2D_RTS_L

43

UART_WLAN_D2R
UART_WLAN_R2D
UART_WLAN_D2R_CTS_L
UART_WLAN_R2D_RTS_L

H32
J32
H33
P30

B14
A14
C13
D12

UART3_RXD
UART3_TXD
UART3_CTS*
UART3_RTS*

UART4_RXD
UART4_TXD
UART4_CTS*
UART4_RTS*

(IPD)

I2S2_DIN
I2S2_DOUT
I2S2_BCLK
I2S2_LRCK

I2S2_MCK

I2S3_DIN
I2S3_DOUT
I2S3_BCLK
I2S3_LRCK

I2S3_MCK

Y33
AA33
AE33
V29
AL30

R32
U33
T33
U29
V33

I2S_CODEC_D2R
I2S_CODEC_R2D_R
I2S_CODEC_BCLK_R
I2S_CODEC_LRCLK
NC_I2S_CODEC_MCLK

NC_I2S_HAWKING_D2R
NC_I2S_CODEC1_R2D_R
NC_I2S_HAWKING_BCLK_R
NC_I2S_HAWKING_LRCLK
NC_I2S_CODEC1_MCLK

43

43

43

43

43

43

IN
OUT
OUT
OUT

57

43

43

43

BOM_COST_GROUP=SOC

PAGE TITLE

SOC ISP/I2C/UART/SPI/I2S

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

41 OF 500

SHEET

36 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

D

14

14

14

14

14

14

14

14

14

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT

PCIE_SOC_D2R_P<0>
PCIE_SOC_D2R_N<0>

PCIE_SOC_D2R_P<1>
PCIE_SOC_D2R_N<1>

PCIE_SOC_D2R_P<2>
PCIE_SOC_D2R_N<2>

PCIE_SOC_D2R_P<3>
PCIE_SOC_D2R_N<3>

SOC_CLKREQ_L

C4210

0.22UF

C4211

0.22UF

C4212

0.22UF

C4213

0.22UF

C4214

0.22UF

C4215

0.22UF

C4216

0.22UF

C4217

0.22UF

R4218

1K

21

20% 6.3V X5R 0201

21

0201X5R6.3V20%

21

6.3V X5R 020120%

21

20% 6.3V X5R 0201

21

20% 6.3V X5R 0201

21

20% 6.3V

21

20% X5R 0201

6.3V

21

20% X5R

21

X5R 0201

02016.3V

MF 2015% 1/20W

678

43

43

43

43

43

43

43

43

84 14

84 14

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

PCIE_SOC_D2R_C_P<0>
PCIE_SOC_D2R_C_N<0>
PCIE_SOC_R2D_P<0>
PCIE_SOC_R2D_N<0>

PCIE_SOC_D2R_C_P<1>
PCIE_SOC_D2R_C_N<1>
PCIE_SOC_R2D_P<1>
PCIE_SOC_R2D_N<1>

PCIE_SOC_D2R_C_P<2>
PCIE_SOC_D2R_C_N<2>
PCIE_SOC_R2D_P<2>
PCIE_SOC_R2D_N<2>

PCIE_SOC_D2R_C_P<3>
PCIE_SOC_D2R_C_N<3>
PCIE_SOC_R2D_P<3>
PCIE_SOC_R2D_N<3>

SOC_CLKREQ_R_L
PCIE_CLK100M_SOC_P

PCIE_CLK100M_SOC_N
SOC_PCIE_UP_REXT

PLACE_NEAR=U3900.G10:5MM

1

R4200

3.01K

1%
1/20W
MF
201

2

B10

PCIE_UP_TX0_P

C10

PCIE_UP_TX0_N

E10

PCIE_UP_RX0_P

F10

PCIE_UP_RX0_N

A9

PCIE_UP_TX1_P

B9

PCIE_UP_TX1_N

D9

PCIE_UP_RX1_P

E9

PCIE_UP_RX1_N

B8

PCIE_UP_TX2_P

C8

PCIE_UP_TX2_N

E8

PCIE_UP_RX2_P

F8

PCIE_UP_RX2_N

A7

PCIE_UP_TX3_P

B7

PCIE_UP_TX3_N

D7

PCIE_UP_RX3_P

E7

PCIE_UP_RX3_N

A18

PCIE_UP_CLKREQ*

G12

PCIE_UP_EXT_REFCLK_P

G11

PCIE_UP_EXT_REFCLK_N

G10

PCIE_UP_REXT

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 1 OF 17

PCIE UP/DN

PCIE_DN_TX0_P
PCIE_DN_TX0_N
PCIE_DN_RX0_P
PCIE_DN_RX0_N

PCIE_DN_TX1_P
PCIE_DN_TX1_N
PCIE_DN_RX1_P
PCIE_DN_RX1_N

PCIE_DN_TX2_P
PCIE_DN_TX2_N
PCIE_DN_RX2_P
PCIE_DN_RX2_N

PCIE_DN_TX3_P
PCIE_DN_TX3_N
PCIE_DN_RX3_P
PCIE_DN_RX3_N

PCIE_DN_REFCLK0_P
PCIE_DN_REFCLK0_N

PCIE_DN_CLKREQ0*

PCIE_DN_PERST0*

PCIE_DN_REFCLK1_P
PCIE_DN_REFCLK1_N

PCIE_DN_CLKREQ1*

PCIE_DN_PERST1*

PCIE_DN_REFCLK2_P
PCIE_DN_REFCLK2_N

PCIE_DN_CLKREQ2*

PCIE_DN_PERST2*

AP28
AN28
AL28
AK28

AN27
AM27
AK27
AJ27

AP26
AN26
AL26
AK26

AN25
AM25
AK25
AJ25

AK23
AL23
AG29
AJ33

AJ22
AK22
AG30
AG33

AN23
AP23
AD29
AH29

NC_PCIE_WLAN_R2D_C_P
NC_PCIE_WLAN_R2D_C_N
NC_PCIE_WLAN_D2R_P
NC_PCIE_WLAN_D2R_N

NC_PCIE_ENET_R2D_C_P
NC_PCIE_ENET_R2D_C_N
NC_PCIE_ENET_D2R_P
NC_PCIE_ENET_D2R_N

NC_PCIE_DN2_R2D_C_P
NC_PCIE_DN2_R2D_C_N
NC_PCIE_DN2_D2R_P
NC_PCIE_DN2_D2R_N

NC_PCIE_DN3_R2D_C_P
NC_PCIE_DN3_R2D_C_N
NC_PCIE_DN3_D2R_P
NC_PCIE_DN3_D2R_N

NC_PCIE_CLK100M_WLAN_P
NC_PCIE_CLK100M_WLAN_N
NC_WLAN_CLKREQ_L
NC_WLAN_PERST_L

NC_PCIE_CLK100M_ENET_P
NC_PCIE_CLK100M_ENET_N
ENET_CLKREQ_L
NC_ENET_RESET_L

NC_PCIE_CLK100M_DN2_P
NC_PCIE_CLK100M_DN2_N
NC_PCIEDN2_CLKREQ_L
NC_PCIEDN2_RESET_L

3 245

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

37

43

43

43

43

43

1

D

(UID_MODE strap on A00)

C

B

77

77

84 77

84 77

78

78

78

78

79

79

79

79

80

80

80

80

OUT
OUT

IN
IN

OUT
OUT

IN
IN

OUT
OUT

IN
IN

OUT
OUT

IN
IN

PCIE_SSD0_R2D_C_P<0>
PCIE_SSD0_R2D_C_N<0>
PCIE_SSD0_D2R_P<0>
PCIE_SSD0_D2R_N<0>

PCIE_SSD0_R2D_C_P<1>
PCIE_SSD0_R2D_C_N<1>
PCIE_SSD0_D2R_P<1>
PCIE_SSD0_D2R_N<1>

PCIE_SSD0_R2D_C_P<2>
PCIE_SSD0_R2D_C_N<2>
PCIE_SSD0_D2R_P<2>
PCIE_SSD0_D2R_N<2>

PCIE_SSD0_R2D_C_P<3>
PCIE_SSD0_R2D_C_N<3>
PCIE_SSD0_D2R_P<3>
PCIE_SSD0_D2R_N<3>

AN8
AM8
AK8
AJ8

AP9
AN9
AL9
AK9

AN10
AM10
AK10
AJ10

AP11
AN11
AL11
AK11

PCIE_STG0_TX0_P
PCIE_STG0_TX0_N
PCIE_STG0_RX0_P
PCIE_STG0_RX0_N

PCIE_STG0_TX1_P
PCIE_STG0_TX1_N
PCIE_STG0_RX1_P
PCIE_STG0_RX1_N

PCIE_STG0_TX2_P
PCIE_STG0_TX2_N
PCIE_STG0_RX2_P
PCIE_STG0_RX2_N

PCIE_STG0_TX3_P
PCIE_STG0_TX3_N
PCIE_STG0_RX3_P
PCIE_STG0_RX3_N

PCIE_DN_EXT_REFCLK_P
PCIE_DN_EXT_REFCLK_N

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 8 OF 17

PCIE STG 0/1

PCIE_DN_REFCLK3_P
PCIE_DN_REFCLK3_N

PCIE_DN_CLKREQ3*

PCIE_DN_PERST3*

PCIE_DN_REXT

PCIE_STG1_TX0_P
PCIE_STG1_TX0_N
PCIE_STG1_RX0_P
PCIE_STG1_RX0_N

PCIE_STG1_TX1_P
PCIE_STG1_TX1_N
PCIE_STG1_RX1_P
PCIE_STG1_RX1_N

PCIE_STG1_TX2_P
PCIE_STG1_TX2_N
PCIE_STG1_RX2_P
PCIE_STG1_RX2_N

PCIE_STG1_TX3_P
PCIE_STG1_TX3_N
PCIE_STG1_RX3_P
PCIE_STG1_RX3_N

AM22
AN22
AF33
AE30

AH25
AH24

AH23

AN13
AM13
AK13
AJ13

AP14
AN14
AL14
AK14

AN15
AM15
AK15
AJ15

AP16
AN16
AL16
AK16

NC_PCIE_CLK100M_DN3_P
NC_PCIE_CLK100M_DN3_N
NC_PCIEDN3_CLKREQ_L
NC_PCIEDN3_RESET_L

SOC_PCIE_DN_REXT

PLACE_NEAR=U3900.AH23:5MM

R4201

3.01K

1%

1/20W

MF

201

NC_PCIE_SSD1_R2D_C_P<0>
NC_PCIE_SSD1_R2D_C_N<0>
NC_PCIE_SSD1_D2R_P<0>
NC_PCIE_SSD1_D2R_N<0>

NC_PCIE_SSD1_R2D_C_P<1>
NC_PCIE_SSD1_R2D_C_N<1>
NC_PCIE_SSD1_D2R_P<1>
NC_PCIE_SSD1_D2R_N<1>

NC_PCIE_SSD1_R2D_C_P<2>
NC_PCIE_SSD1_R2D_C_N<2>
NC_PCIE_SSD1_D2R_P<2>
NC_PCIE_SSD1_D2R_N<2>

NC_PCIE_SSD1_R2D_C_P<3>
NC_PCIE_SSD1_R2D_C_N<3>
NC_PCIE_SSD1_D2R_P<3>
NC_PCIE_SSD1_D2R_N<3>

43

43

43

43

1

2

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

C

B

A

PP1V8_AWAKE

R4232

47K

21

5% 1/20W MF 201

83 72 70 62 43 42 40 27

ENET_CLKREQ_L

37

84 78 77

77

84 78

77 43

78 43

84 80 79

84 80 79

79 43

80 43

80 79 78 77 43

43

OUT
OUT

IN
IN

OUT
OUT

IN
IN

OUT

OUT

PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_01_N
SSD0_CLKREQ0_L
SSD0_CLKREQ1_L

PCIE_CLK100M_SSD0_23_P
PCIE_CLK100M_SSD0_23_N
SSD0_CLKREQ2_L
SSD0_CLKREQ3_L

SSD0_PCIE_RESET_L

SSD0_CLK24M_R

SOC_PCIE_STG0_REXT

PLACE_NEAR=U3900.AH14:5MM

1

R4250

3.01K

1%
1/20W
MF
201

2

AK18
AL18
AM30
AK30

AJ19
AK19
AL33
AK33

AM32

AM6

AH12
AH13

AH14

PCIE_STG0_REFCLK01_P
PCIE_STG0_REFCLK01_N
PCIE_STG0_CLKREQ0*
PCIE_STG0_CLKREQ1*

PCIE_STG0_REFCLK23_P
PCIE_STG0_REFCLK23_N
PCIE_STG0_CLKREQ2*
PCIE_STG0_CLKREQ3*

PCIE_STG0_PERST*

PCIE_STG0_NANDCLK

PCIE_STG0_EXT_REFCLK_P
PCIE_STG0_EXT_REFCLK_N

PCIE_STG0_REXT

PCIE_STG1_REFCLK01_P
PCIE_STG1_REFCLK01_N

PCIE_STG1_CLKREQ0*
PCIE_STG1_CLKREQ1*

PCIE_STG1_REFCLK23_P
PCIE_STG1_REFCLK23_N

PCIE_STG1_CLKREQ2*
PCIE_STG1_CLKREQ3*

PCIE_STG1_PERST*

PCIE_STG1_NANDCLK

PCIE_STG1_EXT_REFCLK_P
PCIE_STG1_EXT_REFCLK_N

PCIE_STG1_REXT

AN18
AP18
C15
E15

AM19
AN19
E14
D14

AK32

AM2

AH17
AH18

AH19

NC_PCIE_CLK100M_SSD1_01_P
NC_PCIE_CLK100M_SSD1_01_N
NC_SSD1_CLKREQ0_L
NC_SSD1_CLKREQ1_L

NC_PCIE_CLK100M_SSD1_23_P
NC_PCIE_CLK100M_SSD1_23_N
NC_SSD1_CLKREQ2_L
NC_SSD1_CLKREQ3_L

NC_SSD1_PCIE_RESET_L

NC_SSD1_CLK24M_R

SOC_PCIE_STG1_REXT

PLACE_NEAR=U3900.AH19:5MM

R4251

3.01K

1%

1/20W

MF

201

43

43

43

43

43

43

43

43

43

43

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

SOC PCIE

DRAWING NUMBER

051-05309

1

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

2

BOM_COST_GROUP=SOC

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

42 OF 500

SHEET

37 OF 98

SIZE

D

8

67

35 4

2

1

678

3 245

1

D

Current estimates @ 105C & 2GB from Gibraltar Power Specification Rev 0.5.3

86 83 70 43 86 83 70

PPVDDCPU_AWAKE PPVDDCPUSRAM_AWAKE

0.625V - 1.06V

11.6A Max

C4300

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4305

9.1UF

4V
CERM
0402

1

3

4

2

C4320

9.1UF

20%

4V
CERM
0402

1

3

C4301

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4306

9.1UF

20%20%

4V
CERM
0402

1

3

4

2

C4321

9.1UF

20%

4V
CERM
0402

1

3

C4302

20%

4V
CERM
0402

1

3

4

2

C4307

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4322

9.1UF

20%

4V
CERM
0402

1

3

C4303

9.1UF9.1UF

20%

4V
CERM
0402

1

3

4

2

C4308

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4323

9.1UF

20%

4V
CERM
0402

1

3

C4304

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4309

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4324

9.1UF

20%

4V
CERM
0402

1

3

AA12
AA14
AA16
AB11
AB13
AB15

N12
N14
N16
P11
P13
P15
R10
R12
R14
U12
U14
U16
W10
W12
W14
Y11
Y13
Y15

VDD_CPU

OMIT_TABLE
CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 10 OF 17

VDD_CPU_SRAM

VDD_CPU_SENSE

VSS_CPU_SENSE

AA10
N10
R16
T11
T13
T15
U10
V11
V13
V15
W16

M17

M16

C4350

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4351

1

SOC_VDDCPU_SENSE
NC_SOC_VSSCPU_SENSE

9.1UF

20%

4V
CERM
0402

4

2

0.8V - 1.06V

0.9A Max

C4352

9.1UF

20%

4V
CERM
0402

3

1

3

C4353

9.1UF

20%

4V
CERM
0402

1

3

C4354

9.1UF

20%

4V
CERM
0402

1

3

C4357

9.1UF

20%

4V
CERM
0402

1

3

D

4

2

C4360

9.1UF

20%

4V
CERM
0402

1

3

4

2

OUT

4

4

2

4

2

C4355

9.1UF

20%

4V
CERM
0402

1

84 72

3

4

2

2

C4356

9.1UF

20%

4V
CERM
0402

1

3

4

2

C

4

2

C4330

9.1UF

20%

4V
CERM
0402

1

3

4

2

4

2

C4331

9.1UF

20%

4V
CERM
0402

1

3

4

2

4

2

C4332

9.1UF

20%

4V
CERM
0402

1

3

4

2

4

2

C4333

9.1UF

20%

4V
CERM
0402

1

3

4

2

4

2

C4334

9.1UF

20%

4V
CERM
0402

1

3

4

2

C

OMIT_TABLE
CRITICAL

B

86 83 70 43

PP0V82_SLPDDR

5.6A Max

C4370

9.1UF 9.1UF

20%

4V
CERM
0402

1

3

4

2

C4380

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4385

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4371

20%

4V
CERM
0402

1

2

C4381

9.1UF

20%

4V
CERM
0402

1

2

C4386

9.1UF

20%

4V
CERM
0402

1

2

U3900

POP-1GB-20NM-M-SCK

AC10
AC12

C4372

9.1UF 9.1UF

20%

4V
CERM
0402

3

4

3

4

3

4

1

3

4

2

C4373

20%

4V
CERM
0402

1

3

4

2

AC14
AC16
AC18
AC20
AC22
AC24
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD25

L10
L12
L14
L16
L18
L20
L22
L24
M11
M13
M15
M19
M21
M23
M25

VDD_SOC

FCCSP

TMIB21B0-B7

SYM 11 OF 17

VDD_SOC

VDD_SOC_SENSE

VSS_SENSE

R18
R20
R22
R24
T19
T21
T23
T25
W18
W20
W22
W24
Y17
Y19
Y21
Y23

Y25

Y26

B

NC_SOC_VDDSOC_SENSE
NC_SOC_VSSSOC_SENSE

A

8

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

SOC POWER 1

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SOC

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

43 OF 500

SHEET

38 OF 98

1

SIZE

D

D

678

Current estimates @ 105C & 2GB from Gibraltar Power Specification Rev 0.5.3

83 71 40 39 34

PP1V1_SLPDDR

0.86A Max

C4450

2.2UF

20%

4V

X6S-CERM

0201

C4454

2.2UF

20%

4V

X6S-CERM

0201

1

C4451

2.2UF

2

1

2

C4455

4V

X6S-CERM

0201

2.2UF

20%

4V

X6S-CERM

0201

3 245

1

R4460

5.1

OMIT_TABLE

CRITICAL

1% MF1/20W

FL4400

120-OHM-25%-0.48A-0.21DCR

U3900

83 71 40 39 34

POP-1GB-20NM-M-SCK

FCCSP

C3
E3
G3
H8
J9
K8
L9
P3
R3
U3

C33
E31
G31
H27
J26
K27
L26
P31
R31
U31

VDDIO11_DDR0

VDDIO11_DDR1

20%20%

4V

0201

20%

4V

0201

1

2

1

2

1

C4452

2.2UF

2

1

X6S-CERM

C4456

2.2UF

2

X6S-CERM

20%

4V

0201

20%

4V

0201

1

C4453

2.2UF

2

1

X6S-CERM

C4457

2.2UF

2

X6S-CERM

TMIB21B0-B7

13 OF 17

VDDIO11_PLL_DDR0
VDDIO11_PLL_DDR1
VDDIO11_PLL_DDR2
VDDIO11_PLL_DDR3

VDDIO11_RET_DDR0
VDDIO11_RET_DDR1
VDDIO11_RET_DDR2
VDDIO11_RET_DDR3

H9
G26
AG8
AF26

G4
D30
AJ4
AJ30

1

C4460

0.22UF 0.22UF

20%

6.3V

2

X6S-CERM
0201

1

C4470

2.2UF

20%
4V

2

X6S-CERM
0201

PP1V1_SLPDDR

8mA Max

1

C4461

20%

6.3V

2

X6S-CERM
0201

1

C4471

2.2UF

20%
4V

2

X6S-CERM
0201

1

C4462

0.22UF

20%

6.3V

2

X6S-CERM
0201

1

C4472

2.2UF

20%
4V

2

X6S-CERM
0201

0201

PP1V1_SLPDDR_SOC_VDDIOPLLDDR_F

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C4463

0.22UF

20%

6.3V

2

X6S-CERM
0201

VOLTAGE=1.1V

PP1V1_SLPS2R

Current included in VDD2

1

C4473

2.2UF

20%
4V

2

X6S-CERM
0201

21

0201

21

D

86 83 71 70 40

C

B

86 83 70 43 39

PP0V9_SLPDDR

1.9A Max

C4400

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4405

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4410

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4401

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4406

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4411

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4402

9.1UF

20%

4V
CERM
0402

1

3

4

2

AA18
AA20
AA22
AA24
AB17
AB19
AB21
AB23
AB25
AE10
AE12
AE14
AE16
AE18
AE20
AE22
AE24
AE26

AG9
J10
J12
J14
J16
J18
J20
J22
J24
K11
K13
K15
K17
K19

VDD_FIXED

OMIT_TABLE

CRITICAL

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 12 OF 17

VDD_FIXED

K21
K23
K25
N18
N20
N22
N24
P17
P19
P21
P23
P25
U18
U20
U22
U24
V19
V21
V23
V25

C4430

4.3UF

20%

4V
CERM
0402

1

3

C4431

4.3UF

20%

4V
CERM
0402

1

3

PP0V9_SLPDDR

AB3
AC9
AD3
AD8
AE3
AE9
AF8
AK3
AM3

AA27
AB26
AB31
AC27
AD26
AD31
AE27
AE31
AK31
AM31

VDDIO11_DDR2

C

VDDIO11_DDR3

86 83 70 43 39

330mA Max

B

A

86 83 70 43 39

86 83 70 43 39

86 83 70 43 39

9mA Max

PP0V9_SLPDDR

PP0V9_SLPDDR

U17

VDD_FIXED_CPU

G19

VDD_FIXED_USB

VDD_FIXED_STG0_PCIE_ANA

AG11
AG12
AG14

4

2

4

2

PP0V9_SLPDDR

5mA Max

86 83 70 43 39

PP0V9_SLPDDR

25mA Max

83 71

PP0V8_SLPS2R

102mA Max

C4420

4.3UF

20%

4V
CERM
0402

1

3

4

2

C4423

2.2UF

20%

4V

X6S-CERM

0201

H20
H22
H24

M9
P9
T9
V9

1

2

Y9

H10
H12
H14

VDD_FIXED_MIPI

VDD_LOW

VDD_FIXED_UP_PCIE_ANA

VDD_FIXED_STG0_PCIE_CLK

VDD_FIXED_STG1_PCIE_ANA

VDD_FIXED_STG1_PCIE_CLK

VDD_FIXED_DN_PCIE_ANA

VDD_FIXED_DN_PCIE_CLK

PP0V9_SLPDDR PP0V9_SLPDDR_SOC_PCIEREFBUF

330mA Max

C4425

4.3UF

20%

4V
CERM
0402

1

3

4

2

C4426

4.3UF

20%

4V
CERM
0402

1

3

4

2

H13
J11
J13

VDD_FIXED_UP_PCIE_CLK

VDD_FIXED_PCIE_REFBUF

AF11
AF13
AF15

AG16
AG18
AG20

AF17
AF19
AG15

AG23
AG24
AG26

AF23
AF24
AF25

AE13
AE19
AE23
AF21
AG22

C4435

4.3UF

20%

4V
CERM
0402

1

3

4

2

C4440

4.3UF

20%

4V
CERM
0402

1

3

4

2

C4445

4.3UF

20%

4V
CERM
0402

1

3

4

2

C4436

4.3UF

20%

4V
CERM
0402

1

3

4

2

PP0V9_SLPDDR

C4441

4.3UF

20%

4V
CERM
0402

1

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0.9V

3

4

2

330mA Max

330mA Max

R4445

0

2 1

5%

1/20W

MF

0201

86 83 70 43 39

86 83 70 43 39

PP0V9_SLPDDR

45mA Max

86 83 70 43 39

BOM_COST_GROUP=SOC

PAGE TITLE

SOC POWER 2

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

44 OF 500

SHEET

39 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

Current estimates @ 105C & 2GB from Gibraltar Power Specification Rev 0.5.3

3 245

1

D

C

B

A

60 47 44 43 42 40 34 29 28 27

60 47 44 43 42 40 34 29 28 27

83 72 70 62 43 42 40 37 27

83 72 70 62 43 42 40 37 27

60 47 44 43 42 40 34 29 28 27

89

86 83 81 74 72 71 70 64 63

89

86 83 81 74 72 71 70 64 63

PP1V8_AWAKE
40mA Max

PP1V8_AWAKE

2MA MAX

OMIT_TABLE
CRITICAL

U3900

89

60 47 44 43 42 40 34 29 28 27 83 71 40

86 83 81 74 72 71 70 64 63

89

86 83 81 74 72 71 70 64 63

PP1V8_SLPS2R

20mA Max

PP1V8_SLPS2R

1mA Max

PP1V8_SLPS2R

1mA Max

C4521

2.2UF

20%

4V

X6S-CERM

0201

83 72 70 62 43 42 40 37 27

83 72 70 62 43 42 40 37 27

PP1V8_AWAKE

20mA Max

PP1V8_AWAKE

1mA Max

PP1V8_SLPS2R PP1V2_AWAKE

134mA Max

1

2

C4522

2.2UF

20%

4V

X6S-CERM

0201

R4530

0

5%

1/20W

MF

0201

C4510

2.2UF

X6S-CERM

R4515

49.9

1/20W

1%
MF

201

21

R4519

49.9

1/20W

1

2

21

C4530

83 72 70 62 43 42 40 37 27

C4540

21
1%
MF

201

C4523

2.2UF

X6S-CERM

0201

1UF

20%

6.3V

X6S-CERM

0201

0.1UF

10%

6.3V
X6S

0201

20%

4V

1

2

1

2

20%

0201

1

2

4V

1

2

C4511

9.1UF

1

C4501

2.2UF

X6S-CERM

20%

4V
CERM
0402

3

4

2

C4500

2.2UF

X6S-CERM

20%

4V

VOLTAGE=1.89
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

20%

4V

0201

1

2

C4512

9.1UF

20%

4V
CERM
0402

1

4

2

PP1V8_SLPS2R_SOC_LPADC_RC
PP1V8_SLPS2R_SOC_LPOSC_RC

VOLTAGE=1.89
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

2

C4524

9.1UF

20%

4V
CERM
0402

1

3

4

2

C4525

9.1UF

20%

4V
CERM
0402

1

2

C4519

3

4

PP1V8_AWAKE_SOC_TSADC_RC

VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V8_AWAKE

7mA Max

C4535

R4545

49.9

1/20W

1%
MF

201

21

C4545

1UF

20%

6.3V

X6S-CERM

0201

PP1V8_AWAKE_SOC_FMON_RC

VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

2

20%

0201

20%

4V

20%

4V
CERM
0402

2

20%

4V

4V

1

2

C4513

0.1UF

6.3V
02010201

1

2

3

4

1

2

C4503

X6S-CERM

1

10%

2

X6S

C4515

20UF

X6S-CERM

C4527

9.1UF

20%

4V
CERM
0402

1

2

C4536

0.1UF

C4502

2.2UF 2.2UF

X6S-CERM

3

2.2UF

X6S-CERM

0201

C4526

9.1UF

1

2.2UF

X6S-CERM

0201

20%

4V

0201

20%

2.5V
0402

4

10%

6.3V
X6S

0201

1

2

1

2

3

1

2

A4

AP3

AP30

B32

W2

W32

Y2

Y32

M8
N9
P8
R9
U9
W9

AA9
AB8

AA8

Y10

M27
N26
P27
R26
T27
U26
V27
W26

G15
G17
H16
H18

AE28
AG28

AH9

AH10

W17

N15
AA15
AC17

H25

G20

G22

G24

H19

AC11

AH28
AF10

VDD1

VDDIO18_AOP1

VDDIO18_AOP2

VDD18_LPADC

VDD18_LPOSC

VDDIO18_GRP1

VDDIO18_GRP2

VDDIO18_GRP3

VDDIO18_GRP4

VDD18_TSADC

VDD18_MIPI

VDD18_USB

VDD18_FMON

VDD18_EFUSE1
VDD18_EFUSE2

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 14 OF 17

VDD12_CPU_UVD

VDD12_PLL_CPU

VDD12_PCIE_REFBUF

VDD12_DN_PCIE
VDD12_UP_PCIE

VDD12_STG0_PCIE
VDD12_STG1_PCIE

VDD12_PLL_SOC

VDD2

VDD11_XTAL

VDD33_USB

V17

T17

AF22
AH21

AJ24
G13

AH11
AH16

AA21
AB20
Y20

AG3
AG31
AJ3
AJ31
AN2
AN30
AN31
B3
B4
C31
D32
J3
J31
K3
K31
M3
M31
W3
W31
Y3
Y31

AJ20

F21

10mA Max

1

C4550

2.2UF

20%
4V

2

X6S-CERM
0201

VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V2_AWAKE_SOC_PLLCPU_F
PP1V2_AWAKE_SOC_PCIEREFBUF_F

VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V2_AWAKE_SOC_PCIEPLL_F

VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V2_AWAKE_SOC_PLLSOC_F

VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C4580

2.2UF

20%
4V

2

X6S-CERM
0201

1

C4581

2.2UF

20%
4V

2

X6S-CERM
0201

PP1V1_SLPDDR_SOC_XTAL_F

VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP3V3_AWAKE

12mA Max

1

C4595

0.1UF

10%

6.3V

2

X6S
0201

C4560

0.1UF

C4565

2.2UF

X6S-CERM

C4570

0.1UF

1

C4582

2.2UF

20%
4V

2

X6S-CERM
0201

83 71

1

10%

6.3V
2

X6S

0201

1

20%

4V

2

0201

1

10%

6.3V
2

X6S

0201

C4590

0.1UF

R4555

C4555

0.1UF

10%

6.3V
X6S

0201

1

2

1/20W

0201

R4560

0

21

5%

1/20W

MF

0201

C4566

2.2UF

20%

X6S-CERM

0201

4V

1

2

1

2

C4561

0.1UF

10%

6.3V
X6S
0201

C4567

R4570

1/20W

0201

10%

6.3V
X6S

0201

1

2

C4571

0.1UF

PP1V1_SLPS2R

1

C4583

2.2UF

20%
4V

2

X6S-CERM
0201

R4590

5.1

1/20W1% 0201MF

21

L4590

FERR-240OHM-25%-350MA

0201

1

10%

6.3V
2

X6S

0201

0

21
5%
MF

2.2UF

20%

4V

X6S-CERM

0

21
5%
MF

21

PP1V2_AWAKE

PP1V2_AWAKE

1

C4562

2.2UF

20%
4V

2

X6S-CERM
0201

1

2

C4568

PP1V2_AWAKE

1

C4572

2.2UF

20%
4V

2

X6S-CERM
0201

1.74A Max

PP1V1_SLPDDR

1

C4591

2.2UF

20%
4V

2

X6S-CERM
0201

2.2UF

20%

4V

X6S-CERM

02010201

1

2

R4565

86 83 71 70 39

PAGE TITLE

13mA Max

80mA Max

0

21

5%

1/20W

MF

0201

31mA Max

4mA Max

83 71 40

83 71 40

PP1V2_AWAKE

83 71 40

83 71 39 34

60mA Max

D

C

83 71 40

B

A

SYNC_DATE=SYNC_MASTER=

8

SOC POWER 3

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SOC

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

45 OF 500

SHEET

40 OF 98

1

SIZE

D

678

3 245

1

D

C

B

A1
A2
A3
A6

A8
A10
A11
A19
A21
A28
A31
A32
A33
AA2
AA3
AA5
AA7

AA11
AA13
AA17
AA19
AA23
AA25
AA26
AA31
AA32

AB7
AB9

AB10
AB12
AB14
AB16
AB18
AB22
AB24
AB27
AB29

AC3
AC7
AC8

AC13
AC15
AC19
AC21
AC23
AC25
AC26
AC31

AD2
AD5
AD7
AD9

AD10
AD12
AD14
AD16
AD18
AD20
AD22
AD24
AD27
AD32

AE7
AE8

AE11
AE15
AE17
AE21
AE25
AE29

AF3
AF7
AF9

AF12
AF14
AF16
AF18
AF20
AF27
AF28
AF31

AG2
AG5
AG7

AG10

VSS

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 15 OF 17

OMIT_TABLE

CRITICAL

VSS

AG13
AG17
AG19
AG21
AG25
AG27
AG32
AH3
AH7
AH8
AH15
AH20
AH22
AH26
AH27
AH31
AJ7
AJ9
AJ11
AJ12
AJ14
AJ16
AJ17
AJ18
AJ21
AJ23
AJ26
AJ28
AJ29
AK7
AK12
AK17
AK20
AK21
AK24
AK29
AL2
AL3
AL5
AL7
AL8
AL10
AL12
AL13
AL15
AL17
AL19
AL20
AL21
AL22
AL24
AL25
AL27
AL29
AL31
AL32
AM7
AM9
AM11
AM12
AM14
AM16
AM17
AM18
AM20
AM21
AM23
AM24
AM26
AM28
AM29
AN1
AN7
AN12
AN17
AN20
AN21
AN24
AN29
AN32
AN33
AP1
AP2
AP7
AP8

AP10
AP12
AP13
AP15
AP17
AP19
AP22
AP24
AP25
AP27
AP29
AP31
AP32
AP33

B1
B2

B6
B11
B13
B16
B19
B21
B28
B31
B33

C1

C6

C7

C9
C11
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C32

D2

D3

D5

D6

D8
D10
D11
D19
D21
D22
D23
D24
D25
D26
D27
D28
D29

E6
E11
E13
E16
E18
E19
E21
E22
E23
E24
E25
E26
E27
E29

F3

F6

F7

F9
F11
F12
F13
F14
F15
F16
F17

VSS

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 16 OF 17

OMIT_TABLE

CRITICAL

VSS

F18
F19
F20
F24
F27
F31
G5
G7
G8
G9
G14
G16
G18
G21
G23
G25
G27
G29
G32
H3
H5
H7
H11
H15
H17
H21
H23
H26
H31
J2
J5
J7
J8
J15
J17
J19
J21
J23
J25
J27
K7
K9
K10
K12
K14
K16
K18
K20
K22
K24
K26
K29
K32
L3
L7
L8
L11
L13
L15
L17
L19
L21
L23
L25
L27
L31
M2
M5
M7
M10
M12
M14
M18
M20
M22
M24
M26
N3
N7
N8
N11
N13
N17
N19
N21

N23
N25
N27
N29
N31
N32

P7
P10
P12
P14
P16
P18
P20
P22
P24
P26

R2

R5

R7

R8
R11
R13
R15
R17
R19
R21
R23
R25
R27

T3

T7

T8
T10
T12
T14
T16
T18
T20
T22
T24
T26
T29
T31

U3900

POP-1GB-20NM-M-SCK

FCCSP

TMIB21B0-B7

SYM 17 OF 17

OMIT_TABLE

CRITICAL

T32
U11
U13
U15
U19
U21
U23
U25
U27
V2
V3
V5
V10
V12
V14
V16
V18
V20
V22
V24

VSSVSS

V26
V31
W4
W11
W13
W15
W19
W21
W23
W25
W27
W29
W30
Y4
Y12
Y14
Y16
Y18
Y22
Y24
Y27
Y30

D

C

B

A

8

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

SOC GROUND

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SOC

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

46 OF 500

SHEET

41 OF 98

1

SIZE

D

D

C

34

34

34

42 36

42 36

42 36

62 43

43 36

62 43

34

34

36

Boot Config

BOOTCFG0

1

R4700

1K

5%
1/20W
MF
201

2

OUT
OUT
OUT

BOOT_CONFIG0
BOOT_CONFIG1
BOOT_CONFIG2

Board ID

BOARDID0

1

R4710

3.0K

5%
1/20W
MF
201

2

OUT
OUT
OUT
OUT
OUT
OUT

SPI_SOCROM_CLK
SPI_SOCROM_MOSI
SPI_SOCROM_MISO
SPI_TPAD_MOSI
SPI_TPAD_MISO
SPI_TPAD_CLK

Board Revision

BOARDREV0

1

R4720

1K

5%
1/20W
MF
201

2

OUT
OUT
OUT

BOARD_REV0
BOARD_REV1
BOARD_REV2

BOOTCFG1

1

R4701

1K

5%
1/20W
MF
201

2

BOARDID1

1

R4711

3.0K

5%
1/20W
MF
201

2

BOARDREV1

1

R4721

1K

5%
1/20W
MF
201

2

PP1V8_AWAKE

BOOTCFG2

1

R4702

1K

5%
1/20W
MF
201

2

BOARDID2

1

R4712

3.0K

5%
1/20W
MF
201

2

PP1V8_AWAKE

BOARDREV2

1

R4722

1K

5%
1/20W
MF
201

2

BOARDID3

1

R4713

3.0K

5%
MF

201

2

678

BOOTCFG0

83 72

BOOTCFG2 BOOTCFG1

0
0
1
1

BOARDID4

1

R4714

3.0K

5%
1/20W1/20W
MF

2

83 72 70 62 43 42 40 37 27

70 62 43 42 40 37 27

PP1V8_AWAKE

BOARDID5

1

R4715

3.0K

5%
1/20W
MF
201201

2

<RDAR://PROBLEM/51341193> H9M BOARD IDS FOR J223

BUILD

PROTO 0
PROTO 0
PROTO 1A
PROTO 1B
EVT
PVT

Test Mode

0

Disabled

Enabled1

Frequency

0
1
0

40 MHz

6 MHz

24 MHz

Invalid1

BOARD_ID[5:0] = 111011

BOARDREV

<2> <1> <0>

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1

0=NO_STUFF, 1=STUFF

3 245

1

PCH PM Level Shifting

89

60 47 44 43 42 40 34 29 28 27

86 83 81 74 72 71 70 64 63

PP1V8_SLPS2R

BYPASS=U4760.3::5MM

C4760

0.1UF

10%
10V

X5R-CERM

0201

BYPASS=U4760.2::5MM

1

3

2

2

VCCBVCCA

U4760

1

C4765

0.1UF

10%
10V

2

X5R-CERM
0201

1

R4767

100K

5%
1/20W
MF
201

2

PQFP

1B1
2B1

1B2
2B2

15
13

14
12

1

R4765

100K

5%
1/20W
MF
201

2

1

R4766

100K

5%
1/20W
MF
201

2

16

6
8

4
1

7
9

5

1A1
2A1

SN74AVC4T245RSV

1DIR
1OE*

1A2
2A2

2DIR
2OE*

CRITICAL

GND

10

11

83 35

35 18

83 72 70
40 37 27
62 43 42

IN

35 83 13

IN OUT

35

IN
IN

SMC_SYSRST_L
SMC_PCH_SYS_PWROK

SMC_PCH_PWROK

R4760

100K

5%

1/20W

MF

201

2

1

R4761

100K

5%

1/20W

MF

201

2

1

R4762

100K

5%

1/20W

MF

201

1

2

R4763

100K

5%

1/20W

MF

201

1

2

PP3V3_S5

1

R4768

100K

5%
1/20W
MF
201

2

PM_SYSRST_R_L

1/20W

201MF5%

89 83 74 73 71

R4769

2.2K

21

69 47 43 18 14 13 12 11 7 5 4

PM_SYSRST_L
PM_PCH_SYS_PWROK

PM_PCH_PWROK
PM_RSMRST_LSMC_RSMRST_L

OUT

OUT
OUT

83 16 13

D

83 13

83 16 13

PECI Level Shifting

35

PLACE_NEAR=U3900.R6:5MM

IN

SMC_PECI_TX

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

BYPASS=U4750::5MM

C4750

R4750

0

21

1/20W MF5% 0201

SMC_PECI_TX_R

PP1V8_S5

BYPASS=U4755::5MM

C4755

0.1UF

X5R-CERM

35

OUT

SMC_PECI_RX

0.1UF

10%
10V

X5R-CERM

0201

1

10%
10V

2

0201

PP1V_S3

U4750

5

SN74AUC1G126

SC70

2

A

OE

1

3

2

1

U4755

74AVC1T45

A

SOT886

4

Y

CRITICAL

1

6

VCCBVCCA

43

B

BYPASS=U4755::5MM

1

C4756

0.1UF

10%
10V

2

X5R-CERM
0201

CPU_PECI

BI

5

83 70 69 65 18 17 9 7 5

C

B

62 43 42 40 37 27

83 72 70

PP1V8_AWAKE

I2C_SEP_SCL

R4730

2.2K

5%

1/20W

MF

201

1

2

SEP_WP

R4732

10K

5%

1/20W

MF

201

SEP EEPROM

(Write: 0xA2, Read 0xA3)

8

VCC

U4730

M24128

EEPROM

3
2
1
7

E2
E1
E0
WC*

MLP

SCL SDA

1

2

VSS

THM_P

4

9

SoC ROM

5

DIR

CRITICAL

GND

2

BYPASS=U4730::6MM

1

C4730

0.1UF

10%
10V

2

X5R-CERM
0201

56

I2C_SEP_SDA

1

R4731

2.2K

5%
1/20W
MF
201

2

BIIN

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

34 34

Also available in

PROCHOT# Level Shifting

rdar://problem/34583713

PP1V8_S5

10K

5%

1/20W

MF

201

1

2

R4790

CSP package 335S0946

65 43 35

IN

SMC_PROCHOT_L

2

1

NC

6

VCC

U4790

74LVC1G07FW5

DFN1010

A

GND

3

R4755

330

1/20W

4

Y

5

NCNC

1

5%
MF

201

2

BYPASS=U4790::3MM

1

C4790

0.1UF

10%
10V

2

X5R-CERM
0201

NCNC

R4791

75

21

1%

1/20W

MF

201

B

CPU_PROCHOT_LCPU_PROCHOT_OUT_L

OUT

5

CRITICAL

A

62 43 42 40 37 27

42 36

36

83 72 70

IN

IN

SPI_SOCROM_CLK

SPI_SOCROM_CS_L
SPI_SOCROM_WP_L

PP1V8_AWAKE

R4770

100K

5%

1/20W

MF

201

1

2

R4771

10K

5%

1/20W

MF

201

BYPASS=U4770::5MM

1

CRITICAL

8

VCC

U4770

2

SCLK SI/SIO0

1

CS*

3

WP*/SIO2

7

RESET*/SIO3

4MX8-1.8V

USON

MX25U3235F

VER 2

SO/SIO1

GND

EPAD

4

9

56

2

EPAD

10

1

C4770

0.1UF

10%
10V

2

X5R-CERM
0201

SPI_SOCROM_MOSI

SPI_SOCROM_MISO_R

PLACE_NEAR=U4770.2:5MM

R4773

20

21

SPI_SOCROM_MISO

5% 2011/20WMF

OUT

IN

SMC AVREF Supply

Footprint supports 353S01042 alternate

U4780

42 36

89

60 47 44 43 42 40 34 29 28 27

86 83 81 74 72 71 70 64 63

42 36

PP1V8_SLPS2R

BYPASS=U4780::3MM

C4780

1.0UF

20%

6.3V
X5R

0201-1

1

2

REF3312AIRSE

UQFN-COMBO

5

IN

CRITICAL

GND

4

OUT

NC0
NC1

NC2

NC3
NC4

PP1V25_SLPS2R_SMC_AVREF

8

1

NC

2

NC

3

NC

6

NC

7

NC

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

BYPASS=U4780::3MM

1

C4781

1.0UF

20%

6.3V

2

X5R
0201-1

GND_SMC_AVSS

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0

BOM_COST_GROUP=SOC

35

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

SOC SHARED SUPPORT

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

52 51 50 49 35

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

47 OF 500

SHEET

42 OF 98

SIZE

D

8

67

35 4

2

1

678

3 245

1

D

14

14

14

14

14

14

14

PCIe Up R2D AC Caps Lid Detect Sensors

21

0201X5R6.3V20%

21

0201X5R6.3V20%

21

0201X5R6.3V20%

21

0201X5R6.3V20%

21

0201X5R6.3V20%

21

0201X5R6.3V20%

21

0201X5R6.3V20%

21

X5R6.3V20%

0201

PCIE_SOC_R2D_P<0>
PCIE_SOC_R2D_N<0>

PCIE_SOC_R2D_P<1>
PCIE_SOC_R2D_N<1>

PCIE_SOC_R2D_P<2>
PCIE_SOC_R2D_N<2>

PCIE_SOC_R2D_P<3>
PCIE_SOC_R2D_N<3>

37

OUT

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

37

OUT

37

OUT

37

OUT
OUT

OUT
OUTIN

37

37

37 14

84 43 35

84 35

35

PP1V8_G3S

PLACE_NEAR=U4870.7:2MM

IN

OUT
OUT

IN
IN

IN
IN

IN
IN

IN

PCIE_SOC_R2D_C_P<0>
PCIE_SOC_R2D_C_N<0>

PCIE_SOC_R2D_C_P<1>
PCIE_SOC_R2D_C_N<1>

PCIE_SOC_R2D_C_P<2>
PCIE_SOC_R2D_C_N<2>

PCIE_SOC_R2D_C_P<3>
PCIE_SOC_R2D_C_N<3>

C4820

0.22UF

C4821

0.22UF

C4822

0.22UF

C4823

0.22UF

C4824

0.22UF

C4825

0.22UF

C4826

0.22UF

C4827

0.22UF

GPIO Source Termination

Triaxial acceleration sensor

NOSTUFF U4870 etc. per <rdar://46140415>

FERR-240OHM-25%-350MA

SPI_ACCEL_CS_L

ACCEL_INT1
ACCEL_INT2

L4870

0201

NOSTUFF

4

CS*

6

INT1

5

INT2

21

NOSTUFF

GND

9

11

8

VDD

U4870

BMA282

LGA

14

12

VOLTAGE=1.8

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V8_ACCEL_FILT

NOSTUFF

1

7

VDDIO

GNDIO

10

SCX
SDX
SDO

PS

1
2
3

13

C4870

0.22UF

20%
10V

2

0201

PLACE_NEAR=U4870.7:2MM

SPI_AOP_SENSOR_CLK
SPI_AOP_SENSOR_MOSI
SPI_AOP_SENSOR_MISO_R

PLACE_NEAR=U4870.8:2MM

NOSTUFF

1

C4871

0.22UF

20%
10V

2

0201

Clamshell Closed/Open = Low/High
SMC and U6650 isolated per <rdar://45820207>

J4800

INTERPOSER-AMR-MLB

43

43

43

SMT-PAD

8
7
6
5 4

1
2
3

OMIT_TABLE

60

OUT

LID_OPEN_LEFT
PP1V8_SLPS2R

60 83 35

IN OUT

LID_OPEN_RIGHT

60 47 44 43 42 40 34 29 28 27
89 86 83 81 74 72 71 70 64 63

R4804

10K

21

5%

1/20W

MF

201

R4805

10K

21

5%

1/20W

MF

201

BYPASS=U4802::5MM

C4802

0.1UF

10%

6.3V

CERM-X5R

0201

PP1V8_SLPS2R

1

2

2

1

6

NC

5 3

NC

SMC_LID_LEFT

U4802

74LVC1G32

SOT891

4

IPD_LID_OPEN

SMC_LID_RIGHT

OUTOUT

60 47 44 43 42 40 34 29 28 27
89 86 83 81 74 72 71 70 64 63

83 35 37

D

OUT

83 62 46

C

B

A

86 83 70 38

86 83 70 38

86 83 70 39

73 69
65 49
67 66
87 85

36

36

58

36

36

59

36

36

57

36

36

62

36

36

83 46

36

36

37

IN

IN

OUT

IN OUT

IN

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN OUT

I2S_SPKRAMP_L_R2D_R
I2S_SPKRAMP_L_BCLK_R
I2S_SPKRAMP_L_LRCLK_R
I2S_SPKRAMP_R_R2D_R
I2S_SPKRAMP_R_BCLK_R
I2S_SPKRAMP_R_LRCLK_R
I2S_CODEC_R2D_R
I2S_CODEC_BCLK_R
I2S_CODEC_LRCLK_R
SPI_TPAD_MOSI_R
SPI_TPAD_CLK_R
SPI_TPAD_MISO_R
SPI_MESA_MOSI_R
SPI_MESA_CLK_R
SPI_DFR_MISO_R
SPI_DFR_MOSI_R
SPI_DFR_CLK_R
SSD0_CLK24M_R
PDM_DMIC_CLK0_R

35

IN OUT

35

IN

35

IN

PDM_DMIC_CLK1_R
SPI_AOP_SENSOR_MOSI_R
SPI_AOP_SENSOR_CLK_R
SPI_AOP_SENSOR_MISO_R

43

Remote Feedback Sense (Buck 0, 2 & 5)

PLACE_NEAR=U3900.AA12:5MM

PPVDDCPU_AWAKE

PLACE_NEAR=U3900.M25:5MM

PP0V82_SLPDDR

PLACE_NEAR=U3900.AE22:5MM PLACE_NEAR=R7816.1:1MM

PP0V9_SLPDDR

47 43 42 18 14 13 12 11 7 5 4

PPBUS_HS_CPU

R4802

665K

0.1%

1/20W

0201

R4800

127K

1/20W

PLACE_NEAR=U3900.AC32:5MM

PLACE_NEAR=U3900.Y29:5MM

PLACE_NEAR=U3900.AE32:5MM

PLACE_NEAR=U3900.E17:5MM

PLACE_NEAR=U3900.D17:5MM

PLACE_NEAR=U3900.B18:5MM

PLACE_NEAR=U3900.AA33:5MM

PLACE_NEAR=U3900.AE33:5MM

PLACE_NEAR=U3900.V29:5MM

PLACE_NEAR=U3900.J30:5MM

PLACE_NEAR=U3900.K33:5MM

PLACE_NEAR=U3900.A20:5MM

PLACE_NEAR=U3900.D16:5MM

PLACE_NEAR=U3900.C17:5MM

PLACE_NEAR=U3900.C16:5MM

PLACE_NEAR=U3900.AM6:7MM

PLACE_NEAR=U3900.N6:5MM

PLACE_NEAR=U3900.J6:5MM

PLACE_NEAR=U3900.A5:5MM

PLACE_NEAR=U3900.E5:5MM

XW4820

SM

XW4821

SM

XW4822

SM

Droop Circuit

89 83 74 73 71 69

1

TK

2

1

1%
MF

201

2

PBUS_DIVIDER

PP3V3_S5

BYPASS=U4801::5MM

NOSTUFF

BYPASS=U4801::5MM

R4843
R4844
R4863
R4845
R4846
R4864
R4847
R4848
R4865
R4851
R4852
R4867

PLACE_NEAR=U6860.4:2MM

R4853
R4854
R4866

PLACE_NEAR=J5100.7:7MM

R4855
R4856
R4857
R4859
R4860
R4861
R4862
R4869

PLACE_NEAR=U4870.3:5MM

21

21

21

C4804

CERM-X5R

C4805

0.1UF

CERM-X5R

PVDDCPUAWAKE_FB_R

P0V8SLPDDR_FB_R

P0V9SLPDDR_FB_R

1

0.1UF

10%

6.3V

2

0201

1

10%

6.3V

2

0201

20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20

0
20
20
20
20
20

3

VCC+

1

GND

21

I2S_SPKRAMP_L_R2D

21

I2S_SPKRAMP_L_BCLK

21

I2S_SPKRAMP_L_LRCLK

21

I2S_SPKRAMP_R_R2D

21

I2S_SPKRAMP_R_BCLK

21

I2S_SPKRAMP_R_LRCLK

5%

21

I2S_CODEC_R2D

21

I2S_CODEC_BCLK

21

I2S_CODEC_LRCLK

21

SPI_TPAD_MOSI

21

SPI_TPAD_CLK

21

SPI_TPAD_MISO

21

SPI_MESA_MOSI

21

SPI_MESA_CLK

21

SPI_DFR_MISO

21

SPI_DFR_MOSI

21

SPI_DFR_CLK

21

SSD0_CLK24M

21

PDM_DMIC_CLK0

21

PDM_DMIC_CLK1

21

SPI_AOP_SENSOR_MOSI

21

SPI_AOP_SENSOR_CLK

21

SPI_AOP_SENSOR_MISO

R4820

0201 MF 1/20W5%

R4821

0201 MF 1/20W5%

R4822

0201 MF 1/20W5%

47 43 42 18 14 13 12 11 7 5 4

89 83 74 73 71 69

CRITICAL

U4801

5

LMV331

SC70-5

4

2

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

MF1/20W5%

201

201MF1/20W5%

201MF1/20W

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

0201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

NOSTUFF

21

21

21

PLACE_NEAR=R7806.1:1MM

0

PLACE_NEAR=R7812.1:1MM

0

0

PP3V3_S5

R4806

100K

OUT

UVP_DIS_LPBUS_DIVIDER_REF

72 43

PBUS_DIVIDER_OUT

58

OUT

58

OUT

36

IN

59

59

OUT

36

IN

57

OUT

57

OUT

36

IN

OUT

OUT

OUT

44

OUT

44

OUT

36

OUT

OUT

OUT

OUTIN

43

43

OUT

PVDDCPUAWAKE_FB

P0V8SLPDDR_FB

P0V9SLPDDR_FB

1

5%

1/20W

MF

201

2

2 3

9

NC
NC
NC

5
8

11

62 42

62 42

42 36

83 46

83 46

79 77 43

83 60 35

83 60

84 43 35

ENABLE

COMP_INPUT

NC

Project Specific Pull-Ups

PP1V8_SLPS2R

R4895

PP1V8_AWAKE

R4883
R4884
R4887
R4888

PP1V8_G3S

R4871
R4872
R4873
R4874
R4875
R4876

R4885
R4886

R4870

SoC Test Points

TP_SOC_AMUXOUT

34

TP_SOC_TST_CLKOUT

34

70

OUT

70

OUT

70

OUT

1

VDD

U4800

SLG4AP41473

STQFN

CRITICAL

DUMMY_OUTPU_COMP

CPU_THROTTLE*

GPU_THROTTLE*

THROTTLE*_TEST_OUTPUT

GND

7

100K

47K
47K
47K
47K

100K
100K
100K
100K
100K
100K

2 1
2 1
2 1
2 1
2 1
2 1

100K

47K
47K

BYPASS=U4800::5MM

VREF_1V2

10

12

6

4

21

5% 201MF1/20W

21
21
21
21

1/20W
1/20W

21
21

21

10%

6.3V
0201

1

2

C4803

0.1UF

CERM-X5R

NC

PBUS_DIVIDER_REF
SMC_PROCHOT_L

NC

NC

201

MF1/20W5%
MF1/20W5%

201
201MF5% 1/20W
201MF1/20W5%

201MF5%
MF5% 201
MF5%

2011/20W

MF

2011/20W5%

MF1/20W5%

201
201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

201MF1/20W5%

PP4801

1

PP

SM-SP

PP4802

1

PP

SM-SP

60 47 44 43 42 40 34 29 28 27
89 86 83 81 74 72 71 70 64 63

SSD_PMU_RESET_L

83 72 70 62 42 40 37 27

SSD0_CLKREQ0_L
SSD0_CLKREQ1_L
SSD0_CLKREQ2_L
SSD0_CLKREQ3_L

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

SPI_ACCEL_CS_L
SPI_AOP_SENSOR_CLK
SPI_AOP_SENSOR_MOSI

SPI_AOP_SENSOR_MISO
UART_WLAN_D2R
UART_WLAN_D2R_CTS_L

SSD0_PCIE_RESET_L

SSD0_CLK24M

PLACE_NEAR=R4857.1:1MM

I2S_SPKRAMP_R_D2R

DP_INT_HPD

DP_INT_HPD_L

43

OUT

35

OUT

65 42 35

SSM6N15AFEAP

Unused SOC Signals

NC_PLCAM_TX_THROTTLE
NC_GNSS_HOST_TIME
NC_GNSS_DEV_WAKE
NC_SOC_WLAN_DEV_WAKE

NC_SOC_USB_ID

NC_ALTIMETER_INT
NC_SPI_ALTIMETER_CS_L
NC_I2C_AOP_SCL

NC_I2C_AOP_SDA
NC_UART_BT_D2R
NC_UART_BT_R2D
NC_UART_BT_D2R_CTS_L
NC_UART_BT_R2D_RTS_L

NC_UART_GNSS_D2R_CTS_L

NC_UART_GNSS_R2D_RTS_L
NC_PLCAM_PROX_INT_L
NC_PLCAM_ROMEO_B2B_DETECT
NC_SMC_GFX_SELF_THROTTLE
NC_SMC_TOPBLK_SWP_L
NC_PCIEDN_WAKE_L
NC_ENET_LOW_PWR
NC_SDCONN_STATE_CHANGE_L
NC_ENET_MEDIA_SENSE
NC_SOC_WLAN_JTAG_TMS
NC_MESA_MENUKEY_L
NC_SOC_WLAN_JTAG_TCK
NC_PCC_EVENT
NC_TPAD_VIBE_L
NC_SPI_DESCRIPTOR_OVERRIDE_L
NC_DISP_GCON_INT_L
NC_PCH_GCON_INT_L
NC_SMC_FAN_1_PWM
NC_SMC_FAN_1_TACH
NC_SMC_LED_ONEWIRE
NC_SSD1_SWCLK_UART_R2D
NC_SSD1_SWDIO_UART_D2R
NC_I2C_SOC_5_SDA
NC_I2C_SOC_5_SCL
NC_DFR_TOUCH_RSVD
NC_PCHROM_SW_EN
NC_I2S_CODEC_MCLK
NC_I2S_HAWKING_D2R
NC_I2S_CODEC1_R2D_R
NC_I2S_HAWKING_BCLK_R
NC_I2S_HAWKING_LRCLK
NC_I2S_CODEC1_MCLK
NC_I2C_PLCAM_SDA
NC_I2C_PLCAM_SCL
NC_FTCAM_CLK12M_R
NC_FTCAM_RESET_L
NC_PLCAM_RX_CLK12M_R
NC_PLCAM_RX_RESET_L
NC_PLCAM_TX_CLK12M_R
NC_PLCAM_TX_RESET_L
NC_PLCAM_TX_INT

43

43

36

34

BI

34

BI

34

BI

34

BI

34

BI

83 81 34

77 37

78 37

79 37

80 37

84 43 35

84 43 35

36 32

36 32

80 79 78 77 37

79 77 43

35

35

35

35

36

36

36

36

36

36

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

35

36

36

36

36

36

36

36

36

36

36

36

36

36

36

36

36

36

36

36

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

HPD KSF Comp Circuit

R4830 needs to be characterized and adjusted if necessary

R4830

CRITICAL

Q4830

SOT563

4.7K

1/20W

6

D

VER-1

2

1

GS

SSM6N15AFEAP

21

5%
MF

201

CRITICAL

Q4830

SOT563

XDP_DP_INT_HPD

3

D

VER-1

5

4

GS

DP_INT_HPD_MASK

NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1

NO_TEST=1

NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1

4 83 76

OUTIN

IN

35 13

BOM_COST_GROUP=SOC

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

37

35

35

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI

NC_PCIE_WLAN_R2D_C_P
NC_PCIE_WLAN_R2D_C_N
NC_PCIE_WLAN_D2R_P
NC_PCIE_WLAN_D2R_N
NC_PCIE_ENET_R2D_C_P
NC_PCIE_ENET_R2D_C_N
NC_PCIE_ENET_D2R_P
NC_PCIE_ENET_D2R_N
NC_PCIE_DN2_R2D_C_P
NC_PCIE_DN2_R2D_C_N
NC_PCIE_DN2_D2R_P
NC_PCIE_DN2_D2R_N
NC_PCIE_DN3_R2D_C_P
NC_PCIE_DN3_R2D_C_N
NC_PCIE_DN3_D2R_P
NC_PCIE_DN3_D2R_N
NC_PCIE_CLK100M_WLAN_P
NC_PCIE_CLK100M_WLAN_N
NC_WLAN_CLKREQ_L
NC_WLAN_PERST_L
NC_PCIE_CLK100M_ENET_P
NC_PCIE_CLK100M_ENET_N
NC_ENET_RESET_L
NC_PCIE_CLK100M_DN2_P
NC_PCIE_CLK100M_DN2_N
NC_PCIEDN2_CLKREQ_L
NC_PCIEDN2_RESET_L
NC_PCIE_CLK100M_DN3_P
NC_PCIE_CLK100M_DN3_N
NC_PCIEDN3_CLKREQ_L
NC_PCIEDN3_RESET_L

NC_PCIE_SSD1_R2D_C_P<0>
NC_PCIE_SSD1_R2D_C_N<0>
NC_PCIE_SSD1_D2R_P<0>
NC_PCIE_SSD1_D2R_N<0>
NC_PCIE_SSD1_R2D_C_P<1>
NC_PCIE_SSD1_R2D_C_N<1>
NC_PCIE_SSD1_D2R_P<1>
NC_PCIE_SSD1_D2R_N<1>
NC_PCIE_SSD1_R2D_C_P<2>
NC_PCIE_SSD1_R2D_C_N<2>
NC_PCIE_SSD1_D2R_P<2>
NC_PCIE_SSD1_D2R_N<2>
NC_PCIE_SSD1_R2D_C_P<3>
NC_PCIE_SSD1_R2D_C_N<3>
NC_PCIE_SSD1_D2R_P<3>
NC_PCIE_SSD1_D2R_N<3>
NC_PCIE_CLK100M_SSD1_01_P
NC_PCIE_CLK100M_SSD1_01_N
NC_SSD1_CLKREQ0_L
NC_SSD1_CLKREQ1_L
NC_PCIE_CLK100M_SSD1_23_P
NC_PCIE_CLK100M_SSD1_23_N
NC_SSD1_CLKREQ2_L
NC_SSD1_CLKREQ3_L
NC_SSD1_PCIE_RESET_L
NC_SSD1_CLK24M_R

NC_WLAN_CONTEXT_A
NC_WLAN_CONTEXT_B

PAGE TITLE

SOC PROJECT SUPPORT

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1

NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1

NO_TEST=1
NO_TEST=1

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

48 OF 500

SHEET

43 OF 98

SIZE

D

C

B

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

ISOLATE FROM OTHER COMPONENTS/NETS AS MUCH AS POSSIBLE

ESD Filters

R4912

0

5%
MF

0201

0

5%
MF

0201

21

1

C4952

56PF

5%
25V

2

NP0-C0G
0201

21

MESA_INT_CONN

1

C4953

100PF

5%

NOSTUFF

25V

2

C0G
0201

21

MESA_BOOST_EN_CONN

1

C4954

100PF

5%
25V

2

C0G
0201

NOSTUFF

IN

NOSTUFF

83 60

83 60

83 60

44 36

34

44

SPI_MESA_MISO SPI_MESA_MISO_CONN

OUT

1/20W

R4953

MESA_INT

OUT

1/20W

R4954

MESA_BOOST_EN

0

5%

1/20W

MF

0201

T151 FLEX CONNECTOR

ISOLATE FROM OTHER COMPONENTS/NETS AS MUCH AS POSSIBLE

ESD Filters

R4950

0

1

2

1

2

1

2

2 1

5%

1/20W

MF

0201

R4951

0

2 1

5%

1/20W

MF

0201

R4911

0

2 1

5%

1/20W

MF

0201

SPI_MESA_MOSI

SPI_MESA_CLK

63 60 47 43 42 40 34 29 28 27

89 86 83 81 74 72 71 70 64

PMU_ONOFF_R_L

IN

43

43

IN

PP1V8_SLPS2R

83 60

83 60

89 83 60

SPI_MESA_MOSI_CONN

C4950

56PF

5%

25V

NP0-C0G

0201

NOSTUFF

SPI_MESA_CLK_CONN

C4951

56PF

5%

25V

NP0-C0G

0201

NOSTUFF

PMU_ONOFF_R_L_CONN

C4955

100PF

5%
25V
C0G

0201

PP3V3_G3H_RTC_MESA

54 44

1

R4971

100K

5%
1/20W
MF
201

2

1

5

3

2

1

C4956

0.1UF

10%
10V

2

X5R-CERM
0201

U4901

74AUP1T97

SOT891

4

PMU_ONOFF_L

6

OUT

D

72 63

C

54 44

Output Voltage

Iout (max avg)

OCP (min)

Active Discharge

Max Output Cap

PP3V3_G3H_RTC_MESA

BYPASS=U4900.A2::3MM

16.0V +/- 2%

6mA

13 mA

15 mA sink

0.5uF @ 16V

PLACE_NEAR=U4900:5MM

L4901

1.0UH-0.4A-0.636OHM

0402

20%

6.3V

1

2

C4910

10UF

CERM-X5R

0402-9

Mesa Power Sequencing Requirements

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

DIDT=TRUE

PP3V3_G3H_MESA_SW

21

MESA_BOOST_EN

44

Power On: 1V8 -> 3V3 -> 16V0

MOJAVE 16V BOOST

U4900

LM3638A0

BGA

B1

SW

A2

B2
A3

C2

VIN

EN_M
EN_S

LDOIN

A1

AGNDPGND

B3

VOUT

PMID

C3

C1

Load Cap:6.6uF nom
EDP:13.75mA

1

C4924

2.2UF

20%
25V

2

X5R
0402-3

1

C4925

2.2UF

20%
25V

2

X5R
0402-3

PP17V0_MOJAVE_LDOIN

1

C4923

2.2UF

20%
25V

2

X5R
0402-3

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP16V0_MESA

1

C4926

56PF

5%
25V

2

NP0-C0G
0201

BYPASS=U4900.C3::4MM
BYPASS=U4900.C3::4MM
BYPASS=U4900.C3::5MM

EMC Filter

FL4900

80-OHM-25%-500MA

21

0201

1

2

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP16V0_MESA_FILT_CONN

C4927

100PF

5%
25V
C0G
0201

C

83 60

B

54 44

Output Voltage

Iout (max avg)

Dropout Voltage

OCP (min)

Active Discharge

PP3V3_G3H_RTC_MESA

1

C4911

1UF

10%
10V

2

X5R-CERM
0402

BYPASS=U4910.4::3MM

Output Voltage

Iout (max avg)

3.0V +/- 2%

250mA

155mV

250 mA

280 Ohm Typ

PP1V8_MESA

44

1.85V +/- 2%

250mA

3.0V MESA

U4910

NCP160AMX300

4

IN

3

EN

XDFN-COMBO-THICKSTNCL

EMC Filter

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

MIN_LINE_WIDTH=0.2000

Load Cap:14.3uF nom
EDP:100mA

PP3V0_MESA

1

OUT

BYPASS=U4910.1::3MM

1

EPADGND
5

2

C4916

1UF

10%
10V

2

X5R-CERM
0402

1

C4920

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

C4921

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

C4922

2.2UF

20%

6.3V

2

X5R-CERM
0201

FL4910

80-OHM-25%-500MA

21

0201

1

2

C4928

0.1UF

10%
10V
X6S-CERM
0201

MIN_NECK_WIDTH=0.1000

VOLTAGE=3

PP3V0_MESA_FILT_CONN

1

C4929

100PF

5%
25V

2

C0G
0201

83 60

PP1V8_G3S

R4922

PP1V8_MESA

R4924
R4923

100K

100K

100K

83 76 74 68 62 61 60

21

5% 1/20W MF 201

44

21

5% 1/20W MF 201

21

5% 1/20W MF 201

59 58 57 55 51 48 47 45 43 18

MESA_PWR_EN

SPI_MESA_MISO

MESA_BOOST_EN

44 34

44 36

44

B

A

Dropout Voltage

OCP (min)

Active Discharge

PP3V3_G3H_RTC_MESA

44 54

1

C4912

1UF

10%
10V

2

X5R-CERM
0402

BYPASS=U4920.4::3MM

44 34

50mV Typ @ 100mA

250 mA

230 Ohm Typ

10uFMax Output Cap

MESA_PWR_EN

IN

1.85V MESA

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

U4920

SCY99258

4

IN

3

EN

XDFN-COMBO

GND EPAD

5

2

OUT

Load Cap:3.4uF nom
EDP:0.5mA

PP1V8_MESA

1

44

BYPASS=U4920.1::3MM

1

C4914

1UF

10%
10V

2

X5R-CERM
0402

EMC Filter

FL4920

80-OHM-25%-500MA

21

0201

1

C4918

2.2UF

20%

6.3V

2

X5R-CERM
0201

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP1V8_MESA_FILT_CONN

1

C4917

100PF

5%
25V

2

C0G
0201

A

SYNC_DATE=SYNC_MASTER=

83 60

PAGE TITLE

T151

SIZE

D

BOM_COST_GROUP=MESA

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

49 OF 500

SHEET

44 OF 98

8

67

35 4

2

1

678

3 245

1

VENUS

D

C

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

83 76 75 74 62 57 51 50

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PP1V8_G3S

BYPASS=U5000::3MM

PP3V3_G3S

BYPASS=U5000::3MM

ALWAYS ON GPIOS

35

OUT

SE_HOST_WAKE_R

PP1V8_G3S

C5023

1.0UF

20%

6.3V
X5R

0201-1

R5032
R5033

BYPASS=U5000::3MM

1

2

BYPASS=U5000::3MM

1

C5021

2.2UF

20%

6.3V

2

X5R-CERM
0201

45 34

47K
47K

MF 201 1/20W
MF 201

45 36

45 36

45 36

45 36

R5036

1

R5035

22K

5%
1/20W
MF
201

2

C5032

0.1UF

10%
10V

X5R-CERM

0201

IN

5%

5%

IN

OUT

IN

OUT

BYPASS=U5000::3MM

1

C5033

0.1UF

2

1

2

C5022

2.2UF

20%

6.3V
X5R-CERM
0201

X5R-CERM

SE_CTLR_FW_DWLD

21
21

1/20W

NFC_GPIO2_AO
NFC_GPIO3_AO

UART_SE_R2D_RTS_L
UART_SE_D2R_CTS_L
UART_SE_R2D
UART_SE_D2R

21

0201

SE_HOST_WAKE

5%

MF1/20W

0

45 34

SE_DEV_WAKE

IN

NFC_XTAL1

1

10%
10V

2

0201

BYPASS=U5000::3MM

1

C5031

1.0UF

20%

6.3V

2

X5R
0201-1

NC

NC
NC

NC
NC
NC

H8

NFC_CLK_REQ

J8

NFC_DWL_REQ

E4

NFC_GPIO0

F3

NFC_GPIO1

G6

NFC_GPIO2_AO

G5

NFC_GPIO3_AO

F2

NFC_HSU_CTS

F5

NFC_HSU_RTS

E3

NFC_HSU_RX

F4

NFC_HSU_TX

H7

NFC_IRQ

A5

NFC_SIM_SWIO1

B8

NFC_SIM_SWIO2

C8

NFC_SIM_SWIO3

G7

NFC_WKUP_REQ

G3

NFC_CLK_32K

H6

NFC_XTAL1

B7

B6

B5

PMUVCC2

PMUVCC1

NC

A7

A6

PMUVCC3

SIMVCC1

NC

NC

A8

SIMVCC2

SIMVCC3

E1

VBAT

NC

C1

C2

B1

H5

A3

VDDA

VBATPWR

VDDC

VDDBOOST

U5001

SN100VUK-B20147

WLCSP-1

OMIT_TABLE

C3

VDDIO

VDDCIN

DIS SEDIG NFC

B3

E5

VDDNV

VDDIO_SE

NC

H2

VDDPA

F1

H3

VDDPLL

VHV

PPVDD_SE_VDDA
PP_VDD_SE_VDDC
PP_VDD_SE_VDDNV
PP_VDD_SE_VDDPLL
PP_VDD_SE_VHV
PP_VDD_SE_VREF

NC

D2

G1

VUP

VREF

SE_GPIO0
SE_GPIO1

SE_I2C_SCL
SE_I2C_SDA

SE_ISO_CLK

SE_ISO_IO

SE_ISO_RST

SE_SPI_CLK

SE_SPI_CS
SE_SPI_MISO
SE_SPI_MOSI

BOOST_LX

F8
D4

G8
F7

D6
D7
D3

E8
E6
E7
D5

A1

NC
NC

NC
NC

NC
NC
NC

NC
NC
NC
NC

NC

MIN_LINE_WIDTH=0.0900 MIN_NECK_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900 MIN_NECK_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900 MIN_LINE_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900 MIN_NECK_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900 MIN_LINE_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900 MIN_NECK_WIDTH=0.0900

1

C5036

0.1UF

10V

2

X5R-CERM
0201

1

C5037

0.22UF

20%10%

6.3V

2

X5R
0201

1

C5038

0.22UF

20%

6.3V

2

X5R
0201

1

C5039

0.22UF

6.3V

2

X5R
0201

1

C5040

0.22UF

20%20%

6.3V

2

X5R
0201

1

C5024

0.22UF

20%

6.3V

2

X5R
0201

BYPASS=U5000::3MM

BYPASS=U5000::3MM

BYPASS=U5000::3MM

BYPASS=U5000::3MM

BYPASS=U5000::3MM

BYPASS=U5000::3MM

D

C

B

Avoid false wakeup

R5030
R5031

72 45

10K
10K

IN

21

MF 1/20W

21

1/20WMF

SE_PWR_EN

2015%
2015%

SE_RX_P
SE_RX_N

NC
NC

NC

NC
NC

NC

NC

NC

B4

NFC_SIM_SWCTRL1

C6

NFC_SIM_SWCTRL2

J7

NFC_XTAL2

J5

RXP

J4

RXN

J1

TX1

J3

TX2

G2

TXVCASC

H1

TXVCM

C4

VEN

J6

VTUNE

ANALOG SIGNAL

VSS_DIG

VSS_DIG

D8

C7

C5

VSS_DIG

VSS_NFC

G4

VSS_PA

H4

J2

VSS_PLL

VSS_PMU

D1

VSS_PWR

VSS_PWR

B2

A2

VSS_SUB

VSS_REF

A4

E2

B

VSS_SUB

F6

A

PP1V8_G3S

R5021
R5022
R5023
R5024

R5020
R5025
R5026

8

100K
100K
100K
100K

100K
100K
100K

55 51 48 47 45 44 43 18
83 76 74 68 62 61 60 59

21
21
21
21

21
21
21

1/20W MF

5% 2011/20W MF

58 57

D

A

SYNC_DATE=

SYNC_MASTER=

MF1/20W 2015%

MF1/20W 2015%

UART_SE_D2R

2015%

UART_SE_R2D_RTS_L

201MF1/20W5%

UART_SE_D2R_CTS_L
SE_CTLR_FW_DWLD

UART_SE_R2D

MF1/20W 2015%

SE_DEV_WAKE
SE_PWR_EN

201MF1/20W5%

45 36

45 36

45 36

45 36

45 34

45 34

EXTRA PULLDOWN ADDED

45
72

PER J152

BOM_COST_GROUP=SOC

67

35 4

PAGE TITLE

SECURE ELEMENT

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

50 OF 500

SHEET

45 OF 98

1

SIZE

678

3 245

1

D

C

83 75 68 55 54 52 51 50 29 28

83 34

86

IN

83 62 43

IN

50 46

IN

PP5V_G3S

IN

BYPASS=U5100.4::3.6MM

DFR_PWR_EN

R5102

100K

0402

1

2

2 1

5%

1/20W

MF

201

21

C5100

4.7UF

83 36

83 43

83 48 46

83 48 46

83 46 36

20%
25V
X5R

0402

83 46

IN
IN

IN

BI

IN

1

2

R5107

DFR_TOUCH_LID_OPEN_L
TP_DFR_TOUCH_GPIO2

83

SPI_DFR_CS_L
SPI_DFR_MOSI

I2C_DFR_SCL_R
I2C_DFR_SDA_R
DFR_TOUCH_RESET_L

PP5V_G3S_DFR_FILT

83

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C5101

4.7UF

20%
25V

2

X5R
0402

1

100K

5%

1/20W

MF

201

2

IPD_LID_OPEN IPD_LID_OPEN_R

L5100

1.2UH-20%-0.12A-1.17OHM

BYPASS=J5100.22::10MM
BYPASS=J5100.22::10MM

PP3V3_G3H_RTC_DFR

C5102

1UF

10%
10V

X5R-CERM

0402

R5101

1K

2 1

5%

1/20W

MF

201

DFR_PWR_EN_R

1

G

1

C5105

1UF

20%
16V

2

CER-X5R
0201

PP1V8_DFR

2

S

D

3

4

IN

3

EN

Output Voltage

Iout (max avg)

Dropout Voltage

Q5100

DMP31D0UFB4

DFN1006H4-3

Touch Conn

J5100

AA07-S022VA1

F-ST-SM

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21

24
23

25
26

U5100

NCP160AMX180

XDFN-COMBO-THICKSTNCL

EPADGND

5

2

87 83 48 46

TP_DFR_TOUCH_PANEL_DETECT
DFR_DISP_VSYNC

83

SPI_DFR_MISO_R
SPI_DFR_CLK

DFR_TOUCH_INT_L
DFR_TOUCH_CLK32K_RESET_L

TP_DFR_TOUCH_ROM_WC

NOSTUFF

1

C5104

0.1UF

10%

6.3V

2

X5R
0201

BYPASS=J5100.21::10MM

Load Cap: 3.5uF nom

EDP: 57mA

87 83

1

OUT

1.8V +/- 2%

250mA

250mV

PP1V8_DFR

48 46

1

C5103

1UF

10%
10V

2

X5R-CERM
0402

BYPASS=U5100.1::3MM

83

T139 Support

83

(Cumulus IPD)

OUT

IN

OUT

IN

83 46 43

83 43

83 46 35

83 36

R5110

7.5K

1%

1/20W

MF

201

50 46

21

P1V8_DFR_R

PP3V3_G3H_RTC_DFR

IN

1

ON

Slew Rate

RDS(on)

83 46 36

U5111

SLG5AP1449V

STDFN

GND

4

2.5V/ms

40 mOhm Typ
55 mOhm Max

83 36

83 34

D

S

D

Disp Conn

OUT

OUT
IN

J5110

DF40SG(1.5)-26DS-0.4V

DFR_DISP_TE MIPI_DFR_CLK_FILT_CONN_N

DFR_DISP_INT
DFR_DISP_RESET_L

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

PP3V3_G3HSW_DFR

83

10%

6.3V
X5R

0201

1

2

C5110

0.1UF

F-ST-SM

28 27

2 1

4 3
6 5

8 7

10 9
12 11

14 13

16 15
18 17
20 19
22 21
24 23

26 25

30 29

GND

GND

GND

GND

MIPI_DFR_CLK_FILT_CONN_P

83

83

MIPI_DFR_DATA_FILT_CONN_P

83

MIPI_DFR_DATA_FILT_CONN_N

83

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

I2C_DFR_SCL_R
I2C_DFR_SDA_R

IN

BI

1

83 48 46

83 48 46

BYPASS=J5110.17::3MM

2

PLACE_NEAR=J5110:5MM
PLACE_NEAR=J5110:5MM

L5110

3.25-OHM-0.1A-2.4GHZ

TAM0605-4SM

4

3 2

SYM_VER-2

1

L5111

3.25-OHM-0.1A-2.4GHZ

TAM0605-4SM

4

3 2

SYM_VER-2

1

C5111

1UF

10%
10V
X5R-CERM
0402

MIPI_DFR_CLK_P
MIPI_DFR_CLK_N

MIPI_DFR_DATA_P
MIPI_DFR_DATA_N

IN
IN

IN
IN

36

36

36

36

C

BYPASS=J5110.22::3MM

2

3

EDP: 145mA
Load Cap: 22.2uF nom

B

87 83 48 46

83 46 36

83 46 35

83 46 43

83 46 36

83 46

PP1V8_DFR

5%

1/20W

MF

201

1

2

R5103

4.7K

DFR_TOUCH_RESET_L

DFR_TOUCH_INT_L
SPI_DFR_MISO_R
DFR_DISP_RESET_L
DFR_TOUCH_LID_OPEN_L

5%

1/20W

MF

201

1

2

R5106

100K

R5104

100K

5%

1/20W

MF

201

R5111

100K

5%

1/20W

MF

201

1

R5105

2

1

2

100K

5%

1/20W

MF

201

OCP (min)

Active Discharge

1

2

250 mA

280 Ohm Typ

Current

Active
Discharge

1A Max

150 Ohm Typ

B

A

8

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

T139 SUPPORT

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DFR

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

51 OF 500

SHEET

46 OF 98

1

SIZE

D

678

3 245

1

D

12

12

CFL PCH S0 "SMBUS 0" CONNECTIONS

PP3V3_S5

R5200

2.2K

5%

1/20W

MF

201

1

2

1

R5201

2.2K

5%
1/20W
MF
201

2

CFL-LP PCH

U0500

(MASTER)

IN

BI

SMBUS_PCH_CLK
SMBUS_PCH_DATA

47 43 42 18 14 13 12 11 7 5 4

89 83 74 73 71 69

SMC I2C "6" G3H Connections

SMC I2C "3" S0 Connections

32 18 17 16 15 14 13 12 11 7 88 83 76
83 74 73 72 70 69 65 53 47 42

SMC

U3900

(MASTER)

35

35

IN

BI

I2C_DISP_SCL
I2C_DISP_SDA

PP1V8_S5 PP3V3_S0SW_LCD

BYPASS=U5250.8::5MM

C5251

1

8

VCCVL

IO/VCC1
IO/VCC2

7
6

0.1UF

10%

6.3V

CERM-X5R

0201

1

2

1

R5253

1.1K

5%
1/20W
MF
201

2

1

R5254

1.1K

5%
1/20W
MF
201

2

Internal DP

(0x10-0x1F)

I2C_DISP_3V3_SCL

R5250

2.2K

5%

1/20W

MF

201

BYPASS=U5250.1::5MM

1

C5250

100K

5%

1/20W

MF

201

1

0.1UF

10%

6.3V

2

CERM-X5R
0201

U5250

2

2
3

NLSX4402

UDFN-COMBO

IO/VL1
IO/VL2

1

1

2

R5251

2.2K

5%
1/20W
MF
201

2

R5252

CRITICAL

I2C_DISP_3V3_SDA

I2C_DISP_LS_EN

5

EN

GND

4

J8500

OUT

BI

76

76

SMC I2C "4" G3H Connections

89

60 47 44 43 42 40 34 29 28 27

86 83 81 74 72 71 70 64 63

SMC

U3900

(MASTER)

IN

BI

CALPE

U7800

CKPLUS_WAIVE=I2C_PULLUP

83 72 35 83 72 35

83 72 35 83 72 35 64

OUT

BI

(Write: 0xE8 Read: 0xE9)

I2C_PWR_SCL

CKPLUS_WAIVE=I2C_PULLUP

I2C_PWR_SDA

PP1V8_SLPS2R

R5282

5% 1/20W

R5283

5%

R5280

0

0

1

4.7K 4.7K

5%

1/20W

MF

201

2

21

PWR_SCL_R0

MF 0201

21

PWR_SDA_R0

0201MF1/20W

1

R5281

5%
1/20W
MF
201

2

R5284

5%

R5285

R5286

5%

R5287

5%

(Write: 0x16 Read:0x17)

0

21

0

1/20W5% 0201MF

21

ISL9240 - U7000

(Write: 0x12 Read: 0x13)

0

21

MF1/20W 0201

0

21

MF1/20W 0201

Battery

J6951

CKPLUS_WAIVE=I2C_PULLUP

I2C_PWR_SCL_R1

0201MF1/20W

CKPLUS_WAIVE=I2C_PULLUP

I2C_PWR_SDA_R1

Battery Charger

CKPLUS_WAIVE=I2C_PULLUP

I2C_PWR_SCL_R2

CKPLUS_WAIVE=I2C_PULLUP

I2C_PWR_SDA_R2

OUT

OUT

BI

BI

63

63

64

D

C

47 44 43 42 40 34 29 28 27
83 81 74 72 71 70 64 63 60

89 86

SMC

U3900

(MASTER)

81 35

81 35

81 35 81 35

IN

I2C_SSD_SCL
I2C_SSD_SDA

CFL I2C PCH "SML0" CONNECTIONS

47 43 42 18 14 13 12 11 7 5 4

CNL PCH

U0500

(MASTER)

12

IN

PP1V8_SLPS2R

2.2K

5%

1/20W

MF

201

1

2

R5230

89 83 74 73 71 69

SML_PCH_0_CLK

1

R5231

2.2K

5%
1/20W
MF
201

2

PP3V3_S5

(Write: 0xF2 Read: 0xF3)

(10K IPU)

(10K IPU)

R5218

2.2K

5%

1/20W

MF MF

201

SSD0

U9000

OUT

BIBI

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

SMC

U3900

(MASTER)

35

IN

35 62

BI BI

1

2

1

R5217

2.2K

5%
1/20W

201

2

I2C_SENSE_SCL

I2C_SENSE_SDA

PP1V8_G3S

R5290

2.2K

5%

1/20W

MF

201

1

2

SMC I2C "5" G3S Connections

PP1V8_G3S

BYPASS=U5272.1::5MM

62

OUT

SMBUS_5_OE

1

R5291

2.2K

5%
1/20W
MF
201

2

R5265
R5266

R5262

5%

R5263

5%

20

20

LOADISNS

0
0

1/20W

LOADISNS

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

Trackpad

J6801

(Write: 0x98 Read: 0x99)

CKPLUS_WAIVE=I2C_PULLUP

21

21

21

21

I2C_SENSE_SCL_R1

5% 1/20W MF 201

CKPLUS_WAIVE=I2C_PULLUP

I2C_SENSE_SDA_R1

CKPLUS_WAIVE=I2C_PULLUP

I2C_SENSE_SCL_R2

MF1/20W 0201

MF 0201

CKPLUS_WAIVE=I2C_PULLUP

I2C_SENSE_SDA_R2

201MF1/20W5%

LOADISNS

C5272

0.1UF

10%

6.3V

CERM-X5R

0201

PP5V_S4SW

BYPASS=U5272.8::3MM

LOADISNS

1

2

1

R5272

100K

5%
1/20W
MF
201

2

LOADISNS

1

C5273

0.1UF

10%
10V

2

X5R-CERM
0201

NOSTUFF

1

R5273

4.7K

5%
1/20W
MF
201

2

74 52

C

I2C_SENSE_5V_SCL

NOSTUFF

1

R5274

4.7K

5%
1/20W
MF
201

2

R5269

R5264

LOADISNS

1

LOADISNS

1

5% 1/20W MF00201

2

5% 1/20W MF00201

2

EADC2

U5710

(Write: 0x12 Read: 0x13)

CKPLUS_WAIVE=I2C_PULLUP

I2C_SENSE_5V_SCL_R2

CKPLUS_WAIVE=I2C_PULLUP

I2C_SENSE_5V_SDA_R2

OUT

BI

52

52

2

IO/VL1

3

IO/VL2

5

EN

1

8

VCCVL

U5272

NLSX4402

UDFN-COMBO

IO/VCC1
IO/VCC2

CRITICAL
LOADISNS

GND

4

7
6

I2C_SENSE_5V_SDA

B

12

BI

35 29 28 27 35 29 28 27

SML_PCH_0_DATA

60 47 44 43 42 40 34 29 28 27

86 83 81 74 72 71 70 64 63

SMC

89

U3900

(MASTER)

UPC_I2C_INT_L

SMC I2C "0" G3H CONNECTIONS

PP1V8_SLPS2R

1

R5220

5%
1/20W
MF
201

2

1

R5221

2.2K2.2K

5%
1/20W
MF
201

2

USB-C PORT CONTROLLER XA

U3100 - ADDR: 0X38

(WRITE: 0X70 READ: 0X71)

USB-C PORT CONTROLLER XB

U3200 - ADDR: 0X3F

(WRITE: 0X7E READ: 0X7F)

BIBI

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

U3900

(MASTER)

CFL PCH

35

35

IN

BI

CKPLUS_WAIVE=I2C_PULLUP

I2C_THMSNS_SCL

CKPLUS_WAIVE=I2C_PULLUP

I2C_THMSNS_SDA

U0500

(WRITE:0X88 READ:0X89)

SMC I2C "2" S0 Connections

PP1V8_S5

1

R5261

2.2K

5%
1/20W
MF
201

2

I2C_THMSNS_SCL_R0

I2C_THMSNS_SDA_R0

SMC

R5202

5%

R5203

5%

0

0

R5260

21

MF1/20W 0201

21

MF1/20W 0201

2.2K

5%

1/20W

MF

201

1

2

R5204

5%

R5205

5%

0

0

THERMAL SENSORS A

TMP464: U5850

(Write: 0x90 Read: 0x91)

CKPLUS_WAIVE=I2C_PULLUP

21

I2C_THMSNS_SCL_R1

MF1/20W 0201

CKPLUS_WAIVE=I2C_PULLUP

21

I2C_THMSNS_SDA_R1

0201MF1/20W

OUT

BI

53

53

SMC I2C "1" S0 Connections

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

SMC

U3900

(MASTER)

35

35

IN

BI

I2C_SNS0_S0_SCL
I2C_SNS0_S0_SDA

(NOTE:NO DEVICE ON THIS BUS)

PP1V8_S5

R5270

2.2K

5%

1/20W

MF

201

B

2.2K

5%

1/20W

MF

201

1

2

1

2

R5271

A

83 35 29 27

83 35 29 27

83 35 29 27

83 35 29 27

8

IN

BI

I2C_UPC_SCL

I2C_UPC_SDA

OUT

BI

(NOTE:ALSO CONNECT TO ARKANOID DEBUG CONN, J3000)

67

12

12

OUT

BI

SML_PCH_1_CLK

SML_PCH_1_DATA

R5210

5%

R5211

5%

0

0

21

MF1/20W 0201

21

MF1/20W 0201

(NOTE:R1375,R1376 PU TO PP1V8_S5)

NOSTUFF

NOSTUFF

R5208

5%

R5209

5%

0

0

THERMAL SENSORS B

TMP464: U5870

(Write: 0x92 Read: 0x93)

CKPLUS_WAIVE=I2C_PULLUP

21

I2C_THMSNS_SCL_R2

MF1/20W 0201

CKPLUS_WAIVE=I2C_PULLUP

21

I2C_THMSNS_SDA_R2

MF1/20W 0201

35 4

OUT

53

53

BI

BOM_COST_GROUP=SMC

PAGE TITLE

I2C CONNECTIONS 1

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

52 OF 500

SHEET

47 OF 98

1

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

678

3 245

1

D

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

AP (SoC)

U3900

(MASTER)

58 36

58 36

58 36

58 36

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

IN

BI

AP (SoC)

U3900

(MASTER)

59 36

59 36

IN

AP I2C "0" G3S Connections

PP1V8_G3S

Left Speaker Amps

U6400

(WRITE:0X62,READ 0X63)

U6450

(WRITE:0X64,READ 0X65)

R5300

I2C_SPKRAMP_L_SCL
I2C_SPKRAMP_L_SDA

2.2K

5%

1/20W

MF

201

1

2

1

R5301

2.2K

5%
1/20W
MF
201

2

AP I2C "1" G3S Connections

PP1V8_G3S

Right Speaker Amps

U6500

(WRITE:0X66,READ 0X67)

U6550

(WRITE:0X68,READ 0X69)

R5305

2.2K

1/20W

I2C_SPKRAMP_R_SCL

5%
MF

201

1

2

1

R5306

2.2K

5%
1/20W
MF
201

2

OUT

OUT

BI

Device
ACE XA
ACE XB

TEMP. SENSOR A

TEMP. SENSOR B

TCON
Charger
Battery

Calpe

Trackpad

SMC IF

I2C0
I2C0

I2C1NC.
I2C2

I2C2

I2C3
I2C4
I2C4
I2C4
I2C5

ADDR. (8b)
0X70/1
0X7E/F

D

0X90/1

0X92/3

0X10-1F

0X12/3
0X16/7
0XE8/9
0X98/9

C

59 36

59 36

BI

I2C_SPKRAMP_R_SDA

AP I2C "2" Codec Connections

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

AP (SoC)

U3900

(MASTER)

57 36

57 36

57 36

57 36

BI

I2C_CODEC_SCL

IN

I2C_CODEC_SDA

PP1V8_G3S

R5310

2.2K

5%

1/20W

MF

201

BI

EADC1
EADC2

SSD

I2C5
I2C5
I2C6

0X10/1
0X12/3
0XF2/3

SOC IF (AP)

C

Left Spkr Amp.(U6400)

ISP I2C "0" G3S Connections

1

2

1

R5311

2.2K

5%
1/20W
MF
201

2

Audio Codec

U6300

(WRITE:0X90,READ 0X91)

OUT

BI

36

36

58 57 55 51 48 47 45 44 43 18

ISP (SoC)

U3900

(MASTER)

CKPLUS_WAIVE=I2C_PULLUP

IN

BI

I2C_FTCAM_SCL

CKPLUS_WAIVE=I2C_PULLUP

I2C_FTCAM_SDA

83 76 74 68 62 61 60 59

R5342

5%

R5343

5%

PP1V8_G3S

R5335

1.1K

1/20W

201

0

21

0

21

5%
MF

1

2

02011/20W MF

02011/20W MF

1

R5336

1.1K

5%
1/20W
MF
201

2

FaceTime Camera

J8500(I2C_FTCAM_ISOL)

(Write: 0x6C Read:0x6D)

I2C_FTCAM_SCL_R
I2C_FTCAM_SDA_R

OUT

BI

Left Spkr Amp.(U6450)
Right Spkr Amp.(U6500)
Right Spkr Amp.(U6550)

Audio Codec

ALS

DFR Display

DFR Touch

I2C0
I2C0
I2C1
I2C1
I2C2
I2C3
I2C4
I2C4

0X62/3
0X64/5
0X66/7
0X68/9
0X90/1
0X52/3
0X98/9
0XA0/1

B

AP I2C "3" G3S Connections

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

AP (SoC)

U3900

(MASTER)

CKPLUS_WAIVE=I2C_PULLUP

36

36

IN

BI

I2C_ALS_SCL

CKPLUS_WAIVE=I2C_PULLUP

I2C_ALS_SDA

AP I2C "4" DFR Connections

PP1V8_G3S

R5315

R5340

R5341

1

1.1K

5%

1/20W

MF

2

21

0

02011/20W MF 5%
21

0

02011/20W MF 5%

1

R5316

1.1K

5%
1/20W
MF
201201

2

ALS

J8500

(See camera flex)

(WRITE:0x52,READ 0x53)

I2C_ALS_SCL_R
I2C_ALS_SDA_R

OUT

BI

76

76

FHSi2 PMU

J8500(I2C_FTCAM_ISOL)

(Write: 0x90 Read: 0x91)

76

76

OUT

76 76

BI

NC.
Spkr ID1
Spkr ID0

FT Camera

FHSi2

NC.

I2C5
I2C6
I2C6

SIP IF (ISP)

I2C0
I2C0
I2C1

AOP IF

I2C0NC.

0X6C/D
0X90/1

B

A

AP (SoC)

U3900

(MASTER)

CKPLUS_WAIVE=I2C_PULLUP

36

36

IN

BI

I2C_DFR_SCL
I2C_DFR_SDA

CKPLUS_WAIVE=I2C_PULLUP

5% 2011/20W MF

5% 2011/20W MF

R5322
R5323

87 83 46

15
15

PP1V8_DFR

R5320

1.5K

1/20W

21

21

5%

MF

201

1

2

1

R5321

1.5K

5%
1/20W
MF
201

2

(Write:0x98 Read:0x99)

I2C_DFR_SCL_R
I2C_DFR_SDA_R

(Write:0xA0 Read:0xA1)

DFR Display

J5110

OUT

BI

DFR Touch

J5100

OUT

BI

83 46 83 46

83 46 83 46

BOM_COST_GROUP=SMC

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

I2C CONNECTIONS 2

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

53 OF 500

SHEET

48 OF 98

A

8

67

35 4

2

1

678

3 245

1

D

CPU High Side Current Sense (IC0R)

Gain: 100x, EDP: 8.868 A
Rsense: 0.002 (R5400) [Production]

74 54 52 51 50 49

PP3V3_S4SW_SNS

Vsense: 17.7 mV, Range: 12.5 A
SMC ADC: 00

75 72 64 62 49

87 86 83

69 67 66 65 43

87 85 73

PPBUS_G3H

NO_XNET_CONNECTION=1

CRITICAL

PPBUS_HS_CPU

R5400

0.002

1%
1W

CYN

0612

PLACE_NEAR=U5400.2:5MM

1

ISNS_HS_CPU_P LCDBKLT_IOUT

54

ISNS_HS_CPU_N

54

432

PLACE_NEAR=U5400.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

V+

U5400

INA214A

UQFN

CRITICAL

100x

GND

OTHER 5V High Side Current Sense (IO5R)

Gain: 100x, EDP: 5.227 A
Rsense: 0.005 (R5410) or SHORT
Vsense: 26.1 mV, Range: 6.0 A

MUX: A1

75 72 64 62 49

87 86 83

86 68

PPBUS_G3H

CRITICAL

PPVIN_G3H_P5VG3S

R5410

0.005

1%
1W
MF

1206-1

74 54 52 51 50 49

PLACE_NEAR=U5410.2:5MM

432

ISNS_HS_OTHER5V_P

54

ISNS_HS_OTHER5V_N

54

1

PLACE_NEAR=U5410.4:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

V+

U5410

INA214A

UQFN

CRITICAL

LOADISNS

100x

GND

LCD Backlight Current Sense (IBLR)

Gain: 100x. EDP: 0.902 A

BYPASS=U5400.6::5MM

1

C5401

6

0.1UF

10%

6.3V

2

CERM-X5R
0201

PLACE_NEAR=U3900.AE1:7.5MM

Rsense: 0.025 (R8400)
Vsense: 22.6 mV, Range: 1.32 A

R5409

10

OUT

REF

NC
NC

9

CPUHI_IOUT

8

1

NC

7

NC

PLACE_NEAR=U3900.AE1:7.5MM

9.09K

1%

1/20W

MF

201

21

SMC_CPU_HS_ISENSE

1%

1/20W

MF

201

1

2

R5408

9.09K

1

C5409

0.022UF

10%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U3900.AE1:7.5MM

GND_SMC_AVSS

OUT

35

75 54

75 54

51 42

52 50 49 35

IN

IN

ISNS_LCDBKLT_P

ISNS_LCDBKLT_N

74 54 52 51 50 49

PLACE_NEAR=R8400.4:5MM

PLACE_NEAR=R8400.3:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5450

INA214A

UQFN

CRITICAL

LOADISNS

100x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5450.6::5MM

LOADISNS

1

C5450

0.1UF

10%

6.3V

2

CERM-X5R
0201

1

R5455

NC
NC

2

PLACE_NEAR=U5710.22:5MM

LOADISNS

R5459

45.3K

1/20W

6.04K

1%
1/20W
MF
201

PLACE_NEAR=U5450.10:5MM

LOADISNS

1%
MF

201

21

EADC2_LCDBKLT_ISENSE

1

C5459

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.22:5MM

LOADISNS

GND_EADC2_COM

OUT

52

D

54 52 51 50

Left AMP Current Sense (IALR)

LOADISNS

BYPASS=U5410.6::5MM

1

C5411

6

0.1UF

10%

6.3V

2

CERM-X5R
0201

PLACE_NEAR=U7800.A15:7.5MM

LOADISNS

87 86 83 75 72 64 62 49

R5419

10

OUT

8

REF

1

NC
NC

9

NC

7

NC

PLACE_NEAR=U7800.A15:7.5MM

9.09K

1/20W

1%
MF

201

21

LOADRC:YES

PMU_OTHER5V_HI_ISENSEHS_OTHER5V_IOUT

R5418

9.09K

1%

1/20W

MF

201

72

OUT

1

2

1

C5419

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.A15:7.5MM

LOADISNS

Gain: 200x, EDP: 2.6 A
Rsense: 0.005 (R54A0) or SHORT
Vsense: 13 mV, Range: 3.3 A

PPBUS_G3H

NO_XNET_CONNECTION=1

R54A0

0.005

0306-SHORT

58

PPBUS_G3H_SPKRAMP_LEFT

OMIT

1%

1/3W

MF

74 54 52 51 50 49

PLACE_NEAR=U54A0.2:5MM

432

ISNS_SPKRAMP_LEFT_P

54

ISNS_SPKRAMP_LEFT_N

54

1

PLACE_NEAR=U54A0.4:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U54A0

INA210A

UQFN

CRITICAL
LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U54A0.6::5MM

LOADISNS

1

C54A0

0.1UF

10%

6.3V

2

CERM-X5R
0201

SPKRAMPL_IOUT

1

R54A5

NC
NC

2

P2MM

SM

1

PP

15K

5%
1/20W
MF
201

PLACE_NEAR=U54A0.10:5MM

PP54A0

LOADISNS

C

B

A

OTHER 3.3V High Side Current Sense (IO3R)

Gain: 100x, EDP: 6.736 A
Rsense: 0.003 (R5440) or SHORT

74 50

54 52 51 49

PP3V3_S4SW_SNS

Vsense: 20.2 mV, Range: 10 A
MUX: A0

75 72 64 62 49

87 86 83

PPBUS_G3H

CRITICAL

PLACE_NEAR=U5440.2:5MM

6

V+

U5440

INA214A

86

68

R5440

0.003

PPVIN_G3H_P3V3G3H

1%
1W

CYN

0612

1

ISNS_HS_OTHER3V3_P

54 54

ISNS_HS_OTHER3V3_N

54

432

PLACE_NEAR=U5440.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

100x

GND

9

3.3V RTC High Side Current Sense (IR3R)

Gain: 100x, EDP: 2.413 A
Rsense: 0.01 (R5420) or SHORT

54

74 52 51 50 49

PP3V3_S4SW_SNS

Vsense: 24.1 mV, Range: 3.3 A
EADC1: CH4

75 72 64 62 49

87 86 83

PPBUS_G3H

PLACE_NEAR=U5420.2:5MM

6

V+

U5420

87 63

R5420

0.005

0306-SHORT

PPVIN_G3H_P3V3G3HRTC

OMIT

1%

1/3W

MF

1

ISNS_HS_3V3RTC_P

54

ISNS_HS_3V3RTC_N

54

432

PLACE_NEAR=U5420.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

INA214A

UQFN

CRITICAL
LOADISNS

100x

GND

9

NAND Current Sense (IHNR)

Gain: 100x, EDP: 1.471 A
Rsense: 0.02 (R5460) [Production]
Vsense: 29.4 mV, Range: 1.5 A
MUX: A6

83 75 62 49

72

64

87

86

PPBUS_G3H

PLACE_NEAR=U5460.2:5MM

OMIT

1

54

54

432

PLACE_NEAR=U5460.4:5MM

85 81

R5460

0.005

0306-SHORT

PPBUS_G3H_SSD0

1%

1/3W

MF

Stuff 0.005 for PVT per <rdar://49214265>

RES,MTL FLIM,100K,1/16W,0201,SMD,LF

74

54 52 51 50 49

ISNS_SSDNAND_P

ISNS_SSDNAND_N

PP3V3_S4SW_SNS

6

V+

U5460

INA214A

2

IN+

3

IN+

4

IN-

5

IN-

R5418,R5448, R54683117S0008 LOADRC:NO

UQFN

CRITICAL

LOADISNS

100x

GND

9

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

OUT

REF

OUT

REF

OUT

REF

NC
NC

NC
NC

NC
NC

LOADISNS

BYPASS=U5440.6::5MM

1

C5441

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

HS_OTHER3V3_IOUT

8

1

NC

7

NC

BYPASS=U5420.6::5MM

LOADISNS

1

C5420

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

HS_3V3RTC_IOUT

8

1

NC

7

NC

BYPASS=U5460.6::5MM

LOADISNS

1

C5460

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

SSDNAND_IOUT

8

1

NC

7

NC

LOADISNS

PLACE_NEAR=U7800.A16:7.5MM

R5449

9.09K

1/20W

PLACE_NEAR=U7800.A16:7.5MM

P2MM

SM

1

PP

1

R5425

15K

1%
1/20W
MF
201

2

PLACE_NEAR=U5420.10:5MM

LOADISNS

PLACE_NEAR=U7800.E14:7.5MM

LOADISNS

21

1%
MF

201

LOADRC:YES

PP5401

R5469

9.09K

1/20W

PLACE_NEAR=U7800.E14:7.5MM

21

1%
MF

201

LOADRC:YES

PMU_OTHER3V3_HI_ISENSE

R5448

9.09K

1%

1/20W

MF

201

1

2

1

C5449

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.A16:7.5MM

LOADISNS

PMU_SSDNAND_ISENSE

R5468

9.09K

1%

1/20W

MF

201

1

2

1

C5469

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.E14:7.5MM

LOADISNS

87 83 75 72 64 62 49

72

OUT

87 86 83 75 72 64 62 49

72

OUT

Right AMP Current Sense (IARR)

Gain: 200x, EDP: 2.6 A
Rsense: 0.005 (R54B0) or SHORT
Vsense: 13 mV, Range: 3.3 A

86

59

PBUS Voltage Sense & Enable (VP0R)

GAIN: 0.089X
VNOMINAL: 12.6 V, RANGE: 14.05 V
SMC ADC: 01

83 74 72 50

PPBUS_G3H

DC-IN (AMON) Current Sense (ID0R)

64 54

Charger (BMON) Current Sense (IPBR)

64 54

74 54 52 51 50 49

PP3V3_S4SW_SNS

PPBUS_G3H

PLACE_NEAR=U54B0.2:5MM

432

0306-SHORT

MF

1/3W

1%

0.005

R54B0

OMIT

1

ISNS_SPKRAMP_RIGHT_P

ISNS_SPKRAMP_RIGHT_N

54

PPBUS_G3H_SPKRAMP_RIGHT

NO_XNET_CONNECTION=1

PLACE_NEAR=U54B0.4:5MM

CRITICAL

Q5480

NTUD3169CZ

SOT-963

N-CHANNEL

Enables PBUS VSense

D

divider when in S0.

IN

PLACE_NEAR=R5400.1:10 MM

SENSOR_PWR_EN

XW5480

SM

21

PBUS_S0_VSENSE_IN

R5481

100K

2 1

1%

1/20W

MF

201

2

1

5

4

G

S

D

G

S

P-CHANNEL

PBUSVSENS_EN_L_DIV

PLACE_NEAR=U3900.AB5:7.5MM

21

SMC_DCIN_ISENSE

PLACE_NEAR=U3900.AB5:7.5MM

1

C5439

0.022UF

10%

6.3V

2

X5R-CERM
0201

IN

CHGR_AMON

Charger Gain: 20x
EDP: 4.6 A
Rsense: 0.010 (R7020)
SMC ADC: 03

R5439

4.53K

1%

1/20W

MF

201

GND_SMC_AVSS

R5479

IN OUT

CHGR_BMON

Charger Gain: 7.9x
EDP: 20.83 A

Rsense: 0.005 (R7060)

SMC ADC: 02

PLACE_NEAR=U3900.AE2:7.5MM

4.53K

1%

1/20W

MF

201

PLACE_NEAR=U3900.AE2:7.5MM

21

R5478

9.09K

1/20W

NOSTUFF

SMC_BMON_ISENSE

1%
MF

201

1

2

1

C5479

0.022UF

10%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U3900.AE2:7.5MM

GND_SMC_AVSS

6

3

6

V+

U54B0

INA210A

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

200x

GND

9

PBUSVSENS_EN_L

R5482

PBUS_S0_VSENSE

R5483

0

21

5%

1/20W

MF

0201

NOSTUFF

35

OUT

52 51 50 49 42 35

35

52 51 50 49 42 35

BOM_COST_GROUP=SENSORS

OUT

REF

NC
NC

100K

1/20W

BYPASS=U54B0.6::5MM

LOADISNS

1

C54B0

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

SPKRAMPR_IOUT

8

1

NC

7

NC

P2MM

SM

1

PP

1

R54B5

15K

5%
1/20W
MF
201

2

PLACE_NEAR=U54B0.10:5MM

PP54B0

LOADISNS

DC In Voltage Sense (VD0R)

GAIN: 0.058X
VNOMINAL: 16.5 V, RANGE: 21.45 V
SMC ADC: 04

1

1%
MF

201

2

R5488

51.1K

1%

1/20W

MF

201

R5489

4.99K

1%

1/20W

MF

201

87 83 64 27

1

PLACE_NEAR=U3900.Y5:7.5MM

Rthevenin = 4546 Ohms

2

PPDCIN_G3H

PLACE_NEAR=U3900.Y7:7.5MM

PLACE_NEAR=U3900.Y7:7.5MM

SMC_PBUS_VSENSE

1

2

1

C5489

0.022UF

10%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U3900.Y5:7.5MM

PLACE_NEAR=U3900.Y5:7.5MM

GND_SMC_AVSS

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

POWER SENSORS HIGH SIDE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

Rthevenin = 4586 Ohms

1%

1/20W

MF

201

1%

1/20W

MF

201

OUT

1

2

1

2

35

R5498

78.7K

R5499

4.87K

SMC_DCIN_VSENSE

PLACE_NEAR=U3900.Y7:7.5MM

1

C5499

0.022UF

10%

6.3V

2

X5R-CERM
0201

GND_SMC_AVSS

52 51 50 49 42 35

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

54 OF 500

SHEET

49 OF 98

OUT

C

B

35

52 51 50 49 42 35

A

SIZE

D

8

67

35 4

2

1

678

3 245

1

D

CPU VCCIO Current Sense (IC1C)

Gain: 200x, EDP: 3.6 A
Rsense: 0.003 (R8102) or SHORT
Vsense: 10.8 mV, Range: 5 A
PMU AMUX: A3

73

73

IN

IN

74 54 52 51 50 49

PLACE_NEAR=R8102.3:6MM

ISNS_CPUVCCIO_P

ISNS_CPUVCCIO_N

PLACE_NEAR=R8102.4:6MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5560

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5560.6::5MM

LOADISNS

1

C5560

0.1UF

10%

6.3V

2

CERM-X5R
0201

CPUVCCIO_IOUT

NC
NC

DDR 1.2V S3 (CPU & Memory) Current Sense (IM0C)

Gain: 200x, EDP: 6.9 A
Rsense: 0.002 (R8118) or SHORT
Vsense: 13.8 mV, Range: 7.5 A
PMU AMUX: A4

73 54

54

73

IN

IN

54

52 51

74 50 49

PLACE_NEAR=R8118.4:5MM

ISNS_CPUDDR_P

ISNS_CPUDDR_N

PLACE_NEAR=R8118.3:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5500

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

BYPASS=U5500.6::5MM

1

C5500

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

ISNS_DDR_IOUT

8

1

NC

7

NC

PLACE_NEAR=U7800.B14:7.5MM

LOADISNS

R5569

9.09K

1/20W

PLACE_NEAR=U7800.B14:7.5MM

PLACE_NEAR=U7800.D13:7.5MM

LOADISNS

21

1%
MF

201

R5568

LOADRC:YES

9.09K

1%

1/20W

MF

201

R5509

9.09K

1/20W

PLACE_NEAR=U7800.D13:7.5MM

21

1%
MF

201

R5508

LOADRC:YES

9.09K

1%

1/20W

MF

201

PMU_CPUVCCIO_ISENSE

1

2

1

C5569

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.B14:7.5MM

LOADISNS

PMU_DDR1V2_ISENSE

1

2

1

C5509

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.D13:7.5MM

LOADISNS

OUT

OUT

72

72

66

66

66

66

CPU Core Current Sense (ICAC)

Gain: 104.38x, EDP: 64 A
Rsense: 2x of 0.00075 (R7310, R7320), Rsum: 0.000375
Vsense: 24 MV, Range: 76.64 A
PMU AMUX: B7

IN

IN

IN

IN

CPUCORE_ISNS1_P

PLACE_NEAR=R7210:5MM

CPUCORE_ISNS2_P

PLACE_NEAR=R7220:5MM

CPUCORE_ISNS1_N

PLACE_NEAR=R7210:5MM

CPUCORE_ISNS2_N

PLACE_NEAR=R7220:5MM

LOADISNS

LOADISNS

LOADISNS

LOADISNS

R5545

4.42K

1/20W

0.1%
MF

0201

21

R5546

4.42K

1/20W

0.1%
MF

0201

21

R5547

4.42K

1/20W

0.1%
MF

0201

21

R5548

4.42K

1/20W

0.1%
MF

0201

21

LOADISNS

R5542

ISNS_CPUVR_P ISNS_CPUVR_R_P

54

4.64K

R5543

ISNS_CPUVR_N

54

4.64K

LOADISNS

CPU Core Voltage Sense (VCAC)

PMU AMUX: B4

1%

1/20W

MF

201

1%

1/20W

MF

201

74 54 52 51 50 49

21

21

ISNS_CPUVR_R_N

1

R5544

715K

0.1%
1/20W
MF
0201

2

LOADISNS

NO_XNET_CONNECTION=1

87 83 66 9 7

PP3V3_S4SW_SNS

1

3

PPVCC_S0_CPU

PLACE_NEAR=R7210.2:5 MM

U5540

5

V+

V-

2

R5541

715K

1/20W

21

0.1%
MF

0201

NO_XNET_CONNECTION=1

LOADISNS

XW5550

SM

LOADISNS
CRITICAL

ISL28133

SC70-5

4

CPUVR_ISUM_IOUT

21

CPUVSENSE_IN

BYPASS=U5540.5::5MM

LOADISNS

1

C5540

0.1UF

10%

6.3V

2

CERM-X5R
0201

PLACE_NEAR=U7800.H13:7.5MM

LOADISNS

R5549

9.09K

1/20W

PLACE_NEAR=U7800.H13:7.5MM

LOADRC:YES

21

1%
MF

201

R554A

9.09K

1/20W

PMU_CPU_ISENSE

1

1%
MF

201

2

PLACE_NEAR=U7800.G13:7.5MM

R5559

4.53K

1/20W

1%
MF

201

21

PMU_CPU_VSENSE

1

2

1

C5549

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.H13:7.5MM

LOADISNS

72

OUT

C5559

2.2UF

20%

6.3V
X5R-CERM
0201

PLACE_NEAR=U7800.G13:7.5MM

OUT

72

D

C

B

CPU DDR 1.2V S3 (CPU Only) Current Sense (IMCC)

Gain: 200x, EDP: 2.6 A
Rsense: 0.005 (R5510) or SHORT
Vsense: 13 mV, Range: 3 A
PMU AMUX: B2

23 22 21 20 19

88 83 74 73

88 83 9 7 6

PP1V2_S3

PP1V2_S3_CPUDDR

OMIT

R5510

0.005

1%

1/3W

0306-SHORT

MF

52 54

74 51 50 49

PLACE_NEAR=U5510.2:5MM

432

ISNS_CPUVDDQ_P

54

ISNS_CPUVDDQ_N

54

1

PLACE_NEAR=U5510.4:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5510

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5510.6::5MM

LOADISNS

1

C5510

0.1UF

10%

6.3V

2

CERM-X5R
0201

CPUDDR_IOUT

NC
NC

DFR Current Sense (IF3C)

Gain: 100x, EDP: 0.75 A
Rsense: 0.025 (R5520) or SHORT
Vsense: 18.8 mV, Range: 1.32 A

89 86 83 76
57 54 29 28 27
74 72 71 63 61

PP3V3_G3H_RTC

R5520

0306-SHORT

46

PP3V3_G3H_RTC_DFR

OMIT

0.005

1%

1/3W

MF

74 54 52 51 50 49

PLACE_NEAR=U5520.2:5MM

1

ISNS_DFR3V3_P

54

ISNS_DFR3V3_N

54

432

PLACE_NEAR=U5520.4:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5520

INA214A

UQFN

CRITICAL

LOADISNS

100x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5520.6::5MM

LOADISNS

1

C5520

0.1UF

10%

6.3V

2

CERM-X5R
0201

DFR3V3_IOUT

NC
NC

PLACE_NEAR=U7800.E12:7.5MM

LOADISNS

R5519

9.09K

1/20W

PLACE_NEAR=U7800.E12:7.5MM

PLACE_NEAR=U5710.24:5MM

LOADISNS

21

1%
MF

201

R5518

LOADRC:YES

9.09K

R5529

45.3K

1

R5525

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5520.10:5MM

1/20W

NOSTUFF

1%
MF

201

21

PMU_CPUDDR_ISENSE

1

C5519

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.E12:7.5MM

1%

1/20W

MF

201

1

2

LOADISNS

EADC2_P3V3_DFR_ISENSE

1

C5529

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.24:5MM

LOADISNS

OUT

OUT

72

52

67

67

67

67

CPU GT+GTX Current Sense (ICGC)

Gain: 104.38x, EDP: 64 A
Rsense: 2x of 0.00075 (R7410, R7420), Rsum: 0.000375
Vsense: 24 mV, Range: 76.64 A
PMU AMUX: B6

IN

CPUGT_ISNS1_P

PLACE_NEAR=R7410.4:5MM

LOADISNS

IN

CPUGT_ISNS2_P

PLACE_NEAR=R7420.4:5MM

LOADISNS

IN

CPUGT_ISNS1_N

PLACE_NEAR=R7410.3:5MM

LOADISNS

IN

CPUGT_ISNS2_N

PLACE_NEAR=R7420.3:5MM

LOADISNS

CPU GT Voltage Sense (VCGC)

PMU AMUX: B5

R5585

4.42K

1/20W

0.1%
MF

0201

21

R5586

4.42K

1/20W

0.1%
MF

0201

21

R5588

4.42K

1/20W

0.1%
MF

0201

21

R558C

4.42K

1/20W

0.1%
MF

0201

21

ISNS_CPUGT_P

54

ISNS_CPUGT_N

54

LOADISNS

R5582

4.64K

1/20W

1%
MF

201

21

R5583

4.64K

1/20W

LOADISNS

1%
MF

201

21

74 54 52 51 50 49

1

2

87 83 67 7

PP3V3_S4SW_SNS

ISNS_CPUGT_R_P

ISNS_CPUGT_R_N

R5584

715K

0.1%
1/20W
MF
0201

LOADISNS

NO_XNET_CONNECTION=1

PPVCCGT_S0_CPU

10

LOADISNS
CRITICAL

U5580

5

ISL28133

1

3

V+

V-

2

SC70-5

4

CPUGT_ISUM_IOUT

R5581

715K

1/20W

XW5590

PLACE_NEAR=R7410.1:5 MM

21

0.1%
MF

0201

NO_XNET_CONNECTION=1

LOADISNS

SM

21

CPUGTVSENSE_IN

BYPASS=U5580.5::5MM

LOADISNS

1

C5580

0.1UF

10%

6.3V

2

CERM-X5R
0201

PLACE_NEAR=U7800.H14:7.5MM

LOADISNS

R5589

9.09K

1/20W

PLACE_NEAR=U7800.H14:7.5MM

21

PMU_CPUGT_ISENSE

1%
MF

201

R558A

9.09K

1%

1/20W

MF

201

LOADRC:YES

PLACE_NEAR=U7800.G14:7.5MM

1

2

R5599

4.53K

1/20W

1%
MF

201

21

PMU_CPUGT_VSENSE

1

C5599

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.G14:7.5MM

OUT

1

C5589

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.H14:7.5MM

LOADISNS

72

OUT

C

72

B

WLANBT 3.3V Current Sense (IW3C)

Gain: 163.3x, EDP: 1.698 A
Rsense: 0.003 (R5530) or Rsense SHORT
VSENSE: 5.09 MV, RANGE: 2.55 A
SMC ADC: 05

83 32

A

75 74 62 57 51 45

83 76

PP3V3_G3S_WLANBT

NO_XNET_CONNECTION=1

PP3V3_G3S

6 LOADRC:NO117S0008

OMIT

R5530

0.005

1%

1/3W

0306-SHORT

MF

RES,MTL FLIM,100K,1/16W,0201,SMD,LF

75 68 55 54 52 51 46 29 28

PLACE_NEAR=U5530.3:5MM

ISNS_WLANBTP3V3_P

54

1

432

ISNS_WLANBTP3V3_N

54

PLACE_NEAR=U5530.4:5MM

86 83

PP5V_G3S

ISNS_WLANBTP3V3_R_P

LOADISNS

R5531

120

1/20W MF 02010.1%

CKPLUS_WAIVE=PDIFPR_BADTERM
CKPLUS_WAIVE=PDIFPR_BADTERM

ISNS_WLANBTP3V3_R_N

LOADISNS

R5532

120

MF

0201

1/20W

0.1%

R5508,R5518,R5568,R554A,R558A,C5539

LOADISNS

D5530

LGA

KA

RB522ES-30

21

21

ISNS_WLAN_OP

WLAN_OP_EN

50

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

GND_EADC2_COM

LOADISNS

NO_XNET_CONNECTION=1

PLACE_NEAR=R5531.2:5MM

Q5530

DMP31D0UFB4

U5530

LTC2050HV

TSOT23-6

CRITICAL
LOADISNS

6

3

+

V+

SHDN*

4

-

V-

5

2

1

DFN1006H4-3

1

1

R5533

100K

5%
1/20W
MF
201

2

G

2

S

D

3

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PP5V_WLAN_ISNS_D

LOADISNS

BYPASS=U5530.6::5MM

1

C5530

0.1UF

10%
10V

2

X5R-CERM
0201

WLANBTP3V3_IOUT

LOADISNS

1

R5534

19.6K

0.1%
1/20W
MF
0201

2

50

LOADISNS

54 52 51 49

LOADISNS

PLACE_NEAR=U3900.AD4:7.5MM

R5539

4.53K

1/20W

1%
MF

201

21

SMC_PP3V3_WLANBT_ISENSE

1

2

GND_SMC_AVSS

OUT

LOADRC:YES

C5539

0.022UF

10%

6.3V
X5R-CERM
0201

PLACE_NEAR=U3900.AD4:7.5MM

83 74 72 49

PP5V_WLAN_ISNS_D

LOADISNS

1

R5536

100K

5%
1/20W
MF
201

2

35

LOADISNS

1

R5535

100K

5%
1/20W
MF
201

2

WLAN_OP_EN_L

WLAN_OP_EN

6

LOADISNS
CRITICAL

52 51 49 42 35

SENSOR_PWR_EN

IN

SSM6N15AFEAP

Q5531

VER-1

SOT563

2

G S

D

LOADISNS
CRITICAL

3

D

Q5531

SSM6N15AFEAP

1

VER-1

SOT563

5

G S

4

50

BOM_COST_GROUP=SENSORS

50

PAGE TITLE

POWER SENSORS LOAD SIDE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

55 OF 500

SHEET

50 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

Thunderbolt TBD Left Current Sense (IULC)

Gain: 200x. EDP: 0.7 A
Rsense: 0.025 (R5640) or SHORT

PP3V3_S4SW_SNS

49 50 51 52 54 74

Vsense: 17.5 mV, Range: 0.66 A

6

74

PP3V3_S0_TBT_X_ISNS_R

PLACE_NEAR=U5640.2:5MM

V+

U5640

OMIT

1%

1/3W

MF

1

R5640

0.005

0306-SHORT

26 27 88

PP3V3_TBT_X_S0

ISNS_TBTX_P

54

ISNS_TBTX_N

54

432

PLACE_NEAR=U5640.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

LCD Panel 3.3V Current Sense (ILDC)

Gain: 200x. EDP: 1 A
RSENSE: 0.01 (R8520) or SHORT
Vsense: 10 mV, Range: 1.5 A

54 76 72

54 76

IN

51

PLACE_NEAR=R8520.3:5MM

ISNS_LCDPANEL_P

ISNS_LCDPANEL_N

PLACE_NEAR=R8520.4:5MM

PP3V3_S4SW_SNS

49 50 52 54 74

6

V+

U5620

INA210A

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5640.6::5MM

LOADISNS

1

C5640

0.1UF

10%

6.3V

2

CERM-X5R
0201

TBTXP3V3_IOUT

1

NC
NC

2

BYPASS=U5620.6::5MM

LOADISNS

1

C5620

0.1UF

10%

6.3V

2

CERM-X5R
0201

LCDPANEL_IOUT

NC
NC

P2MM

1

SM

PP

PP5601

R5645

20K

5%
1/20W
MF
201

PLACE_NEAR=U5640.10:5MM

NOSTUFF

PLACE_NEAR=U7800.C13:7.5MM

LOADISNS

R5629

9.09K

1/20W

PLACE_NEAR=U7800.C13:7.5MM

21

1%
MF

201

LOADRC:YES

R5628

9.09K

1%

1/20W

MF

201

PMU_LCDPANEL_ISENSE

1

2

1

C5629

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.C13:7.5MM

LOADISNS

CPU Reg. ALSCAM, LCD 5V Current Sense (IC5C)

Gain: 200x. EDP: 0.42+0.1+0.1 A
Rsense: 0.025 (R5660) or SHORT
Vsense: 15.5 mV, Range: 0.60 A
PMU AMUX: A7

83 76 66

PP3V3_S4SW_SNS

49 50 51 52 54 74

6

28 29 46 50 52 54 55 68 75 83
86

PP5V_G3S

PLACE_NEAR=U5660.2:5MM

V+

U5660

OMIT

1%

1/3W

MF

1

R5660

0.005

0306-SHORT

65 67 69 73 74 86

PP5V_G3S_CPUREG_MISC

ISNS_P5VCPUREGMISC_P

54

ISNS_P5VCPUREGMISC_N

54

432

PLACE_NEAR=U5660.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5660.6::5MM

LOADISNS

1

C5660

0.1UF

10%

6.3V

2

CERM-X5R
0201

CPUREGMISCP5V_IOUT PMU_P5V_CPUREGMISC_ISENSE

NC
NC

PLACE_NEAR=U7800.F14:7.5MM

LOADISNS

R5669

9.09K

1/20W

PLACE_NEAR=U7800.F14:7.5MM

21

1%
MF

201

R5668

LOADRC:YES

9.09K

1%

1/20W

MF

201

1

2

1

C5669

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.F14:7.5MM

LOADISNS

OUT

72

D

LPDDR 1.8V Current Sense (IM1C)

Gain: 200x. EDP: 0.45 A
Rsense: 0.005 (R5630) or SHORT

PP3V3_S4SW_SNS

49 50 51 52 54 74

Vsense: 2.25 mV, Range: 3.3 A

6

70

PP1V8_S3

PLACE_NEAR=U5630.2:5MM

V+

U5630

OUTIN

20 21 22 23 83 88

PP1V8_S3_MEM

OMIT

R5630

0.005

1%

1/3W

0306-SHORT

MF

1

ISNS_P1V8LPDDR_P

54

ISNS_P1V8LPDDR_N

54

432

PLACE_NEAR=U5630.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

BYPASS=U5630.6::5MM

LOADISNS

1

C5630

0.1UF

10%

6.3V

2

CERM-X5R
0201

LPDDRP1V8_IOUT

1

R5635

NC
NC

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5630.10:5MM

NOSTUFF

P2MM

1

SM

PP

PP5630

C

B

Trackpad 3V Current Sense (IT3C)

Gain: 200x, EDP: 0.05 A
Rsense: 0.1 (R5650) or SHORT
Vsense: 5 mV, Range: 0.17 A

45 50 51 57 62
74 75 76 83

PP3V3_G3S

NO_XNET_CONNECTION=1

PLACE_NEAR=U5650.2:5MM

OMIT

1%

1/3W

MF

1

R5650

0.005

0306-SHORT

62 83

PP3V3_G3S_TPAD

ISNS_TPADP3V3_P

54

ISNS_TPADP3V3_N

54

432

PLACE_NEAR=U5650.4:5MM

WLANBT 1.8V Current Sense (IW2C)

Gain: 200x, EDP: 0.0085 A
Rsense: 1 (R5680) or SHORT
Vsense: 8.5 mV, Range: 0.013 A
SMC ADC: 06

59 60 61 62 68

18 43 44 45 47
48 51 55 57 58
74 76 83

PP1V8_G3S

NO_XNET_CONNECTION=1

OMIT

R5680

0.005

1/3W

0306-SHORT

32 83

PP1V8_G3S_WLANBT

1%
MF

PLACE_NEAR=U5680.2:5MM

1

ISNS_WLANBTP1V8_P

54

ISNS_WLANBTP1V8_N

54

432

PLACE_NEAR=U5680.4:5MM

52

PP3V3_S4SW_SNS

49 50 51 52 54 74

PP3V3_S4SW_SNS

49 50 51 54 74

2

IN+

3

IN+

4

IN-

5

IN-

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5650

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

6

V+

U5680

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

OUT

REF

NC
NC

NC
NC

LOADISNS

BYPASS=U5650.6::5MM

1

C5650

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

TPADP3V3_IOUT

8

1

NC

7

NC

LOADISNS

BYPASS=U5680.6::5MM

1

C5680

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

WLANBTP1V8_IOUT

8

1

NC

7

NC

PLACE_NEAR=U5710.23:5MM

LOADISNS

R5659

45.3K

1

R5655

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5650.10:5MM

1/20W

NOSTUFF

LOADISNS

PLACE_NEAR=U3900.AF1:7.5MM

1%
MF

201

21

R5689

9.09K

1/20W

PLACE_NEAR=U3900.AF1:7.5MM

1%
MF

201

21

LOADRC:YES

EADC2_P3V3_TPAD_ISENSE

1

C5659

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.23:5MM

LOADISNS

GND_EADC2_COM

SMC_PP1V8_WLANBT_ISENSE

R5688

9.09K

1%

1/20W

MF

201

1

2

1

C5689

0.022UF

10%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U3900.AF1:7.5MM

LOADISNS

52

OUT

49 50 51 52 54

35

OUT

1.8V Standby Current Sense

Gain: None. EDP: 0.65 A
Rsense: 0.025 (R56B0) or SHORT
Vsense: 16.25 mV

74

18 43 44 45 47 48 51 55 57 58
59 60 61 62 74 76 83 68

PP1V8_G3S_REG

OMIT

R56B0

0.005

0306-SHORT

PP1V8_G3S

1%

1/3W

MF

PLACE_NEAR=U8220:5MM

432

ISNS_P1V8G3S_P

ISNS_P1V8G3S_N

1

OUT

OUT

C

54

54

B

A

Keyboard 3.3V Current Sense (IK3C)

Gain: 200x, EDP: 0.043 A
Rsense: 0.1 (R5690) or SHORT
Vsense: 4.3 mV, Range: 0.17 A

45 50 51 57 62

74 75 76 83

PP3V3_G3S

NO_XNET_CONNECTION=1

OMIT

R5690

0.005

0306-SHORT

61

PP3V3_G3S_KBD

1%

1/3W

MF

54

PLACE_NEAR=U5690.2:5MM

1

ISNS_KBDP3V3_P

54

ISNS_KBDP3V3_N

54

432

PLACE_NEAR=U5690.4:5MM

PP3V3_S4SW_SNS

49 50 51 52 74

R5628,R5668,R5688RES,MTL FLIM,100K,1/16W,0201,SMD,LF

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5690

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

OUT

REF

NC
NC

LOADISNS

BYPASS=U5690.6::5MM

1

C5690

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

KBDP3V3_IOUT

8

1

NC

7

NC

PLACE_NEAR=U5710.4:5MM

LOADISNS

R5699

45.3K

1%

1

R5695

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5690.10:5MM

NOSTUFF

LOADRC:NO117S0008 3

1/20W

MF

201

GND_SMC_AVSS

21

EADC2_P3V3_KBD_ISENSE

35 42 49 50 52

52

OUT

LOADISNS

1

C5699

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.4:5MM

GND_EADC2_COM

49 50 51 52 54

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

POWER SENSORS EXTENDED

SIZE

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

A

D

6.0.0

BOM_COST_GROUP=SENSORS

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

56 OF 500

SHEET

51 OF 98

8

67

35 4

2

1

678

3 245

1

D

C

Calpe 3.3V Input Current Left (IP3C)

Gain: 100x. EDP: 10.224 A
Rsense: 0.002 (R5780)

54

74 52 51 50 49

PP3V3_S4SW_SNS

Vsense: 20.448 mV, Range: 12.5 A

83 74 63

68

54
86

PP3V3_G3H

OMIT

PLACE_NEAR=U5780.2:5MM

NO_TEST=1

R5780

86 71 70

0306-SHORT

0.005

PP3V3_G3H_PMU_VDDMAIN

MF

1/3W

1%

432

ISNS_CALPE_P

54

NO_TEST=1

ISNS_CALPE_N

54

1

PLACE_NEAR=U5780.4:5MM

2

IN+

3

IN+

4

IN-

5

IN-

KB backlite Current Sense (IKBC)

Gain: 200x, EDP: 0.17 A
Rsense: 0.05 (R5730)
Vsense: 8.5 mV, Range: 0.33 A

54 51 46 29 28

50

86 83 75 68 55

85 83 75

PP5V_G3S

PP5V_G3S_KBD

OMIT

R5730

0.005

1%

1/3W

0306-SHORT

MF

54 52 51 50

74

PLACE_NEAR=U5730.2:5MM

1

ISNS_KBBLT_P

54

ISNS_KBBLT_N

54

432

PLACE_NEAR=U5730.4:5MM

PP3V3_S4SW_SNS

49

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5780

INA214A

UQFN

CRITICAL

LOADISNS

100x

GND

9

6

V+

U5730

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

OUT

REF

NC
NC

NC
NC

BYPASS=U5780.6::5MM

LOADISNS

1

C5780

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

ISNS_CALPE_IOUT

8

1

NC

7

NC

BYPASS=U5730.6::5MM

LOADISNS

1

C5730

0.1UF

10%

6.3V

2

CERM-X5R
0201

10

ISNS_KBBLT_IOUT

8

1

NC

7

NC

PLACE_NEAR=U3900.Y6:7.5MM

LOADISNS

R5789

9.09K

1/20W

PLACE_NEAR=U3900.Y6:7.5MM

PLACE_NEAR=U5710.1:5MM

LOADISNS

21

1%
MF

201

LOADRC:YES

R5739

45.3K

1

R5735

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5730.10:5MM

1/20W

NOSTUFF

1%
MF

201

21

R5788

9.09K

1%

1/20W

MF

201

1

2

1

C5789

0.022UF

10%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U3900.Y6:7.5MM

LOADISNS

GND_SMC_AVSS

EADC2_KBBLT_ISENSE

1

C5739

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.1:5MM

LOADISNS

GND_EADC2_COM

52

OUT

35

CPU SA Current Sense (ICSC)

Gain: 100X, EDP: 9.5 A
Rsense: 0.002 (R7270)
Vsense: 19 mV, Range: 15 A
PMU AMUX: B1

51 50 49 42 35

CPU SA Voltage Sense (VCSC)

PMU AMUX: B3

CPU EDRAM Current Sense (ICEC)

Gain: 200x, EDP: 6.2 A
Rsense: 0.002 (R7702) or SHORT

Vsense: 12.4 mV, Range: 7.5 A
PMU AMUX: A2

54 52 51 50 49

66

66

69 54

69 54

IN

IN

74 54 52 51 50 49

PLACE_NEAR=R7270.3:5MM

CPUSA_ISNS_PSMC_CALPE_ISENSE

CPUSA_ISNS_N

PLACE_NEAR=R7270.4:5MM

87 83 66 9 7

74 54 52 51 50 49

PLACE_NEAR=R7702.4:5MM

ISNS_CPUEDRAM_N

PLACE_NEAR=R7702.3:5MM

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

PP3V3_S4SW_SNS

2

IN+

3

IN+

4

IN-

5

IN-

6

V+

U5770

INA214A

UQFN

CRITICAL

LOADISNS

100x

GND

9

XW5778

PLACE_NEAR=R7270.2:5 MM

6

V+

OUT

REF

NC
NC

SM

10

8

1
7

21

U5790

INA210A

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

ISNS_CPUEDRAM_IOUTISNS_CPUEDRAM_P

BYPASS=U5770.6::5MM

LOADISNS

1

C5770

0.1UF

10%

6.3V

2

CERM-X5R
0201

ISNS_CPUSA_IOUT

NC
NC

CPUSAVSENSE_INPPVCCSA_S0_CPU

BYPASS=U5790.6::5MM

LOADISNS

1

C5790

0.1UF

10%

6.3V

2

CERM-X5R
0201

NC
NC

LOADISNS

PLACE_NEAR=U7800.E13:7.5MM

R5779

9.09K

1/20W

PLACE_NEAR=U7800.E13:7.5MM

PLACE_NEAR=U7800.F13:7.5MM

21

1%
MF

201

R5777

LOADRC:YES

9.09K

1/20W

201

R5778

4.53K

1/20W

LOADISNS

PLACE_NEAR=U7800.A14:7.5MM

1%
MF

201

21

R5799

9.09K

1/20W

PLACE_NEAR=U7800.A14:5MM

21

1%
MF

201

R5798

LOADRC:YES

9.09K

1/20W

201

PMU_CPUSA_ISENSE

1

1%
MF

2

1

C5779

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.E13:7.5MM

LOADISNS

PMU_CPUSA_VSENSE

1

C5778

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.F13:7.5MM

PMU_CPUEDRAM_ISENSE

1

1%
MF

2

1

C5799

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.A14:7.5MM

LOADISNS

OUTIN

OUT

OUTIN

72

D

72

72

C

B

A

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

3117S0008 LOADRC:NO

RES,MTL FLIM,100K,1/16W,0201,SMD,LF R5777,R5788,R5798

EADC2

(Write: 0x12 Read: 0x13)

74 47

54 52 51 50 49

PP5V_S4SW

49

51

50

52

54

54

51

54

EADC2_LCDBKLT_ISENSE

EADC2_P3V3_TPAD_ISENSE

EADC2_P3V3_DFR_ISENSE

EADC2_KBBLT_ISENSE

EADC2_MESA_ISENSE
EADC2_P5V_TPAD_ISENSE
EADC2_P3V3_KBD_ISENSE

EADC2_P5V_LCD_ISENSE

GND_EADC2_COM

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

BYPASS=U5710.12::5MM

LOADISNS

R5710

0

21

5%

1/20W

MF

0201

BYPASS=U5710.12::5MM

PLACE_NEAR=U5710.6:1MM

PP5V_EADC2_AVDD

C5712

LOADISNS

PLACE_NEAR=U5710.25:1MM

1

4.7UF

20%
10V

2

X5R

0402

XW5710

SM

2 1

22
23
24

B

BYPASS=U5710.21::3MM

LOADISNS

1

C5713

0.1UF

10%
10V

2

X5R-CERM
0201

13

12

21

DVDDAVDD

U5710

CH0
CH1
CH2

1

CH3

2

CH4

3

CH5

4

CH6

5

CH7

6

COM

9

LTC2309

CRITICAL
LOADISNS

GND

18

11

10

QFN

19

20

REFCOMP

THRM

PAD

25

VREF

14

AD0

15

AD1

17

SDA

16

SCL

7

8

BYPASS=U5710.10::3MM

EADC2_AD0

I2C_SENSE_5V_SDA_R2
I2C_SENSE_5V_SCL_R2

PP2V5_ADC2_VREF

ADC2_REFCOMP

1

C5715

0.1UF

10%

6.3V

2

CERM-X5R
0201

LOADISNS

BYPASS=U5710.10::5MM

LOADISNS

BYPASS=U5710.13::3MM

LOADISNS

1

C5711

0.1UF

10%
10V

2

X5R-CERM
0201

1

C5716

10UF

20%
10V

2

X5R-CERM
0402-10

1

R5712

100K

5%
1/20W

NOSTUFF

MF
201

2

47

47

1

C5710

2.2UF

20%

6.3V

2

X5R-CERM
0201

LOADISNS

BYPASS=U5710.7::5MM

BOM_COST_GROUP=SENSORS

SYNC_MASTER=

PAGE TITLE

POWER SENSORS EXTENDED 2

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

57 OF 500

SHEET

52 OF 98

SIZE

D

A

SYNC_DATE=

8

67

35 4

2

1

Thermal Sensor A:

678

3 245

1

D

TBT Die, NAND, WIFI, I/O proximity

I2C Write: 0x90, I2C Read: 0x91

TBT Die Thermal Diode (TTLD)

Placement Note:
The P leg connects to THERMDA of TBT die.
The N leg connectd to GND pin close to THERMDA.

WIFI Proximity (TW0P)

Placement Note:
BOTTOM side of WIFI/BT module

PLACE_SIDE=BOTTOM

NAND Proximity #1 (TH0b)

Placement note:
BOTTOM side between NAND devices

PLACE_SIDE=BOTTOM

53 25

26

BI

BI

Q5852

BC846BMB

SOT883

Q5853

BC846BMB

SOT883

TBTTHMSNS_D1_P

TBTTHMSNS_D1_N

THMSNSA_D2_P

3

1

2

CRITICAL

THMSNSA_D2_N

THMSNSA_D3_P

3

1

2

CRITICAL

THMSNSA_D3_N

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

NO_XNET_CONNECTION=1

PLACE_NEAR=U5850.6:5MM

C5851

2200PF

10%
10V

X7R-CERM

0201

PLACE_NEAR=U5850.7:5MM

NO_XNET_CONNECTION=1

PLACE_NEAR=U5850.5:5MM

C5852

100PF

5%
25V
C0G

0201

PLACE_NEAR=U5850.7:5MM

NO_XNET_CONNECTION=1

PLACE_NEAR=U5850.4:5MM

C5853

100PF

5%
25V
C0G

0201

PLACE_NEAR=U5850.7:5MM

R5850

0

5%
MF

0201

21

PP1V8_S5

1/20W

1

2

1

2

1

2

NO_XNET_CONNECTION=1
PLACE_NEAR=U5850.7:5MM

XW5851

SM

2 1

NO_XNET_CONNECTION=1
PLACE_NEAR=U5850.7:5MM

XW5852

SM

2 1

NO_XNET_CONNECTION=1
PLACE_NEAR=U5850.7:5MM

XW5853

SM

2 1

THMSNSA_DN

THMSNSA_DN

THMSNSA_DN

53

53

53

53

53

53 25

53

53

53

53

TBTTHMSNS_D1_P
THMSNSA_D2_P
THMSNSA_D3_P
THMSNSA_D4_P

THMSNSA_DN
THMSNSA_ADDR_SEL

1

R5851

100K

5%
1/20W
MF
201

2

PP1V8_S0_THMSNSA_R

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PLACE_SIDE=TOP

6

D1+

5

D2+

4

D3+

3

D4+

7

D-

9

ADD

14

V+

U5850

TMP464

VQFN

CRITICAL

EPAD

GND

8

17

SCL

SDA

THERM2*

THERM*

NC1
NC0
NC3
NC2

13

12

11

10

2
1
16
15

BYPASS=U5850.1::5MM

1

C5850

0.1UF

10%

6.3V

2

CERM-X5R
0201

I2C_THMSNS_SCL_R1
I2C_THMSNS_SDA_R1

NC

NC

NC
NC
NC
NC

Thermal Sensor: LEFT IO proximity (TI0P)

Placement Note:
TOP side, close to TBT die.

IN

BI

47

47

D

C

NAND Proximity #2 (TH0a)

Placement note:
TOP side between NAND devices

Q5854

BC846BMB

SOT883

PLACE_SIDE=TOP

THMSNSA_D4_P

NO_XNET_CONNECTION=1

3

1

2

CRITICAL

THMSNSA_D4_N

PLACE_NEAR=U5850.3:6MM

5%
25V
C0G

0201

1

2

C5854

100PF

PLACE_NEAR=U5850.7:6MM

NO_XNET_CONNECTION=1
PLACE_NEAR=U5850.7:5MM

XW5854

SM

2 1

THMSNSA_DN

53

53

C

B

Thermal Sensor B
Fin Stack, CPU Proximity, Memory Proximity, and CPU VR

I2C Write: 0x92, I2C Read: 0x93

32 18 17 16 15
83 74 73 72 70 69 65 53 47 42

Thermal Diode: Ambient (TMLB)

Placement Note:
Airflow thermal indicator, TOP side.

CPU Proximity (TC0P)

Placement Note:
TOP side of CPU.

Memory Proximity (TM0P)

Placement Note:
TOP side between main memory devices.

Memory Proximity (TM1P)

Q5871

BC846BMB

SOT883

PLACE_SIDE=TOP

Q5872

BC846BMB

SOT883

PLACE_SIDE=TOP

Q5873

BC846BMB

SOT883

PLACE_SIDE=TOP

3

2

3

2

3

2

THMSNSB_D1_P

1

CRITICAL

THMSNSB_D1_N

THMSNSB_D2_P

1

CRITICAL

THMSNSB_D2_N

THMSNSB_D3_P

1

CRITICAL

THMSNSB_D3_N

NO_XNET_CONNECTION=1

PLACE_NEAR=U5870.6:5MM

PLACE_NEAR=U5870.7:5MM

NO_XNET_CONNECTION=1

PLACE_NEAR=U5870.5:5MM

PLACE_NEAR=U5870.7:5MM

NO_XNET_CONNECTION=1

PLACE_NEAR=U5870.4:5MM

PLACE_NEAR=U5870.7:5MM

14 13 12 11 7

C5871

100PF

5%
25V
C0G

0201

C5872

100PF

5%
25V
C0G

0201

C5873

100PF

5%
25V
C0G

0201

1

2

XW5871

1

2

XW5872

1

2

PP1V8_S5

NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.7:5MM

SM

2 1

NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.7:5MM

SM

2 1

NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.7:5MM

XW5873

SM

2 1

THMSNSB_DN

THMSNSB_DN

THMSNSB_DN

53

53

53

53

53

53

R5870

0

21

5%

1/20W

MF

0201

THMSNSB_D1_P

53

THMSNSB_D2_P

53

THMSNSB_D3_P

53

THMSNSB_D4_P

53

THMSNSB_DN

53

THMSNSB_ADDR_SEL

PP1V8_S0_THMSNSB_R

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PLACE_SIDE=TOP

6

D1+

5

D2+

4

D3+

3

D4+

7

D-

9

ADD

14

V+

U5870

TMP464

VQFN

CRITICAL

EPAD

GND

8

17

SCL

SDA

THERM2*

THERM*

NC1
NC0
NC3
NC2

BYPASS=U5870.14::5MM

1

C5870

0.1UF

10%

6.3V

2

CERM-X5R
0201

13

I2C_THMSNS_SCL_R2

12

I2C_THMSNS_SDA_R2

11

10

2
1
16
15

NC

NC

NC
NC
NC
NC

47

47

1

R5871

100K

5%
1/20W
MF
201

2

B

A

Placement Note:
BOTTOM side between main memory devices.

8

3

Q5874

BC846BMB

SOT883

PLACE_SIDE=BOTTOM

2

THMSNSB_D4_P

1

CRITICAL

THMSNSB_D4_N

NO_XNET_CONNECTION=1

PLACE_NEAR=U5870.3:5MM

5%
25V
C0G

0201

1

2

C5874

100PF

PLACE_NEAR=U5870.7:5MM

NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.7:5MM

XW5874

SM

2 1

THMSNSB_DN

53

53

Thermal Sensor: Fin Stack (Th1H)

Placement Note:
TOP side, top right of MLB.

PAGE TITLE

THERMAL SENSORS

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SENSORS

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

58 OF 500

SHEET

53 OF 98

1

678

3 245

1

D

C

B

A

Trackpad 5V Current Sense (IT5C)

Gain: 200x, EDP: 0.0055 A
Rsense: 0.1 (R5940) or SHORT

74 54 52 51 50 49

PP3V3_S4SW_SNS

Vsense: 0.55 mV, Range: 0.17 A

52 51 50 46 29 28

86 83 75 68 55

PP5V_G3S

PLACE_NEAR=U5940.2:5MM

OMIT

87 62

PP5V_G3S_TPAD

R5940

0.005

1%

1/3W

0306-SHORT

MF

1

ISNS_TPADP5V_P

54

ISNS_TPADP5V_N

54

432

PLACE_NEAR=U5940.4:5MM

LCD Panel 5V Current Sense (IL5C)

Gain: 200x, EDP: 0.1 A
Rsense: 0.1 (R8521) or SHORT

74 54 52 51 50 49

PP3V3_S4SW_SNS

Vsense: 10 mV, Range: 0.17 A

PLACE_NEAR=R8521.3:5MM

76 54

54

76

IN

IN

ISNS_PP5V_LCD_P

ISNS_PP5V_LCD_N

PLACE_NEAR=R8521.4:5MM

Ocarina Current Sense (IHCC)

Gain: 100x, EDP: 2.139 A
Rsense: 0.01 (R5920) [Production]

74 54 52 51 50 49

PP3V3_S4SW_SNS

Vsense: 21.4 mV, Range: 3.0 A
MUX: A5

68 63

52 74 83
86

81

PP3V3_G3H

PP3V3_G3H_SSD0

0306-SHORT

MF

1/3W

1%

0.005

R5920

OMIT

PLACE_NEAR=U5920.2:5MM

432

ISNS_OCARINA_P

54

ISNS_OCARINA_N

54

1

PLACE_NEAR=U5920.4:5MM

Stuff 0.005 for PVT per <rdar://49214265>

MESA Current Sense (IIDC)

Gain: 200x, EDP: 0.176 A
Rsense: 0.050 (R5530) or SHORT
Vsense: 8.8 mV, Range: 0.33 A

29
71

76
61

44

PP3V3_G3H_RTC

NO_XNET_CONNECTION=1 PLACE_NEAR=U5930.2:5MM

PP3V3_G3H_RTC_MESA

89 86 83
57 50 28 27
74 72 63

52 51 50 49

74 54

OMIT

1%

1/3W

MF

1

R5930

0.005

0306-SHORT

RES,MTL FLIM,100K,1/16W,0201,SMD,LF

ISNS_MESA_P

54

ISNS_MESA_N

54

432

PLACE_NEAR=U5930.4:5MM

PP3V3_S4SW_SNS

BYPASS=U5940.6::5MM

LOADISNS

1

C5940

6

V+

U5940

0.1UF

10%

6.3V

2

CERM-X5R
0201

PLACE_NEAR=U5710.3:5MM

INA210A

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

8

1
7

TPADP5V_IOUT

NC
NC

1

R5945

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5940.10:5MM

NOSTUFF

BYPASS=U5960.6::5MM

LOADISNS

1

C5960

6

V+

U5960

0.1UF

10%

6.3V

2

CERM-X5R
0201

INA210A

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

LCDP5V_IOUT

8

1

NC

7

NC

1

R5965

20K

5%
1/20W
MF
201

2

PLACE_NEAR=U5960.10:5MM

NOSTUFF

BYPASS=U5920.6::5MM

LOADISNS

1

C5920

6

V+

U5920

0.1UF

10%

6.3V

2

CERM-X5R
0201

PLACE_NEAR=U7800.C14:7.5MM

INA214A

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

100x

GND

9

OUT

REF

NC
NC

10

ISNS_OCARINA_IOUT PMU_OCARINA_ISENSE

8

1

NC

7

NC

PLACE_NEAR=U7800.C14:7.5MM

BYPASS=U5930.6::5MM

LOADISNS

1

C5930

6

V+

U5930

0.1UF

10%

6.3V

2

CERM-X5R
0201

INA210A

2

IN+

3

IN+

4

IN-

5

IN-

UQFN

CRITICAL

LOADISNS

200x

GND

9

OUT

REF

NC
NC

10

ISNS_MESA_IOUT

8

1

NC

7

NC

1

R5935

51K

5%
1/20W
MF
201

2

PLACE_NEAR=U5930.10:5MM

NOSTUFF

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

R59281117S0008 LOADRC:NO

LOADISNS

R5949

45.3K

1/20W

PLACE_NEAR=U5710.5:5MM

LOADISNS

1%
MF

201

21

EADC2_P5V_TPAD_ISENSE

R5969

45.3K

1/20W

LOADISNS

1%
MF

201

21

EADC2_P5V_LCD_ISENSE

R5929

9.09K

1/20W

PLACE_NEAR=U5710.2:5MM

LOADISNS

21

1%
MF

201

R5928

9.09K

1/20W

LOADRC:YES

201

R5939

45.3K

1/20W

1%
MF

201

21

1

C5949

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.3:5MM

LOADISNS

GND_EADC2_COM

1

C5969

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.5:5MM

LOADISNS

GND_EADC2_COM

1

1%
MF

2

1

C5929

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U7800.C14:7.5MM

LOADISNS

EADC2_MESA_ISENSE

1

C5939

2.2UF

20%

6.3V

2

X5R-CERM
0201

PLACE_NEAR=U5710.2:5MM

LOADISNS

GND_EADC2_COM

OUT

52

OUT

72

OUT

52

OUT

TP5983

TP

TP-P5

TP5984

TP

TP-P5

TP5985

1

TP

TP-P5

TP5986

1

TP

TP-P5

52

54 52 51 50 49

54 52 51 50 49

54 52 51 50 49

PLACE_SIDE=TOP

PLACE_SIDE=TOP

PLACE_SIDE=TOP

PLACE_SIDE=TOP

49

49

49

49

49

49

49

49

49

49

75 49

75 49

49

49

49

49

64

64

64 49

64

64

64 49

73

73

73 50

73 50

50

50

50

50

50

50

50

50

50

50

51

51

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

ISNS_HS_CPU_P

ISNS_HS_CPU_N

ISNS_HS_OTHER5V_P

ISNS_HS_OTHER5V_N

ISNS_HS_OTHER3V3_P

ISNS_HS_OTHER3V3_N

ISNS_HS_3V3RTC_P

ISNS_HS_3V3RTC_N

ISNS_SSDNAND_P

ISNS_SSDNAND_N

ISNS_LCDBKLT_P

ISNS_LCDBKLT_N

ISNS_SPKRAMP_LEFT_P

ISNS_SPKRAMP_LEFT_N

ISNS_SPKRAMP_RIGHT_P

ISNS_SPKRAMP_RIGHT_N

CHGR_CSI_R_P

CHGR_CSI_R_N

CHGR_AMON

CHGR_CSO_R_P

CHGR_CSO_R_N

CHGR_BMON

PVCCIOS0_CS_P

PVCCIOS0_CS_N

ISNS_CPUDDR_P

ISNS_CPUDDR_N

ISNS_CPUVDDQ_P

ISNS_CPUVDDQ_N

ISNS_DFR3V3_P

ISNS_DFR3V3_N

ISNS_WLANBTP3V3_P

ISNS_WLANBTP3V3_N

ISNS_CPUVR_P

ISNS_CPUVR_N

ISNS_CPUGT_P

ISNS_CPUGT_N

ISNS_TBTX_P

ISNS_TBTX_N

Probe Points for Power Validation

TP5901

1

TP

TP-P5

TP5902

1

TP

TP-P5

TP5903

1

TP

TP-P5

TP5904

1

TP

TP-P5

TP5905

1

TP

TP-P5

TP5906

1

TP

TP-P5

TP5907

1

TP

TP-P5

TP5908

1

TP

TP-P5

TP5909

TP

TP-P5

TP5910

TP

TP-P5

TP5911

TP

TP-P5

TP5912

TP

TP-P5

TP5913

TP

TP-P5

TP5914

TP

TP-P5

TP5915

TP

TP-P5

TP5916

TP

TP-P5

TP5917

TP

TP-P5

TP5918

TP

TP-P5

TP5919

TP

TP-P5

TP5981

TP

TP-P5

TP5920

TP

TP-P5

TP5921

TP

TP-P5

TP5922

TP

TP-P5

TP5982

TP

TP-P5

TP5923

TP

TP-P5

TP5924

TP

TP-P5

TP5925

TP

TP-P5

TP5926

TP

TP-P5

TP5927

TP

TP-P5

TP5928

TP

TP-P5

TP5929

TP

TP-P5

TP5930

TP

TP-P5

TP5931

TP

TP-P5

TP5932

TP

TP-P5

TP5933

TP

TP-P5

TP5934

TP

TP-P5

TP5935

TP

TP-P5

TP5936

TP

TP-P5

TP5937

TP

TP-P5

TP5938

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5400:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5400:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5410:6MM

PLACE_SIDE=TOP
PLACE_NEAR=R5410:6MM

PLACE_SIDE=TOP
PLACE_NEAR=R5440:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5440:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5420:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5420:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5460:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5460:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R8400:30MM

PLACE_SIDE=TOP
PLACE_NEAR=R8400:30MM

PLACE_SIDE=TOP
PLACE_NEAR=R54A0:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R54A0:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R54B0:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R54B0:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R7020:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R7020:5MM

PLACE_SIDE=TOP

PLACE_SIDE=TOP
PLACE_NEAR=TP5919:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R7060:30MM

PLACE_SIDE=TOP
PLACE_NEAR=R7060:30MM

PLACE_SIDE=TOP

PLACE_SIDE=TOP
PLACE_NEAR=TP5922:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R8102:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R8102:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R8118:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R8118:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5510:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5510:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5520:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5520:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5530:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5530:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5542:30MM

PLACE_SIDE=TOP
PLACE_NEAR=R5543:30MM

PLACE_SIDE=TOP
PLACE_NEAR=R5582:10MM

PLACE_SIDE=TOP
PLACE_NEAR=R5583:10MM

PLACE_SIDE=TOP
PLACE_NEAR=R5640:5MM

PLACE_SIDE=TOP
PLACE_NEAR=R5640:5MM

76 51

76 51

51

51

51

51

52

52

52

52

66

66

69 52

69 52

86 83 70 11 7

7

86 83 73 70 16 11 7

7

51

51

51

51

51

51

51

51

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

76 54

76 54

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

ISNS_LCDPANEL_P

ISNS_LCDPANEL_N

ISNS_TPADP3V3_P

ISNS_TPADP3V3_N

ISNS_WLANBTP1V8_P

ISNS_WLANBTP1V8_N

ISNS_CALPE_P

ISNS_CALPE_N

ISNS_KBBLT_P

ISNS_KBBLT_N

CPUSA_ISNS_R_P

CPUSA_ISNS_R_N

ISNS_CPUEDRAM_P

ISNS_CPUEDRAM_N

ISNS_TPADP5V_P

54

ISNS_TPADP5V_N

54

ISNS_PP5V_LCD_P

ISNS_PP5V_LCD_N

ISNS_OCARINA_P

54

ISNS_OCARINA_N

54

ISNS_MESA_P

54

ISNS_MESA_N

54

PPVPCORE_S5

PVCC_FB_P

PP1V_PRIM

P1VPRIM_FB_R

ISNS_KBDP3V3_P

ISNS_KBDP3V3_N

ISNS_P5VCPUREGMISC_P

ISNS_P5VCPUREGMISC_N

ISNS_P1V8LPDDR_P

ISNS_P1V8LPDDR_N

ISNS_P1V8G3S_P

ISNS_P1V8G3S_N

BOM_COST_GROUP=SENSORS

TP5939

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R8520:5MM

TP5940

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R8520:5MM

TP5941

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5650:10MM

TP5942

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5650:10MM

TP5943

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5680:5MM

TP5944

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5680:5MM

TP5945

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5780:5MM

TP5946

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5780:5MM

TP5947

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5730:5MM

TP5948

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5730:5MM

TP5949

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R7274:5MM

TP5950

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R7272:5MM

TP5951

TP

TP-P5

PLACE_NEAR=R7702:5MM

TP5952

TP

TP-P5

PLACE_NEAR=R7702:5MM

TP5953

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5940:10MM

TP5954

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5940:10MM

TP5955

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R8521:5MM

TP5956

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R8521:5MM

TP5957

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5920:5MM

TP5958

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5920:5MM

TP5959

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5930:5MM

TP5960

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5930:5MM

TP5961

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=L7820:5MM

TP5962

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R0850:10MM

TP5963

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=L7821:5MM

TP5964

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R0853:10MM

TP5965

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5690:5MM

TP5966

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5690:5MM

TP5967

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5660:5MM

TP5968

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5660:5MM

TP5969

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5630:5MM

TP5970

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R5630:5MM

TP5971

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R56B0:5MM

TP5972

PAGE TITLE

1

TP

TP-P5

PLACE_SIDE=TOP
PLACE_NEAR=R56B0:5MM

POWER SENSORS EXTENDED 3

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

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PAGE

59 OF 500

SHEET

54 OF 98

SIZE

D

D

C

B

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

FAN CONTROL

3 245

1

D

60 35

OUT

SMC_FAN_0_TACH

R6005

47K

21

5%

1/20W

MF

201

R6000

47K

5%

1/20W

MF

201

PP1V8_G3S

1

2

FAN_RT_TACH

83 55

83 76 74 68 62 61 60

59 58 57 51 48 47 45 44 43 18

D

C

35

SMC_FAN_0_PWM

IN

NOSTUFF

R6001

100K

1/20W

201

R6002

100K

1/20W

201

5%
MF

5%
MF

1

1

GS

2

Q6000

DMN32D2LFB4

DFN1006H4-3

SYM_VER_3

C

D

2

1

2

3

FAN_RT_PWM

83 55

B

75 68 55 54 52 51 50 46 29 28

86 83

PP5V_G3S

XW6098

SM

21

PP5V_G3S_FAN

83

83 55

83 55

FAN_RT_PWM

FAN_RT_TACH
TP_FAN_RT_OTP1
TP_FAN_RT_OTP2

XW6099

SM

21

83

GND_FAN

518S0818

J6001

FF14A-6C-R11DL-B-3H

F-RT-SM

7

1
2
3
4
5
6

8

75 68 55 54 52 51 50 46 29 28

86 83

PP5V_G3S

DBG_FAN

J6000

FF14A-5C-R11DL-B-3H

NC

NC

NC
NC

NC

F-RT-SM

6

1
2
3
4
5

7

518S0769

B

A

8

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

Fans/SMC/AMUX Support

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=FAN

67

35 4

IV ALL RIGHTS RESERVED

2

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60 OF 500

SHEET

55 OF 98

1

SIZE

D

678

3 245

1

D

D

C

C

B

B

A

8

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

AUDIO PLACEHOLDER

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=AUDIO

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

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62 OF 500

SHEET

56 OF 98

1

SIZE

D

AUDIO JACK CODEC I2C ADDRESS

678

3 245

1

D

AD1 AD0

GNDGND

GND 1.8V

1.8V

GND

1.8V

ADDRESS
0x48 <-­0x49
0x4A
0x4B1.8V

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PP1V8_G3S

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

57

L6300

FERR-22-OHM-1A-0.055OHM

21

0201

BYPASS=U6300.B1:C2:4MM

1

C6301

2.2UF

20%

10V

2

X5R-CERM

GND_AUDIO_CODEC

402

PP1V8_CODEC_VCP

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

VOLTAGE=1.89

XW6300

SHORT-8L-0.25MM-SM

21

GND_AUDIO_CODEC

D

57

C

B

A

60

IN

60

IN

TP6300

A

TP6301

A

TP6302

A

TP6303

A

TP6304

A

TP6305

A

TP6306

A

TP6307

A

TP6308

A

TP6309

A

TP-P5

TP-P5

TP-P5

1

PP3V3_G3S

PLACE_NEAR=L6302.1:20MM

1

PP1V8_G3S

1

PLACE_NEAR=U6300.C5:20MM

AUD_HS_MIC_P

AUD_HS_MIC_N

XW6302

SHORT-8L-0.25MM-SM

XW6303

SHORT-8L-0.25MM-SM

1

TP-P5

1

TP-P5

1

TP-P5

1

TP-P5

1

TP-P5

1

TP-P5

1

TP-P5

I2S_CODEC_LRCLK_R

PLACE_NEAR=U6300.B5:30MM

I2S_CODEC_R2D

PLACE_NEAR=U6300.A5:30MM

I2S_CODEC_D2R

PLACE_NEAR=U3900.Y33:30MM

I2S_CODEC_BCLK

PLACE_NEAR=U6300.B4:30MM

I2C_CODEC_SDA

PLACE_NEAR=U6300.A1:30MM

I2C_CODEC_SCL

PLACE_NEAR=U6300.A2:30MM

PLACE_NEAR=TP6303.1:20MM

CODEC_RESET_L

PLACE_NEAR=FL6609.1:5MM

21

PLACE_NEAR=FL6610.1:5MM

21

57 43

57 36

57 48 36

57 48 36

L6301

FERR-22-OHM-1A-0.055OHM

21

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

BYPASS=U6300.A3:B3:5MM

83 76 75 74 62 51 50 45

0201

C6303

0.1UF

10%

16V

X7R-CERM

0402

L6302

FERR-22-OHM-1A-0.055OHM

57 55 51 48 47 45 44 43 18
83 76 74 68 62 61 60 59 58

57 35

60

57

60

74 72 71 63 61 54 50 29 28 27

AUD_HP_PORT_L

OUT

GND_AUDIO_CODEC

OUT

AUD_HP_PORT_R

89 86 83 76

PP3V3_G3H_RTC

1

R6300

1K

5%
1/20W
MF
201

2

1

R6301

1K

5%
1/20W
MF
201

2

60

60

60

60

0201

BYPASS=U6300.D7:C7:5MM

AUD_HP_SENSE_L

IN

AUD_HP_SENSE_R

IN

BI

BI

AUD_HP_PORT_CH_GND

AUD_HP_PORT_US_GND

AUD_HS4_REF
AUD_HS3_REF

L83_HSBIAS_FILT

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C6309

4.7UF

60

60

AUD_RING_SENSE

IN

AUD_TIP_SENSE

IN

20%

10V

2

X5R-CERM
0402

L83_HSBIAS_FILT_REF

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

21

CRITICAL

BYPASS=U6300.F3:E3:4MM

PP1V8_CODEC_VL

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

2

PP3V3_CODEC_VP

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

C6304

10UF

20%

10V

2

X5R-CERM
0402-7

D7C4A3

VP

D5

HPSENSA

E5

HPOUTA

F5

HPSENSB

G5

HPOUTB

F1

HS4

E2

HS_CLAMP2

E1

HSIN+

G2

HS3

F2

HS_CLAMP1

D1

HSIN-

F4

HS4_REF

G4

HS3_REF

G3

RING_SENSE

E4

TIP_SENSE

F3

HSBIAS_FILT

E3

HSBIAS_FILT_REF

NC

A7

VD_FILT

VL VA VCP

B1

CRITICAL

U6300

CS42L83A

WLCSP-SKT

SWIRE_SD/ASP_SDIN

SWIRE_CLK/ASP_SCLK

GNDL

B3

B6

C7

GNDHS GNDAGNDD

G1

C2

D6

+VCP_FILT

-VCP_FILT

GNDCP

VL_SEL

DIGLDO_PDN*

INT*

WAKE*

RESET*

SPDIF_TX

SWIRE_SEL

ASP_LRCK/FSYNC

ASP_SDOUT

AD0
AD1

SDA

SCL
FLYP
FLYC
FLYN

FILT_P

D2

BYPASS=U6300.D6:F6:4MM

BYPASS=U6300.E6:F6:4MM

L83_VCP_FILTP

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000

BYPASS=U6300.G6:F6:4MM

L83_VCP_FILTN

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000

E6
G6

F6

D4

B7

C6

C5

A6

NC

D3

B5

A5

PLACE_NEAR=U6300.A4:5mm

A4

B4

C3
B2

A1
A2
E7
F7
G7

C1

L83_FILT

MIN_LINE_WIDTH=0.2000

MIN_NECK_WIDTH=0.1000

L83_SDOUT

L83_FLYP
L83_FLYC

L83_FLYN

CRITICAL

C6302

2.2UF

21

20%

10V

X5R-CERM

402

NO_XNET_CONNECTION=1

CRITICAL

C6305

4.7UF

21

20%

10V

X5R-CERM

0402

NO_XNET_CONNECTION=1

CRITICAL

C6306

4.7UF

21

20%

10V

X5R-CERM

0402

NO_XNET_CONNECTION=1

R6307

I2C_CODEC_SDA
I2C_CODEC_SCL

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

BYPASS=U6300.E7:F7:4MM

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

L83_VCP_FILT_GND

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1130

21

201MF5%331/20W

BI

IN

CRITICAL

C6307

X5R-CERM

57 48 36

57 48 36

2.2UF

20%

10V

402

1

2

XW6301

SM

1

R6302

47K

5%
1/20W
MF
201

2

21

C

PP1V8_G3S

PP1V8_G3S

1

R6303

47K

5%
1/20W
MF
201

2

1

R6304

47K

5%
1/20W
MF
201

2

CODEC_INT_L

CODEC_WAKE_L

CODEC_RESET_L

1

C6320

1000PF

10%

25V

2

X7R
0201

OUT

OUT

IN

34

35

57 35

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

B

I2S_CODEC_LRCLK_R

I2S_CODEC_R2D

I2S_CODEC_D2R

I2S_CODEC_BCLK

IN

IN

OUT

IN

57 43

57 43

57 36

57 43

CRITICAL

20%

10V

402

1

2

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

A

AUDIO JACK CODEC

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

57

GND_AUDIO_CODEC

BYPASS=U6300.C1:C2:3 MM

CRITICAL

C6310

10UF

20%

10V

X5R

0603

BYPASS=U6300.G7:F7:4MM

1

2

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

C6308

2.2UF

X5R-CERM

6.0.0

BOM_COST_GROUP=AUDIO

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

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PAGE

63 OF 500

SHEET

57 OF 98

8

67

35 4

2

1

2X MONO SPEAKER LEFT AMPLIFIERS

APN: 353S01252
GAIN: 0DBFS = xxVRMS

678

3 245

1

D

C

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

59 58 34

59 58 34

58 43

59 58 36

58 43

58 43

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

SPKRAMP_RESET_L

IN

1

R6402

47K

5%
1/20W
MF
201

2

SPKRAMP_INT_L

OUT

I2S_SPKRAMP_L_R2D

IN

I2S_SPKRAMP_L_D2R

OUT

I2S_SPKRAMP_L_LRCLK_R

IN

IN

I2S_SPKRAMP_L_BCLK

PP1V8_G3S

PP1V8_G3S

PLACE_NEAR=U6400.C1:5 MM

1

C6400

1UF

20%
16V

2

CER-X5R
0201

NOSTUFF

1

R6400

47K

5%
1/20W
MF
201

2

R6401

5% 2011/20W MF

PLACE_NEAR=U6450.C1:5 MM

1

C6450

1UF

20%
16V

2

CER-X5R
0201

33

PLACE_NEAR=U6400.C1:3 MM

1

C6401

0.1UF

10%
25V

2

X5R
0201

58 48 36

58 48 36

21

I2S_SPKRAMP_L_D2R_R1

BI

PLACE_NEAR=U6450.C1:3 MM

1

C6451

0.1UF

10%
25V

2

X5R
0201

I2C_SPKRAMP_L_SDA
I2C_SPKRAMP_L_SCL

IN

58

1

2

SPKRAMP_RL_MODE

1

2

PLACE_NEAR=U6400.D2:5 MM

C6402

1UF

20%
16V
CER-X5R
0201

PLACE_NEAR=U6450.D2:5 MM

C6452

1UF

20%
16V
CER-X5R
0201

PLACE_NEAR=U6400.D2:3 MM

1

C6403

0.1UF

10%
25V

2

X5R
0201

C3

SDZ*

F3

SDA

F4

SCL

D4

IRQZ

MODE

F2

SDIN

E1

SDOUT

E2

FSYNC

F1

SBCLK

E4

PDMD0

E3

PDMCK0

E5

PDMD1

F5

PDMCK1

PLACE_NEAR=U6450.D2:3 MM

1

C6453

0.1UF

10%
25V

2

X5R
0201

C1

D2

IOVDDAVDD

U6400

PTAS5770LB2

CSP

CRITICAL

OMIT_TABLE

GND

C2

PGND

B4

A4

C4

VBAT

C5

BST_P
OUT_P
OUT_P

VSNS_P

BST_N
OUT_N
OUT_N

VSNS_N

AREG

DREG

PLACE_NEAR=U6400.C4:3 MM

1

C6404

0.1UF

10%
25V

2

X5R
0201

B2

SPKRAMP_RL_BSTP

A3

DIDT=TRUE

B3

DIDT=TRUE

A1

SPKRAMP_RL_SNSP

A2

SPKRAMP_RL_BSTN

A5D3

DIDT=TRUE

B5

B1

SPKRAMP_RL_SNSN

DIDT=TRUE

D5

D1

SPKRAMP_RL_AREG
SPKRAMP_RL_DREG

PLACE_NEAR=U6400.D1:3 MM

1

C6407

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6450.C4:3 MM

1

C6454

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6400.C4:10 MM

C6405

1

10UF

20%
25V

2

X5R-CERM
0603

PLACE_NEAR=U6400.C4:10 MM

C6406

1

10UF

20%
25V

2

X5R-CERM
0603

C6411

0.1UF

21

10%
25V
X5R

0201

C6412

0.1UF

21

10%
25V
X5R

0201

PLACE_NEAR=U6400.D5:3 MM

1

C6408

1UF

20%
16V

2

CER-X5R
0201

PLACE_NEAR=U6450.C4:10 MM

C6455

1

10UF

20%
25V
X5R-CERM

2

0603

1

C6409

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6450.C4:10 MM

C6456

1

10UF

20%
25V
X5R-CERM

2

0603

BYPASS=U6400.B2:B3:5 MM
NO_XNET_CONNECTION=1

BYPASS=U6400.A2:A5:5 MM
NO_XNET_CONNECTION=1

PLACE_NEAR=U6400.D5:5 MMPLACE_NEAR=U6400.D1:5 MM

1

C6410

1UF

20%
16V

2

CER-X5R
0201

PPBUS_G3H_SPKRAMP_LEFT

PPBUS_G3H_SPKRAMP_LEFT

DIDT=TRUE

21

SHORT-8L-0.25MM-SM

XW6400

PLACE_NEAR=J6410.13:5 MM

DIDT=TRUE

SHORT-8L-0.25MM-SM

XW6401

PLACE_NEAR=J6410.10:5 MM

21

58 57 55

51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

C6413

NOSTUFF

220PF

10%
25V

X7R-CERM

201

PP1V8_G3S

83 36

58 49

D

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_RL_OUTP

83

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_RL_OUTN

83

NOSTUFF

1

2

1

C6414

220PF

10%
25V

2

X7R-CERM
201

NOSTUFF

47K

5%

1/20W

MF

201

1

2

R6490

58 49

SPKR_ID0

OUT

APN:518S00019

CRITICAL

J6410

FF14A-14C-R11DL-B-3H

F-RT-SM1

16

14
13
12
11
10
9
8
7
6
5
4
3
2
1

15

C

B

A

58 43

59 58 36

58 43

58 43

OUT

LEFT BULK CAPACITANCE

CRITICAL

1

C6483

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

CRITICAL

1

C6484

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

I2S_SPKRAMP_L_R2D

IN

I2S_SPKRAMP_L_D2R

I2S_SPKRAMP_L_LRCLK_R

IN

IN

CRITICAL

1

C6485

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

I2S_SPKRAMP_L_BCLK

CRITICAL

1

C6486

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

R6451

33

5% 1/20W MF 201

PPBUS_G3H_SPKRAMP_LEFT

CRITICAL

1

C6487

33UF

20%
16V

2

TANT-POLY

I2S_SPKRAMP_L_D2R_R2

21

59 58 34

58 48 36

58 48 36

59 58 34

58

CRITICAL

1

C6488

33UF

20%
16V

2

TANT-POLY
CASE-B3-1CASE-B3-1

SPKRAMP_RESET_L
I2C_SPKRAMP_L_SDA

I2C_SPKRAMP_L_SCL
SPKRAMP_INT_L

SPKRAMP_FL_MODE

58 49

C1

D2

IOVDDAVDD

U6450

PTAS5770LB2

C3

SDZ*

F3

SDA

F4

SCL

D4

IRQZ

MODE

F2

SDIN

E1

SDOUT

E2

FSYNC

F1

SBCLK

E4

PDMD0

E3

PDMCK0

E5

PDMD1

F5

PDMCK1

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

58

58

OMIT_TABLE

SPKRAMP_RL_MODE

SPKRAMP_FL_MODE

CSP

CRITICAL

GND

C2

C4

VBAT

PGND

B4

A4

PP1V8_G3S

C5

BST_P
OUT_P
OUT_P

VSNS_P

BST_N
OUT_N
OUT_N

VSNS_N

AREG

DREG

B2

SPKRAMP_FL_BSTP

A3

DIDT=TRUE

B3

DIDT=TRUE

A1

SPKRAMP_FL_SNSP

A2

SPKRAMP_FL_BSTN

A5D3

DIDT=TRUE

B5

B1

SPKRAMP_FL_SNSN

DIDT=TRUE

D5

D1

SPKRAMP_FL_AREG
SPKRAMP_FL_DREG

PLACE_NEAR=U6450.D1:3 MM

1

C6457

0.1UF

10%
25V

2

X5R
0201

NOSTUFF

1

R6480

10K

5%
1/20W
MF
201

2

1

R6481

0

5%
1/20W
MF
0201

2

1

2

NOSTUFF

1

R6482

2.2K

5%
1/20W
MF
201

2

1

R6483

470

5%
1/20W
MF
201

2

C6461

0.1UF

10%
25V
X5R

0201

C6462

0.1UF

10%
25V
X5R

0201

PLACE_NEAR=U6450.D1:5 MM

C6458

1UF

20%
16V
CER-X5R
0201

PLACE_NEAR=U6450.D5:3 MM

1

C6459

0.1UF

10%
25V

2

X5R
0201

BYPASS=U6450.B2:B3:5 MM
NO_XNET_CONNECTION=1

21

BYPASS=U6450.A2:A5:5 MM
NO_XNET_CONNECTION=1

21

PLACE_NEAR=U6450.D5:5 MM

1

C6460

1UF

20%
16V

2

CER-X5R
0201

GND
470 to GND
470 to IOVDD
2k2 to GND
2k2 to IOVDD
10k to GND
10k to IOVDD
47k to IOVDD

MODE PIN

DIDT=TRUE

21

SHORT-8L-0.25MM-SM

XW6450

PLACE_NEAR=J6410.7:5 MM

DIDT=TRUE

21

SHORT-8L-0.25MM-SM

XW6451

PLACE_NEAR=J6410.4:5 MM

I2C ADDR

0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38

CHANNEL

REAR LEFT
FRONT LEFT
REAR RIGHT
FRONT RIGHT

NOSTUFF

C6463

220PF

10%
25V

X7R-CERM

201

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_FL_OUTP

83

B

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_FL_OUTN

83

NOSTUFF

1

2

1

C6464

220PF

10%
25V

2

X7R-CERM
201

TP6400

A

TP-P5

PP6401

P5MM-SP

PP6402

P5MM-SP

PP6403

P5MM-SP

1

PP

1

PP

1

PP

TP6404

A

TP-P5

TP6405

A

TP-P5

TP6406

A

TP-P5

1

1

1

1

I2S_SPKRAMP_L_LRCLK_R

PLACE_NEAR=U6400.E2:30MM

SM-SP

I2S_SPKRAMP_L_R2D

PLACE_NEAR=U6400.F2:30MM

SM-SP

I2S_SPKRAMP_L_D2R

PLACE_NEAR=U3900.Y28:30MM

SM-SP

I2S_SPKRAMP_L_BCLK

PLACE_NEAR=U6400.F1:30MM

I2C_SPKRAMP_L_SDA

PLACE_NEAR=U6400.F3:30MM

I2C_SPKRAMP_L_SCL

PLACE_NEAR=U6400.F4:30MM

PLACE_NEAR=PP6403.1:20MM

BOM_COST_GROUP=AUDIO

P5MM-SP

58 43

TP6408

58 43

A

TP6409

58 36

A

59

58 43

58
36
48

PAGE TITLE

58
36
48

PP6407

PP

TP-P5

TP-P5

SM-SP

1

PPBUS_G3H_SPKRAMP_LEFT

PLACE_NEAR=U6400.C4:20MM

1

PP1V8_G3S

PLACE_NEAR=U6400.C1:20MM

1

PLACE_NEAR=U6400.C3:20MM

SPKRAMP_RESET_L

AUDIO LEFT AMPLIFIERS

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

58 49

59 58 34

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

PAGE

64 OF 500

SHEET

58 OF 98

83 76 74 68 62 61 60 59

pvt

58 57 55 51 48 47 45 44 43 18

SYNC_DATE=SYNC_MASTER=

SIZE

A

D

8

67

35 4

2

1

2X MONO SPEAKER RIGHT AMPLIFIERS

APN: 353S01252
GAIN: 0DBFS = xxVRMS

678

3 245

1

D

C

58

57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PP1V8_G3S

PLACE_NEAR=U6500.C1:5 MM

1

C6500

1UF

20%
16V

2

CER-X5R
0201

PLACE_NEAR=U6500.C1:3 MM

1

C6501

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6500.D2:5 MM

1

C6502

1UF

20%
16V

2

CER-X5R
0201

1

C6503

0.1UF

10%
25V

2

X5R
0201

C1

PLACE_NEAR=U6500.C4:3 MMPLACE_NEAR=U6500.D2:3 MM

1

C6504

0.1UF

10%
25V

2

X5R
0201

C5

D2

IOVDDAVDD

C4

VBAT

PLACE_NEAR=U6500.C4:10 MM

C6505

1

10UF

20%
25V

2

X5R-CERM
0603

U6500

PTAS5770LB2

SPKRAMP_RESET_L

IN

I2C_SPKRAMP_R_SDA
I2C_SPKRAMP_R_SCL

IN

SPKRAMP_RR_MODE

59

59 58 34

59 43

SPKRAMP_INT_L

OUT

I2S_SPKRAMP_R_R2D

IN

59 58 34

59 48 36

59 48 36

BI

R6501

59 58 36

59 43

59 43

58 57 55 51 48 47 45 44 43 18 59 49

83 76 74 68 62 61 60 59

I2S_SPKRAMP_L_D2R

OUT

I2S_SPKRAMP_R_LRCLK_R

IN

IN

I2S_SPKRAMP_R_BCLK

PP1V8_G3S

PLACE_NEAR=U6550.C1:5 MM

1

C6550

1UF

20%
16V

2

CER-X5R
0201

21

I2S_SPKRAMP_R_D2R_R1

201MF5%331/20W

PLACE_NEAR=U6550.C1:3 MM

1

C6551

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6550.D2:5 MM

1

C6552

1UF

20%
16V

2

CER-X5R
0201

1

2

C3

SDZ*

F3

SDA

F4

SCL

D4

IRQZ

MODE

F2

SDIN

E1

SDOUT

E2

FSYNC

F1

SBCLK

E4

PDMD0

E3

PDMCK0

E5

PDMD1

F5

PDMCK1

PLACE_NEAR=U6550.D2:3 MM

C6553

0.1UF

10%
25V
X5R
0201

CSP

CRITICAL

OMIT_TABLE

GND

C2

PGND

B4

A4

BST_P
OUT_P
OUT_P

VSNS_P

BST_N
OUT_N
OUT_N

VSNS_N

AREG

DREG

B2

SPKRAMP_RR_BSTP

A3

DIDT=TRUE

B3

DIDT=TRUE

A1

SPKRAMP_RR_SNSP

A2

SPKRAMP_RR_BSTN

A5D3

DIDT=TRUE

B5

B1

SPKRAMP_RR_SNSN

DIDT=TRUE

D5

D1

SPKRAMP_RR_AREG
SPKRAMP_RR_DREG

PLACE_NEAR=U6500.D1:3 MM

1

C6507

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6550.C4:3 MM

1

C6554

0.1UF

10%
25V

2

X5R
0201

1

C6508

1UF

20%
16V

2

CER-X5R
0201

PLACE_NEAR=U6550.C4:10 MM

C6555

1

10UF

20%
25V

2

X5R-CERM
0603

PLACE_NEAR=U6500.C4:10 MM

PPBUS_G3H_SPKRAMP_RIGHT

C6506

1

10UF

20%
25V

2

X5R-CERM
0603

C6511

0.1UF

10%
25V
X5R

0201

C6512

0.1UF

10%
25V
X5R

0201

PLACE_NEAR=U6500.D5:3 MM

1

C6509

0.1UF

10%
25V

2

X5R
0201

PLACE_NEAR=U6550.C4:10 MM

BYPASS=U6500.B2:B3:5 MM
NO_XNET_CONNECTION=1

21

BYPASS=U6500.A2:A5:5 MM
NO_XNET_CONNECTION=1

21

PLACE_NEAR=U6500.D5:5 MMPLACE_NEAR=U6500.D1:5 MM

1

C6510

1UF

20%
16V

2

CER-X5R
0201

PPBUS_G3H_SPKRAMP_RIGHT

C6556

1

10UF

20%
25V

2

X5R-CERM
0603

DIDT=TRUE

21

SHORT-8L-0.25MM-SM

XW6500

PLACE_NEAR=J6510.13:5 MM

DIDT=TRUE

SHORT-8L-0.25MM-SM

PLACE_NEAR=J6510.10:5 MM

XW6501

21

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

59 49

NOSTUFF

C6513

220PF

10%
25V

X7R-CERM

201

PP1V8_G3S

1

2

83 36

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_RR_OUTP

83

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_RR_OUTN

83

NOSTUFF

1

C6514

220PF

10%
25V

2

X7R-CERM
201

NOSTUFF

47K

5%

1/20W

MF

201

1

2

OUT

R6590

SPKR_ID1

APN:518S00019

CRITICAL

J6510

FF14A-14C-R11DL-B-3H

F-RT-SM1

16

14
13
12
11
10
9
8
7
6
5
4
3
2
1

15

D

C

B

A

59 43

59 58 36

59 43

59 43

IN

OUT

IN

IN

RIGHT BULK CAPACITANCE

CRITICAL

1

C6583

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

CRITICAL

1

C6584

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

I2S_SPKRAMP_R_R2D

I2S_SPKRAMP_L_D2R

I2S_SPKRAMP_R_LRCLK_R

I2S_SPKRAMP_R_BCLK

CRITICAL

1

C6585

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

CRITICAL

1

C6586

33UF

16V

2

TANT-POLY
CASE-B3-1

R6551

33

CRITICAL

1

C6587

33UF

20%20%
16V

2

TANT-POLY
CASE-B3-1

59 58 34

59 48 36

59 48 36

59 58 34

I2S_SPKRAMP_R_D2R_R2

21

MF1/20W 2015%

SPKRAMP_RESET_L
I2C_SPKRAMP_R_SDA

I2C_SPKRAMP_R_SCL
SPKRAMP_INT_L

SPKRAMP_FR_MODE

59

PPBUS_G3H_SPKRAMP_RIGHT

CRITICAL

1

C6588

33UF

20%
16V

2

TANT-POLY
CASE-B3-1

C1

U6550

PTAS5770LB2

C3

SDZ*

F3

SDA

F4

SCL

D4

IRQZ

MODE

F2

SDIN

E1

SDOUT

E2

FSYNC

F1

SBCLK

E4

PDMD0

E3

PDMCK0

E5

PDMD1

F5

PDMCK1

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

59 49

SPKRAMP_RR_MODE

59

SPKRAMP_FR_MODE

59

CRITICAL

OMIT_TABLE

GND

C2

IOVDDAVDD

D2

CSP

C4

VBAT

PGND

B4

A4

PP1V8_G3S

C5

BST_P
OUT_P
OUT_P

VSNS_P

BST_N
OUT_N
OUT_N

VSNS_N

AREG

DREG

B2

SPKRAMP_FR_BSTP

A3

DIDT=TRUE

B3

DIDT=TRUE

A1

SPKRAMP_FR_SNSP

A2

SPKRAMP_FR_BSTN

A5D3

DIDT=TRUE

B5

B1

SPKRAMP_FR_SNSN

DIDT=TRUE

D5

D1

SPKRAMP_RW_AREG
SPKRAMP_RW_DREG

PLACE_NEAR=U6550.D1:3 MM

1

C6557

0.1UF

10%
25V

2

X5R
0201

1

R6580

470

5%
1/20W
MF
201

2

NOSTUFF

1

R6581

0

5%
1/20W
MF
0201

2

1

2

NOSTUFF

1

R6582

2.2K

5%
1/20W
MF
201

2

1

R6583

2.2K

5%
1/20W
MF
201

2

C6561

0.1UF

10%
25V
X5R

0201

C6562

0.1UF

10%
25V
X5R

0201

PLACE_NEAR=U6550.D1:5 MM

C6558

1UF

20%
16V
CER-X5R
0201

PLACE_NEAR=U6550.D5:3 MM

1

C6559

0.1UF

10%
25V

2

X5R
0201

BYPASS=U6550.B2:B3:5 MM
NO_XNET_CONNECTION=1

21

BYPASS=U6550.A2:A5:5 MM
NO_XNET_CONNECTION=1

21

PLACE_NEAR=U6550.D5:5 MM

1

C6560

1UF

20%
16V

2

CER-X5R
0201

GND
470 to GND
470 to IOVDD
2k2 to GND
2k2 to IOVDD
10k to GND
10k to IOVDD
47k to IOVDD

MODE PIN

DIDT=TRUE

21

SHORT-8L-0.25MM-SM

XW6550

PLACE_NEAR=J6510.7:5 MM

DIDT=TRUE

21

SHORT-8L-0.25MM-SM

XW6551

PLACE_NEAR=J6510.4:5 MM

I2C ADDR

0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38

CHANNEL

LEFT REAR
LEFT FRONT
RIGHT REAR
RIGHT FRONT

NOSTUFF

C6563

220PF

10%
25V

X7R-CERM

201

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_FR_OUTP

83

B

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1500

SPKRCONN_FR_OUTN

83

NOSTUFF

1

2

1

C6564

220PF

10%
25V

2

X7R-CERM
201

TP6500

A

TP6501

A

TP6503

A

TP6504

A

TP6505

A

TP6506

A

1

PLACE_NEAR=U6500.E2:30MM

TP-P5

1

PLACE_NEAR=U6500.F2:30MM

TP-P5

1

PLACE_NEAR=U6500.F1:30MM

TP-P5

1

PLACE_NEAR=U6500.F3:30MM

TP-P5

1

PLACE_NEAR=U6500.F4:30MM

TP-P5

1

PLACE_NEAR=TP6503.1:20MM

TP-P5

I2S_SPKRAMP_R_LRCLK_R

I2S_SPKRAMP_R_R2D

I2S_SPKRAMP_R_BCLK

I2C_SPKRAMP_R_SDA

I2C_SPKRAMP_R_SCL

BOM_COST_GROUP=AUDIO

59

59

TP6507

59 43

A

TP6508

59 43

A

TP6509

A

59 43

SYNC_MASTER= SYNC_DATE=

48 36

PAGE TITLE

TP-P5

TP-P5

TP-P5

1

PPBUS_G3H_SPKRAMP_RIGHT

PLACE_NEAR=U6500.C4:20MM

1

PP1V8_G3S

PLACE_NEAR=U6500.C1:20MM

1

PLACE_NEAR=U6500.C3:20MM

SPKRAMP_RESET_L

59 49

83 76 74 68 62 61 60 59

59 58 34

AUDIO RIGHT AMPLIFIERS

48 36

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

65 OF 500

SHEET

59 OF 98

58 57 55 51 48 47 45 44 43 18

A

SIZE

D

8

67

35 4

2

1

D

60 47 44 43 42 40 34 29 28 27

86 83 81 74 72 71 70 64 63

85 83 72 35

89

BYPASS=U6650.1:U6650.7:8MM

34

34

34

43

PP1V8_SLPS2R

PLACE_NEAR=U6650.1:5MM

C6650

0.1UF

10%
10V

X5R-CERM

0201

IN

IN

IN

IN

60 43

IN

SEP_CAM_DISABLE_L
SEP_DMIC_DISABLE_L
SEP_DISABLE_STROBE

PMU_COLD_RESET_L
LID_OPEN_RIGHT

LID_OPEN_LEFT
LID_CTRL_DMIC

678

3 245

1

DMIC Secure Disable

1

2

1

R6651

1K

5%
1/20W
MF
201

2

2

CAM_DIS*

3

DMIC_DIS*

4

DIS_STROBE

9

PMU_COLD_RST*

13

LID_RIGHT

14

LID_LEFT

6

SEL

1

VDD

U6650

SLG4AP41496V

(IPD)

(IPD)

(IPD)

STQFN

CRITICAL

(IPD)

GND

8

CAM_DIS_OUT*

DMIC_DIS_OUT*

CAM_DIS_OUT

DMIC_DIS_OUT

(IPD)

RFU

12

7

10

11

5

NC

NC

NC

SEP_CAM_DISABLE_DFF_L

SEP_DMIC_DISABLE_OUT_L

OUT

76

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PDM_DMIC_DATA0_UNSEC

60

PP1V8_G3S

2

B

1

A

MF 0201

U6640

74LVC1G08FW5

DFN1010

6

4

Y

NC

3

5

NC

NOSTUFF

R6648

0

21

5%1/20W

PLACE_NEAR=U6640.5:5MM

BYPASS=U6640.5:U6640.3:8MM

1

C6641

0.1UF

10%
10V

2

X5R-CERM
0201

PLACE_NEAR=U6640.4:5MM

PDM_DMIC_DATA0_RR

R6647

33

MF 201

5%1/20W

PDM_DMIC_DATA0

21

OUT

D

60 35

C

B

A

55 35

57

57

57

57

57

57

57

57

57

57

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

APN: 518S0818

J6640

FF14A-6C-R11DL-B-3H

SMC_FAN_0_TACH

AUD_HP_PORT_R

AUD_HP_PORT_US_GND

AUD_HP_PORT_CH_GND

AUD_HP_SENSE_L

AUD_HP_SENSE_R

AUD_TIP_SENSE

AUD_RING_SENSE

AUD_HS_MIC_P

AUD_HS_MIC_N

F-RT-SM

7

1
2
3
4
5
6

8

Digital Mic Flex Connector

AUD_DMIC0_DATA_CONN

83

PP1V8_DMIC

83

83

AUD_DMIC1_DATA_CONN

NOSTUFF

R6600

0

MF

NO_XNET_CONNECTION=1

PLACE_NEAR=FL6601.2:10MM

CRITICAL

FL6601

120-OHM-25%-1.3A

0402

CRITICAL

FL6603

120-OHM-25%-1.3A

0402

CRITICAL

FL6605

120-OHM-25%-1.3A

0402

L6607

FERR-470-OHM

0201

CRITICAL

FL6609

120-OHM-25%-1.3A

0402

5%1/20W

0201

21

21

CRITICAL

FL6602

120-OHM-25%-1.3A

0402

21

CRITICAL

FL6604

120-OHM-25%-1.3A

0402

21

CRITICAL

FL6606

120-OHM-25%-1.3A

0402

21

L6608

FERR-470-OHM

0201

21

CRITICAL

FL6610

120-OHM-25%-1.3A

0402

R6641

1/20W
MF

R6643

1/20W

21

21

21

21

21

PDM_DMIC_CLK0

PLACE_NEAR=J6640.2:8MM

0

21

PDM_DMIC_DATA0_UNSEC

5%

0201

PDM_DMIC_CLK1

PLACE_NEAR=J6640.5:8MM

0

5%

0201MF

PDM_DMIC_DATA1_UNSEC

21

AUD_CONN_HP_LEFTAUD_HP_PORT_L

AUD_CONN_HP_RIGHT

AUD_CONN_RING2

AUD_CONN_SLEEVE

AUD_CONN_HP_SENSE_L

AUD_CONN_HP_SENSE_R

AUD_CONN_TIP_SENSE

AUD_CONN_RING_SENSE

AUD_CONN_SLEEVE_XW

AUD_CONN_RING2_XW

PP1V8_G3S

2

B

1

A

MF

U6641

74LVC1G08FW5

DFN1010

6

4

Y

NC

3

5

NC

NOSTUFF

R6650

0

21

5%1/20W

0201

PLACE_NEAR=U6641.5:5MM

BYPASS=U6641.5:U6641.3:8MM

1

C6642

0.1UF

10%
10V

2

X5R-CERM
0201

PDM_DMIC_DATA1_RR

PLACE_NEAR=U6641.4:5MM

R6649

PDM_DMIC_DATA1

21

33

5%1/20W

MF

TP6600

A

TP6601

A

TP6602

A

TP6603

A

PP6606

201

1

PLACE_NEAR=U3900.F1:30MM

TP-P5

1

PLACE_NEAR=U3900.J1:30MM

TP-P5

1

PLACE_NEAR=R4859.2:30MM

TP-P5

1

PLACE_NEAR=R4860.2:30MM

TP-P5

P5MM-SP

1

PP

PLACE_NEAR=TP6602.1:30MM

PDM_DMIC_DATA0

PDM_DMIC_DATA1

PDM_DMIC_CLK0

PDM_DMIC_CLK1

SM-SP

OUT

60 35

C

83 60 43

83 60 43

IN

IN

60

60

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

83 60 43

L6640

FERR-470-OHM

21

0201

1

83 60 43

C6640

1UF

20%
16V

2

CER-X5R
0201

PP1V8_G3S

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PDM_DMIC_DATA1_UNSEC

60

AUDIO JACK FLEX CONNECTOR

APN: 516S1064

MATES WITH APN: 516S0573 ON FLEX

J6600

51338-0374

F-ST-SM

32

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 60

89 83 44

83 44

83 44

83 44

83 60 44

83 60 44

OUT

AUD_CONN_HP_LEFT

AUD_CONN_SLEEVE
AUD_CONN_HP_RIGHT
AUD_CONN_RING2
AUD_CONN_RING_SENSE
AUD_CONN_HP_SENSE_R
AUD_CONN_SLEEVE_XW

PMU_ONOFF_R_L_CONN
SPI_MESA_MOSI_CONN
SPI_MESA_CLK_CONN
PP16V0_MESA_FILT_CONN
PP3V0_MESA_FILT_CONN

PP3V0_MESA_FILT_CONN

1

C6690

100PF

5%
50V

2

C0G
0201

1

C6691

100PF

5%
50V

2

C0G

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

1

C6692

100PF

5%
50V

2

C0G
02010201

1

C6693

100PF

5%
50V

2

C0G
0201

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30

34

31

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

33

1

C6694

100PF

5%
50V

2

C0G
0201

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

1

C6695

100PF

5%
50V

2

C0G
0201

1

C6696

100PF

5%
50V

2

C0G
0201

AUD_CONN_HP_LEFT
AUD_CONN_SLEEVE
AUD_CONN_HP_RIGHT

AUD_CONN_RING2
AUD_CONN_TIP_SENSE
AUD_CONN_HP_SENSE_L
AUD_CONN_RING2_XW

PP1V8_MESA_FILT_CONN
MESA_INT_CONN
SPI_MESA_MISO_CONN
MESA_BOOST_EN_CONN
PP1V8_SLPS2R
LID_OPEN_RIGHT

1

C6697

100PF

5%
50V

2

C0G
0201

PAGE TITLE

OUT

83 60

83 60

83 60

83 60

83 60

83 60

83 60

83 44

83 44

83 44

83 44

60 47 44 43 42 40 34 29 28 27

60 43

89 86 83 81 74 72 71 70 64 63

B

A

SYNC_DATE=SYNC_MASTER=

AUDIO FLEX CONNECTORS

DRAWING NUMBER

83 60

Apple Inc.

051-05309

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

83 60

BOM_COST_GROUP=AUDIO

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

66 OF 500

SHEET

60 OF 98

SIZE

D

8

67

35 4

2

1

678

3 245

1

D

C

B

51 61

R6720

10K

5%

1/20W

MF

201

71 72

76 83

PP1V8_G3S

57 58 59 60
47 48 51 55

61 62 68 74

OUT123_EN

KBD_RIGHT_SHIFT_KEY

61 83

KBD_LEFT_OPTION_KEY

61 83

KBD_CONTROL_KEY

61 83

PP3V3_G3S_KBD

76
68

1

61
59
57
51
47
44

PP1V8_G3S

18
43
45

2

48
55
58
60
62
74
83

R6721

WRITE ADDRESS = 0X42
READ ADDRESS = 0X43

KBD_INT_L

3.3V RSLOC ISOLATION KEYS/ASIC RESET

PP3V3_G3H_RTC

27 28 29 50 54 57 61 63
74 76 83 86 89

PLACE_NEAR=U6703.10:5MM

1

R6750

0

5%
1/20W
MF

2

0201

4

OE

1

IN_1

2

IN_2

3

IN_3

1

C6750

1UF

20%
10V

2

X5R
0201

343S00073

10

VDD

U6703

SLG4AP4815V

TQFN

GND EPAD

5

11

1

2

IN_1/IN_2/IN_3 = 100K INTERNAL PULLDOWN
OUT_1/OUT_2/OUT_3 = 12.5K INTERNAL PULL-UP

PLACE_NEAR=U6703.10:2MM

C6751

0.1UF

10%
10V
X5R-CERM
0201

OUT_1

OUT_2

OUT_3

OUT_ALL#

9

KBD_RIGHT_SHIFT_L

8

KBD_LEFT_OPTION_L

7

KBD_CONTROL_L

6

RSLOC_RST_L

KEYBOARD INTERFACE - IO EXPANDER

1

C6721

0.1UF

10%

10V

2

X5R-CERM
0201

122

KBD_SENSE_X0

2

KBD_SENSE_X1

3

KBD_SENSE_X2

4

KBD_SENSE_X3

5

KBD_SENSE_X4

6

KBD_SENSE_X5

7

KBD_SENSE_X6

8

KBD_SENSE_X7

10

KBD_SENSE_X8

11

KBD_SENSE_X9

12

KBD_SENSE_X10

13

KBD_SENSE_X11

14

KBD_SENSE_X12

15

KBD_CONTROL_L

16

KBD_LEFT_OPTION_L

17

KBD_RIGHT_SHIFT_L

1K

1%

1/20W

MF

201

1

2

61 83

61 83

MF

1/20W 1%

1

C6720

1UF

20%
10V

2

X5R
0201

IOXP2_INT_L

61 83

IOXP2_ADDR

IOXP_I2C_SCL
IOXP_I2C_SDA

IOXP2_RESET_L

X5R-CERM

R6723

33

C6723

0.1UF

10%

10V

0201

IOXP2_INT_L

21

201

1

R6722

100K

5%
1/20W
MF
201

2

1

2

18

19
20

24

INT*

ADDR

SCL

U6702

PCAL6416A

SDA

RESET*

311S0665

61 83 61 62 83

21

23

VDD/P

VDD/I2C-BUS

HWQFN

PAD

VSS

THRM

9

25

P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7

P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7

1

C6722

0.1UF

10%

10V

2

X5R-CERM
0201

R6752

MF

1/20W 1%

1

R6730

10K

5%
1/20W
MF
201

2

61

61

61

33

61 83

27 28 29 50 54 57 61 63 71 72
74 76 83 86 89

61

61

61

21

PMU_RSLOC_RST_L

201

PP1V8_G3S

1

R6731

10K

5%
1/20W
MF
201
2

61 83

1

R6732

10K

5%
1/20W
MF
201

2

61 83

R6733

PP3V3_G3H_RTC

KBD_INT_L

61 62 83

I2C_KBD_SDA

61 62 83

I2C_KBD_SCL

61 62 83

PLACE_NEAR=J6801.12:10MM

63 72 83 89

OUT

1

10K 10K

5%
1/20W
MF
201
2

61 83

1

R6734

5%
1/20W
MF
201
2

61 83

1

R6735

10K

5%
1/20W
MF
201
2

61 83

1

R6736

10K

5%
1/20W
MF
201
2

61 83

R6703

5%0201 1/20W MF

1

R6737

10K

5%
1/20W
MF
201

2

61 83

0

21

PLACE_NEAR=J6801.8:10MM

DZ6710

5.5V-0.28PF

2

0201-THICKSTNCL

1

1

10K

5%
1/20W
MF
201

2

61 83

R6739

R6738

PP3V3_G3H_RSLOC

MIN_NECK_WIDTH=0.1200
MIN_LINE_WIDTH=0.2000

VOLTAGE=3.3V

61 83

1

R6741

10K

5%
1/20W
MF
201

2

61 83

1

R6742

1

10K 10K

5%
1/20W
MF
201

2

61 83

1

R6740

5%
1/20W
MF
201

2

61 83

PLACE_NEAR=J6801.6:10MM

DZ6711

5.5V-0.28PF

2

0201-THICKSTNCL

DZ6712

1

10K

5%
1/20W
MF
201

2

61 83

5.5V-0.28PF

0201-THICKSTNCL

51 61

PP1V8_G3S

18 43 44 45 47 48 51 55 57 58

59 60 61 62 68 74 76 83

1

R6771

100K

5%
1/20W
MF
201

2

61 61 83

2

1

EEPROM_WC_L

1

GS

2

376S1128

PP3V3_G3S_KBD

Q6770

DMN32D2LFB4

DFN1006H4-3

SYM_VER_3

D

3

IOXP_I2C_SCL

R6770

10K

5%

1/20W

MF

201

1

2

4KB-1.8V-5.5V

7

6

SCL NC

2

E1

3

E2

M24C04-R

PLACE_NEAR=U6700.8:5mm

8

VCC

U6700

MLP8

1

C6770

1UF

20%
10V

2

X5R
0201

5

SDAWC*

IOXP_I2C_SDAWC_L

1

NC

VSS EPAD

4

9

335S00254

DZ6701

PP3V3_G3H_RSLOC

61 83

NC

PESD3V3L5UF

SOT886

1

2

PLACE_NEAR=J6700.30:5MM

6

KBD_CONTROL_KEY

5

KBD_LEFT_OPTION_KEY

43

KBD_RIGHT_SHIFT_KEY

61 83

61 83

61 83

DZ6702

PESD3V3L5UF

SOT886

61 83

61 83

KBD_CAP_CATHODE

KBD_DRIVE_Y5

1

2

DZ6703

PESD3V3L5UF

SOT886

61 83

KBD_SENSE_X8

1

PLACE_NEAR=J6700.25:5MM

6

5

43

KBD_DRIVE_Y0

KBD_DRIVE_Y6

KBD_DRIVE_Y7

PLACE_NEAR=J6700.20:5MM

6

KBD_SENSE_X7

61 83

61 83

61 83

61 83

61 83

PLACE_NEAR=J6700.8:5MM

18 43 44 45 47 48 51 55 57 58
59 60 61 62 68 74 76 83

PLACE_NEAR=U6700.8:5mm

1

C6771

0.1UF

10%
10V

2

X5R-CERM
0201

KBD_DRIVE_Y4

PP1V8_G3S

MEMBRANE ZIF CONNECTOR

FF14A-30C-R11DL-B-3H

518S0752

PP1V8_G3S

18 43 44 45 47 48 51 55 57 58
59 60 61 62 68 74 76 83

61 83 18 43 44 45

KBD_ID1

KBD_DRIVE_Y2

61 83

KBD_DRIVE_Y1

61 83

KBD_DRIVE_Y3

61 83

KBD_DRIVE_Y4

61 83

KBD_SENSE_X0

61 83

KBD_SENSE_X1

61 83

KBD_SENSE_X2

61 83

KBD_SENSE_X5

61 83

KBD_SENSE_X3

61 83

KBD_SENSE_X9

61 83

KBD_SENSE_X12

61 83

KBD_SENSE_X4

61 83

KBD_SENSE_X11

61 83

KBD_SENSE_X10

61 83

KBD_SENSE_X6

61 83

KBD_SENSE_X7

61 83

KBD_SENSE_X8

61 83

KBD_DRIVE_Y5

61 83

KBD_DRIVE_Y7

61 83

KBD_DRIVE_Y6

61 83

KBD_DRIVE_Y0

61 83

KBD_CAP_CATHODE

61 83

PP3V3_G3H_RSLOC

61 83

KBD_RIGHT_SHIFT_KEY

61 83

KBD_LEFT_OPTION_KEY

61 83

KBD_CONTROL_KEY

61 83

NC

J6700

CRITICAL

F-RT-SM

31

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

D

C

32

DZ6706

PESD3V3L5UF

SOT886

1

6

5

43

KBD_DRIVE_Y3

KBD_DRIVE_Y1

KBD_DRIVE_Y2

61 83

61 83

61 83

B

A

51 61

61 62 83

61 62 83

KBD_ID PIN

ANSI

ISO

JIS GND

KBD_ID_DETECT1

61

HW_ID1

61

KBD_CAPSLOCK_LED

61 83

PP3V3_G3S_KBD

R6710

1.3K

I2C_KBD_SCL
I2C_KBD_SDA

FLOAT

HIGH

GND

R6717

R6719

MF201 5%1/20W

1

1%

1/20W

MF

201

2

CONNECTION ON MEMBRANE KBD

NC

PP1V8_G3S

1K

5%1/20W201 MF

1K

NOSTUFF

R6718

1.00

1/16W

402

1

2

1%
MF

R6711

1.3K

1%
1/20W
MF
201

R6712

33

201

1/20W

2 1

MF

2 1

1/20W 1%

MF

201

33

R6713

21

KBD_ID1

21

21

KBD_CAP_CATHODE

R6714

1/20W

1%

61 83

61 83

10K

5%
MF

201

2

5

60 61 62 68 74 76 83

PP1V8_G3S

18 43 44 45 47 48 51 55 57 58

59

1

2

1

R6715

100K

5%
1/20W
MF
201

2

138S0706

1

C6710

1UF

20%
10V

2

X5R
0201

23

21

VDD/P

132S0320

1

C6712

0.1UF

10%

10V

2

X5R-CERM
0201

138S0847

1

C6713

0.1UF

10%

10V

2

X5R-CERM
0201

1

C6714

10UF

20%
10V

2

X5R-CERM
0402-7

NC

43

2

KBD_SENSE_X6

KBD_ID1

61 83

61 83

PLACE_NEAR=J6700.13:5MM

61 83

KBD_SENSE_X3

DZ6705

PESD3V3L5UF

SOT886

1

6

5

KBD_SENSE_X5

KBD_SENSE_X2

61 83

61 83

VDD/I2C-BUS

IOXP1_INT_L

IOXP_I2C_SCL

61 83

IOXP_I2C_SDA

61 83

IOXP1_RESET_L

C6711

0.1UF

10%
10V

X5R-CERM

0201

1

2

18

19
20

24

INT*

ADDR

SCL
SDA

RESET*

WRITE ADDRESS = 0X40
READ ADDRESS = 0X41

U6701

PCAL6416A

HWQFN

PAD

VSS

THRM

9

25

122

P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7

P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7

KBD_DRIVE_Y0

2

KBD_DRIVE_Y1

3

KBD_DRIVE_Y2

4

KBD_DRIVE_Y3

5

KBD_DRIVE_Y4

6

KBD_DRIVE_Y5

7

KBD_DRIVE_Y6

8

KBD_DRIVE_Y7
10
11
12

HW_ID1

13

EEPROM_WC_L

14
15
16

KBD_ID_DETECT1

17

CAPSLOCK_LED_EN

311S0665

NC

61

61

NC
NC

61

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

61 83

61 83

61 83

61 83

83

61

61 83

61 83

61 83

R6761

MF

51 61

1K

201

21

LED_CTRL

5%1/20W

R6762

200K

5%

1/20W

MF

201

1

2

LED_ISET

1

2

C6705

1UF

20%
10V
X5R
0201

1

5

1

R6760

19.1K

1%
1/20W
MF
201

2

CTRL

ISET

3

VIN

U6705

FAN5622

SSOT23

GND

2

LED1
LED2

6

KBD_CAPSLOCK_LED

4

61 83

KBD_SENSE_X10PP3V3_G3S_KBD

PLACE_NEAR=J6700.14:5MM

61 83

KBD_SENSE_X9

61 83

DZ6704

PESD3V3L5UF

61 83

KBD_SENSE_X0

43

KBD_SENSE_X1

61 83

SOT886

1

6

KBD_SENSE_X11

61 83

2

5

43

KBD_SENSE_X4

KBD_SENSE_X12

61 83

61 83

SYNC_MASTER=X1412_SHAN

PAGE TITLE

SYNC_DATE=05/17/2019

A

KEYBOARD & TRACKPAD 1

2

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

BOM_COST_GROUP=KEYBOARD

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

67 OF 500

SHEET

61 OF 98

SIZE

D

8

67

35 4

2

1

678

Trackpad Level Shifting

3 245

TPAD CONNECTOR

J6801

DF40C-50DS-0.4V-51

F-ST-SM

1

72 70 43 42 40 37 27

D

PP1V8_AWAKE

83

R6803

36

43 42

43 42

43

100K

5%

1/20W

MF

201

IN

IN

IN

OUT

1

2

BYPASS=U6860::5MM

SPI_TPAD_CS_L

SPI_TPAD_CLK

SPI_TPAD_MOSI

SPI_TPAD_MISO_R

C6860

0.1UF

10%
10V

X5R-CERM

0201

CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP

SIGNAL_MODEL=CUSTOM_SN74AVC4T774

PP3V3_G3S

NOSTUFF

R6872

PLACE_NEAR=U6860.8:2MM

100K

5%

1/20W

MF

201

1

2

R6876

20

21

1

2

5%

1/20W

MF

201

100K

5%

1/20W

MF

201

1

2

R6873

PLACE_NEAR=U6860.9:2MM

R6875

20

21

5%

1/20W

MF

201

SPI_TPAD_3V3_MOSI

OUT

SPI_TPAD_3V3_CLK

100K

5%

1/20W

MF

201

1

5%
MF

201

2

1

2

R6871

IN

1

14

2

U6860

13

VCCBVCCA

SN74AVC4T774-COMBO

15

16

1

A1
DIR1

2

A2
DIR2

3

A3

5

DIR3

4

A4

6

DIR4

7

OE*

QFN

GND

8

B1

B2

B3

B4

12

11

10

9

BYPASS=U6860::5MM

1

C6861

0.1UF

10%
10V

2

X5R-CERM
0201

SPI_TPAD_3V3_CS_L

SPI_TPAD_3V3_CLK_R

SPI_TPAD_3V3_MOSI_R

SPI_TPAD_3V3_MISO

R6874

R6870

100K

1/20W

NOSTUFF

1

100K

5%

1/20W

MF

201

2

83 62

R6880

100K

5%

1/20W

MF

201

83 76 75 74 62 57 51 50 45

83 62

OUT

CKPLUS_WAIVE=I2C_PULLUP

CKPLUS_WAIVE=I2C_PULLUP

OUT

83 62

87 86 83 75 72 64 62 49

85 83 62

83 61

I2C_TPAD_3V3_SCL
I2C_TPAD_3V3_SDA
KBD_INT_L
I2C_KBD_SDA

I2C_KBD_SCL

83 62

ACT_GND
PPBUS_G3H PPBUS_G3H

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
42 41
44 43
46 45
48 47
50 49

IPD_LID_OPEN
TPAD_KBD_WAKE_L
TPAD_3V3_ACTUATOR_DISABLE_L
TPAD_3V3_SPI_INT_L

SPI_TPAD_3V3_MOSI
SPI_TPAD_3V3_CS_L
SPI_TPAD_3V3_MISO
TPAD_3V3_SPI_EN
SPI_TPAD_3V3_CLK

PP5V_G3S_TPAD_CONN

83

PP3V3_G3S_TPAD

NC

ACT_GND

83 62

VOLTAGE=5V

XW6701

SM

21

83 51

C6700

0.1UF

75 72 64 62 49

87 86 83

OUT

NOSTUFF

1

C6702

12PF

5%
25V

2

NP0-C0G
0201

1

10%
25V

2

X5R
402

83 46 43

83 62 35

83 62

83 62

83 62

83 62

83 62

83 62

85 83 62

L6700

FERR-120-OHM-1.5A

21

0402A

PP5V_G3S_TPAD

D

87 54

C

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

47

47

IN

BI

I2C_SENSE_SCL_R1

I2C_SENSE_SDA_R1

PP1V8_G3S

516S00187, MATE WITH 516S00188

C

PP3V3_G3S

1

R6813

5%
1/20W
MF
201

2

PLACE_NEAR=Q6861.6:2MM

R6877

30

21

I2C_TPAD_3V3_SCL

5%

1/20W

MF

201

PLACE_NEAR=Q6861.3:2MM

2.2K

5%

1/20W

MF

201

1

2

2

GS

1

5

GS

Q6861

SSM6N15AFEAP

VER-1

SOT563

D

6

Q6861

SSM6N15AFEAP

VER-1

SOT563

CRITICAL

CRITICAL

I2C_TPAD_3V3_SCL_R

R6812

58 57 55 51 48 47 45 44 43 18

83 76 75 74 62 57 51 50 45

OUT

83 76 74 68 62 61 60 59

83 62

35

OUT

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PP1V8_G3S

TPAD_SPI_INT_L

PP1V8_G3S

R6863

10K

5%

1/20W

MF

201

1

2

83 76 75 74 62 57 51 50 45

5

GS

4

Q6862

SSM6N15AFEAP

VER-1

SOT563

D

3

TPAD_3V3_SPI_INT_L

CRITICAL

R6878

D

4

3

I2C_TPAD_3V3_SDA_R

30

5%

1/20W

MF

201

21

I2C_TPAD_3V3_SDA

BI

10K

5%

1/20W

MF

201

1

2

83 62

83 62 35

TPAD_KBD_WAKE_L

R6865

PP3V3_G3S

1

R6864

100K2.2K

5%
1/20W
MF
201

2

IN

83 62

B

34

R6852

100K

5%

1/20W

MF

201

58 57 55 51 48 47 45 44 43 18

83 76 74 68 62 61 60 59

PP3V3_G3S

BYPASS=U6855::5MM

C6856

0.1UF

U6855

74AUP1T97

5

SOT891

1

1

2

2

4

6

3

X5R-CERM

1

10%
10V

2

0201

1

R6853

100K

5%
1/20W
MF
201

2

NOSTUFF

1

R6854

100K

5%
1/20W
MF
201

2

TPAD_3V3_SPI_ENTPAD_SPI_EN

OUTIN

83 76 75 74 62 57 51 50 45

83 62

PP1V8_G3S

R6867

10K

5%

1/20W

MF

201

1

2

2

GS

1

Q6862

SSM6N15AFEAP

VER-1

SOT563

83 76 75 74 62 57 51 50 45

CRITICAL

D

6

TPAD_3V3_ACTUATOR_DISABLE_LTPAD_ACTUATOR_DISABLE_L

Pull-Up on IPD module

PP3V3_G3S

NOSTUFF

1

R6868

100K

5%
1/20W
MF
201

2

B

BIBI

83 62 35

A

8

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

A

Keyboard & Trackpad 2

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=TRACKPAD

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

68 OF 500

SHEET

62 OF 98

1

SIZE

D

678

3 245

1

D

BMU LOGIC CONNECTOR

518S00014

CRITICAL

J6951

FF18-10A-R11AD-B-3H

PLACE_SIDE=BOTTOM

PLACE_SIDE=BOTTOM

F-RT-SM-A

11

1
2
3
4
5
6
7
8
9
10

12

SMBUS_3V3_BATT_SCL

83

SMBUS_3V3_BATT_SDA

83

NC
NC

NC
NC

TP6900

A

TP6901

A

1

TP-P5

1

TP-P5

72 71 63 61 57 54 50 29 28 27

SYS_DETECT_L

NOSTUFF

1

R6955

10K

5%
1/16W
MF-LF
402

2

89 86 83 76 74

86 83 74 68 54 52

PLACE_SIDE=BOTTOM

PP3V3_G3H_RTC

<RDAR://45444338>

PP3V3_G3H

TP6903

A

TP-P5

2

1

3

3

D

S G

2

NOSTUFF

R6958

2 1

5%

1/20W MF0201

R6957

2 1

0201

5%

R6951

CRITICAL

D6950

RCLAMP3552T

SLP1006N3T

86 83

Q6955

DMN32D2LFB4

DFN1006H4-3

SYM_VER_2

1

0

0

MF1/20W

4.7K

1/20W

201

PP3V3_G3H_BMU

1

1

5%
MF

2

2

TP6902

A

PLACE_SIDE=BOTTOM

SYS_DETECT

R6952

4.7K

5%
1/20W
MF
201

1

TP-P5

1

R6956

10K

5%
1/16W
MF-LF
402

2

83

60 47 44 43 42 40 34 29 28 27

89 86 83 81 74 72 71 70 64

SSM6N15AFEAP

PLACE_SIDE=BOTTOM

TP6904

A

1

TP-P5

SSM6N15AFEAP

TP6905

A

1

TP-P5

PLACE_SIDE=BOTTOM

PP1V8_SLPS2R

CRITICAL

Q6950

SOT563

6

CRITICAL

VER-1

D

Q6950

SOT563

3

FUTURE DESIGNS SHOULD USE
A BETTER LVL SHIFT DESIGN

<RDAR://49154606>

VER-1

D

2

GS

1

5

GS

4

TP6906

1

TP-P5

A

PLACE_SIDE=BOTTOM

I2C_PWR_SCL_R1

TP6907

A

PLACE_SIDE=BOTTOM

TP-P5

I2C_PWR_SDA_R1

TP6908

A

PLACE_SIDE=BOTTOM

TP-P5

BATTERY (BMU) FLEX SOLDER PADS

BMU POWER FLEX IS SOLDERED TO MLB.

998-03828

CRITICAL

J6950

PWR-MLB-X520

47

IN

1

47

BI

1

11 10

12

3

HB-SM

9

1

2

8

7

6

10%
25V
X5R
402

1

2

C6960

603-1

C6950

54

0.1UF

1UF

10%
25V
X5R

1

2

C6961

+/-0.1PF

1

3PF 3PF

25V

2

C0G

0201

C6962

+/-0.1PF

25V
C0G

0201

1

2

PPVBAT_G3H_CONN

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL632-00731 J69501 PCBA,FLEX,BMU PWR,X502

83 64

D

C

B

A

87 49

72 71 63 61 57 54 50 29 28 27

PPVIN_G3H_P3V3G3HRTC

R6900

1/4W
0603

CRITICAL

1

C6900

2.2UF

20%
25V

2

X5R-CERM
0402-1

89 86 83 76 74

72 44

89 83 72 61

1

0

0%
MF

2

CRITICAL

1

C6902

2.2UF

2

SMC Reset Circuit

Right Shift & Left Option Control
followed by ON OFF button press.

PP3V3_G3H_RTC

BYPASS=U6940::3MM

1

10%
25V

2

X5R

0201

3
4

CRITICAL

1

2

CHGR_EN_MVR CHGR_EN_MVR_R

IN
IN

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

PMU_ONOFF_L
PMU_RSLOC_RST_L

PPVIN_G3H_P3V3G3HRTC_R

86

CRITICAL

1

C6907

20%
25V
X5R-CERM
0402-1

68UF

20%
16V

2

POLY-TANT
CASE-D2E-SM-1

83 64

C6940

0.1UF

CRITICAL

1

C6905

2.2UF

20%

2

25V
X5R-CERM
0402-1

IN

1

VDD

U6940

SLG4AP41183

STQFN

BTN1
BTN2

CRITICAL

GND

7

C6906

2.2UF

20%
25V
X5R-CERM
0402-1

R6907

2 1

RESET

NC
NC
NC
NC
NC
NC
NC

1

C6901

0.1UF

10%
25V

2

X6S-CERM
0201

0

5%

1/20W

MF

0201

C6903

0.033UF

10%
50V
X7R

0402

10

2
5
6
8
9
11
12

CHGR_RST_IN_R

NC
NC
NC
NC
NC
NC
NC

1

C6909

0.1UF

10%
25V

2

X6S-CERM
0201

P3V3G3HRTC_SS

1

2

GND_P3V3G3HRTC_AGND

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

R6940

1K

5%

1/20W

MF

201

CHGR_RST_IN

21

R6941

1K

5%

1/20W

MF

201

UPC_PMU_RESET

21

3.3V G3H RTC VR

U6903

TPS62180

VIN1

A1

VIN1

B1

VIN1

C1

D1

VIN2

E1

VIN2

F1

VIN2

EN VO

E4

D4

SS/TR

AGND

C4

BGA

CRITICAL

PGND

PGND

PGND

D3

C3

B3

A3

XW6900

SM

PGND

E3

PGND

F3

21

PGND

SW1
SW1
SW1

SW2
SW2
SW2

PG

FB

A2
B2
C2

D2
E2
F2

A4

F4

B4

64

OUT

OUT

P3V3G3HRTC_PHASE1

DIDT=TRUE

P3V3G3HRTC_PHASE2

DIDT=TRUE

85 83 72 29 28

P3V3G3HRTC_PGOOD
P3V3G3HRTC_FB

PP3V3_G3H_RTC_REG_R

1

R6908

100K

5%
1/20W
MF
201

2

CRITICAL

L6900

1UH-20%-4.8A-0.032OHM

1210

152S00386

L6901

1UH-20%-4.8A-0.032OHM

1210

152S00386

CRITICAL

P3V3G3HRTC_FB_R

10%
16V

0201

1

2

C6910

220PF

CER-X7R

C

87 63

VOUT = 3.304V

R6934

6A Max Output
f = 1.25 MHZ

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

21

21

10

5%
MF

201

1%
MF

0201

1

2

1

2

R6912

1/20W

R6913

0.00

1/20W

<Ra>

PP3V3_G3H_RTC_REG_R

87 63

CRITICAL

1

C6912

150UF

20%

6.3V

2

TANT
CASE-B-SM

CRITICAL

1

C6914

10UF

20%

2

10V
X5R-CERM
0402-1

CRITICAL

1

C6915

10UF

20%

2

10V
X5R-CERM
0402-1

VOUT = 0.8 * (1 + <RA>/<RB>) = 3.304V

CRITICAL

1

C6916

150UF

20%

2

6.3V
TANT
CASE-B-SM

CRITICAL

1

C6917

150UF

20%

2

6.3V
TANT
CASE-B-SM

0

0%

1/4W

MF

0603

1

2

PP3V3_G3H_RTC

1

R6935

0

0%
1/4W
MF
0603

2

CRITICAL

1

C6918

10UF

20%

2

10V
X5R-CERM
0402-1

CRITICAL

1

C6919

10UF

20%

2

10V
X5R-CERM
0402-1

89 86 83 76 74

P3V3G3HRTC_RA_R

0.1%
MF

0201

0.1%
MF

0201

1

PAGE TITLE

2

1

2

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=PLATFORM POWER

IV ALL RIGHTS RESERVED

BATTERY CONN, 3V3 G3H RTC VR

DRAWING NUMBER

051-05309

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

REVISION

BRANCH

PAGE

69 OF 500

SHEET

63 OF 98

R6910

360K

1/20W

<Rb>

R6911

115K

1/20W

72 71 63 61 57 54 50 29 28 27

6.0.0
pvt

SIZE

D

B

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

678

3 245

1

D

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

PPDCIN_G3H_CHGR

83

CRITICAL

1

C7024

6.8UF

20%
35V-0.09OHM

2

POLY-TANT
CASE-B1-2-SM

87 83 64 49 27

CRITICAL

1

C7025

6.8UF

20%
35V-0.09OHM

2

POLY-TANT
CASE-B1-2-SM

CRITICAL

1

C7026

6.8UF

20%
35V-0.09OHM

2

POLY-TANT
CASE-B1-2-SM

FROM USB-C SOURCE

PPDCIN_G3H

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

PENDING DE-SENSE CAPS ADDITION

CRITICAL

1

C7027

6.8UF

20%
35V-0.09OHM

2

POLY-TANT
CASE-B1-2-SM

1

2

(AMON)

CRITICAL

C7028

6.8UF

20%
35V-0.09OHM
POLY-TANT
CASE-B1-2-SM

NO_XNET_CONNECTION=1

CRITICAL

1

C7029

6.8UF

20%
35V-0.09OHM

2

POLY-TANT
CASE-B1-2-SM

CRITICAL

R7020

0.01

0.5%
1W
MF

0612-1-COMBO

21
43

CHGR_CSI_R_NCHGR_CSI_R_P

PLACE NEARS FOR C7033, C7034

REQUIRE UPDATE FOR P1 PER <RDAR://42934724>

1

C7032

2.2UF

20%
35V

2

X5R-CERM
0402

1

C7033

2.2UF

20%
35V

2

X5R-CERM
0402

1

C7034

2.2UF

20%
35V

2

X5R-CERM
0402

1

C7035

2.2UF

20%
35V

2

X5R-CERM
0402

L7030

2.7UH-20%-12.5A-0.0196OHM

IHLP4040BD-PIMA102D-COMBO

CRITICAL

7

6

2

D1

10

4

3

CRITICAL

5

S2

D

CRITICAL

1

C7050

68UF

20%
16V

2

POLY-TANT
CASE-D2E-SM-1

21

CHGR_LX2CHGR_LX1

7

6

S2

64 64

83 64

3

4

5

CRITICAL

10

2

D1

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

CRITICAL

1

C7051

68UF

20%
16V

2

POLY-TANT
CASE-D2E-SM-1

1

C7053

2.2UF

20%
25V

2

X5R
0402-1

1

C7055

2.2UF

20%
25V

2

X5R
0402-1

1

C7054

1000PF

10%
25V

2

X7R
0201

CRITICAL

F7000

12AMP-32V

PENDING DE-SENSE CAPS ADDITION

1206

TO SYSTEM

21

PPBUS_G3HPPVBAT_G3H_CHGR_REG

87 86 83 75 72 62 49

C

B

A

PP7011

PP7012

PP7013

PP7014

PP7015

PP7016

83 64 63

72 64

P2MM

SM

PP

P2MM

SM

PP

P2MM

SM

PP

P2MM

SM

PP

P2MM

SM

PP

P2MM

SM

PP

1

1

1

1

1

1

CHGR_GATE_Q1

CHGR_GATE_Q2

CHGR_GATE_Q3

CHGR_GATE_Q4

64

CHGR_LX1

64

CHGR_LX2

CHGR_EN_MVR

CHGR_INT_L

60 47 44 43 42 40 34 29 28 27

89 86 83 81 74 72 71 70 63

P2MM

SM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

PP7001

PP7002

PP7003

PP7004

PP7005

PP7006

PP7007

PP7008

PP1V8_SLPS2R

83 64

C7080

1UF

20%
10V
X5R

0201

NO STUFF

10%
25V

0201

1

2

C7016

0.01UF

X5R-CERM

PPVBAT_G3H_CHGR_REG

PLACE_NEAR=U7000.A5:2MM

1

2

R7021

1.00

1%
1/20W
MF-LF

0201

1

2

1

R7022

1.00

1%
1/20W
MF-LF
0201

2

CHGR_CSI_P CHGR_CSI_N

C7021

0.047UF

1

R7015

750K

2

CER-X7R

0402

1%
1/20W
MF
201

10%
50V

1

2

1

2

CHGR_AUX_DET

1

R7016

255K

1%
1/20W
MF
201

2

C7081

2.2UF

20%
35V

X5R-CERM

0402

47

BI

47

IN

63

IN

1

2

I2C_PWR_SDA_R2
I2C_PWR_SCL_R2
CHGR_RST_IN

C7023

0.47UF

2 1

20%

4V

CERM-X5R-1

201

PLACE_NEAR=U7000.C5:1MM

CHGR_COMP

NO STUFF

C7070

0.12UF

10%
10V
X5R

0402

1

2

1

C7071

0.12UF

10%
10V

2

X5R
0402

C7022

0.047UF

10%
50V
CER-X7R
0402

Q7030

SIZ342DT

PWRPAIR-3X3-COMBO

CHGR_GATE_Q1

1

C7075

2.2UF

20%
25V

2

X6S-CERM
0402

B5

P_IN

C5

CSIN

D5

CSIP

A5

PBUS_PWR

D3

AUX_DET

F5

VDDIO1P8

G5

SDA

H5

SCL

G2

SMC_RST_IN

G3

HPWR_EN*

E5

COMP

G4

CELL

B2

NC0

C2

NC1

E4

S1/D2G1G2

9

1

1

CHGR_LX1

NO_XNET_CONNECTION=1

1

C7030

0.1UF

10%
25V

2

X7R-CERM-1

1

0402

DIDT=TRUE
SWITCH_NODE=TRUE

CHGR_BOOT1_RC

1

R7030

0

5%
1/16W
MF-LF
402

2

CHGR_BOOT1

R7075

4.7

5%

1/20W

MF

201

CHGR_VDDPCHGR_VDDA

C7077

X5R-CERM

D2

A2

VDDA

VDDP

U7000

ISL9240

WCSP

CRITICAL

OMIT_TABLE

AGND

PGND

E2

E3

8

CHGR_GATE_Q2

21

1

10UF

20%
25V

2

0603

GATE_Q1

BOOT1

LX1
GATE_Q2
GATE_Q3

LX2

BOOT2

GATE_Q4

PBUS
CSOP
CSON

BGATE

VBAT

EN_VR1

SMC_RST*

IRQ*
CBC_ON
EN_MVR
AUX_OK

AMON

BMONNC2

H1
F1
G1
E1
D1
B1
C1
A1
A3
A4
B4
B3
C3
F2
H4
H3
H2
F4
F3
D4
C4

CHGR_GATE_Q3

NO_XNET_CONNECTION=1

C7040

X7R-CERM-1

1
DIDT=TRUE

SWITCH_NODE=TRUE

CHGR_BOOT2_RC

R7040

CHGR_BOOT2

SWITCH_NODE=TRUEDIDT=TRUE

SWITCH_NODE=TRUEDIDT=TRUE

DIDT=TRUE SWITCH_NODE=TRUE

DIDT=TRUE GATE_NODE=TRUE

DIDT=TRUE SWITCH_NODE=TRUE
DIDT=TRUE SWITCH_NODE=TRUE
DIDT=TRUE SWITCH_NODE=TRUE

CHGR_VBAT
NC_CHGR_EN_VR1
NC_CHGR_SMC_RST_L
CHGR_INT_L
CHGR_CBC_ON
CHGR_EN_MVR
NC_TP_CHGR_AUX_OK

CHGR_AMON
CHGR_BMON

GATE_NODE=TRUEDIDT=TRUE

G2

8

CHGR_LX2

0.1UF

10%
25V

0402

0

5%
1/16W
MF-LF

402

1

2

1

2

S1/D2

9

OUT
OUT
OUT

OUT
OUT

G1

1

CHGR_GATE_Q4

(PBUS)

72 64

72

83 64 63

54 49

54 49

Q7040

SIZ342DT

PWRPAIR-3X3-COMBO

1

NO_XNET_CONNECTION=1

(BMON)

1.00

1%
1/20W
MF-LF

0201

1

2

R7061

CHGR_CSO_P

10%
50V

0402

1

2

PLACE_NEAR=U7000.A4:1MM

C7061

0.047UF

CER-X7R

CRITICAL

R7060

0.005

1%
1W
MF

0612-5

21
43

CHGR_CSO_R_NCHGR_CSO_R_P

C7020

0.47UF

2 1

20%

4V

CERM-X5R-1

201

20%
25V
X5R

1

2

C7066

2.2UF

0402-1

PPVBAT_G3H_CHGR_R

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

1

R7062

1.00

1%
1/20W
MF-LF
0201

2

CHGR_CSO_N

1

C7062

0.047UF

10%
50V

2

CER-X7R
0402

C7069

2.2UF

20%
25V
X5R

0402-1

C7064

1000PF

1

2

C7067

0.1UF

CRITICAL

10%
25V
X5R

0201

1

C7068

0.01UF

2

X5R-CERM

10%
25V

0201

1

2

Q7065

SI7655DN-COMBO

PWRPK-1212-8

S

321

G

4

21

10%
25V
X7R

0201

CHGR_BGATE

BOM_COST_GROUP=PLATFORM POWER

D

1

C7063

4700PF

10%
25V

2

CER-X5R
0201

5

PLACE_NEAR=Q7065.5:2MM

1

C7060

0.1UF

10%
25V

2

X5R
0201

1

R7063

1K

5%
1/20W
MF
201

2

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

PPVBAT_G3H_CONN

Q7070

D

DMN32D2LFB4

DFN1006H4-3

SYM_VER_2

S G

1

KA

D7070

GDZ5V6LP3-55

DFN0201-COMBO

R7070

24K

5%
1/16W
MF-LF

402

3

2

1

2

PBUS SUPPLY & BATTERY CHARGER

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

TO/FROM BATTERY

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

R7071

200K

1/20W

1%
MF

201

21

PPDCIN_G3HSAVE_BAT_GSAVE_BAT_S

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

SHEET

C

83 63

B

87 83 64 49 27

A

SIZE

D

6.0.0
pvt

70 OF 500

64 OF 98

8

67

35 4

2

1

D

C

B

A

7

7

66 65

66 65

66 65

IN

IN

7

7

CPU_VCCSENSE_P

CPU_VCCSENSE_N

CPUCORE_ISUMP

CPUCORE_ISUMN

CPUCORE_ISEN1

CPUCORE_ISEN2

NOSTUFF

66

IN

IN

IN

IN

R7169

C7161

6800PF

2 1

10%
10V

X7R-CERM

0201

66 65

66

IN

IN

R7190

2 1

CPU_VCCSASENSE_P

IN

IN

10%
10V

0201

68PF

2 1

5%
25V
C0G

0201

1

2

51.1K

1%

1/20W

MF

201

C7154

0.01UF

X7R-CERM

21

C7162

COMP_B_CPUCORE_L

CPUSA_ISUMP

10%
25V

201

1

2

C7181

220PF

X7R-CERM

CPUSA_ISUMN

10%
10V

0201

1

2

C7182

0.01UF

X7R-CERM

100K

1%

1/20W

MF

201

C7190

150PF

2 1

10%
25V

X7R-CERM

0201

10%
16V
X7R

0201

10%
25V

201

0201

1

2

10%
10V

1

2

1

2

1

2

C7141

C7151

220PF

X7R-CERM

C7153

0.01UF

10%
10V

X7R-CERM

0201

C7152

0.01UF

X7R-CERM

R7161

9.09K

2 1

1%

1/20W

MF

201

R7180

499

2 1

1/20W

R7181

1K

1%

1/20W

MF

201

201

21

SA_ISUMN_R

IMON_C_CPUSA

C7171

330PF

10%
16V
X7R

0201

FB_CORE_R

R7142

0

21

5%

1/20W

MF

0201

XW7140

SM

21

1

C7142

330PF330PF

10%
16V

2

X7R
0201

R7150

499

2 1

1/20W

201

R7151

1K

21

CORE_ISUMN_R

1%

1/20W

MF

201

COMP_B_CPUCORE

CPUSA_ISUMN_R

1%
MF

65

FB_SA_R

R7172

0

21

5%

1/20W

MF

0201

XW7170

1

2

1

C7172

330PF

10%
16V

2

X7R
0201

R7143

3.16K

2 1

1/20W

C7144

1000PF

2 1

FB_B_CORE_R

10%
16V

X7R-1

0201

RTN_B_CPUCORE

CPUCORE_ISUMN_R

1%
MF

65

C7180

3300PF

21

10%
10V

X7R-CERM

0201

R7173

2 1

C7174

2200PF

2 1

X7R-CERM

SM

10%
10V

0201

21

FB_C_SA_R

RTN_C_CPUSACPU_VCCSASENSE_N

1%
MF

201

87 85 73 69 67 66 49 43

R7144

2 1

65

C7150

3300PF

21

10%
10V

X7R-CERM

0201

65

C7191

6800PF

2 1

10%
10V

X7R-CERM

0201

2.49K

1%

1/20W

MF

201

FB_B_CPUCORE

1K

1%

1/20W

MF

201

NOSTUFF

1

R7139

330K

5%
1/20W
MF
201

2

PPBUS_HS_CPU

65

CPU VCC Core

CPU VCC SA

NOSTUFF

R7177

51.1K

1/20W

COMP_C_CPUSA_L

1%
MF

201

21

C7192

150PF

2 1

10%
25V

X7R-CERM

0201

FB_C_CPUSA

R7174

1K

2 1

65

1%

1/20W

MF

201

NOSTUFF

1

R7176

330K

5%
1/20W
MF
201

2

678

65

R7145

715

1/20W

66

66 65

66

66 65

66 65

66

66 65

66 65

COMP_C_CPUSA

R7175 887 OHM PER
<RDAR://54002856>

21
1%
MF

201

OUT

OUT
OUT

IN

65

IN

65

65

65

65

65

OUT

OUT

IN

65

65

65

65

65

65

65

65

65

65

R7191

2.7K

2 1

1%

1/20W

MF

201

R7175

887

21

1%

1/20W

MF

201

FB_B_CORE_RC

65

FB_C_SA_RC

10%
25V

CERM

201

1

2

C7143

680PF

R7101

10

21

5%

1/20W

MF

201

CPUCORE_FCCM
CPUCORE_PWM1

CPUCORE_PWM2

CPUCORE_ISUMP
CPUCORE_ISUMN_R

CPUCORE_ISEN1
CPUCORE_ISEN2

COMP_B_CPUCORE
FB_B_CPUCORE
RTN_B_CPUCORE
IMON_B_CPUCORE
NTC_B_CPUCORE

CPUSA_FCCM
CPUSA_PWM
CPUSA_ISUMP

CPUSA_ISUMN_R
COMP_C_CPUSA
FB_C_CPUSA
RTN_C_CPUSA
IMON_C_CPUSA

PROG1_CPUCOREVR

PROG2_CPUCOREVR
PROG3_CPUCOREVR

PROG4_CPUCOREVR
PROG5_CPUCOREVR

65

C7173

560PF

10%
50V

X7R-CERM

0201

PPVIN_S0_CPUVR_VIN

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=13.05

1

C7101

0.22UF

10%
25V

2

X7R
0402

1

2

11 24

12 25
13 26

7 19
8 20

9 21

10 22

4 16

5 17

6 18

2 14

3 15

34

35

32
33

29

30

28

40
39
38
37
36

R7160

100K

2 1

1%

1/20W

MF

201

1

R7111

78.7K

1%
1/20W
MF
201

2

41

VIN

U7100

ISL95828

FCCM_B

PWM1_B
PWM2_B

ISUMP_B
ISUMN_B

ISEN1_B
ISEN2_B

COMP_B

FB_B

RTN_B

IMON_B

NTC_B

FCCM_C

PWM_C

ISUMP_C
ISUMN_C

COMP_C

FB_C

RTN_C

IMON_C

PROG1
PROG2
PROG3
PROG4
PROG5

353S00928

IMON_B_CPUCORE

C7160

150PF

2 1

10%
25V

X7R-CERM

0201

PROG1_CPUCOREVR

1

R7112

121K

1%
1/20W
MF
201 201

2

TQFN

CRITICAL

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=5.355

42

VCC

FCCM_A

PWM1_A
PWM2_A
PWM3_A

ISUMP_A
ISUMN_A

ISEN1_A
ISEN2_A
ISEN3_A

COMP_A

FB_A

RTN_A

IMON_A

NTC_A

VR_HOT*

VR_READY

VR_ENABLE

SDA

ALERT*

SCLK

PSYS

THRM_PAD

49

65

65

PROG2_CPUCOREVR

PROG3_CPUCOREVR

1

R7113

24.3K

1%
1/20W
MF

2

1

R7114

182K

2

27

23

46

47

48

43

44

4531

1

1%
1/20W
MF
201

66 65

66 65

67 65

67 65

CPUCORE_PWM1

CPUSA_PWM

CPUGT_PWM2

CPUGT_PWM1

R7100

1

C7100

1UF

10%
10V

2

CER-X6S
0402

CPUGT_FCCM
CPUGT_PWM1

CPUGT_PWM2

NC

CPUGT_ISUMP
CPUGT_ISUMN_R

CPUGT_ISEN1
CPUGT_ISEN2

COMP_A_CPUGT
FB_A_CPUGT
RTN_A_CPUGT
IMON_A_CPUGT
NTC_A_CPUGT

CPU_VR_PROCHOT_L
CPU_VR_READY
CPU_VR_EN_R

CPUVR_VIDSOUT_R
CPUVR_VIDALERT_L_R
CPUVR_VIDSCLK_R

CPUCORE_PSYS

1

C7108

4700PF

10%
10V

2

X7R
201

65

65

65

PROG4_CPUCOREVR

1

R7115

121K

1%
1/20W
MF
201

2

P2MM

SM

1

1

5%

1/20W

MF

201

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

21

PP5V_G3S_CPUREG_MISCPP5V_COREVR_VCC

PP7100

PP7102

PP7104

PP7103

OUT

OUT
OUT

IN

65

IN
ININ

65

65

65

65

65

83 72 65

67

R7106

49.9

1/20W

PP5V_G3S_CPUREG_MISC

NOSTUFF

1

R7107

12.1K

1%
1/20W
MF
201

2

1

R7108

12.1K

1%
1/20W
MF
201

2

NTC_B_CPUCORE

65

PROG5_CPUCOREVR

1%
MF

201

21

C7148

680PF

10%
25V

X7R-CERM

0201

67 65

67 65

67 65

67 65

67 65 66 65

CPU VCC GT + GTx Merged

R7102

100

R7103

0

21

5%

1/20W

MF

0201

1/20W

201

R7104

R7105

0

21

5%

1/20W

MF

0201

NO_XNET_CONNECTION=1

1/20W

201

65

R7120

14K

1/20W

65

1%
MF

201

21

NTC_B_CPUCORE_RP

65

FB_A_CPUGT

FB_A_GT_RC

1

2

21
5%
MF

1

R7110

45.3

1%
1/20W
MF
201

2

10

21
5%
MF

NTC_A_CPUGT

3 245

R7149

715

1/20W

32 18 17 16 15 14 13 12 11 7

83 74 73 72 70 69 53 47 42

83 72 65

CPUGT_ISUMN_R

65

SMC_PROCHOT_L

ALL_SYS_PWRGD_R

NO_XNET_CONNECTION=1

R7121

14K

1/20W

21
1%
MF

201

1

2

86 83 76 74 73 69 67 66 65 51

OUT

C7155

3300PF

PP1V_S3

NOSTUFF

1

R7199

45.3

1%
1/20W
MF
201

2

86 83 76 74 73 69 67 66 65 51

21
1%
MF

201

1

NO_XNET_CONNECTION=1

R7123

220KOHM-3%

0201

2

NTC_B_CPUCORE_RN

R7147

2.67K

1%

1/20W

MF

201

R7148

1K

21

FB_A_GT_R

NOSTUFF

R7141

330K

5%
1/20W
MF
201

1%

1/20W

MF

201

65

RTN_A_CPUGT

PP1V8_S5

CPU_VR_READY

R7154

499

2 1

1%

1/20W

MF

2 1

10%
10V

X7R-CERM

0201

GT_ISUMN_R

OUT

1

R7109

100

1%
1/20W
MF
201

2

69 18

CPU_VIDSOUT

CPU_VIDALERT_L

CPU_VIDSCLK

201

43 42 35

R7155

2 1

1/20W

83 70 69 42 18 17 9 7 5

BI

IN

IN

1K

1%
MF

201

NTC_A_CPUGT_RP

1

NO_XNET_CONNECTION=1

R7124

220KOHM-3%

0201

2

NTC_A_CPUGT_RN

XW7123

SM

21

BOM_COST_GROUP=CPU & CHIPSET

21

FB_GT_R

1

R7163

100K

5%
1/20W
MF
201

2

7

7

7

1

R7146

0

C7147

1000PF

21

10%
16V

X7R-1

0201

XW7141

SM

2 1

C7146

330PF

1

C7156

220PF

10%
25V

2

X7R-CERM
201

1

C7149

0.01UF

10%
10V

2

X7R-CERM
0201

2 1

1/20W

10%
16V
X7R

0201

1

C7157

0.01UF

10%
10V

2

X7R-CERM

5%
MF

0201

1

2

1

C7145

330PF

10%
16V

2

X7R
0201

CPUGT_ISUMP

1

C7158

0.01UF

10%
10V

2

X7R-CERM
02010201

CPU_VCCGTSENSE_P

CPU_VCCGTSENSE_N

CPUGT_ISUMN

CPUGT_ISEN1
CPUGT_ISEN2

IN

IN

IN

IN

67

7

IN

7

IN

67 65

67 65

67 65

NOSTUFF

R7196

65

COMP_A_CPUGT

R7193

9.09K

2 1

1%

1/20W

MF

201

COMP_A_CPUGT_L

51.1K

1/20W

1%
MF

201

21

C7193

68PF

21

5%
25V
C0G

0201

C7194

6800PF

21

10%
10V

X7R-CERM

0201

R7194

100K

IMON_A_CPUGT

65

C7195

150PF

2 1

10%
25V

X7R-CERM

XW7124

SM

21

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

0201

2 1

1%

1/20W

MF

201

VR CORE & SA IMVP CTRL

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

71 OF 500

SHEET

65 OF 98

D

C

B

A

8

67

35 4

2

1

678

3 245

1

D

87 85 73 69 67 66 65 49 43

83 76 74 73 69 67 66 65 51

86

CPU VCC Phase 1

PPBUS_HS_CPU
PP5V_G3S_CPUREG_MISC

R7215

1

21

5%
1/16W
MF-LF

402

PVCCCORE_PH1_AGND

66

66 65

65

IN

IN

CPUCORE_FCCM
CPUCORE_PWM1

C7217

2.2UF

20%
25V

X6S-CERM

0402

CRITICAL

1

C7210

33UF

20%
16V

2

1

C7216

PP5V_MAIN_VCORE1

1

2.2UF

20%
25V

2

X6S-CERM
0402

L7210

2

3

VCC

29

PVCC

CPUCORE_SW1

DIDT=TRUE
SWITCH_NODE=TRUE

U7210

8
9

2

1

VIN
VIN

FCCM

PWM

FDMF5808A

OMIT_TABLE

PQFN-COMBO-THICKSTNCL

353S00519

30 33

NC
NC

31

NC
NC

353S00831

AGND

AGND

4

32

PGND

12

PGND

28

PHASE

BOOT

SW
SW

GL0
GL1

GH

5

7

16
24

27

6

CPUCORE1_GL0

DIDT=TRUE

NC

GATE_NODE=TRUE

DIDT=TRUE
SWITCH_NODE=TRUE

CPUCORE1_DRVH

CPUCORE_BOOT1

DIDT=TRUE
SWITCH_NODE=TRUE

66

CPUCORE_BP1

DIDT=TRUE
SWITCH_NODE=TRUE

R7219

5%
1/16W
MF-LF

402

C7219

0.22UF

10%
25V

66

X7R

0402

0.22UH-20%-44A-0.0019OHM

PILA082D-SM

1

R7218

2.2

5%
1/10W
MF-LF

1

0

2

1

2

603

2

NOSTUFF

CPUCORE_SW1_SNUB

SWITCH_NODE=TRUE
DIDT=TRUE

1

C7218

0.001UF

10%
50V

2

X7R-CERM
0402

NOSTUFF

21

PPVCC_CPU_PH1

NO_XNET_CONNECTION=1

R7212

1/20W

NO_XNET_CONNECTION=1

CRITICAL

R7210

0.00075

1%
1W
MF

0612-1

2 1
4 3

1

R7211

2

NO_XNET_CONNECTION=1

1

R7213

200K

1%
1/20W
MF
201

2

1K

1%
MF

201

1

2

2.2

1%
1/20W
MF
201

CPUCORE_ISNS1_P
CPUCORE_ISNS1_N

NO_XNET_CONNECTION=1

CPUCORE_ISUMN

CPUCORE_ISEN1

CPUCORE_ISUMP

POLY-TANT
CASED12-SM-1

OUT
OUT

50

66 50

CRITICAL

1

C7212

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

OUT

65

OUT

OUT

66 65

R7214

2 1

66 65

CRITICAL

1

C721A

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

NO_XNET_CONNECTION=1

200K

1%

1/20W

MF

201

CPUCORE_ISNS2_N

CRITICAL

1

C721B

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

1

2

66 50

C7213

2.2UF

20%
25V
X6S-CERM
0402

1

C7214

2.2UF

20%
25V

2

X6S-CERM
0402

PPVCC_S0_CPU

Vout = 0.55 - 1.5V
IccMax = 64A
F = 750kHz

D

87 83 50 9 7

C

B

87 85 73 69 67 66 65 49 43

83 76 74 73 69 67 66 65 51

86

CPU VCC Phase 2

87 85 73 69 67 66 65 49 43

PPBUS_HS_CPU

PP5V_G3S_CPUREG_MISC

R7225

1

21

5%
1/16W
MF-LF

402

PVCCCORE_PH2_AGND

66

66 65

65

PPBUS_HS_CPU

IN

IN

CPUCORE_FCCM
CPUCORE_PWM2

PVCCCORE_PH1_AGND

66

XW7210

SM

2 1

DIDT=TRUE
SWITCH_NODE=TRUE

CPUCORE_PHASE1

PLACE_NEAR=U7210.32:2MM

1

C7226

2.2UF

20%
25V

2

X6S-CERM
0402

C7227

2.2UF

20%
25V

X6S-CERM

0402

PP5V_MAIN_VCORE2

1

2

3

VCC

29

PVCC

U7220

8
9

2

1

VIN
VIN

FCCM

PWM

FDMF5808A

OMIT_TABLE

PQFN-COMBO-THICKSTNCL

PHASE

353S00519

30 33
31

NC
NC

NC
NC

PVCCCORE_PH2_AGND CPUCORE_PHASE2

66

353S00831

AGND

AGND

4

32

XW7220

2 1

PLACE_NEAR=U7220.32:2MM

PGND

12

SM

PGND

28

BOOT

SW
SW

GL0
GL1

GH

5

7

16
24

27

6

CPUCORE2_GL0

DIDT=TRUE

NC

GATE_NODE=TRUE

DIDT=TRUE
SWITCH_NODE=TRUE

CPUCORE2_DRVH

DIDT=TRUE
SWITCH_NODE=TRUE

CPUCORE_BOOT2

DIDT=TRUE
SWITCH_NODE=TRUE

DIDT=TRUE
SWITCH_NODE=TRUE

CPUCORE_SW2

DIDT=TRUE
SWITCH_NODE=TRUE

R7229

66

CPUCORE_BP2

C7229

0.22UF

66

0

5%
1/16W
MF-LF

402

10%
25V
X7R

0402

L7220

0.22UH-20%-44A-0.0019OHM

21

PILA082D-SM

1

R7228

2.2

5%
1/10W
MF-LF

1

603

2

CPUCORE_SW2_SNUB

SWITCH_NODE=TRUE
DIDT=TRUE

2

1

2

1

C7228

0.001UF

10%
50V

2

X7R-CERM
0402

NOSTUFF

NOSTUFF

NO_XNET_CONNECTION=1

PPVCC_CPU_PH2

NO_XNET_CONNECTION=1

R7222

1K

1%

1/20W

MF

201

CRITICAL

R7220

0.00075

0612-1

1

2

1%
1W
MF

21
43

1

R7221

2.2

1%
1/20W
MF
201

2

NO_XNET_CONNECTION=1

1

R7223

200K

1%
1/20W
MF
201

2

CRITICAL

1

C7220

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CPUCORE_ISNS2_P
CPUCORE_ISNS2_N

NO_XNET_CONNECTION=1

CPUCORE_ISUMN

CPUCORE_ISEN2

CPUCORE_ISUMP

CRITICAL

1

C7221

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

OUT
OUT

50

CRITICAL

1

C7222

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

66 50

OUT

OUT

OUT

66 65

65

66 65

1

C7223

2.2UF

20%
25V

2

X6S-CERM
0402

NO_XNET_CONNECTION=1

R7224

200K

2 1

1%

1/20W

MF

201

1

C7224

2.2UF

20%
25V

2

X6S-CERM
0402

CPUCORE_ISNS1_N

C

P2MM

SM

CPUCORE1_GL0

66

CPUCORE2_GL0

66

66 50

66 65

66 65

CPUSA_GL0

66

CPUCORE1_DRVH

66

CPUCORE2_DRVH

66

CPUCORE_FCCM

CPUSA_FCCM

CPUSA_DRVH

66

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

P2MM

1

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

PP7210

PP7220

PP7270

PP7211

PP7221

PP7212

B

PP7272

PP7271

A

83 76 74 73 69 67 66 65 51

86

PP5V_G3S_CPUREG_MISC

R7275

1

21

5%
1/16W
MF-LF

402

PVCCCSA_AGND

66

66 65

65

IN

IN

CPUSA_FCCM
CPUSA_PWM

CPUSA_DRVH

66

DIDT=TRUE
SWITCH_NODE=TRUE

CPU VCCSA

C7277

2.2UF

20%
25V

X6S-CERM

0402

CRITICAL

1

C7270

33UF

20%
16V

1

PP5V_MAIN_VCCSA

1

2

VCIN

11

VDRV

2

U7270

SIC532CD

6

VIN

1

ZCD_EN*

12

PWM

3

NC

XW7270

2 1

PLACE_NEAR=U7270.13:2MM

MLP4535

OMIT_TABLE

353S00525
353S00832

PGND

PGND

CGND

7

10

13

SM

PVCCCSA_AGND

BOOT

PHASE

VSWH

GL
GL

4

5

8

9
14

NC

C7276

2.2UF

20%
25V

2

X6S-CERM
0402

66

CPUVR_SWSA

DIDT=TRUE
SWITCH_NODE=TRUE

CPUSA_BOOTSA

DIDT=TRUE
SWITCH_NODE=TRUE

CPUSA_GL0

DIDT=TRUE

GATE_NODE=TRUE

CPUSA_BPSA

DIDT=TRUE
SWITCH_NODE=TRUE

DIDT=TRUE
SWITCH_NODE=TRUE

CPUSA_PHASESA

R7279

66

C7279

0.22UF

0

5%
1/16W
MF-LF

402

10%
25V
X7R

0402

OMIT_TABLE

L7270

0.47UH-20%-17.5A-0.0047OHM

21

PIMA052D-SM

152S00389 FOOTPRINT

PER <RDAR://43666396>

NOSTUFF

1

R7278

2.2

5%
1/10W
MF-LF
603

2

1

2

1

2

CPUSA_SW_SNUB

DIDT=TRUE
SWITCH_NODE=TRUE

NOSTUFF

1

C7278

0.001UF

10%
50V

2

X7R-CERM
0402

PPVCCSA_CPU_R PPVCCSA_S0_CPU

CRITICAL

R7270

0.002

1%
1W

CYN

0612

2 1
4 3

54

54

R7272

0

5%

1/20W

MF

0201

R7274

1K

1%

1/20W

MF

201

2

POLY-TANT
CASED12-SM-1

CPUSA_ISNS_R_P
CPUSA_ISNS_R_N

21

CPUSA_ISUMN

NO_XNET_CONNECTION=1

21

CPUSA_ISUMP

NO_XNET_CONNECTION=1

CRITICAL

1

C7271

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

R7276

10

1%

1/20W

MF

201

OUT

OUT

65

65

1

C7272

2.2UF

20%
25V

2

X6S-CERM
0402

1

C7273

2.2UF

20%
25V

2

X6S-CERM
0402

87 83 52 9 7

Vout = 0.55 - 1.15V

1

1

2

R7277

10

1%
1/20W
MF
201

2

CPUSA_ISNS_P

CPUSA_ISNS_N

OUT
OUT

52

52

BOM_COST_GROUP=CPU & CHIPSET

ICCMAX = 8.5A
F = 750kHz

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

VR CORE & SA IMVP

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

72 OF 500

SHEET

66 OF 98

A

8

67

35 4

2

1

678

3 245

1

D

87 85 73 69 67 66 65 49 43

86 83 76 74 73 69 67 66 65 51

CPU VCCGT/GTx Phase 1

2018/07/17 NOTE: DRIVER CONNECTIONS PRELIMINARY

PPBUS_HS_CPU
PP5V_G3S_CPUREG_MISC

PVCCCGT_PH1_AGND

67

67 65

R7416

1

21

5%
1/16W
MF-LF

402

IN

65

IN

PP5V_MAIN_VGT1

20%
25V

0402

1

2

C7417

2.2UF

X6S-CERM

CPUGT_FCCM
CPUGT_PWM1

PVCCCGT_PH1_AGND

67

3

29

VCC

PVCC

U7410

8

VIN

9

VIN

2

FCCM

1

PWM

30 33
31

NC
NC

NC
NC

XW7410

2 1

PLACE_NEAR=U7410.32:2MM

FDMF5804

PQFN-COMBO

OMIT_TABLE

353S00519
353S00831

AGND

PGND

12

SM

AGND

4

32

PGND

28

BOOT

PHASE

SW
SW

GL0
GL1

GH

5

7

16
24

27

6

1

C7416

2.2UF

20%
25V

2

X6S-CERM
0402

CPUGT1_GL0

DIDT=TRUE

NC

SWITCH_NODE=TRUE

CPUGT1_DRVH

DIDT=TRUE
SWITCH_NODE=TRUE

CPUGT_PHASE1

CPUGT_SW1 PPVCCGT_CPU_PH1

DIDT=TRUE
SWITCH_NODE=TRUE

CPUGT_BOOT1

DIDT=TRUE
SWITCH_NODE=TRUE

67

67

DIDT=TRUE
SWITCH_NODE=TRUE

R7419

0

5%
1/16W
MF-LF

402

CPUGT_BP1

DIDT=TRUE
SWITCH_NODE=TRUE

C7419

0.22UF

10%
25V
X7R

0402

L7410

0.22UH-20%-44A-0.0019OHM

21

PILA082D-SM

1

R7418

2.2

2

5%
1/10W
MF-LF
603

1

CPUGT_SW1_SNUB

2

1

2

SWITCH_NODE=TRUE
DIDT=TRUE

1

C7418

0.001UF

10%
50V

2

X7R-CERM
0402

NOSTUFF

NOSTUFF

NO_XNET_CONNECTION=1

R7412

1K

1%

1/20W

MF

201

NO_XNET_CONNECTION=1

R7410

0.00075

1%
1W
MF

0612-1

2 1
4 3

1

R7411

2.2

1%
1/20W
MF
201

2

NO_XNET_CONNECTION=1

1

2

1

R7413

200K

1%
1/20W
MF
201

2

CRITICAL

1

C7410

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CPUGT_ISNS1_P
CPUGT_ISNS1_N

NO_XNET_CONNECTION=1

CRITICAL

1

C7411

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

OUT
OUT

CPUGT_ISUMN

CPUGT_ISEN1

CPUGT_ISUMP

50

Vout = 0.55 - 1.5V

CRITICAL

1

C7412

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

67 50

1

C7413

2.2UF

20%
25V

2

X6S-CERM
0402

1

C7414

2.2UF

20%
25V

2

X6S-CERM
0402

IccMax = 64A
F = 750kHz

PPVCCGT_S0_CPU

87 83 50 10 7

D

NO_XNET_CONNECTION=1

65

67 65

R7414

200K

2 1

1%

1/20W

MF

201

67 65

CPUGT_ISNS2_N

67 50

OUT

OUT

OUT

C

87 85 73 69 67 66 65 49 43

PPBUS_HS_CPU

R7426

1

21

PP5V_G3S_CPUREG_MISC

51 86 83 76 74 73 69 67 66 65

PVCCCGT_PH2_AGND

67

67 65

65

5%
1/16W
MF-LF

402

IN

IN

PP5V_MAIN_VGT2

20%
25V

0402

1

2

C7427

2.2UF

X6S-CERM

CPUGT_FCCM
CPUGT_PWM2

CPU VCCGT/GTx Phase 2

2018/07/17 NOTE: DRIVER CONNECTIONS PRELIMINARY

PVCCCGT_PH2_AGND

67

3

29

VCC

PVCC

U7420

8

VIN

9

VIN

2

FCCM

1

PWM

30 33
31

NC
NC

NC
NC

XW7420

2 1

PLACE_NEAR=U7420.32:2MM

FDMF5804

PQFN-COMBO

OMIT_TABLE

353S00519
353S00831

AGND

PGND

12

SM

AGND

4

32

PGND

28

PP5V_G3S_CPUREG_MISC

1

C7426

2.2UF

20%
25V

2

X6S-CERM
0402

BOOT

PHASE

SW
SW

GL0
GL1

GH

5

7

16
24

27

6

CPUGT2_GL0

DIDT=TRUE

NC

SWITCH_NODE=TRUE

CPUGT2_DRVH

DIDT=TRUE
SWITCH_NODE=TRUE

DIDT=TRUE
SWITCH_NODE=TRUE

CPUGT_BOOT2

DIDT=TRUE
SWITCH_NODE=TRUE

CPUGT_PHASE2

CPUGT_SW2

DIDT=TRUE
SWITCH_NODE=TRUE

67

CPUGT_BP2

DIDT=TRUE
SWITCH_NODE=TRUE

R7429

0

5%
1/16W
MF-LF

402

C7429

0.22UF

10%
25V
X7R

0402

86 83 76 74 73 69 67 66 65 51

L7420

0.22UH-20%-44A-0.0019OHM

21

PILA082D-SM

1

R7428

1

2

1

2

2.2

5%
1/10W
MF-LF
603

2

CPUGT_SW2_SNUB

DIDT=TRUE
SWITCH_NODE=TRUE

1

C7428

0.001UF

10%
50V

2

X7R-CERM
0402

NOSTUFF

NOSTUFF

PPVCCGT_CPU_PH2

NO_XNET_CONNECTION=1

R7422

1/20W

NO_XNET_CONNECTION=1

R7420

0.00075

1%
1W
MF

0612-1

2 1
4 3

1

1K

1%
MF

201

2

CPUGT_ISNS2_P
CPUGT_ISNS2_N

1

R7421

2.2

NO_XNET_CONNECTION=1

1%
1/20W
MF
201

2

NO_XNET_CONNECTION=1

1

R7423

200K

1%
1/20W
MF
201

2

CRITICAL

1

C7420

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

OUT
OUT

CPUGT_ISUMN

CPUGT_ISEN2

CPUGT_ISUMP

50

CRITICAL

1

C7421

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

1

C7423

2.2UF

20%
25V

2

X6S-CERM
0402

1

C7424

2.2UF

20%
25V

2

X6S-CERM
0402

1

C7425

12PF

5%
25V

2

NP0-C0G
0201

C

67 50

OUT

OUT

OUT

67 65

65

67 65

NO_XNET_CONNECTION=1

R7424

200K

2 1

1%

1/20W

MF

201

CPUGT_ISNS1_N

67 50

B

87 85 73 69 67 66 65 49 43

PPBUS_HS_CPU

CRITICAL

1

C7430

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

1

C7431

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

1

C7432

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

B

A

8

P2MM

SM

67

67 65

67

67

CPUGT1_GL0

CPUGT_FCCM

CPUGT1_DRVH

CPUGT2_GL0

1

P2MM

1

P2MM

1

P2MM

1

PP

PP

PP

PP

PP7433

SM

PP7412

SM

PP7411

SM

PP7430

BOM_COST_GROUP=CPU & CHIPSET

67

35 4

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

VR GT & GTX IMVP

SIZE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

74 OF 500

SHEET

67 OF 98

1

A

D

678

3 245

1

D

5V G3S

Vout = 5.1V
IOUT MAX = 7.997A
F = 500 KHZ

CRITICAL

1

C7671

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

1

C7675

220UF-25MOHM

20%

6.3V

2

POLY-TANT
CASE-B2-SM

CRITICAL

1

C7677

220UF-25MOHM

20%

6.3V

2

POLY-TANT
CASE-B2-SM

PP5V_G3S

CRITICAL

1

C7670

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

1

C7676

220UF-25MOHM

20%

6.3V

2

POLY-TANT
CASE-B2-SM

3V3 G3H

Vout = 3.3V
Iout Max = 10.9A
F = 500 KHZ

86 83

75 68 55 54 52 51 50 46 29 28

PPVIN_G3H_P3V3G3H

75 68 55 54 52 51 50 46 29 28

CRITICAL

1

C7650

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

1

C7680

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

1

C7681

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

1

C7685

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

1

C7686

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

1

C7687

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

1

C7665

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

1

C7666

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

PPVIN_G3H_P5VG3S

CRITICAL

1

C7660

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

1

C7661

2.2UF

20%
25V

2

X6S-CERM
0402

86 49

PP5V_G3S

86 83

86 49

VOUT = 5V
100MA MAX OUTPUT

PP5V_G3H_LDO

CRITICAL

1

C7651

10UF

20%
16V

2

X6S-CERM
0603

86 83 74 68 63 54 52

PP3V3_G3H

CRITICAL

20%

6.3V
TANT

1

2

C7695

150UF

CASE-B-SM

CRITICAL

20%

6.3V
TANT

1

2

C7611

150UF

CASE-B-SM

CRITICAL

C7690

2.2UF

20%
25V

X6S-CERM

0402

CRITICAL

C7696

150UF

20%

6.3V
TANT

CASE-B-SM

CRITICAL

C7697

150UF

20%

6.3V
TANT

CASE-B-SM

CRITICAL

1

C7691

2.2UF

2

X6S-CERM

20%
25V

0402

1

2

D

CRITICAL

1

C7613

150UF

2

CASE-B-SM

20%

6.3V
TANT

1

2

CRITICAL

1

C7612

150UF

2

CASE-B-SM

20%

6.3V
TANT

1

2

P5VP3V3_VREG3

C

B

PLACE_NEAR=C7675.1:5.3MM

2

XW7675

SM

1

P5VG3S_VFB1_R

XW7671

NO_XNET_CONNECTION=1

1

R7671

10

5%
1/20W
MF
201

2

P5VG3S_VFB1_R2

1

R7677

6.34K

1%
1/20W
MF
201

2

P5VG3S_VFB1_RR

CRITICAL

1

R7678

34.8K

0.1%
1/20W
MF
0201-1

2

CRITICAL

L7670

1.5UH-20%-12.5A-0.017OHM

21

P5VG3S_VSW

PIMB062D-SM

152S00268

NOSTUFF

1

R7674

2.2

5%
1/10W
MF-LF
603

2

P5VG3S_SNUBR

MIN_LINE_WIDTH=0.1160
MIN_NECK_WIDTH=0.0600

DIDT=TRUE

SWITCH_NODE=TRUE

NOSTUFF

1

PLACE_NEAR=L7670.1:3MM

2

PLACE_NEAR=L7670.2:3MM

2

XW7670

SM

1

SM

NO_XNET_CONNECTION=1

1

DIDT=TRUE

P5VG3S_CS1_L_P

P5VG3S_CS1_L_N

C7674

0.001UF

10%
50V

2

CERM
402

CRITICAL

Q7660

CSD58873Q3D

1

VIN

6
7

VSW

8

PGND

9

Q3D

TG

TGR

BG

376S1038

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000

NO_XNET_CONNECTION=1

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
GATE_NODE=TRUE
DIDT=TRUE

3

P5VG3S_DRVH

4

5

P5VG3S_DRVL

DIDT=TRUE

GATE_NODE=TRUE

R7672

4.42K

2 1

1%

1/20W

MF

201

R7666

2 1

1/16W
MF-LF

R7664

0

2 1

5%
1/16W
MF-LF

402

1

5%

402

P5VG3S_VBST_R

MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

CRITICAL

1

C7669

0.1UF

10%
25V

2

X7R-CERM-1
0402

R7665

AUDIBLE SKIPPING

1

0

5%

1/20W

MF

0201

2

DIDT=TRUE
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2500

0

5%
1/16W
MF-LF

402

R7651

1

2

INAUDIBLE SKIPPING

NOSTUFF

1

R7650

0

5%
1/20W
MF
0201

2

P5VP3V3_SKIPSEL

P5VG3S_VBST
P5VG3S_DRVH_R

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000

MIN_LINE_WIDTH=0.6000 DIDT=TRUE
MIN_NECK_WIDTH=0.2000

GATE_NODE=TRUE

P5VG3S_SW
P5VG3S_DRVL_R
P5VG3S_CSP1

DIDT=TRUEGATE_NODE=TRUE

DIDT=TRUESWITCH_NODE=TRUE

DIDT=TRUE

CRITICAL

NO_XNET_CONNECTION=1

C7673

0.1UF

21

10%
25V

X6S-CERM

0201

83 72 68

OUT

P5VG3S_VFB1
P5VG3S_COMP1

P5VG3S_EN_DLY

68

P5VG3S_PGOOD

NOSTUFF

R7673

1.2K

1/20W

NO_XNET_CONNECTION=1

1%
MF

201

21

CRITICAL

1

C7678

330PF

10%
16V

2

X7R

0201

1

R7676

10K

1%
1/20W
MF
201

2

P5VG3S_COMP1_R

CRITICAL

1

C7679

4700PF

10%
10V

2

X7R
201

(P5VP3V3_VREF2) (P5VP3V3_VREF2)

R7675

5.49K

1%

1/20W

MF

201

P5VP3V3_VREF2

CRITICAL

2

23

29

22

13

C7652

0.22UF

V5SW

6

SKIPSEL1

19

SKIPSEL2

14

OCSEL

31

VBST1 VBST2

1

DRVH1 DRVH2

32

SW1 SW2

30

DRVL1

7

CSP1

8

CSN1 CSN2

11

MODE

9

10

COMP1 COMP2

4

EN1 EN2

5

PGOOD1 PGOOD2

1

2

VIN

VREG5

CRITICAL

U7650

QFN

TPS51980B

353S01936

GND

28

THRM_PAD

VREG3

33

VREF2

EN

DRVL2

CSP2

RF

VFB2VFB1

12

26

24

25

27

18
17

3
16
15

21
20

P5VXX_EN

P3V3G3H_VBST

DIDT=TRUE

P3V3G3H_DRVH_R

DIDT=TRUE GATE_NODE=TRUE MIN_LINE_WIDTH=0.6000

P3V3G3H_SW
P3V3G3H_DRVL_R

DIDT=TRUE GATE_NODE=TRUE MIN_LINE_WIDTH=0.6000

P3V3G3H_CSP2

DIDT=TRUE

P3V3G3H_RF
P3V3G3H_VFB2
P3V3G3H_COMP2

TP_P3V3G3H_EN2
P3V3MAIN_PGOOD

1

2

1

10%
16V

2

CERM

402

SWITCH_NODE=TRUE

R7695

5.49K

1%
1/20W
MF
201

P3V3G3H_COMP2_R

PLACE_NEAR=U7650.28:1MM

CRITICAL

1

C7653

2.2UF

20%
25V

2

X6S-CERM
0402

68

SWITCH_NODE=TRUEDIDT=TRUE MIN_LINE_WIDTH=0.6000

OUT

72 68

P3V3G3H_VBST_R

MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000

1

R7685

0

5%
1/16W
MF-LF
402

2

MIN_NECK_WIDTH=0.2000

MIN_NECK_WIDTH=0.2000

MIN_NECK_WIDTH=0.2000

R7655

200K

1/20W

SWITCH_NODE=TRUEDIDT=TRUE

CRITICAL

1

1%
MF

201

2

C7689

X7R-CERM-1

NO_XNET_CONNECTION=1

NOSTUFF

10K

1%

1/20W

MF

201

1

2

1

2

NO_XNET_CONNECTION=1

CRITICAL

1

C7698

270PF

10%
16V

2

X7R-CERM
0201-1

R7696

CRITICAL

C7699

2700PF

10%
16V
X7R

0201

0.1UF

10%
25V

0402

CRITICAL

C7693

0.1UF

X6S-CERM

R7693

1.37K

1

2

10%
25V

0201

1%

1/20W

MF

201

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
GATE_NODE=TRUE
DIDT=TRUE

R7686

1

2 1

5%
1/16W
MF-LF

402

R7684

2 1

21

21

R7692

3.83K

1%

1/20W

MF

NO_XNET_CONNECTION=1

201

P3V3G3H_DRVH

P3V3G3H_DRVL

0

5%
1/16W
MF-LF

402

21

DIDT=TRUE

GATE_NODE=TRUE
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000

CRITICAL

Q7680

CSD58873Q3D

3

TG

4

TGR

5

BG

Q3D

1

VIN

6

P3V3G3H_VSW

VSW

PGND

9

7
8

376S1038

P3V3G3H_SNUBR

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE

NOSTUFF

C7694

0.001UF

P3V3G3H_CS2_L_P

P3V3G3H_CS2_L_N

1.0UH-20%-14A-0.0107OHM

NOSTUFF

R7694

2.2

5%
1/10W
MF-LF

603

10%
50V

CERM

402

L7690

2 1

PIMB062D-SM

152S0269

1

2

1

2

XW7690

DIDT=TRUE

CRITICAL

NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1

2

SM

1

2

XW7691

SM

1

P3V3G3H_VFB2_R

P3V3G3H_VFB2_R2

P3V3G3H_VFB2_RR

CRITICAL

PLACE_NEAR=L7690.2:3MM

PLACE_NEAR=L7690.1:3MM

PLACE_NEAR=C7695.1:6.6MM

2

XW7695

R7691

R7697

R7698

SM

10

5%

1/20W

MF

201

3.09K

1%

1/20W

MF

201

105K

0.1%

1/20W

MF

0201-1

1

1

2

1

2

1

2

C

B

A

CRITICAL

1

R7679

10K

0.1%
1/20W
MF
0201-1

2

58 57 55 51 48 47 45 44 43 18

83 76 74 62 61 60 59

86 83 74 68 63 54 52

PP1V8_G3S

PP3V3_G3H

1

R7600

100K

5%
1/20W
MF
201

2

P5VG3S_PGOOD

1

R7601

100K

5%
1/20W
MF
201

2

P3V3MAIN_PGOOD

83 72

2

XW7650

SM

1

CRITICAL

R7699

47K

0.1%

1/20W

MF

0201

1

2

GND_5V3V3_AGND

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1500

86 83 74 68 63 54 52

R7660

3.3K

IN

1/20W

47K

5%

1/20W

MF

201

1

2

R7661

83 72 68

72 68

5%
MF

201

21

1

C7664

1000PF

10%
16V

2

X7R-1
0201

P5VXX_ENPMU_PVDDMAIN_EN

68

R7613

0

5%
MF

0201

21

83 72

IN

P5VG3S_EN

1/20W

PP3V3_G3H

BYPASS=U7610::5mm

P5VG3S_EN_R

C7610

0.1UF

10%
10V

X5R-CERM

0201

R7610

47K

5%

1/20W

MF

201

1

2

SYNC_DATE=SYNC_MASTER=

U7610

74AUP1T97

5

SOT891

1

1

2

2

4

6

3

1

R7611

2

BOM_COST_GROUP=PLATFORM POWER

P5VG3S_EN_DLY

47K

5%
1/20W
MF
201

68

PAGE TITLE

VR 5V, 3V3

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

76 OF 500

SHEET

68 OF 98

SIZE

A

D

8

67

35 4

2

1

678

3 245

1

1V EDRAM & EOPIO

D

C

86 83 76 74 73 67 66 65 51

R7750

10

7

IN

7

IN

CPU_VCCEOPIOSENSE_P

CPU_VCCEOPIOSENSE_N

1/20W

XW7702

SM

PLACE_NEAR=R7750.1:1mm

Vout = 0.5V * (1 + Ra / Rb)

21

CPU_VCCEOPIOSENSE_R

5%
MF

201

21

CPU_VCCEOPIOSENSE_XW

NO_XNET_CONNECTION=1

R7760

4.99K

1%

1/20W

MF

201

R7762

4.99K

1%

1/20W

MF

201

<Rb>

PP5V_G3S_EDRAMVCC

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000 MIN_LINE_WIDTH=0.2000

1

1

2

1

2

NO_XNET_CONNECTION=1

R7761

4.99K

0.1%
1/20W
MF
0201

<Ra><Ra>

C7762

2.2UF

20%
25V

2

X6S-CERM
0402

PVCCEDRAMS0_EN_FILT_BUF

69

PVCCEDRAMS0_FB
PVCCEDRAMS0_SREF
PVCCEDRAMS0_VO
PVCCEDRAMS0_OCSET
PVCCEOPIO_EDRAM_PGOOD

69

PVCCEDRAMS0_RTN

1

2

1

R7763

4.99K

0.1%
1/20W
MF
0201

2

<Rb>

C7760

10PF

5%
50V
C0G

0201

C7770

3300PF

5.0%
50V

CERM
0603

1

2

1

C7761

10PF

5%
50V

2

C0G
0201

1

C7763

270PF

5%
50V

2

C0G
0402

PVCCEDRAMS0_FSEL

1

21

R7764

100K

1%
1/20W
MF
201

2

PVCCEDRAMS0_AGND

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000

PP5V_G3S_CPUREG_MISC

2.2

5%

1/20W

MF

201

1

2

R7744

U7710

ISL95870HRUZ

3 12

EN

6

FB

4

SREF

8

VO

7

OCSET

9

PGOOD

2

RTN

5

FSEL

PLACE_NEAR=U7710.1:1mm

-TR5720

353S01077

XW7701

SM

1

2

PP5V_G3S_EDRAMPVCC

13

14

PVCCVCC

UTQFN

CRITICAL

PGNDGND

1

16

21

R7747

2.2

5%
1/20W
MF
201

MIN_NECK_WIDTH=0.1000

PVCCEDRAM_BOOT_RC

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE

1

C7743

10UF

20%
10V

2

X5R-CERM
0402-7

PVCCEDRAM_VBST

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE

PVCCEDRAM_DRVH

BOOT

UGATE

PHASE

LGATE

11

10

15

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

PVCCEDRAM_LL

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000
SWITCH_NODE=TRUE
DIDT=TRUE

PVCCEDRAM_DRVL

MIN_NECK_WIDTH=0.1300
MIN_LINE_WIDTH=0.6000
DIDT=TRUE
GATE_NODE=TRUE

(PCHVCCIOS0_OCSET)

C7744

0.1UF

21

20%
16V

X6S-CERM

0201

R7745

2.2

5%

1/20W

MF

201

1

2

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

1

R7746

1

5%
1/20W
MF
201

2

PVCCEDRAM_DRVL_R

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
GATE_NODE=TRUE

R7748

PVCCEDRAM_DRVH_R

SWITCH_NODE=TRUEDIDT=TRUE

Q7702

CSD58873Q3D

Q3D

3

TG

4

TGR

5

BG

9

1

21

5%
1/16W
MF-LF

402

NOSTUFF

0.001UF

1

VIN

MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.6000
DIDT=TRUE
SWITCH_NODE=TRUE

6

VSW

PGND

7
8

C7720

10%
50V

X7R-CERM

0402

1

C7751

2.2UF

20%
25V

2

X6S-CERM
0402

1

C7750

2.2UF

20%
25V

2

X6S-CERM
0402

CRITICAL

L7702

0.56UH-20%-16A-0.0072OHM

PVCCEDRAM_PHASE PPVCCEDRAM_S0_REG_R

PILA052D-SM

NOSTUFF

1

R7716

2.2

5%
1/10W
MF-LF
603

2

PVCCEDRAM_LL_SNUB

DIDT=TRUE
SWITCH_NODE=TRUE

PVCCEDRAMS0_CS_P
PVCCEDRAMS0_CS_N

1

2

NO_XNET_CONNECTION=1

1

R7742

3.83K

1%
1/20W
MF
201

2

C7742

470PF

21

10%
16V

X5R-X7R-CERM

0201

NO_XNET_CONNECTION=1

NO_XNET_CONNECTION=1

1

R7743

3.83K

1%
1/20W
MF
201

2

21

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

R7772

10

1%

1/20W

MF

201

1

2

CRITICAL

1

C7752

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

CRITICAL

R7702

0.002

1%

1/2W

MF

0306

1

R7773

10

1%
1/20W
MF
201

2

PPBUS_HS_CPU

21
43

CRITICAL

1

C7774

10UF

20%
4V

2

X6S
0402

ISNS_CPUEDRAM_N

ISNS_CPUEDRAM_P

87 85 73 67 66 65 49 43

Vout = 1V

6.2A MAX OUTPUT
F = 600 KHZ

PPVCCEDRAM_S0_CPU

CRITICAL

1

C7775

10UF

20%
4V

2

X6S
0402

OUT

OUT

54 52

54 52

CRITICAL

1

C7765

220UF

20%
2V

2

ELEC
SM

128S00041

D

86 83 9 7

C

B

47 43 42 18 14 13 12 11 7 5 4

89 83 74 73 71 69

69

69 65 18

PP3V3_S5

PM_OPC_ZVM_L

ALL_SYS_PWRGD_R

1

C7776

0.1UF

10%

6.3V

2

CERM-X5R
0201

47 43 42 18 14 13 12 11 7 5 4

89 83 74 73 71 69

U7711

5

6

132

74AUP1T97GM

SOT886

4

PVCCEDRAMS0_EN

NOSTUFF

R7765

100K

1/20W

5%
MF

201

R7758

2 1

MF

201 1% 1/20W

1

2

3.92K

PVCCEDRAMS0_EN_R

PP3V3_S5

1

C7778

330PF

5%
25V

2

C0G
0201

1

C7777

0.1UF

10%

6.3V

2

CERM-X5R
0201

U7712

74AUP2G17FZ4-55-COMBO

X2-DFN1410

52

52

U7712

74AUP2G17FZ4-55-COMBO

X2-DFN1410

B

1

6

PVCCEDRAMS0_EN_FILT

3

C7779

100PF

21

0201C0G25V5%

4

PVCCEDRAMS0_EN_FILT_BUF

1

R7766

47K

5%
1/20W
MF
201

2

69

69 65 18

EDRAM EN BYPASS

ALL_SYS_PWRGD_R

NOSTUFF

R7759

0

2 1

5%MF 1/20W0201

PVCCEDRAMS0_EN_FILT_BUF

69

LEVEL SHIFT

A

32 18 17 16 15 14 13 12 11 7
83 74 73 72 70 69 65 53 47 42

PVCCEOPIO_EDRAM_PGOOD

69

PP1V8_S5

R7752

100K

5%

1/20W

MF

201

83 70 65 42 18 17 9 7 5

1

2

5

IN

ZVM is CMOS DC Output:
V_OL Max = Vcc * 0.1V
V_OH Min = Vcc * 0.9V
Vcc referred to in these specs refers to VccST/IO

PP1V_S3

C7790

X5R-CERM

CPU_ZVM_L

0.1UF

10%
10V

0201

NC

PP1V8_S5

1

6

2

VCC

U7790

74AUP1G07GF

SOT891

2

1

GND

3

(OD)

NCNC

4

YA

5

1

R7792

100K

5%
1/20W
MF
201

2

NC

PM_OPC_ZVM_L

SLG5AP031 EN:
V_IL Max = 1V
V_IH Min = 2V

69

42 32 18 17 16 15 14 13 12 11 7

83 74 73 72 70 69 65 53 47

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

VR EOPIO EDRAM

SIZE

D

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=CPU & CHIPSET

IV ALL RIGHTS RESERVED

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

77 OF 500

SHEET

69 OF 98

8

67

35 4

2

1

678

3 245

1

Note : Design based on Calpe ERS - D2449-A0-110-00_0v3.pdf (Radar# 24696002)
System Block Diagram - T290 Power System Architecture .v9
Optimize components for individual projects based on EDP(A)
Buck 0, 2, 5, 7, 8, 9 and 10 have option for Remote Sense.

71 52

86

1

C7801

10UF

2

1

C7808

D

10UF

2

C

86 83 54 11 7

86 83 73 70 54 16 11 7

B

81 80 79 78 77

85 83 82

A

81 80 79 78 77

85 83 82

PP3V3_G3H_PMU_VDDMAIN

1

C7802

10UF

20%

6.3V
CER-X6S
0402

20%

6.3V
CER-X6S
0402

20%

6.3V

2

CER-X6S
0402

1

C7809

10UF

20%

6.3V

2

CER-X6S
0402

1

C7892

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78A6

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78C2

1UF

20%

6.3V

2

X6S-CERM
0201

PLACE_SIDE=BOTTOM

VOUT = 0.7-1 V
IOUT_MAX = 4 A
F = 3MHz

PPVPCORE_S5

1

C7860

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7866

20UF

20%

2.5V

2

X6S-CERM
0402

VOUT = 1.05 V
IOUT_MAX = 6 A
F = 3MHz

PP1V_PRIM

1

C78D0

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7898

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7899

20UF

20%

2.5V

2

X6S-CERM
0402

VOUT = 0.9 V
IOUT_MAX = 3 A
F = 3MHz

PP0V9_SSD0

1

C7882

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

VOUT = 1.2/1.8 V
IOUT_MAX = 3 A
F = 3MHz

PPVCCQ_ANI_SSD0

1

C78B6

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C7803

10UF

20%

6.3V

2

CER-X6S
0402

1

C7810

10UF

20%

6.3V

2

CER-X6S
0402

1

C7893

20%

6.3V

2

X6S-CERM
0201

1

C78A7

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78C3

1UF

20%

6.3V

2

X6S-CERM
0201

1

C7861

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7867

20UF

20%

2.5V

2

X6S-CERM
0402

1

C78D1

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7872

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7877

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7804

10UF

20%

6.3V

2

CER-X6S
0402

1

C7891

10UF

20%

6.3V

2

CER-X6S
0402

1

C7894

1UF1UF

20%

6.3V

2

X6S-CERM
0201

1

C78A8

1UF

20%

6.3V

2

X6S-CERM
0201

PLACE_SIDE=BOTTOM

1

C78C4

1UF

20%

6.3V

2

X6S-CERM
0201

1

C7862

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7868

20UF

20%

2.5V

2

X6S-CERM
0402

1

C78D2

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7873

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7878

20UF

20%

2.5V

2

X6S-CERM
0402

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

C7805

10UF

20%

6.3V
0402

C7895

10UF

20%

6.3V
CER-X6S
0402

C78A0

1UF

20%

6.3V
X6S-CERM
0201

C78A9

1UF

20%

6.3V
X6S-CERM
0201

C78C5

1UF

20%

6.3V
X6S-CERM
0201

PLACE_SIDE=BOTTOM

C7863

20UF

20%

2.5V
X6S-CERM
0402

C7869

20UF

20%

2.5V
X6S-CERM
0402

C78D3

20UF

20%

2.5V
X6S-CERM
0402

C7874

20UF

20%

2.5V
X6S-CERM
0402

C7879

20UF

20%

2.5V
X6S-CERM
0402

1

C7806

10UF

20%

6.3V

2

CER-X6SCER-X6S
0402

1

C78A3

10UF

20%

6.3V

2

CER-X6S
0402

1

C78A1

1UF 1UF

20%

6.3V

2

X6S-CERM
0201

1

C78B0

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78C6

1UF

20%

6.3V

2

X6S-CERM
0201

PLACE_SIDE=BOTTOM

1

C7864

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7870

20UF

20%

2.5V

2

X6S-CERM
0402

1

C78D4

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7875

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7880

20UF

20%

2.5V

2

X6S-CERM
0402

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

R7823 should be stuffed when Buck9 is unused

1

C7883

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78B7

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78B2

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C7884

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78B8

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78B3

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C7885

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78B9

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C7886

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78B4

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

C78C0

20UF

20%

2.5V

2

X6S-CERM
0402

SSD:2L

1

2

SSD:2L

1

2

SSD:2L

1

2

SSD:2L

C7807

10UF

20%

6.3V
CER-X6S
0402

C78E2

10UF

20%

6.3V
CER-X6S
0402

C78A2

20%

6.3V
X6S-CERM
0201

PLACE_SIDE=BOTTOM

C78B1

1UF

20%

6.3V
X6S-CERM
0201

C78C7

1UF

20%

6.3V
X6S-CERM
0201

PLACE_SIDE=BOTTOM

C7865

20UF

20%

2.5V
X6S-CERM
0402

C7871

20UF

20%

2.5V
X6S-CERM
0402

C78D5

20UF

20%

2.5V
X6S-CERM
0402

C7876

20UF

20%

2.5V
X6S-CERM
0402

C7881

20UF

20%

2.5V
X6S-CERM
0402

C7887

20UF

20%

2.5V
X6S-CERM
0402

C78B5

20UF

20%

2.5V
X6S-CERM
0402

C78C1

20UF

20%

2.5V
X6S-CERM
0402

Resistor Divider from PBUS

72

83 70

1

C78CA

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78E1

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78C8

1UF

20%

6.3V

2

X6S-CERM
0201

1

C7889

20UF

20%

2.5V

2

X6S-CERM
0402

PLACE_SIDE=BOTTOM

PP1V8_SLPS2R_PMUVDDGPIO

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

VOLTAGE=1.89

1

C78A4

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78E3

1UF

20%

6.3V

2

X6S-CERM
0201

1

C78C9

1UF

20%

6.3V

2

X6S-CERM
0201

1

C7890

20UF

20%

2.5V

2

X6S-CERM
0402

CRITICAL

0.47UH-20%-4.8A-0.034OHM

L7819

0806-COMBO

CRITICAL

0.47UH-20%-4.8A-0.034OHM

L7820

0806-COMBO

PLACE_NEAR=L7819.1:6MM

NOSTUFF

R7819

5% 1/20WMF0201

PLACE_NEAR=U7800.G15:6MM

NOSTUFF

R7821

5% 1/20WMF0201

0

21

0

21

CRITICAL

0.47UH-20%-4.8A-0.034OHM

L7821

0806-COMBO

CRITICAL

0.47UH-20%-4.8A-0.034OHM

L7822

0806-COMBO

PLACE_NEAR=L7822.1:5MM

NOSTUFF

R7820

5% 1/20WMF0201

86 83 73 70 54 16 11 7

0

21

CRITICAL

0.47UH-20%-4.8A-0.034OHM

L7823

SSD:2L

PLACE_NEAR=L7823.1:10MM

SSD:2L

R7822

5% 1/20WMF0201

PLACE_NEAR=U7800.N14:10MM

R7823

5% 1/20WMF0201

0.47UH-20%-4.8A-0.034OHM

0806-COMBO

0

21

0

21

CRITICAL

L7824

SSD:2L

PLACE_NEAR=L7824.1:5MM

SSD:2L

R7824

5% 1/20WMF0201

0806-COMBO

0

21

IN

1

C78A5

1UF

2

1

C78E4

1UF

2

1

C78CB

1UF

2

21

84

21

84

20%

6.3V
X6S-CERM
0201

20%

6.3V
X6S-CERM
0201

20%

6.3V
X6S-CERM

PMU_VDD_HI

1

2

1

2

PVPCORES5_SW0

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

SWITCH_NODE=TRUE

PVPCORES5_SW1

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

SWITCH_NODE=TRUE

PVPCORES5_FB_P

PVPCORES5_FB_N

21

P1VPRIM_SW0

21

84

P1VPRIM_SW1

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

SWITCH_NODE=TRUE

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

SWITCH_NODE=TRUE

P1VPRIM_FB

PP1V_PRIM

21

P0V9SSD_SW0

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

SWITCH_NODE=TRUE

P0V9SSD_FB_P

NO_TEST=1

P0V9SSD_FB_N

NO_TEST=1

21

PVCCQSSD_SW0

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1000

SWITCH_NODE=TRUE

PVCCQSSD_FB

C7800

0.1UF

10%

6.3V
X6S
0201

C78CC

1UF

20%

6.3V
X6S-CERM
02010201

DIDT=TRUE

DIDT=TRUE

7

IN

7

IN

DIDT=TRUE

DIDT=TRUE

7

IN

DIDT=TRUE

82

IN

82

IN

DIDT=TRUE

82

IN

NC
NC

NC

P6
E10
P10
K14

K13

J11

D3

D2

D1

G1

G2

G3

P2

P1

L1

L2

L3
C18
C17
C16

A7

B7

C7
A11
B11

C11

F17
F18

G16

K16
K17
K18

N18
N17
N16

R2
R1

R7

R5

E17
E18

G17
G18

F15

G15

L16
L17
L18

J16
J17
J18

L14

R12
T12
U12
V12

M18
M17
M16

P14

N14

P16
P17
P18

R14

VDD_MAIN_E

VDD_MAIN_N
VDD_MAIN_S
VDD_MAIN_W

VDD_HI

VDD_GPIO

VDD_BUCK0_01

VDD_BUCK0_23

VDD_BUCK16

VDD_BUCK2

VDD_BUCK3

VDD_BUCK4

VDD_BUCK5

VDD_BUCK7

VDD_BUCK8

VDD_BUCK910

BUCK6_LX0

BUCK6_IN

BUCK6_FB

BUCK7_LX0

BUCK7_LX1

BUCK7_RTP

BUCK7_RTN

BUCK8_LX0

BUCK8_LX1

BUCK8_FB

BUCK8_IN

BUCK9_LX0

BUCK9_RTP

BUCK9_RTN

BUCK10_LX0

BUCK10_FB

CRITICAL

OMIT_TABLE

U7800

D2449A0P0FUAVAE2

WLCSP

SYM 2 OF 4

BUCK INPUT

SWITCH OUTPUTS

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

BUCK0_FB

BUCK1_LX0
BUCK1_LX0

BUCK1_FB

BUCK2_LX0

BUCK2_LX1

BUCK2_FB

84

BUCK3_LX0

BUCK3_FB

BUCK3_IN

BUCK4_LX0

BUCK4_LX1

BUCK4_FB

BUCK4_IN

84

BUCK5_LX0

84

BUCK5_LX1

BUCK5_FB

BUCK3_SW1

BUCK3_SW2
BUCK3_SW3_0
BUCK3_SW3_1
BUCK3_SW4_0

BUCK3_SW4_1

BUCK3_SW5

BUCK4_SW1

BUCK6_SW1

BUCK8_SW1

BUCK8_SW2

C3
C2
C1

E3
E2
E1

F1
F2
F3

H1
H2
H3

G5

N2
N1

P5

K1
K2
K3

M1
M2
M3

L5

D18
D17
D16

D14

R9
T10
T9
U10
U9
V10
V9

A8
B8

A6
B6

D7

P8

A10
B10

A12
B12

D12

T8
R11
U11
V11
V8

U8

R8

P7
R6

P13
P12

1UH-20%-3.8A-0.055OHM

PVDDCPUAWAKE_SW0

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

0.22UH-20%-6.7A-0.023OHM

PVDDCPUAWAKE_SW1

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

0.22UH-20%-6.7A-0.023OHM

PVDDCPUAWAKE_SW2

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

0.22UH-20%-6.7A-0.023OHM

PVDDCPUAWAKE_SW3

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

PVDDCPUAWAKE_FB

43

IN

PVDDCPUSRAMAWAKE_SW0

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

PVDDCPUSRAMAWAKE_FB

1UH-20%-4.7A-0.04OHM

P0V8SLPDDR_SW0

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

0.47UH-20%-4.8A-0.034OHM

P0V8SLPDDR_SW1

84

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

P0V8SLPDDR_FB

43

IN

1UH-20%-3.8A-0.055OHM

P1V8SLPS2R_SW0

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

P1V8SLPS2R_FB

PP1V8_SLPS2R

1UH-20%-3.8A-0.055OHM

84

P1V1SLPS2R_SW0

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

0.47UH-20%-4.8A-0.034OHM

84

P1V1SLPS2R_SW1

SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE

P1V1SLPS2R_FB

P0V9SLPDDR_SW0

MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

1UH-20%-3.8A-0.055OHM

0.47UH-20%-4.8A-0.034OHM

P0V9SLPDDR_SW1

MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

P0V9SLPDDR_FB

43

IN

PP1V8_AWAKE
PP1V8_SLPS2R_PMUVDDGPIO
PP1V8_S5

PP1V8_S3

PP1V8_IO_SSD0_R

NC
NC

NC_PPBUCK8_SW1
PP1V_S3

CRITICAL

21

L7806

2016-COMBO

CRITICAL

21

L7807

PINA20121T-SM

CRITICAL

21

L7808

PINA20121T-SM

CRITICAL

21

L7809

PINA20121T-SM

PLACE_NEAR=L7806.2:5MM

0

5% 1/20WMF0201

21

R7806

CRITICAL

1.0UH-20%-2.6A-0.095OHM

21

L7810

0805-COMBO

PLACE_NEAR=L7810.2:5MM

0

5% 1/20WMF0201

21

R7811

CRITICAL

21

L7811

2520

CRITICAL

21

L7812

0806-COMBO

PLACE_NEAR=L7812.2:5MM

21

NOSTUFF

R7812

0

5% 1/20WMF0201

CRITICAL

21

L7813

2016-COMBO

PLACE_NEAR=L7813.2:5MM

0

5% 1/20WMF0201

21

R7813

60 47 44 43 42 40 34 29 28 27
89 86 83 81 74 72 71 70 64 63

CRITICAL

21

L7814

2016-COMBO

CRITICAL

21

L7815

0806-COMBO

PLACE_NEAR=L7815.2:5MM

0

5% 1/20WMF0201

21

R7814

CRITICAL

21

L7816

2016-COMBO

CRITICAL

21

L7817

0806-COMBO

PLACE_NEAR=L7816.2:5MM

0

5% 1/20WMF0201

21

R7816

NOSTUFF

83 72 62 43 42 40 37 27

83 70

51

81

83 69 65 42 18 17 9 7 5

1

C7811

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7824

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7829

10UF

20%
4V

2

X6S
0402-1

1

C7833

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7814

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7839

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7846

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7816

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7852

20UF

20%

2.5V

2

X6S-CERM
0402

Supplied Current

0.3A

0.3A

1.0A

32 18 17 16 15 14 13 12 11 7

83 74 73 72 69 65 53 47 42

1.0A

0.5A

0.5A

0.3A

0.3A

0.3A
BOM_COST_GROUP=PLATFORM POWER

1

C7812

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7825

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7830

10UF

20%
4V

2

X6S
0402-1

1

C7834

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7815

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7840

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7847

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7817

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7853

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7813

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7826

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7835

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7831

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7841

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7848

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7854

20UF

20%

2.5V

2

X6S-CERM
0402

Vout = 0.625V - 1.06V
Iout_Max = 13.4A
F = 2MHz & 4MHz

1

C7821

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7827

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7822

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7828

20UF

20%

2.5V

2

X6S-CERM
0402

Vout = 0.8V - 1.06V
Iout_Max = 1A
F = 3MHz

PPVDDCPUSRAM_AWAKE

Vout = 0.82V
Iout_Max = 6A
F = 3MHz

PP0V82_SLPDDR

1

C7836

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7832

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7837

20UF

20%

2.5V

2

X6S-CERM
0402

Vout = 1.8V
Iout_Max = 2.5A
F = 3MHz

PP1V8_SLPS2R

1

C7842

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7843

20UF

20%

2.5V

2

X6S-CERM
0402

Vout = 1.1V
Iout_Max = 4A
F = 3MHz

PP1V1_SLPS2R

1

C7849

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7850

20UF

20%

2.5V

2

X6S-CERM
0402

Vout = 0.9V
Iout_Max = 4A
F = 3MHz

PP0V9_SLPDDR

PAGE TITLE

1

C7855

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7856

20UF

20%

2.5V

2

X6S-CERM
0402

PMIC BUCKS AND SWS

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

PPVDDCPU_AWAKE

1

C7823

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7838

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7844

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7851

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7818

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7845

20UF

20%

2.5V

2

X6S-CERM
0402

1

C7819

20UF

20%

2.5V

2

X6S-CERM
0402

DRAWING NUMBER

051-05309

REVISION

BRANCH

PAGE

SHEET

86 83 43 38

86 83 38

86 83 43 38

89 86 83 81 74 72

86 83 71 40 39

86 83 43 39

6.0.0
pvt

78 OF 500

70 OF 98

SIZE

D

D

C

43 42 40 34 29 28 27
71 70 64 63 60 47 44

B

A

SYNC_DATE=SYNC_MASTER=

8

67

35 4

2

1

D

86 71 70 52

86 83 71 70 40 39

72 71 63 61 57 54 50 29 28 27

60 47 44 43 42 40 34 29 28 27

89 86 83 81 74 72 70 64 63

89 86 83 76 74

PP3V3_G3H_PMU_VDDMAIN

PP1V1_SLPS2R
PP3V3_G3H_RTC
PP1V8_SLPS2R

678

3 245

1

CRITICAL

OMIT_TABLE

U7800

D2449A0P0FUAVAE2

WLCSP

N11

V3P3

N12

V3P3

LDO0_IN
LDO1_IN LDO2
LDO2_IN

SYM 1 OF 4

LDOS

LDO_CORE

LDO0
LDO1

LDO3

L8

LDO_CORE

T14
T15T13
T16R13
P9R15

0201 X6S

C7910

0.1UF

21

6.3V 10%

PP0V8_SLPS2R
PP3V_G3H_RTC
PP1V2_AWAKE
PMU_LDO3_OUT_R

D

83 39

83 13 11 7

83 40

Max Current = 150mA
Max Current = 10mA
Max Current = 260mA
Max Current = 10mA

C

72 71 63 61 57 54 50 29 28 27

89 86 83 76 74

1

C7903

0.1UF

10%

6.3V

2

X6S
0201

1

C7904

0.1UF

10%

6.3V

2

X6S
0201

R7900

0

5%
MF

0201

21

1

C7907

10UF

20%

2

CER-X6S
0402

1

C7908

10UF

20%

6.3V6.3V

2

CER-X6S
0402

PP3V3_G3H_RTC PP3V3_G3H_PMU_VINRTC_R

VIN RTC implementation

1/20W

may change between

1

C7912

1UF

20%

6.3V

2

X6S-CERM
0201

1

C7909

0.1UF

10%

6.3V

2

X6S
0201

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=3.3V

1

C7913

1UF

20%

6.3V

2

X6S-CERM
0201

T6
U6

H5
E11
P11
M14

VIN_RTC
VIN_RTC

VIN_RTC_E

VIN_RTC_N

VIN_RTC_S
VIN_RTC_W

(IPD)

HIO_SW_EN

HIO_SW
HIO_SW

LDO_RTC

VOUT_RTC
VOUT_RTC

VPUMP

V3P3_SW1
V3P3_SW2

N6

U13
V13

V7

T7
U7

R10

N13
N10

1

C7905

2.2UF

10%
10V

2

X6S-CERM
0402

1

C7906

2.2UF

10%
10V

2

X6S-CERM
0402

LDO_RTC

PMU_VPUMP

1

C7914

2.2UF

10%
10V

2

X6S-CERM
0402

1

C7902

10%
10V

2

X5R-CERM
0201

1

C7901

0.1UF0.01UF

10%

6.3V

2

X6S
0201

CPU_C10_GATE_L

PP1V_S0SW

PP3V3_G3H_PMU_VDDMAIN

PP3V3_AWAKE
PP3V3_S5

1

C7911

0.1UF

10%

6.3V

2

X6S
0201

69

83 74 73 12

83 16 9 7 5

86 71 70 52

83 40

89 83 74 73

47 43 42 18 14 13 12 11 7 5 4

Max Current = 3A

Max Current = 300mA
Max Current = 500mA

C

B

A

B4
C4
B3
B2
B1
E4
F4
G4
J4
J3
J2
J1
C6
A5
B5

C5
A13
B13
C12

R3

T2

T1
R18
R17
R16

M4

N4

N3
E16
D15
E15

A9

B9

C9
H18
H17
H16
H15
L15
M15
N15

A1

A2

A3

A4
A17
A18

VSS_BUCK0

VSS_BUCK0_1

VSS_BUCK02

VSS_BUCK4

VSS_BUCK5

VSS_BUCK6

VSS_BUCK10

VSS_BUCK21

VSS_BUCK37

VSS_BUCK45

VSS_BUCK78

VSS_BUCK89

VSS

CRITICAL

OMIT_TABLE

U7800

D2449A0P0FUAVAE2

WLCSP

SYM 4 OF 4

VSSA_BUCK1_6/AVSS_SE/PVSS_SE1
VSSA_BUCK1_6/AVSS_SE/PVSS_SE2

VSSA_BUCK7_8/AVSS_W1
VSSA_BUCK7_8/AVSS_W2

VSSA_BUCK9_10/AVSS_SW

VSS

VSSA_BUCK0_1
VSSA_BUCK0_2

VSSA_BUCK2

VSSA_BUCK3_4_5_1
VSSA_BUCK3_4_5_2

AVSS_C/AVSS_S

VSS_RTC

PVSS_N

PVSS_SW

PVSS_S

B15
B16
B17
B18
C15
F16
G12
H12
J12
K4
P3
R4
T3
T17
T18
U1
U2
U3
U4
U14
U16
U17
U18
V1
V2
V5
V14
V15
V16
V17
V18

D4
H4

T4
T5

P4

C8
C10

J15
K15

P15

M9

U5

F12

U15

T11

D4:Analog ground isolation on L13, do not strap on Bottom layer.
H4:Analog ground isolation on L13, do not strap on Bottom layer.

J15:Analog ground isolation on L13, do not strap on Bottom layer.
K15:Analog ground isolation on L13, do not strap on Bottom layer.

U5:Analog ground isolation on L13, do not strap on Bottom layer.

No AVSS isolation with XW per <rdar://45389788>

72 71 63 61 57 54 50 29 28 27

1

C7920

1500PF

10%
10V

2

X7R
0201

89 86 83 76 74

89 83 72

IN

1.1V SLPDDR SWITCH

PP3V3_G3H_RTC

1

C7921

0.1UF

10%

6.3V

2

X6S
0201

P1V1SLPDDR_RAMP
P1V1_SLPDDR_SOCFET_EN

1

VDD

U7901

SLG5AP1668V

CAP

ON S

TDFN8

GND

8

BOM_COST_GROUP=PLATFORM POWER

37

D

52

PP1V1_SLPS2R
PP1V1_SLPDDR

Part : SLG5AP1668V
R(ON) : 7.8 mohm (Typical) , 9.6 mohm (max)
Current: 5.3A Max

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

PMIC LDOS

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

86 83 71 70 40 39

83 40 39 34

B

A

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

79 OF 500

SHEET

71 OF 98

SIZE

D

8

67

35 4

2

1

D

C

B

PP1V8_SLPS2R

R8002
R8003

PP1V8_AWAKE

R8006

PP1V8_S5

R8005

10K

10K

10K

10K

678

3 245

1

CRITICAL

OMIT_TABLE

U7800

85 83 35

83 34

85

85 83 63 29 28

85 83 17 5

IN
IN
IN
IN

SOC_WDOG
SOC_SOCHOT_L
UPC_PMU_RESET
PM_THRMTRIP_L
NC_GPU_THRMTRIP
PMU_COLD_RESET_L

PM_SLP_S0_L
PMU_ACTIVE_READY
PMU_CLK32K_SOC_R

PMU_CLK32K_PCH_R
PMU_CLK32K_WLANBT_R
NC_PMU_CLK32K_GNSS_R
NC_PMU_CLK32K

PMU_SYS_ALIVE
PMU_FORCE_DFU

PMU_INT_L

I2C_PWR_SCL
I2C_PWR_SDA

SPMI_CLK
SPMI_DATA
ALL_SYS_PWRGD
PCH_PWRBTN_L

PMU_OTHER3V3_HI_ISENSE
PMU_OTHER5V_HI_ISENSE
PMU_CPUEDRAM_ISENSE
PMU_CPUVCCIO_ISENSE
PMU_DDR1V2_ISENSE
PMU_OCARINA_ISENSE
PMU_SSDNAND_ISENSE
PMU_P5V_CPUREGMISC_ISENSE
NC_PMU_AMUX_AY

83 35

14

83 32

89 83 34 28

OUT

OUT

OUT

OUT

PMU_CLK32K_SOC

PLACE_NEAR=U7800.H6:5MM

PMU_CLK32K_PCH

PLACE_NEAR=U7800.H7:5MM

PMU_CLK32K_WLANBT

PLACE_NEAR=U7800.J7:5MM

SOC_FORCE_DFU

Caution : AMUX programmed with Gain 1

R8011

R8012

R8016

R8010

33

33

33

2.2K

85 83 72 60 35

89 83 35 18

21

201MF1/20W 5%

21

201MF1/20W 5%

21

201MF1/20W 5%

21

201MF1/20W 5%

89 83 72 34 28

85 83 82 81 72 35 34

83 47 35

83 47 35

83 72 18

83 16 13

35

35

35

49

49

52

50

50

54

49

51

OUT

IN

OUT

OUT

OUT

IN

BI

IN
BI
OUT
OUT

IN

IN

IN

IN

IN

IN

IN

IN

have inputs less than 1.5V

51

52

50

52

50

50

50

50

IN

IN

IN

IN

IN

IN

IN

IN

PMU_LCDPANEL_ISENSE
PMU_CPUSA_ISENSE
PMU_CPUDDR_ISENSE
PMU_CPUSA_VSENSE
PMU_CPU_VSENSE
PMU_CPUGT_VSENSE
PMU_CPUGT_ISENSE
PMU_CPU_ISENSE
NC_PMU_AMUX_BY

NC
NC

60 47 44 43 42 40 34 29 28 27

89 86 83 81 74 71 70 64 63

21

21

21

21

201 MF1/20W 5%

201

201 MF1/20W 5%

201 MF1/20W 5%

PMU_COLD_RESET_L

PMU_SYS_ALIVE

MF1/20W 5%

83 70 62 43 42 40 37 27

PMU_DROOP_L

83 74 73 70 69 65 53 47

42 32 18 17 16 15 14 13 12 11 7

ALL_SYS_PWRGD

85 83 72 60 35

PMU_XTAL1_R

85 83 82 81 72 35 34

CRITICAL

Y8001

32.768KHZ-20PPM-12.5PF

1

72 34

83 72 18

C8002

22PF

5%
25V

2

C0G
0201

1.60X1.00-SM

21

R8013

0

21

1

C8003

22PF

5%
25V

2

C0G
0201

0201MF1/20W 5%

NOSTUFF

1

R8018

1M

5%
1/20W
MF
201

2

PMU_XTAL1
PMU_XTAL2

83 5

IN

PMU_VDD_MAX

1

C8004

0.1UF

10%

6.3V

2

X6S
0201

CPU_CATERR_L

F5
E5
K5
K6
N5

L13

M12

J5

H6
H7
J7
K7
K8

L11

D6

L9

M11
L10

M8

M7
K11
D11

A16
A15
A14
B14
D13
C14
E14
F14
J14

C13
E13
E12
F13
G13
G14
H14
H13
J13

N9
M10

V3

V4

L6

N8

E6

RESET*

IRQ*

XTAL2

RESET_IN1
RESET_IN2
RESET_IN3
RESET_IN4
RESET_IN5

SYS_SLEEP*

ACTIVE_RDY

CLKOUT0_32K
CLKOUT1_32K
CLKOUT2_32K
CLKOUT3_32K
CLKOUT4_32K

SYS_ALIVE
FORCE_DFU

SCL
SDA

SCLK
SDATA
SYS_ACTIVE
SYS_BTN

AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_A4
AMUX_A5
AMUX_A6
AMUX_A7
AMUX_AY

AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_B4
AMUX_B5
AMUX_B6
AMUX_B7
AMUX_BY

LS_BID1
LS_BID2

XTAL1

SYS_ERR*

VDD_MAX
VDD_OTP

D2449A0P0FUAVAE2

(IPD)

(IPD)

(IPD)

(IPU)
(IPU)

WLCSP

SYM 3 OF 4

RESETSSPMIAMUXXTAL

COMPARATOR REFS

(IPU)
(IPU)

BUTTON

GPIO

IREF

VREF

VDROOP

VDROOP_DET

CHG_CBC_ON

NCHG_INT

CHG_POK

VPWR_EN

LDO1_POK

PFN

VIN_BBAT

BUTTON1
BUTTON2

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25

L12

K12

L7

M5

E9
J6
L4

D5

M13

E8

V6

N7
M6

D9
F8
E7
F6
F7
D8
F9
F10
G10
G9
G8
G7
G6
H8
H9
J9
J8
K9
K10
J10
H10
H11
G11
F11
D10

PMU_IREF

PMU_VREF

1

1

C8001

0.1UF

10%

6.3V

2

X6S
0201

R8001

200K

2

PMU_DROOP_L

SOC_VDDCPU_SENSE
CHGR_CBC_ON

CHGR_INT_L

PMU_PVDDMAIN_EN
PCH_RTC_RESET_L

NC

PMU_ONOFF_L
PMU_RSLOC_RST_L

P3V3MAIN_PGOOD
NC_P3V3G3W_EN
NAND_MODE_1V2_EN
P5VG3S_EN
P5VG3S_PGOOD
P3V3G3S_EN
P1V8G3S_EN
CPU_VR_READY
PVCCIO_EN
PVCCIO_PGOOD
PVDDQ_EN
PVDDQ_PGOOD

WLAN_PWR_EN

SE_PWR_EN

NC

SENSOR_PWR_EN
PVCCPLLOC_EN
SSD0_VR_P2V5_PGOOD
SSD0_PMIC_VR_P2V5_EN
SSD0_PMIC_DISCHARGE_EN
SSD0_PMIC_RESET_L
UVP_DIS_L
TBT_PWR_EN
P1V1_SLPDDR_SOCFET_EN

1%
1/20W
MF
201

OUT

IN

IN
IN

OUT

OUT

72 34

84 38

64

64

83 68

83 14

To be Grounded on Portables only
RC on Coin Cell on Desktops

OUT

OUT
OUT

OUT

OUT

OUT

OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT

IN

IN

IN

IN

IN

IN

72 63 44

89 83 72 63 61

68

83 68

83 68

83 74

89 83 74

83 65

83 73 72

73

89 83 73

83 73

72 32

72 45

83 74 72 50 49

74

81

82

82

82

43

74

89 83 71

IN
IN

NO_TEST=1

72

NC

D

C

B

A

PP3V3_G3H_RTC

R8015
R8014
R8023

10K

10K

10K

R8007
R8017
R8019

R8021
R8022

47K

47K

47K

47K

47K

21

21

21

NOSTUFF

21

NOSTUFF

21

NOSTUFF

21

NOSTUFF

21

NOSTUFF

21

NOSTUFF

89 86 83 76

1/20W 5%201 MF

MF1/20W 201 5%

1/20W 201 MF5%

5%201 MF1/20W

201 MF1/20W 5%

1/20W201 MF5%

201

201 1/20W 5%

5% MF1/20W

MF

74 71 63 61 57 54 50 29 28 27

PMU_ONOFF_L

PMU_RSLOC_RST_L

NAND_MODE_1V2_EN

<rdar://45930027>

PMU_ACTIVE_READY

PVCCIO_EN

WLAN_PWR_EN

SE_PWR_EN

SENSOR_PWR_EN

72

72 63 44

VDD_HI Threshold Select

89 83 72 63 61

87 86 83 75 64 62 49

89 83 72 34 28

83 73 72

72 32

72 45

83 74 72 50 49

PPBUS_G3H

NOSTUFF

C8051

220PF

10%
16V

CER-X7R

0201

887K

0.1%

1/20W

TK

0201

357K

0.1%

1/20W

MF

0201-1

1

2

PMU_VDD_HI

1

2

70

OUT

Rising Vth (2.15V) Falling Vth (2.0V)

7.49V

6.97V

PAGE TITLE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=PLATFORM POWER

IV ALL RIGHTS RESERVED

PMIC GPIOS & CONTROL

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

80 OF 500

SHEET

72 OF 98

SIZE

D

A

SYNC_DATE=SYNC_MASTER=

R8050

1

2

R8051

8

67

35 4

2

1

678

3 245

1

1.2V VDDQ & 0.6V VTT

D

C

B

A

86 83 76 74 73 69 67 66 65 51

1

2

BYPASS=U8100.6::2MM

C8115

0.1UF

CERM-X5R

7

IN

7

IN

83 74 73 72 70 69
16 15 14 13 12 11 7
65 53 47 42 32 18 17

73 72

83 73 72

47 43 42 18 14 13 12 11 7 5 4

1

10%

6.3V

2

0201

CPU_VCCIOSENSE_P

CPU_VCCIOSENSE_N

PVCCIO_PGOOD
PVDDQ_PGOOD

89 83 74 73 71 69

83 74 71 12

83 73 72

P1V2REG_VREF_R

1

2

1

2

PP1V8_S5

88 83 74 73 50 23 22 21 20 19

PP5V_G3S_CPUREG_MISC

89 83 72

R8111

3.3K

1%
1/20W
MF
201

IN

PVDDQ_EN

MIN_LINE_WIDTH=0.0910
MIN_NECK_WIDTH=0.0910

R8117

21K

0.1%
1/20W
MF
0201

PLACE_NEAR=U8100.8:5mm

R8112

48.7K

0.1%
1/20W
MF
0201

1

2

P1V2REG_AGND

MIN_LINE_WIDTH=0.0910
MIN_NECK_WIDTH=0.0910

VOLTAGE=0V

R8150

XW8102

SM

21

PLACE_NEAR=R8150.1:1mm

5%

1/20W

MF

201

1

2

R8101

100K

5%

1/20W

MF

201

1

2

CPU_C10_GATE_L

PVCCIO_EN

R8152

100K

PP3V3_S5

IN

IN

R8154

0

0201

MIN_LINE_WIDTH=0.2000

VOLTAGE=5V

MIN_NECK_WIDTH=0.1000

5%1/20WMF

MEMVTT_EN

73

1

R8153

47K

5%
1/20W
MF
201

2

NOSTUFF

BYPASS=U8100.8::1.5MM

R8156

C8116

0.01UF

10%
10V
X7R-CERM
0201

86 83 70 54 16 11 7

6

IN

75

21

CPU_VCCIOSENSE_R

1%

1/20W

MF

201

PP1V_PRIM

PM_MEMVTT_EN

CPU_VCCIOSENSE_XW

NO_XNET_CONNECTION=1

1

2

C8176

0.1UF

10%

6.3V
CERM-X5R
0201

U8111

5

6

132

74AUP1T97GM

PP1V2_S3

BYPASS=U8100.12::2.5MM

21

PP5V_EDRAM_V5IN

20%
10V

1

2

0

5%

1/20W

MF

0201

C8103

10UF

X5R-CERM

0402-1

1

1

2

R8155

0

5%
1/20W
MF
0201

2

MEMVTT_EN_R

PVDDQ_EN_R

P1V2REG_VREF

MIN_LINE_WIDTH=0.0910
MIN_NECK_WIDTH=0.0910

PVCCEDRAM_REFIN

P1V2REG_MODE
P1V2REG_TRIP

PLACE_NEAR=U8100.19:3mm

R8160

4.42K

1%

1/20W

MF

201

1

R8113

200K

1%
1/20W
MF
201

2

C8190

0.1UF

X5R-CERM

1

2

10%
10V

0201

1

R8161

4.42K

0.1%
1/20W
MF
0201

2

1

R8114

51.1K

1%
1/20W
MF
201

2

PLACE_NEAR=U8100.18:3mm

1

2

NC

1

R8191

100K

5%
1/20W
MF
201

2

NO_XNET_CONNECTION=1

Vout = 0.5V * (1 + Ra / Rb)<Ra><Ra>

R8162

4.99K

1%

1/20W

MF

201

1

2

1

R8163

4.99K

0.1%
1/20W
MF
0201

2

<Rb> <Rb>

5%
50V
C0G

0201

1

2

C8160

10PF

VCCIO EN LOGIC

SOT886

4

PVCCIOS0_EN

R8159

100K

5%

1/20W

MF

201

1

NOSTUFF

2

R8158

2 1

MF201 1% 1/20W

BYPASS=U8100.2::3MM

C8102

10UF

20%
10V

X5R-CERM

0402-1

V5IN

17

S3

16

S5

6

VREF

8

REFIN

19

MODE

18

TRIP

LEVEL SHIFT

6

1

VCC_A

U8190

SN74AUP1T34-COMBO

A

5

NC

3.92K

SON

GND

3

1

C8161

10PF

5%
50V

2

C0G
0201

47 43 42 18 14 13 12 11 7 5 4

PVCCIOS0_EN_R

1

2

TPS51916

CRITICAL

PGND GND

10

VCC_B

B

(OD)

BYPASS=U8100.2::4MM

C8114

10UF

X5R-CERM

0402-1

2

VLDOIN

U8100

QFN

VDDQSNS

VTT THRM

GND PAD

4

7

C8191

0.1UF

X5R-CERM

42

21

PLACE_NEAR=U8100.21:1mm

1

10%
10V

2

0201

73 72

C8170

3300PF

5.0%
CERM

0603

1

C8163

270PF

5%
50V

2

C0G
0402

89 83 74 73 71 69

R8130

1

20%
10V

2

P1V2_VBST

MIN_LINE_WIDTH=0.2500
DIDT=TRUE

SWITCH_NODE=TRUE

VBST
DRVH

DRVL

PGOOD

VTTSNS

VTTREF

PP1V8_S5

50V

1512

P1V2_DRVH

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE DIDT=TRUE

SW

VTT

14
13

11
20
9
3
1

5

PVTT_VTTSNS

PPVTT_VTTREF

2

XW8100

SM

1

TPS51916 Ileak) = +/-1uA
Vih(min) = 1.5V

C8140

0.22UF

86 83 76 74 73 69 67 66 65 51

10%
16V

CERM

402

1

2

MEMVTT_EN

1

R8190

100K

5%
1/20W
MF
201

2

1

2

73

PP5V_G3S_VCCIOVCC

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

VOLTAGE=5V

C8162

2.2UF

20%
25V
X6S-CERM
0402

PVCCIOS0_EN_FILT_BUF

PVCCIOS0_FB
PVCCIOS0_SREF
PVCCIOS0_VO
PVCCOIOS0_OCSET

OUT

PVCCIO_PGOOD
PVCCIOS0_RTN
PVCCIOS0_FSEL

1

21

R8164

100K

1%
1/20W
MF
201

2

PVCCIOS0_AGND

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1500

VOLTAGE=0V

PP3V3_S5

1

2

1

C8178

330PF

5%
25V

2

C0G
0201

1

2.2

5%

1/20W

MF

201

2

P1V2_SW

MIN_LINE_WIDTH=0.6000
SWITCH_NODE=TRUE

DIDT=TRUE

P1V2_DRVL

MIN_LINE_WIDTH=0.6000

PVDDQ_PGOOD

PLACE_NEAR=U8100.1:5mm

1

C8131

15UF

20%
2V

2

X6S
0402

73 72 70 69 65 53 47

PP5V_G3S_CPUREG_MISC

73

C8177

0.1UF

10%

6.3V
CERM-X5R
0201

1

P1V2_BOOT_RC

MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE

R8133

1/20W

201

DIDT=TRUEGATE_NODE=TRUE

OUT

R8157

0

2 1

1/20WMF0201 5%

1

2

DDRREG_VTTSNS

C8132

15UF

20%
2V
X6S
0402

VTT Vout = 0.6V

42 32 18 17 16 15 14 13 12 11 7

83 74

IccMax = 0.512A MAX OUTPUT

R8144

2.2

5%

1/20W

MF

201

ISL95870HRUZ

3 12

EN

6

4

8

7

9

2

5

FB

SREF

VO

OCSET

PGOOD

RTN

FSEL

-TR5720

XW8101

PLACE_NEAR=U8110.1:1mm

U8112

74AUP2G17FZ4-55-COMBO

52

X2-DFN1410

6

PVCCIOS0_EN_FILT

C8179

100PF

21

1

21

5%
MF

R8132

1

5%

1/20W

MF

83 73 72

1

C8133

15UF

20%
2V

2

X6S
0402

201

PLACE_NEAR=U2300.J3:10MM

0.95V VCCIO

1

2

13

U8110

UTQFN

353S01077

CRITICAL

1

SM

0201C0G25V5%

14

PVCCVCC

PGNDGND

16

21

1

C8130

0.1UF

10%
25V

2

X6S-CERM
0201

P1V2_DRVH_R

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

21

P1V2_DRVL_R

MIN_LINE_WIDTH=0.6000
GATE_NODE=TRUE

DIDT=TRUE

PP0V6_S0_DDRVTT

XW8105

SM

21

1

C8134

15UF

20%
2V

2

X6S
0402

1

C8136

15UF

20%
2V

2

X6S
0402

PVCCIO_BOOT_RC

1

R8147

2.2

5%
1/20W
MF
201

2

MIN_LINE_WIDTH=0.3000
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE

PP5V_G3S_VCCIOPVCC

1

C8143

10UF

20%
10V

2

X5R-CERM
0402-7

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

VOLTAGE=5V

PVCCIO_VBST

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

BOOT

UGATE

PHASE

LGATE

11

10

15

PVCCIO_DRVH

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

PVCCIO_LL

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE

PVCCIO_DRVL

MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.6000
DIDT=TRUE
GATE_NODE=TRUE

(PCHVCCIOS0_OCSET)

(PCHVCCIOS0_VO)

3

87 85 73 69 67 66 65 49 43

Q8100

CSD58873Q3D

Q3D

3

TG

4

TGR

5

BG

88 83 24

1

C8137

15UF

20%
2V

2

X6S
0402

C8144

0.1UF

20%
16V

X6S-CERM

0201

2.2

5%

1/20W

MF

201

1

2

R8145

PVCCIO_DRVL_R

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
GATE_NODE=TRUE

R8148

1

21

5%

1/20W

MF

201

U8112

74AUP2G17FZ4-55-COMBO

X2-DFN1410

52

4

PVCCIOS0_EN_FILT_BUF

PPBUS_HS_CPU

1

VIN

MIN_NECK_WIDTH=0.0910
MIN_LINE_WIDTH=0.0910

SWITCH_NODE=TRUE
DIDT=TRUE

NOSTUFF

1

10%
50V

X7R-CERM

2

0402

9

21

VSW

PGND

6
7
8

C8110

0.001UF

87 85 73 69 67 66 65 49 43

PVCCIO_DRVH_R

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000

1

R8146

1

5%
1/20W
MF
201

2

1

R8166

47K

5%
1/20W
MF
201

2

SWITCH_NODE=TRUEDIDT=TRUE

Q8102

CSD58889Q3D

3

TG

4

TGR

5

BG

Q3D

83 73 72 73

CRITICAL

1

C8109

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

1

C81A8

12PF

5%
25V

2

NP0-C0G
0201

1.0UH-20%-14A-0.0107OHM

L8100

P1V2_PHASE PP1V2_S3_REG_R

PIMB062D-SM

NOSTUFF

1

R8110

2.2

5%
1/10W
MF-LF
603

2

P1V2_LL_SNUB

DIDT=TRUE

SWITCH_NODE=TRUE

1

C8105

2

CRITICAL

1

C8100

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

1

C81A9

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

21

54 50

54 50

CRITICAL

330UF

20%

2.0V
POLY-TANT
CASE-B2-SM1

1

C8101

2.2UF

20%
25V

2

X6S-CERM
0402

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

ISNS_CPUDDR_P

OUT

ISNS_CPUDDR_N

OUT

CRITICAL

1

C8106

330UF

20%

2.0V

2

POLY-TANT
CASE-B2-SM1

TO BE PLACED AT THE OTHER SIDE OF MEMORY

R8141

10

5%
MF

201

21

P1V2_SNS_R

MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0910

P1V2_SNS

1/20W

PPBUS_HS_CPU

CRITICAL

1

C8151

2.2UF

20%
25V

2

X6S-CERM
0402

1

C81A1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

21

PP0V95_S0_CPUVCCIO_REG_R

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

VIN

VSW

PGND

9

NOSTUFF

C8120

0.001UF

10%
50V

X7R-CERM

0402

1

MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.6000
DIDT=TRUE

SWITCH_NODE=TRUE

6
7

PVCCIO_PHASE

8

1

R8116

2.2

5%
1/10W
MF-LF
603

2

DIDT=TRUE

0.68UH-20%-14.5A-0.009OHM

NOSTUFF

SWITCH_NODE=TRUE

PVCCIO_LL_SNUB

NO_XNET_CONNECTION=1

1

R8142

4.42K

1%
1/20W

1

MF

NO_XNET_CONNECTION=1

201

2

C8142

2

470PF

21

10%
16V

X5R-X7R-CERM

0201

1

C8152

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

1

C81A0

12PF

5%
25V

2

NP0-C0G
0201

L8102

PILA052D-SM

PVCCIOS0_CS_P

54

PVCCIOS0_CS_N

54

NO_XNET_CONNECTION=1

1

R8143

4.42K

1%
1/20W
MF
201

2

VCCIO EN BYPASS

73

PVCCIO_EN

0201 5%

NOSTUFF

R8165

0

2 1

MF 1/20W

PVCCIOS0_EN_FILT_BUF

BOM_COST_GROUP=PLATFORM_POWER

1

C8104

2.2UF

20%
25V

2

X6S-CERM
0402

R8118

0.002

1%

1/2W

MF

0306

2 1
4 3

CRITICAL

1

C8107

330UF

20%

2.0V

2

POLY-TANT
CASE-B2-SM1

88 83 74 73 50 23 22 21 20 19

1

C8150

2.2UF

20%
25V

2

X6S-CERM
0402

10

1%

1/20W

MF

201

1

2

R8171

1

C8112

10UF

20%
4V

2

X6S
0402

1

R8170

10

1%
1/20W
MF
201

2

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

1

2

CRITICAL

PP1V2_S3

CRITICAL

R8102

0.003

1%

1/2W

MF

0306

C81A2

12PF

5%
25V
NP0-C0G
0201

1

C81A3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

CRITICAL

1

C8113

10UF

20%
4V

2

X6S
0402

CRITICAL

1

C8108

220UF

20%
2V

2

ELEC
SM

128S00041

21

PPVCCIO_S0_CPU

43

CRITICAL

1

C8174

10UF

20%
4V

2

X6S
0402

1

C81A6

12PF

5%
25V

2

NP0-C0G
0201

ISNS_CPUVCCIO_N

ISNS_CPUVCCIO_P

VR VDDQ VCCIO

Apple Inc.

Vout = 1.2V

7.0A MAX OUTPUT
F = 400 KHZ

PP1V2_S3

1

C81A4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PLACE_NEAR=C8107.1:1mm

2

XW8110

SM

1

Vout = 0.95V
IccMax = 3.6A
F = 600kHz

87 83 9 7 4

CRITICAL

1

C8175

10UF

20%
4V

2

X6S
0402

1

C81A7

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

50

OUT

50

OUT

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

81 OF 500

SHEET

73 OF 98

D

88 83 74 73 50 23 22 21 20 19

C

B

A

SIZE

D

8

67

35 4

2

1

3.3V G3 Standby Switch

678

3 245

1

D

72 71 63 61 57 54 50 29 28 27

10%
10V
X7R
201

1

2

C8200

4700PF

89 86 83 76 74

83 72

IN

PP3V3_G3H_RTC

BYPASS=U8200::5mm

1

C8201

1

VDD

U8200

0.1UF

10%
10V

2

X5R-CERM
0201

SLG5AP1445V

P3V3G3S_SS
P3V3G3S_EN PP3V3_G3S

1

R8200

47K

5%
1/20W
MF
201

2

CAP

ON S

TDFN8

GND

8

Part
R(on)

@ 3.6V

37

D

52

PP3V3_G3H_RTC

EDC: 1.7A

SLG5AP1445V

7.8 mOhm Typ

8.5 mOhm Max

Current 4A Max

1.8V G3 Standby Switch

72 71 63 61 57 54 50 29 28 27

89 86 83 76 74

72 71 63 61 57 54 50 29 28 27

83 76 75 62 57 51 50 45

C8220

4700PF

89 86 83 76 74

1

10%
10V

2

X7R
201

89 83 74 72

PP3V3_G3H_RTC

P1V8G3S_SS

IN

P1V8G3S_EN

1

R8220

47K

5%
1/20W
MF
201

2

NOSTUFF

1

VDD

U8220

SLG5AP1445V

CAP

ON S

TDFN8

GND

8

Part
R(on)

Current

BYPASS=U8220::5mm

1

C8221

0.1UF

10%
10V

2

X5R-CERM
0201

37

D

52

PP1V8_SLPS2R
PP1V8_G3S_REG

29
70 81

51

60 47 44 43 42 40 34 28 27
89 86 83 74 72 71 64 63

D

EDC: 250mA

PP3V3_G3H_RTC

1

R8251

100K

5%
1/20W
MF
201

2

58 57 55 51 48 47 45 44 43 18

76

83 68 62 61 60 59

P1V8G3S_DSCHG_EN

PP1V8_G3S

R8252

21

10

1%
1/16W
MF-LF

402

P1V8G3S_DSCHG_PATH

SLG5AP1445V

7.8 mOhm Typ

8.5 mOhm Max@ 3.6V
4A Max

72 71 63 61 57 54 50 29 28 27

89 86 83 76 74

C

32 18 17 16 15 14 13 12 11 7

83 73 72 70 69 65 53 47 42

72

83 73 71 12

PP1V8_S5

PVCCPLLOC_EN

IN

CPU_C10_GATE_L

IN

BYPASS=U8208::3MM

C8208

0.1UF

10%

6.3V

CERM-X5R

0201

6

CRITICAL

Q8251

SSM6N15AFEAP

SOT563

D

VER-1

2

1

GS

1

C8251

47PF

2%
50V

2

NP0-C0G
0201

3

D

CRITICAL

Q8251

VER-1

5

4

GS

SSM6N15AFEAP

SOT563

NOSTUFF

R8250

0

89 83 74 72

IN

1.2V S0SW VCCPLL_OC Switch

47 43 42 18 14 13 12 11 7 5 4

89 83 73 71 69

U8208

74AUP1G08GF

6

SOT891

VCC

2

A Y

AND

1

B

5

1

NC

2

NC

GND

3

4

P1V2S0SW_FET_EN

1

R8208

100K

5%
1/20W
MF
201

2

PP3V3_S5

C8206

100PF

5%
25V
C0G

0201

BYPASS=U8207::2MM

C8207

0.1UF

CERM-X5R

P1V2S0SW_RAMP

1

2

10%

6.3V
0201

1

1

2

VDD

U8207

SLG5AP1635V

CAP

ON

STDFN

CRITICAL

GND

8

37

D

52

S

PP1V2_S3

BYPASS=U8207::4MM

1

C8209

1.0UF

20%

6.3V

2

X5R
0201-1

PP1V2_S0SW

88 83 73 50 23 22 21 20 19

83 9 7

EDC: 120mA

P1V8G3S_EN

1/20W

86 83 68 63 54 52

83 74 50 49

21

5%
MF

0201

PP3V3_G3H

72

P1V8G3S_DSCHG_EN_L

3.3V Sensor Switch

IN

SENSOR_PWR_EN

C8250

1.0UF

0201-1

20%

6.3V
X5R

C

U8250

SLG5AP1569V

STDFN

2

1

1

2

CRITICAL

VIN

ON

GND

4

PP3V3_S4SW_SNS

VOUT

3

Part SLGAP1569V

Type

R(on)
@ 3.6V

Load Switch

34 mOhm Typ
46 mOhm Max

54 52 51 50 49

EDC: 3mA

B

A

29 28 26 25

72

IN

PP3V3_TBT_X_SX

TBT_PWR_EN

60 47 44 43 42 40 34 29 28 27

86 83 81 74 72 71 70 64 63

89

R8290

33

21

PP3V3_TBT_X_SX_R

MF1/20W 2015%

PP1V8_SLPS2R

NOSTUFF

C8290

1UF

10%
10V
X5R

402-1

Part
Type
R(on)

@ 3.3V
Current

SLG5AP1635V
Load Switch

27.5 mOhm Typ
31 mOhm Max

2.5A Max

VCCPLL_OC has turn-on requirement of
11uS min and 240uS max
from EN to 1.1V

86 83 76 73 69 67 66 65

Current

5V Sensor Switch

PP5V_G3S_CPUREG_MISC

51

1

VDD

U8213

LOADISNS

C8213

1A Max

1.0UF

20%

6.3V
X5R

0201-1

1

2

B

SLG5AP1443V

37

D

52

PP5V_S4SWSENSOR_PWR_EN

Part

Type

R(on)

Current

SLG5AP1443V

Load Switch

17 mOhm Typ
19 mOhm Max

2.5A

POWER FETS

52 47

EDC: 8.5mA

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

PAGE

82 OF 500

SHEET

74 OF 98

pvt

SYNC_DATE=SYNC_MASTER=

SIZE

D

A

72 71 63 61 57 54 50 29 28 27

89 86 83 76 74

3.3V S0SW TBT X Switch

PP3V3_G3H_RTC

LOADISNS

C8223

2200PF

10%
10V

X7R-CERM

0201

P5V_S4SW_SNS_FET_RAMP

83 74 72 50 49

1

2

IN

CAP

ON S

TDFN

CRITICAL
LOADISNS

GND

8

NOSTUFF

R8295

0

1

1/20W

2

1

B

2

5

4

Y

A

3

U8291

74LVC1G08GW

SOT353

NOSTUFF

R8293

0

21

5%

1/20W

MF

0201

P3V3TBT_X_RAMP

5%

1/20W

MF

201

1

2

R8292

100K

P3V3TBT_X_RAMP

74

TBT_X_PWR_EN_1V8

C8294

4700PF

5%
MF

0201

21

10%
10V
X7R
201

U8290

SLG5AP1756V

7

CAP

ON

1

1

2

CMP

TDFN

CRITICAL

GND

8

3

D

52

S

C8292

1UF

402-1

PP3V3_S0_TBT_X_ISNS_R

R8291

0

21

5%

1/20W

MF

0201

10%
10V
X5R

1

2

PART
Type
R(on)

@ 4A
Current

51

U8250

SLG5AP1756V
Load Switch

7.8 mOhm Typ

9.6 mOhm Max
4A Max

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=PLATFORM_POWER

IV ALL RIGHTS RESERVED

Apple Inc.

8

67

35 4

2

1

678

3 245

1

D

C

B

Page Notes

Power aliases required by this page:

- =PPVIN_S0SW_LCDBKLTFET (9-12.6V LCD BACKLIGHT INPUT)

- =PP5V_S0_BKLT (5V BACKLIGHT DRIVER INPUT)

740S0159

CRITICAL

F8400

3AMP-32V

87 86 83 72 64 62 49

PLATFORM_RESET NO LONGER GATES THE BKLT_EN AS BOTH COME FROM PCH NOW

54 52 51 50 46 29 28

86 83 75 68 55

75

PP5V_S0_BKLT_A

PPBUS_G3H

83 34

PP5V_G3S

0603-COMBO

SOC_KBD_BKLT_PWM_R

TP

P2MM

SM

1

PP

PPC84A

P2MM

SM

1

PP

PPC841

P2MM

SM

1

PP

PPC843

54 49

54 49

21

PPVIN_S0SW_LCDBKLT_F

75

ISNS_LCDBKLT_P

OUT

ISNS_LCDBKLT_N

OUT

83 76 74 62 57 51 50 45

R8455

0

5%

1/20W

MF

0201

75 68 55 54 52 51 50 46 29 28

86 83

I2C ID DEDICATED.ONLY CONNECTS TO JERRY

107S00034

R8400

2 1
4 3

83 4

IN

PLACE_NEAR=U8472.6:5MM

21

SOC_KBD_BKLT_PWM

PP5V_G3S

76

76

IN

BI

I2C_BKLT_SCLLCDBKLT_FB

I2C_BKLT_SDA

0.025

1%
1W
MF

0612-1

75

EDP_BKLT_EN

PP3V3_G3S

1

R8481

100K

1%
1/20W
MF
201

2

GND_BKLT_SGND

75

FDC638APZ_SBMS001

PPVIN_S0SW_LCDBKLT_R

1

C8400

1000PF

10%
16V

2

X7R-1
0201

1

R8401

80.6K

1%
1/16W
MF-LF
402

2

1

R8402

63.4K

1%
1/16W
MF-LF
402

2

1

2

75 75

R8440

1M

5%
1/20W
MF
201

R8442

0

21

5%

1/20W

MF

0201

GND_BKLT_SGND

75

C8483

1

16V

2

X5R-CERM

0201

1

R8452

1.8K

5%
1/20W
MF
201

2

0.1UF

10%

1

2

1

R8453

1.8K

5%
1/20W
MF
201

2

U8472

74AUP1T97GM

5

SOT886

4

6

3

PLACE_NEAR=U8400.15:10MM

R8451

0

5%

1/20W

MF

PLACE_NEAR=U8400.16:10MM

0201

CRITICAL

Q8400

SSOT6-HF

4

3

LCDBKLT_EN_L

55 54 52 51 50 46 29 28

86 83 75 68

6
5
2
1

R8444

PLACE_NEAR=U8400.5:5MM

GND_BKLT_SGND

BKLT_SD

75

BKLT_SENSE_OUT

BKLT_EN_R

1

C8442

33PF

5%
25V

2

NPO-C0G
0201

NO STUFF

BKLT_PWM_KEYB_3V3

1

R8480

100K

1%
1/20W
MF
201

2

C8440

4.7UF

R8450

0

21

5%

1/20W

MF

0201

21

BKLT_SCL

BKLT_SDA

NOSTUFF

1

C8401

0.001UF

10%
50V

2

CERM
402

PP5V_G3S

1

10

5%
1/16W
MF-LF

402

2

1

20%
25V

2

X5R

0402

PPVIN_S0SW_LCDBKLT

83 75

MIN_LINE_WIDTH=0.1500
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V
MAKE_BASE=TRUE

1

R8445

10

5%
1/16W
MF-LF
402

2

PP5V_S0_BKLT_A

75

PP5V_S0_BKLT_D

75

1

C8441

PLACE_NEAR=U8400.18:5MM

4.7UF

20%
25V

2

X5R
0402

U8400

LP8548B1SQ_-04

11

SD

9

VSENSE_N

10

VSENSE_P

19

SENSE_OUT

17

EN

12

PWM_KEYB

15

SCL

(IPU)

16

SDA

(IPU)

CRITICAL

GND_SW

GND_SW

24

23

XW8400

5

18

VDDA

VDDD

LLP

ISET_KEYB

GNDD

GND_SW2

3

7

22

SM

2

LCDBKLT_SW

75

SW

1

SW

21

LCDBKLT_FB

4

LCDBKLT_FET_DRV

20

BKLT_ISET_KEYB

13

BKLT_KEYB1

14

BKLT_KEYB2

6

KBDBKLT_SW2

8

PPVOUT_BKLT_FB2

KEYB1
KEYB2

THRM

GNDA

PAD

21

75

FB
GD

SW2

75

FB2

75

25

GND_BKLT_SGND

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0V

85 83 52

PP5V_G3S_KBD

PLACE_NEAR=L8410.1:5MM

PLACE_NEAR=L8410.1:5MM

PLACE_NEAR=L8410.1:5MM

1

C8410

4.7UF

10%
25V

2

X6S-CERM
0603

PLACEMENT_NOTE:

SANDWICH C8210 AND C8211

SANDWICH C8210 AND C8211

1

C8411

4.7UF

10%
25V

2

X6S-CERM
0603

LCDBKLT_FET_DRV_R

DIDT=TRUE

SWITCH_NODE=TRUE

VOLTAGE=55V
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=2.0000

402 1%MF-LF101/16W

1%

1/20W

MF

201

1

2

R8454

31.6K

1

C8452

2.2UF

10%

2

25V
X5R-CERM
603

75

1

C8450

0.1UF

10%

2

16V
X5R-CERM
0201

PLACE_NEAR=Q8401.5:3MM

CRITICAL

L8410

15UH-20%-1.9A-0.24OHM

21

PIME062D-SM

152S00253

1

C8412

0.1UF

10%
25V

2

X5R
402

DIDT=TRUE

GATE_NODE=TRUE

4

1

R8433

10

1%
1/16W
MF-LF
402

2

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V

GATE_NODE=TRUE

75

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2500

SWITCH_NODE=TRUE

DIDT=TRUE

DIDT=TRUE

R8435

21

402

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000

VOLTAGE=40V

L8450

10UH-20%-1.4A-0.17OHM

21

PST041H-SM

1

C8451

2.2UF

10%

2

25V
X5R-CERM
603

PLACE_NEAR=L8410.2:3MM

371S00180 (Combo)

POWERDI123-COMBO

DESENSE

1

C8476

12PF

5%
100V

2

C0G
0201

DIDT=TRUE

SWITCH_NODE=TRUE

PPVIN_SW_LCDBKLT_SW

75

5

CRITICAL

Q8401

SI7812DN

PWRPK-1212-8

PLACE_NEAR=U8400.1:3MM

321

10

1%1/16WMF-LF

NO STUFF

R8436

21

1

C8495

12PF

5%
100V

2

C0G
0201

CRITICAL

D8410

KA

DFLS2100

PLACE_NEAR=D8410::2MM

PP_KBDLED_CATHODE1
PP_KBDLED_CATHODE2

XW8450

D8450

SOD123W

KA

PMEG6010ER/S500

86 83 75

2

XW8410

2

SM

PLACE_NEAR=C8458.1:10MM

1

1

2

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200

VOLTAGE=40V

1

C8453

2.2UF

10%

2

50V
X5R
0603

1

C8456

2.2UF

10%
50V

2

X5R
0603

SM

1

1

R8431

LCDBKLT_TB_XWR

18.2K

1%
1/16W
MF-LF
402

2

83

PPVOUT_S0_KBDLED_R

C8458

2.2UF

10%
50V
X5R
0603

1

C8454

2

1

2

PPVOUT_S0_LCDBKLT_F

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

1

C8460

2.2UF

10%
100V

2

X5R
1206

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

1

C8465

2.2UF

10%
100V

2

X5R
1206

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

PLACE_NEAR=D8410.K:5MM

1

C8470

2.2UF

10%
100V

2

X5R
1206

1

2

1

2

1

2

NOSTUFF

1

1

R8432

150K

1%
1/16W
MF-LF
402

2

1

C8459

2.2UF

10%

2

50V
X5R
0603

2.2UF

10%
50V
X5R
0603

C8457

2.2UF

10%
50V
X5R
0603

83 75

86 83

C8455

1

2

DESENSE

1

C8490

12PF

5%
100V

2

CERM

1

C8493

2.2UF

10%

2

50V
X5R
0603

0.001UF

10%
50V
X7R-CERM
0402

C8430

100PF

5%
100V

2

C0G-CERM
0603

PPVOUT_S0_KBDLED

MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.2000

VOLTAGE=40V

C8461

2.2UF

10%
100V
X5R
1206

C8466

2.2UF

10%
100V
X5R
1206

C8471

2.2UF

10%
100V
X5R
1206

R8446

1/16W
MF-LF

DESENSE

1

C8491

12PF

5%
100V

2

CERM
04020402

1

C8494

2.2UF

10%

2

50V
X5R
0603

OMIT_TABLE

L8420

47-OHM-25%-300MA

0402

CRITICAL

1

C8462

2.2UF

10%
100V

2

X5R
1206

1

C8467

2.2UF

10%
100V

2

X5R
1206

1

C8472

2.2UF

10%
100V

2

X5R
1206

0

21

5%

402

PP_KBDLED_CATHODE2_R

DESENSE

21

PPVOUT_S0_LCDBKLT

1

C8463

2.2UF

10%
100V

2

X5R
1206

1

C8468

2.2UF

10%
100V

2

X5R
1206

1

C8473

2.2UF

10%
100V

2

X5R
1206

1

C8464

2.2UF

10%
100V

2

X5R
1206

1

C8469

2.2UF

10%
100V

2

X5R
1206

1

2

J79 DISPLAY

Vout = 46V Typ, 55V Max
Iout = 0.12A Typ, 0.15A Max
Fs = 625kHz Typ (+/- 7%)

TOP VIEW RIGHT_FLEX

PP_KBDLED_CATHODE1_R

30

TOP VIEW MIDDLE_FLEX

PP_KBDLED_CATHODE1

83 75

PP_KBDLED_CATHODE2

83 75

TOP VIEW LEFT_FLEX

DESENSE

C8474

12PF

5%
100V
C0G
0201

FF14A-10C-R11DL-B-3H

86 83 76 75

DESENSE

1

C8475

12PF

5%
100V

2

C0G
0201

FF14A-6C-R11DL-B-3H

NC
NC

J8400

F-RT-SM

7

1
2
3
4
5
6

8

J8402

F-RT-SM1

11

1
2

NC

NC

FF14A-6C-R11DL-B-3H

NC
NC

3
4
5
6
7
8
9

10

12

J8401

F-RT-SM

7

1
2
3
4
5
6

D

C

B

A

KBDBKLT_SW2

75

PPVOUT_BKLT_FB2

BKLT_ISET_KEYB

LCDBKLT_SW

75

8

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC845

PPC846

PPC847

PPC849

LINE WIDTHS

PP5V_S0_BKLT_A

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=5V

PP5V_S0_BKLT_D

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=5V

BKLT_SD

MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000

75

75

75

PBUS LINE WIDTHS

PPVIN_S0SW_LCDBKLT_F

MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V

PPVIN_S0SW_LCDBKLT_R

MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V

PPVIN_S0SW_LCDBKLT

MIN_LINE_WIDTH=0.1500
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V

75

75

83 75

LCDBKLT_FET_DRV_R

MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V

GATE_NODE=TRUE

DIDT=TRUE

67

LCD BKLT LINE WIDTHS

75

PPVIN_SW_LCDBKLT_SW

MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=55V

SWITCH_NODE=TRUE

PPVOUT_S0_LCDBKLT

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1500
VOLTAGE=55V

I311

PPVOUT_S0_LCDBKLT_F

MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1500
VOLTAGE=55V

DIDT=TRUE

75

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

LCD BACKLIGHT DRIVER

86 83 76 75

Apple Inc.

86 83 75

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DISPLAY

35 4

IV ALL RIGHTS RESERVED

2

8

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

84 OF 500

SHEET

75 OF 98

1

A

SIZE

D

678

3 245

1

D

PP3V3_G3H_RTC

27 28 29 50 54 57 61 63 71 72
74 76 83 86 89

1

R8570

100K

5%
1/20W
MF
201

2

1

R8571

100K

5%
1/20W
MF
201

2

1

U8510

VDD

SLG4AP4998

NC0
NC1

3

912

6

10

5
11

4 83

IN

EDP_PANEL_PWR_EN
PM_SLP_TIEOFF
SMCRST_TIEOFF

2

EDP_PANEL_PWR_EN

4 8

PM_SLP_S3_L

SMC_RESET_INPUT_L

STQFN

PANEL_FET_EN_DLY

PANEL_PWR_EN_CONN

SMC_RESET_OUTPUT_L

X604_DISP_PWR_EN

X604_DISP_SMC_RST_L

GND

7

BYPASS=U8510::3MM

1

C8570

0.1UF

10%
10V

2

X5R-CERM
0201

EDP_PANEL_PWR_DLY_EN
EDP_PANEL_PWR_BUF_EN

NC

NC

NC

NC
NC

76 83

R8515

150K

1/20W

5%
MF

201

21

R8517

330

5%

201

1/20W

MF

R8516

200K

1/20W

1%
MF

201

21

R8518

330

5% 201
1/20W

MF

PANEL_P5V_EN

21

PANEL_P5V_EN_D

PANEL_P3V3_EN

21

PANEL_P3V3_EN_D

LCD_PWR_SLEW

D8517

LGA

KA

RB522ES-30

LCD_PWR_SLEW_3V3

D8518

LGA

K A

RB522ES-30

1

C8515

0.1UF

10%
10V

2

X5R-CERM
0201

83

1

2

PP5V_G3S_CPUREG_MISC

51 65 66 67 69 73 74 76 83 86

CRITICAL

CAP

ON S

1

C8509

2200PF

10%
10V

2

X7R-CERM
0201

PP3V3_G3H_RTC

27 28 29 50 54 57 61 63 71 72
74 76 86 89

CRITICAL

CAP

ON S

C8516

0.47UF

10%

6.3V
CERM-X5R
0201

1

C8513

2200PF

10%
10V

2

X7R-CERM
0201

1

VDD

U8500

SLG5AP1443V

TDFN

GND

8

1

VDD

U8501

SLG5AP1443V

TDFN

GND

8

1

C8517

0.1UF

10%
10V

2

X5R-CERM
0201

37

D

52

1

C8511

0.1UF 10UF

10%
10V

2

X5R-CERM
0201

1

2

37

D

52

C8510

1.0UF

X5R

0201-1

1

C8518

0.1UF

10%
10V

2

X5R-CERM
0201

6.3V20%

1

C8512

20%
10V

2

X5R-CERM
0402-7

1

C8519

10UF

20%
10V

2

X5R-CERM
0402-7

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

ISNS_PP5V_LCD_P

54

ISNS_PP5V_LCD_N

54

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

54

ISNS_LCDPANEL_P

51

ISNS_LCDPANEL_N

51 54

R8520

0306-SHORT

OMIT

R8521

0.005

1/3W

0306-SHORT

OMIT

0.005

1%

1/3W

MF

1%
MF

NO_XNET_CONNECTION=1

21
43

NO_XNET_CONNECTION=1

21
43

PP5V_S0SW_LCDPP5V_S0SW_LCD_R

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

PP3V3_S0SW_LCDPP3V3_S0SW_LCD_R

MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000

76 83 88

D

47 83 88

C

B

A

PP3V3_G3S

45 50 51 57 62 74 75 83

HOST SIDE

CKPLUS_WAIVE=CLK_DATA_CON

36 84

36 84

36 84

36 84

48

48

60

OUT

OUT

OUT

OUT

BI

PP8500

BI

PP8501

IN

MIPI_FTCAM_DATA_N<0>

CKPLUS_WAIVE=CLK_DATA_CON

MIPI_FTCAM_DATA_P<0>

CKPLUS_WAIVE=CLK_DATA_CON

MIPI_FTCAM_CLK_N

CKPLUS_WAIVE=CLK_DATA_CON

MIPI_FTCAM_CLK_P

I2C_FTCAM_SDA_R

1

PP

SM-SP

I2C_FTCAM_SCL_R

1

PP

SM-SP

SEP_CAM_DISABLE_DFF_L

BYPASS=U8502::5MM

1

C8502

0.1UF

10%
10V

2

X5R-CERM
0201

CKPLUS_WAIVE=NDIFPR_BADTERM

CKPLUS_WAIVE=PDIFPR_BADTERM

CKPLUS_WAIVE=NDIFPR_BADTERM

CKPLUS_WAIVE=PDIFPR_BADTERM

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

11

CRITICAL

NX3DV642GU

CLK+

1

CLK-

2

1D+

3

1D-

4

2D+

5

2D-

6

8

OE*

S

10

VCC

U8502

QFN-COMBO

CONTROL

LOGIC

CLK1+

CLK2+
CLK1-

CLK2-

1D1+

1D2+
1D1-

1D2­2D1+

2D2+
2D1-

2D2-

NC
NC

Camera Secure Disable

SIGNAL_MODEL=CAM_MUX

Alternate: OnSemi FSA642 (353S01346)

17

CKPLUS_WAIVE=CLK_DATA_CON

22

GND_VOID=TRUE
CKPLUS_WAIVE=NDIFPR_BADTERM

16

23

GND_VOID=TRUE
CKPLUS_WAIVE=PDIFPR_BADTERM

15

20

GND_VOID=TRUE
CKPLUS_WAIVE=NDIFPR_BADTERM

14

21

GND_VOID=TRUE
CKPLUS_WAIVE=PDIFPR_BADTERM

13

19

12

18

7
24

MIPI_FTCAM_DATA_ISOL_N

CKPLUS_WAIVE=CLK_DATA_CON

MIPI_FTCAM_DATA_ISOL_P

CKPLUS_WAIVE=CLK_DATA_CON

MIPI_FTCAM_CLK_ISOL_N

CKPLUS_WAIVE=CLK_DATA_CON

MIPI_FTCAM_CLK_ISOL_P

I2C_FTCAM_DSBL_SDA

I2C_FTCAM_ISOL_SDA

I2C_FTCAM_DSBL_SCL

I2C_FTCAM_ISOL_SCL

NC
NC

1

R8505

100K

5%
1/20W
MF
201

2

I2C PULL VALUES TO BE DETERMINED FROM CHARACTERIZATION

1

R8507

100K

5%
1/20W
MF
201

2

1

R8506

100K

5%
1/20W
MF
201

2

LCM EDP AUX STRAPPING

PLACE_NEAR=J8500:19MM

L8503

TAM0605-4SM

SYM_VER-1

1

L8502

TAM0605-4SM

SYM_VER-1

1

76

76

GND_VOID=TRUE

4

GND_VOID=TRUE

32

GND_VOID=TRUE

4

GND_VOID=TRUE

32

18 43 44 45 47 48 51 55 57 58
59 60 61 62 68 74 83

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

GND_VOID=TRUE

PLACE_NEAR=J8500:19MM

PP1V8_G3S

1

R8508

100K

5%
1/20W
MF
201

2

3.25-OHM-0.1A-2.4GHZ

3.25-OHM-0.1A-2.4GHZ

C

83 86

NOSTUFF

1

R8503

1M

5%
1/20W
MF
201

2

4

BI

4

BI

EDP_AUXCH_N
EDP_AUXCH_P

NOSTUFF

1

R8502

1M

5%
1/20W
MF
201

2

4

IN

4

IN

4

IN

4

IN

4

IN

4

IN

4

IN

4

IN

EDP_ML_N<0>
EDP_ML_P<0>

EDP_ML_N<1>
EDP_ML_P<1>

EDP_ML_N<2>
EDP_ML_P<2>

EDP_ML_N<3>
EDP_ML_P<3>

MIPI_FTCAM_DATA_ISOL_FILT_CONN_N
MIPI_FTCAM_DATA_ISOL_FILT_CONN_P

MIPI_FTCAM_CLK_ISOL_FILT_CONN_N
MIPI_FTCAM_CLK_ISOL_FILT_CONN_P

PPVOUT_S0_LCDBKLT

75

PP5V_S0SW_LCD

76 83 88

C8500

1000PF

10%

100V

X7R-CERM

0603

GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE
GND_VOID=TRUE

GND_VOID=TRUE

1

2

516S00266

J8500

20759-042E-02

F-ST-SM

PWR

SIGNAL

PWR

GND

4443

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241

4645

4847
5049
5251
5453
5655
5857
6059
6261
6463
6665
6867

EDP_PANEL_PWR_BUF_EN

DP_INT_HPD

TP_LCD_IRQ_L

NC_TP_TCON_BKLT_PWM

EDP_BKLT_PWM

I2C_BKLT_SDA
I2C_BKLT_SCL
I2C_DISP_3V3_SDA
I2C_DISP_3V3_SCL

CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP

I2C_ALS_SDA_R
I2C_ALS_SCL_R
I2C_FTCAM_ISOL_SCL
I2C_FTCAM_ISOL_SDA

88

PP5V_G3S_ALSCAM

1

C8504

0.1UF

10%
10V

2

X5R-CERM
0201

PAGE TITLE

76 83

43 83

OUT

83

4 83

IN

1

2

47

47

1

48

BI

2

76

76

IN

48

L8504

FERR-120-OHM-1.5A

21

PP5V_G3S_CPUREG_MISC

0402A

NOSTUFF

C8531

12PF

5%
25V
NP0-C0G
0201

NOSTUFF

C8532

12PF

5%
25V
NP0-C0G
0201

75

75

83 86
51 65 66 67
69 73 74 76

B

A

SYNC_DATE=SYNC_MASTER=

VALUE STATE

L Camera Disable
H Camera Enable

8

GND

9

LCM INTERFACE (EDP) + CAMERA (MIPI)

67

EDP DISPLAY CONNECTOR

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DISPLAY

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

85 OF 500

SHEET

76 OF 98

1

SIZE

D

678

3 245

1

EXTERNAL VREF

D

C

85 83 81 80 79 78 77

PP1V8_IO_SSD0

NOSTUFF

1

R8602

47K

1%
1/20W
MF
201

2

81 80 79 78

83 82

1

R8603

47K

1%
1/20W
MF
201

2

82 80 79 78

82 80 79 78

82 80 79 78 34

82 80 79 78

82

78 43 37

80 79

79 78 35

82 80

79 78 35

82 80

78

82

85 83 81 80 79 78 77 85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77

SSD0_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E0_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E0_SWD_UID1
SSD0_S4E0_UART_TX
SSD0_OCARINA_PFN_L

SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E0_JTAG_TDO
SSD0_S4E0_JTAG_TDI

NOSTUFF

1

R8630

0

5%
1/20W
MF
201

2

S4E0

PP1V8_IO_SSD0 PP0V9_SSD0
PPVCCQ_ANI_SSD0
PP2V5_NAND_SSD0

PP0V9_SSD0_S4E0_VDD_PLL

77

PP_SSD0_S4E0_VPP

B3

EXT_D0/BOOT0

C4

EXT_D1/BOOT1

B5

EXT_D2/BOOT2/SPINAND_SCLK

C6

EXT_D3/SWD_UID0/SPINAND_MISO

B7

EXT_D4/UART_RX

C8

EXT_D5/SWD_UID1/SPINAND_MOSI

B9

EXT_D6/UART_TX

B11

EXT_D7/SPF

E8

EXT_NCE/PERST*

D7

EXT_NRE/JTAG_TMS

E6

EXT_NWE/JTAG_TCK

E4

EXT_RNB/JTAG_TDO

D5

EXT_CLE/JTAG_TDI

F3

VPP

R2

VDD_PLL

L12G4E12

VCC

P9N2E10E2T5K9J2R4R8R6L8L6G8

D3

VDDIO_2/NAND

VDDIO_1/GPIO

U8600

NAND-S4E-S5E-MCP-STUDY-COMBO

LGA

OMIT_TABLE

VDD

J4

G6

ANI1_VREF

SSD0_S4E0_ANI1_VREF
SSD0_S4E0_ANI0_VREF

PP1V8_SSD0_S4E0_AVDD18_PLL
PP1V8_SSD0_S4E0_PCI_AVDD_H

PP0V9_SSD0

J8

L2

G12

ANI0_VREF

PCI_VDD_2

AVDD18_PLL

N8H7J6

PCI_VDD_1

M9

N6

PCI_AVDD_H

PCI_AVDD_CLK_1

PCI_AVDD_CLK_2

CLK_IN

PCIE_REFCLK_P
PCIE_REFCLK_M

PCIE_CLKREQ_N

PCI_RESREF

PCIE_RX0_P
PCIE_RX0_M

PCIE_TX0_P
PCIE_TX0_M

83 77

83 77

M3

K11
J12

P5

M11
N12

R12
T11

77

77

85 83 82 81 80 79 78 77 70

SSD0_CLK24M_01

78

PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_01_N

SSD0_CLKREQ0_L
SSD0_S4E0_PCIE_RESREF
PCIE_SSD0_R2D_P<0>

PCIE_SSD0_R2D_N<0>

PCIE_SSD0_D2R_C_P<0>

PCIE_SSD0_D2R_C_N<0>

83 77

R8680

SSD0_S4E0_ANI1_VREF

NOSTUFF

0

5%

1/20W

MF

0201

1

2

NOSTUFF

21

1

2

NOSTUFF

PPVCCQ_ANI_SSD0

R8681

2K

1%
1/20W
MF
201

1

R8682

2K

1%
1/20W
MF
201

C8682

0.01UF

10%
10V

2

X7R
0201-1

NOSTUFF

1

C8681

0.01UF

10%
10V

2

X7R
0201-1

NOSTUFF

SSD0_S4E0_ANI0_VREF

85 83 82 81 80 79 78 77 70

83 77

D

R8633

49.9

2 1

1%

84 78 37

84 78 37

43 37

C8603
C8604

C8601
C8602

0.22UF

0.22UF

0.22UF

0.22UF

1/20W

MF

201

2 1

2 1

2 1

2 1

SSD0_CLK24M

79 43

PCIE_SSD0_R2D_C_P<0>

6.3V 10%0201

X5R-CERM

PCIE_SSD0_R2D_C_N<0>

10%0201 6.3V

X5R-CERM

PCIE_SSD0_D2R_P<0>

6.3V

10%0201 X5R-CERM

PCIE_SSD0_D2R_N<0>

X5R-CERM10%0201 6.3V

84 37

84 37

37

37

1

R8604

3.01K

1%
1/20W
MF
201

2

NOSTUFF

1

C8685

10PF

5%

2

25V
C0G
0201

C

1

R8620

100K

1%
1/20W
MF

2

201

1

R8608

100K

1%
1/20W
MF
201

2

80 79 78

80 79 78

83 82

1

R8609

100K

1%
1/20W
MF
201

2

SSD0_S4E_JTAG_SEL

82

SSD0_S4E0_DROOP_L
SSD0_WP_L

D9

EXT_ALE/JTAG_SEL

T3

DROOP_N

G2

WP_N

U8U6U4

U12

U10

U2

T9T7T1

T13

R10

P13

P7P3P1

P11

N10N4M13

M7M5M1

L10

K7K5K1

K13

VSS

J10

H13

H9H5H3

H11

H1

F13

F9F7F5

F11

F1

D13

D11D1C12C2B13B1A12

A8A6A4

A10

RESET*

TRST*

ZQ_C
ZQ_N

A2

L4

G10

K3
C10

SSD0_RESET_L
SSD0_S4E_JTAG_TRST_L
SSD0_S4E0_ZQ_C

SSD0_S4E0_ZQ_L

1

2

PLACE_NEAR=U8600.C10:15MM

82 80 79 78

R8605

300

1%
1/20W
MF
201

PLACE_NEAR=U8600.K3:15MM

1

R8606

100

1%
1/20W
MF
201

2

1

R8600

100K

1%
1/20W
MF
201

2

80 79 78

B

85 83 82 81 80 79 78 77 70

S4E VDD

PP0V9_SSD0

1

C8610

20UF

20%

2

10V
X5R
0402

1

C8616

20UF

20%

2

10V
X5R
0402

1

C8611

2.2UF

20%

2

6.3V
CER-X5R
0201

1

C8612

2.2UF

20%

2

6.3V
CER-X5R
0201

VCC CAP

1

C8613

0.1UF

10%

2

16V
X5R-CERM
0201

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

1

C8614

0.1UF

10%

2

16V
X5R-CERM
0201

1

C8615

0.1UF

10%

2

16V
X5R-CERM
0201

PP1V8_IO_SSD0

S4E VDDIO_2

PPVCCQ_ANI_SSD0

4.3UF

20%

4V

1

C8632

10UF

20%

2

10V
X5R-CERM
0402-0.1MM-1

5%

1/20W

R8610

0

21

0201

MF

CERM
0402

432

PP1V8_SSD0_S4E0_PCI_AVDD_H

1

C8644

0.1UF

10%

2

16V
X5R-CERM
0201

B

R8683

0

85 83 82 81 80 79 78 77 70

1

1

C8636

1

2

C8645

C8637

2

4UF

20%

6.3V
CER-X5R
0201

2.2UF

20%

6.3V
CER-X5R
0201

77

PP0V9_SSD0

5%

1/20W

1

C8683

4UF

20%

2

6.3V
CER-X5R
0201

PLACE_NEAR=R8683.1:10MM

21

MF

0201

S4E VDDIO_1

PP0V9_SSD0_S4E0_VDD_PLL

77

A

85 83 82 81 80 79 78 77

8

PP2V5_NAND_SSD0

1

C8651

1

20UF

20%

2

10V
X5R
0402

C8648

10UF

20%
10V

2

X5R-CERM
0402-0.1MM-1

1

C8649

2.2UF

20%

2

6.3V
CER-X5R
0201

1

C8650

2.2UF

20%

6.3V

2

CER-X5R
0201

85 83 81 80 79 78 77

R8611

5%

1/20W

0

21

MF

0201

PP1V8_SSD0_S4E0_AVDD18_PLL

1

C8646

0.1UF

10%

2

16V
X5R-CERM
0201

1

C8647

2.2UF

20%

2

6.3V
CER-X5R
0201

77

67

PP1V8_IO_SSD0

C8684

1

2.2UF

20%

6.3V

2

CER-X5R
0201

C8687

1

2.2UF

20%

6.3V

2

CER-X5R
0201

35 4

BOM_COST_GROUP=SSD

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

S4E<0>

SIZE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

86 OF 500

SHEET

77 OF 98

1

A

D

678

3 245

1

EXTERNAL VREF

D

C

83 81 80 79 78 77

85

85 83 81 80 79 78 77

PP1V8_IO_SSD0

PP1V8_IO_SSD0

1%
MF

201

1

2

R8709

100K

1/20W

1

R8702

47K

1%
1/20W
MF

2

201

1

R8708

100K

1%
1/20W
MF

2

201

82 80 79 77

82 80 79 77 34

82 80 79 77

82 80 79 77

83 82 81 80 79 77

80 79 77 43 37

82 80 79 77 35

82 80 79 77 35

82 80 79 77

83 82 80 79 77

82

82 79

77

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77

SSD0_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E1_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E1_SWD_UID1
SSD0_S4E1_UART_TX
SSD0_OCARINA_PFN_L

SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E1_JTAG_TDO
SSD0_S4E0_JTAG_TDO
SSD0_S4E_JTAG_SEL
SSD0_S4E1_DROOP_L
SSD0_WP_L

NOSTUFF

1

R8730

0

5%
1/20W
MF
201

2

B11

PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
PP2V5_NAND_SSD0

PP0V9_SSD0_S4E1_VDD_PLL

78

PP_SSD0_S4E1_VPP

B3

EXT_D0/BOOT0

C4

EXT_D1/BOOT1

B5

EXT_D2/BOOT2/SPINAND_SCLK

C6

EXT_D3/SWD_UID0/SPINAND_MISO

B7

EXT_D4/UART_RX

C8

EXT_D5/SWD_UID1/SPINAND_MOSI

B9

EXT_D6/UART_TX
EXT_D7/SPF

E8

EXT_NCE/PERST*

D7

EXT_NRE/JTAG_TMS

E6

EXT_NWE/JTAG_TCK

E4

EXT_RNB/JTAG_TDO

D5

EXT_CLE/JTAG_TDI

D9

EXT_ALE/JTAG_SEL

T3

DROOP_N

G2

WP_N

F3

VPP

R2

VDD_PLL

S4E1

L12G4E12

VCC

NAND-S4E-S5E-MCP-STUDY-COMBO

P9N2E10E2T5K9J2R4R8R6L8L6G8

D3

VDDIO_2/NAND

VDDIO_1/GPIO

U8700

LGA

OMIT_TABLE

VDD

J4

G6

ANI0_VREF

ANI1_VREF

PP0V9_SSD0

SSD0_S4E1_ANI1_VREF
SSD0_S4E1_ANI0_VREF

PP1V8_SSD0_S4E1_AVDD18_PLL
PP1V8_SSD0_S4E1_PCI_AVDD_H

PP0V9_SSD0

J8

L2

G12

PCI_VDD_2

AVDD18_PLL

N8H7J6

PCI_VDD_1

M9

N6

PCI_AVDD_H

PCI_AVDD_CLK_1

PCI_AVDD_CLK_2

PCIE_REFCLK_P
PCIE_REFCLK_M

PCIE_CLKREQ_N

PCI_RESREF

PCIE_RX0_P
PCIE_RX0_M

PCIE_TX0_P
PCIE_TX0_M

CLK_IN

RESET*

TRST*

ZQ_C
ZQ_N

83 78

83 78

M3

K11
J12

P5

M11
N12

R12
T11

L4

G10

K3
C10

85 83 82 81 80 79 78 77 70

78

78

85 83 82 81 80 79 78 77 70

SSD0_CLK24M_01
PCIE_CLK100M_SSD0_01_P

PCIE_CLK100M_SSD0_01_N
SSD0_CLKREQ1_L
SSD0_S4E1_PCIE_RESREF
PCIE_SSD0_R2D_P<1>

PCIE_SSD0_R2D_N<1>

PCIE_SSD0_D2R_C_P<1>

PCIE_SSD0_D2R_C_N<1>

SSD0_RESET_L

82 80 79 77

SSD0_S4E_JTAG_TRST_L
SSD0_S4E1_ZQ_C

SSD0_S4E1_ZQ_L

85 83 82 81 80 79 78 77 70

83 78

77

84 77 37

84 77 37

43 37

C8731
C8739

C8701
C8702

80 79 77

0.22UF

0.22UF

0.22UF

0.22UF

2 1

2 1

2 1

2 1

SSD0_S4E1_ANI1_VREF

PCIE_SSD0_R2D_C_P<1>

10%0201

X5R-CERM6.3V

PCIE_SSD0_R2D_C_N<1>

10%0201

X5R-CERM6.3V

PCIE_SSD0_D2R_P<1>

10%0201 6.3V

X5R-CERM

PCIE_SSD0_D2R_N<1>

10%0201 X5R-CERM6.3V

PPVCCQ_ANI_SSD0

R8780

0

21

5%

1/20W

MF

0201

NOSTUFF

37

37

37

37

1

R8781

2K

1%
1/20W
MF
201

2

NOSTUFF

1

C8781

0.01UF

10%
10V

2

X7R
0201-1

NOSTUFF

SSD0_S4E1_ANI0_VREF

1

R8782

2K

1%
1/20W
MF

2

201

NOSTUFF

1

R8704

3.01K

1%
1/20W
MF
201

2

1

C8782

0.01UF

10%
10V

2

X7R
0201-1

NOSTUFF

1

C8785

10PF

5%

2

25V
C0G
0201

NOSTUFF

83 78

D

C

B

S4E VDD

U12

U8U6U4

U10

U2

T9T7T1

T13

R10

P13

P7P3P1

P11

S4E VDDIO_2

N10N4M13

M7M5M1

L10

K7K5K1

K13

VSS

J10

H13

H9H5H3

H11

H1

F13

F9F7F5

F11

F1

D13

D11D1C12C2B13B1A12

A8A6A4

A10

A2

1

R8705

300

1%
1/20W
MF

2

201

PLACE_NEAR=U8700.C10:15MM

1

R8706

100

1%
1/20W
MF

2

201

PLACE_NEAR=U8700.K3:15MM

B

A

85 83 82 81 80 79 78 77 70

PP0V9_SSD0

1

C8710

20UF

20%

2

10V
X5R
0402

1

C8716

20UF

20%

2

10V
X5R
0402

1

C8711

2.2UF

20%

2

6.3V
CER-X5R
0201

1

C8712

2.2UF

20%

2

6.3V
CER-X5R
0201

VCC CAP

PP2V5_NAND_SSD0

1

C8713

0.1UF

10%

2

16V
X5R-CERM
0201

85 83 82 81 80 79 78 77 70

1

C8714

0.1UF

10%

2

16V
X5R-CERM
0201

85 83 81 80 79 78 77

PPVCCQ_ANI_SSD0

1

C8715

0.1UF

10%

2

16V
X5R-CERM
0201

PP1V8_IO_SSD0

1

C8732

10UF

20%

2

10V
X5R-CERM
0402-0.1MM-1

R8710

5%

1/20W

R8783

0

4.3UF

20%

4V
CERM
0402

1

432

0

21

MF

0201

C8736

PP1V8_SSD0_S4E1_PCI_AVDD_H

1

C8744

0.1UF

10%

2

16V
X5R-CERM
0201

1

C8737

2

1

C8745

4UF

20%

2

6.3V
CER-X5R
0201

2.2UF

20%

6.3V
CER-X5R
0201

85 83 82 81 80 79 78 77 70

78

PP0V9_SSD0

1

2

5%

1/20W

C8783

4UF

20%

6.3V
CER-X5R
0201

PLACE_NEAR=R8783.1:10MM

85 83 81 80 79 78 77

21

MF

0201

S4E VDDIO_1

PP1V8_IO_SSD0

PP0V9_SSD0_S4E1_VDD_PLL

78

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

85 83 82 81 80 79 78 77

8

1

C8751

20UF

20%
10V

2

X5R
0402

C8748

1

10UF

20%
10V

2

X5R-CERM
0402-0.1MM-1

C8749

1

2.2UF

20%

2

6.3V
CER-X5R
0201

C8750

1

2.2UF

20%

6.3V
CER-X5R

2

0201

R8711

5%

1/20W

0

21

MF

0201

PP1V8_SSD0_S4E1_AVDD18_PLL

1

C8746

0.1UF

10%

2

16V
X5R-CERM
0201

1

C8747

2.2UF

20%

2

6.3V
CER-X5R
0201

78

67

1

C8784

2.2UF

20%

6.3V

2

CER-X5R
0201

1

C8787

2.2UF

20%

2

6.3V
CER-X5R
0201

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SSD

35 4

IV ALL RIGHTS RESERVED

2

Apple Inc.

S4E<1>

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

87 OF 500

SHEET

78 OF 98

1

SIZE

D

678

3 245

1

EXTERNAL VREF

D

C

85 83 81 80 79 78 77

85 83 81 80 79 78 77

PP1V8_IO_SSD0

1

R8802

47K

1%
1/20W
MF
201

2

SSD:4L

PP1V8_IO_SSD0

R8809

100K

1/20W

201

SSD:4L

1

R8808

100K

1%
1/20W
MF

2

201

SSD:4L

1

1%
MF

2

82 80 78 77 34

83 82 81 80 78 77

80 78 77 43 37

82 80 78 77 35

82 80 78 77 35

83 82 80 78 77

82 80 78 77

82 80 78 77

82 80 78 77

82

80

82 78

82 80 78 77

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77

SSD0_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E2_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E2_SWD_UID1
SSD0_S4E2_UART_TX
SSD0_OCARINA_PFN_L

SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E2_JATG_TDO
SSD0_S4E1_JTAG_TDO
SSD0_S4E_JTAG_SEL
S4E2_DROOP_L
SSD0_WP_L

NOSTUFF

1

R8830

0

5%
1/20W
MF
201

2

B3
C4
B5
C6
B7
C8
B9

B11

E8

D7

E6

E4

D5

D9

T3

G2

PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
PP2V5_NAND_SSD0

PP0V9_SSD0_S4E2_VDD_PLL

79

PP_SSD0_S4E2_VPP

EXT_D0/BOOT0
EXT_D1/BOOT1
EXT_D2/BOOT2/SPINAND_SCLK
EXT_D3/SWD_UID0/SPINAND_MISO
EXT_D4/UART_RX
EXT_D5/SWD_UID1/SPINAND_MOSI
EXT_D6/UART_TX
EXT_D7/SPF

EXT_NCE/PERST*

EXT_NRE/JTAG_TMS

EXT_NWE/JTAG_TCK

EXT_RNB/JTAG_TDO

EXT_CLE/JTAG_TDI

EXT_ALE/JTAG_SEL

DROOP_N

WP_N

F3

VPP

R2

VDD_PLL

S4E2

L12G4E12

VCC

NAND-S4E-S5E-MCP-STUDY-COMBO

P9N2E10E2T5K9J2R4R8R6L8L6G8

D3

VDDIO_2/NAND

VDDIO_1/GPIO

U8800

LGA

OMIT_TABLE

VDD

G6

J4

ANI0_VREF

ANI1_VREF

PP0V9_SSD0

SSD0_S4E2_ANI1_VREF
SSD0_S4E2_ANI0_VREF

PP1V8_SSD0_S4E2_AVDD18_PLL
PP1V8_SSD0_S4E2_PCI_AVDD_H

PP0V9_SSD0

J8

L2

G12

PCI_VDD_2

AVDD18_PLL

N8H7J6

PCI_VDD_1

M9

N6

PCI_AVDD_H

PCI_AVDD_CLK_1

PCI_AVDD_CLK_2

PCIE_REFCLK_P
PCIE_REFCLK_M

PCIE_CLKREQ_N

PCI_RESREF

PCIE_RX0_P
PCIE_RX0_M

PCIE_TX0_P
PCIE_TX0_M

CLK_IN

RESET*

TRST*

ZQ_C
ZQ_N

M3

K11
J12

P5

M11
N12

R12
T11

L4

G10

K3
C10

PPVCCQ_ANI_SSD0

1

R8881

2K

1%
1/20W
MF

2

201

85 83 82 81 80 79 78 77 70

NOSTUFF

R8880

83 79

83 79

79

79

85 83 82 81 80 79 78 77 70

SSD0_CLK24M_23

80

83 79 83 79

SSD0_S4E2_ANI1_VREF SSD0_S4E2_ANI0_VREF

0

5%

1/20W

MF

0201

NOSTUFF

21

1

R8882

2K

1%
1/20W
MF
201

2

NOSTUFF

1

C8881

0.01UF

10%

2

10V
X7R
0201-1

NOSTUFF

1

C8882

0.01UF

10%

10V

2

X7R
0201-1

NOSTUFF

85 83 82 81 80 79 78 77 70

D

R8833

49.9

PCIE_CLK100M_SSD0_23_P
PCIE_CLK100M_SSD0_23_N

SSD0_CLKREQ2_L

43 37

SSD0_S4E2_PCIE_RESREF
PCIE_SSD0_R2D_P<2>

PCIE_SSD0_R2D_N<2>

PCIE_SSD0_D2R_C_P<2>

PCIE_SSD0_D2R_C_N<2>

SSD0_RESET_L

82 80 78 77

SSD0_S4E_JTAG_TRST_L
SSD0_S4E2_ZQ_C

SSD0_S4E2_ZQ_L

C8871

SSD:4L

C8872

SSD:4L

C8801

SSD:4L

C8802

SSD:4L

80 78 77

84 80 37

84 80 37

0.22UF

0.22UF

0.22UF

0.22UF

2 1

1%

1/20W

MF

201

2 1

2 1

2 1

2 1

SSD:4L

PCIE_SSD0_R2D_C_P<2>

6.3V X5R-CERM

PCIE_SSD0_R2D_C_N<2>

6.3V X5R-CERM

PCIE_SSD0_D2R_P<2>

6.3V X5R-CERM

PCIE_SSD0_D2R_N<2>

6.3V X5R-CERM

SSD0_CLK24M

10%0201

10%0201

10%0201

10%0201

37

37

77 43

37

37

1

R8804

3.01K

1%
1/20W
MF
201

2

SSD:4L

1

C8885

10PF

5%

2

25V
C0G
0201

NOSTUFF

C

B

S4E VDD

U12

U8U6U4

U10

U2

T9T7T1

T13

R10

P13

P11

S4E VDDIO_2

P7P3P1

N10N4M13

M7M5M1

L10

K7K5K1

K13

VSS

J10

H13

H9H5H3

H11

H1

F13

F9F7F5

F11

F1

D13

D11D1C12C2B13B1A12

A8A6A4

A10

A2

1

R8805

300

1%
1/20W
MF
201

2

SSD:4L

PLACE_NEAR=U8800.C10:15MM

1

R8806

100

1%
1/20W
MF

2

201

SSD:4L

PLACE_NEAR=U8800.K3:15MM

B

A

85 83 82 81 80 79 78 77 70

PP0V9_SSD0

1

C8810

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C8816

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C8811

2.2UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

1

C8812

2.2UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

VCC CAP

85 83 82 81 80 79 78 77

PP2V5_NAND_SSD0

SSD:4L

1

C8851

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C8848

10UF

20%
10V

2

X5R-CERM
0402-0.1MM-1

C8849

1

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

1

C8813

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

1

C8814

2

SSD:4L

85 83 81 80 79 78 77

1

C8850

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

85 83 82 81 80 79 78 77 70

1

C8815

0.1UF

10%
16V
X5R-CERM
0201

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

PPVCCQ_ANI_SSD0

PP1V8_IO_SSD0

5%

1/20W

1

C8832

10UF

20%

2

10V
X5R-CERM

0402-0.1MM-1

SSD:4L

R8810

5%

1/20W

SSD:4L

R8811

0

SSD:4L

4.3UF

20%

4V
CERM
0402

1

SSD:4L

432

0

21

PP1V8_SSD0_S4E2_PCI_AVDD_H

MF

0201

1

C8844

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

PP1V8_SSD0_S4E2_AVDD18_PLL

21

MF

0201

1

C8846

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

C8836

1

2

1

C8847

2.2UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

C8845

4UF

20%

6.3V
CER-X5R
0201

SSD:4L

1

C8837

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

79

R8883

0

85 83 82 81 80 79 78 77 70 79

PP0V9_SSD0 PP0V9_SSD0_S4E2_VDD_PLL

5%

1/20W

21

0201

MF

SSD:4L

1

C8883

4UF

20%

2

6.3V
CER-X5R
0201

79

PLACE_NEAR=R8883.1:10MM

SSD:4L

S4E VDDIO_1

85 83 81 80 79 78 77

PP1V8_IO_SSD0

1

C8884

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

1

2

C8887

2.2UF

20%

6.3V
CER-X5R
0201

SSD:4L

BOM_COST_GROUP=SSD

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

S4E<2>

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

88 OF 500

SHEET

79 OF 98

A

8

67

35 4

2

1

678

3 245

1

D

C

85 83 81 80 79 78 77

85 83 81 80 79 78 77

PP1V8_IO_SSD0

PP1V8_IO_SSD0

1

R8908

100K

1%
1/20W
MF

2

201

SSD:4L

1

R8902

47K

1%
1/20W
MF
201

2

SSD:4L

1

R8909

100K

1%
1/20W
MF

2

201

SSD:4L

82 79 78 77

82 79 78 77 34

82 79 78 77

82 79 78 77

82

83 82 81 79 78 77

79 78 77 43 37

82 79 78 77 35

82 79 78 77 35

82

79

82 79 78 77

83 82 79 78 77

85 83 81 80 79 78 77 85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77

SSD0_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E3_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E3_SWD_UID1
SSD0_S4E3_UART_TX
SSD0_OCARINA_PFN_L

SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E3_JTAG_TDO
SSD0_S4E2_JATG_TDO
SSD0_S4E_JTAG_SEL
S4E3_DROOP_L
SSD0_WP_L

80

NOSTUFF

1

R8930

0

5%
1/20W
MF
201

2

B3
C4
B5
C6
B7
C8
B9

B11

E8

D7

E6

E4

D5

D9

T3

G2

S4E3

PP1V8_IO_SSD0 PP0V9_SSD0
PPVCCQ_ANI_SSD0
PP2V5_NAND_SSD0

PP0V9_SSD0_S4E3_VDD_PLL

PP_SSD0_S4E3_VPP

EXT_D0/BOOT0
EXT_D1/BOOT1
EXT_D2/BOOT2/SPINAND_SCLK
EXT_D3/SWD_UID0/SPINAND_MISO
EXT_D4/UART_RX
EXT_D5/SWD_UID1/SPINAND_MOSI
EXT_D6/UART_TX
EXT_D7/SPF

EXT_NCE/PERST*

EXT_NRE/JTAG_TMS

EXT_NWE/JTAG_TCK

EXT_RNB/JTAG_TDO

EXT_CLE/JTAG_TDI

EXT_ALE/JTAG_SEL

DROOP_N

WP_N

F3

VPP

R2

VDD_PLL

L12G4E12

VCC

P9N2E10E2T5K9J2R4R8R6L8L6G8

D3

VDDIO_2/NAND

VDDIO_1/GPIO

U8900

NAND-S4E-S5E-MCP-STUDY-COMBO

OMIT_TABLE

LGA

G6

VDD

ANI1_VREF

SSD0_S4E3_ANI1_VREF
SSD0_S4E3_ANI0_VREF

PP1V8_SSD0_S4E3_AVDD18_PLL
PP1V8_SSD0_S4E3_PCI_AVDD_H

J8

J4

L2

G12

ANI0_VREF

AVDD18_PLL

N8H7J6

PCI_VDD_1

PCI_VDD_2

PCI_AVDD_H

PP0V9_SSD0

M9

N6

PCI_AVDD_CLK_1

PCI_AVDD_CLK_2

PCIE_REFCLK_P
PCIE_REFCLK_M

PCIE_CLKREQ_N

PCI_RESREF

PCIE_RX0_P
PCIE_RX0_M

PCIE_TX0_P
PCIE_TX0_M

CLK_IN

RESET*

TRST*

ZQ_C
ZQ_N

83 80

83 80

M3

K11
J12

P5

M11
N12

R12
T11

L4

G10

K3
C10

80

80

85 83 82 81 80 79 78 77 70

SSD0_CLK24M_23

79

PCIE_CLK100M_SSD0_23_P
PCIE_CLK100M_SSD0_23_N

SSD0_CLKREQ3_L

43 37

SSD0_S4E3_PCIE_RESREF
PCIE_SSD0_R2D_P<3>

PCIE_SSD0_R2D_N<3>

PCIE_SSD0_D2R_C_P<3>

PCIE_SSD0_D2R_C_N<3>

SSD0_RESET_L

82 79 78 77

SSD0_S4E_JTAG_TRST_L
SSD0_S4E3_ZQ_C

SSD0_S4E3_ZQ_L

SSD:4L

SSD:4L

SSD:4L

SSD:4L

79 78 77

84 79 37

84 79 37

C8971
C8972

C8901
C8902

EXTERNAL VREF

PPVCCQ_ANI_SSD0

1

R8981

2K

1%
1/20W
MF

2

201

NOSTUFF

R8980

83 80 83 80

0.22UF

0.22UF

0.22UF

0.22UF

SSD0_S4E3_ANI1_VREF

2 1

2 1

2

2 1

PCIE_SSD0_R2D_C_P<3>

6.3V X5R-CERM

10%0201

PCIE_SSD0_R2D_C_N<3>

6.3V X5R-CERM

1

PCIE_SSD0_D2R_P<3>

6.3V X5R-CERM

10%0201

10%0201

PCIE_SSD0_D2R_N<3>

6.3V X5R-CERM

10%0201

0

5%

1/20W

MF

0201

NOSTUFF

37

37

21

37

37

SSD0_S4E3_ANI0_VREF

1

R8982

2K

1%
1/20W
MF
201

2

NOSTUFF

1

C8981

2

NOSTUFF

1

2

1

R8904

3.01K

1%
1/20W
MF

2

201

SSD:4L

0.01UF

10%
10V
X7R
0201-1

C8982

0.01UF

10%

10V
X7R
0201-1

NOSTUFF

1

2

C8985

10PF

5%
25V
C0G
0201

NOSTUFF

85 83 82 81 80 79 78 77 70

D

C

B

U12

U8U6U4

U10

U2

T9T7T1

T13

R10

P13

P7P3P1

P11

S4E VDDIO_2

N10N4M13

M7M5M1

L10

K7K5K1

K13

VSS

J10

H13

H9H5H3

H11

H1

F13

F9F7F5

F11

F1

D13

D11D1C12C2B13B1A12

A8A6A4

A10

A2

1

R8905

300

1%
1/20W
MF

2

201

SSD:4L

PLACE_NEAR=U8900.C10:15MM

1

R8906

100

1%
1/20W
MF

2

201

SSD:4L

PLACE_NEAR=U8900.K3:15MM

B

A

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77

S4E VDD

PP0V9_SSD0

1

C8910

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C8916

20UF

20%

2

10V
X5R
0402

SSD:4L

VCC CAP

PP2V5_NAND_SSD0

SSD:4L

C8953

1

20UF

20%
10V

2

X5R
0402

1

C8911

2.2UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

1

C8948

10UF

20%
10V
X5R-CERM

2

0402-0.1MM-1

SSD:4L

1

C8912

2.2UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

1

C8949

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

1

C8913

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

1

C8950

2.2UF

20%

6.3V
CER-X5R

2

0201

SSD:4L

1

C8914

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

85 83 81 80 79 78 77

1

C8951

2.2UF

20%

6.3V
CER-X5R

2

0201

SSD:4L

85 83 82 81 80 79 78 77 70

1

C8915

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

PP1V8_IO_SSD0

1

C8952

2.2UF

20%

6.3V
CER-X5R

2

0201

SSD:4L

PPVCCQ_ANI_SSD0

1

C8932

10UF

20%

2

10V
X5R-CERM
0402-0.1MM-1

SSD:4L

R8910

0

5%

1/20W

SSD:4L

R8911

0

5%

1/20W

21

0201

MF

SSD:4L

4.3UF

20%

4V
CERM
0402

432

C8936

1

SSD:4L

1

C8937

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

21

0201

MF

PP1V8_SSD0_S4E3_PCI_AVDD_H

1

C8944

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

1

C8945

4UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

PP1V8_SSD0_S4E3_AVDD18_PLL

1

C8946

0.1UF

10%

2

16V
X5R-CERM
0201

SSD:4L

1

C8947

2.2UF

20%

2

6.3V
CER-X5R
0201

SSD:4L

80

80

85 83 82 81 80 79 78 77 70

S4E VDDIO_1

85 83 81 80 79 78 77

R8983

PP0V9_SSD0

PP1V8_IO_SSD0

5%

1/20W

SSD:4L

1

C8983

4UF

20%

2

6.3V
CER-X5R
0201

PLACE_NEAR=R8983.1:10MM

SSD:4L

0

21

MF

0201

1

C8984

2.2UF

20%

6.3V

2

CER-X5R
0201

SSD:4L

PP0V9_SSD0_S4E3_VDD_PLL

1

C8987

2.2UF

20%

2

6.3V
CER-X5R
0201

80

SSD:4L

BOM_COST_GROUP=SSD

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

S4E<3>

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

89 OF 500

SHEET

80 OF 98

A

8

67

35 4

2

1

D

85 49

PPBUS_G3H_SSD0

CRITICAL

1

C9053

33UF

20%
16V

2

POLY-TANT
CASED12-SM-1

1

C9073

10UF

20%
25V

2

X5R-CERM
0603

1

C9074

10UF

20%
25V

2

X5R-CERM
0603

1

C9080

20%
25V

2

X5R-CERM
0603

1

C9081

10UF10UF

20%
25V

2

X5R-CERM
0603

678

1

2

C9051

0.1UF

10%
25V
X6S-CERM
0201

82 81

1

2

IN

C9052

0.1UF

10%
25V
X6S-CERM
0201

SSD0_VR_P2V5_EN

TPS62180_SS

1

C9082

2200PF

10%
25V

2

CER-X7R
0201

NO_XNET_CONNECTION=1

U9080

TPS62180

VIN1

A1

VIN1

B1

VIN1

C1

D1

VIN2

E1

VIN2

F1

VIN2

EN VO

E4

D4

SS/TR

AGND

C4

BGA

CRITICAL

PGND

PGND

PGND

PGND

D3

C3

B3

A3

XW9080

SM

21

PP2V5_SSD0_AGND

PGND

PGND

F3

E3

SW1
SW1
SW1

SW2
SW2
SW2

PG

FB

A2
B2
C2

D2
E2
F2

A4

F4

B4

PPVCC_SW1_TPS62180

DIDT=TRUE

PPVCC_SW2_TPS62180

DIDT=TRUE

SSD0_VR_P2V5_PGOOD

TPS62180_FB

L9080

1UH-20%-4.8A-0.032OHM

1210

152S00386

21

L9081

1UH-20%-4.8A-0.032OHM

1210

152S00386

81 72

PP2V5_NAND_SSD0

1

R9088

100K

1%
1/20W
MF
201

2

21

3 245

1

R9083

10.2

1%
1/20W
MF

2

201

TPS62180_FB_R

1

C9085

47PF

2%
50V

2

NP0-C0G
0201

85 83 82 81 80 79 78 77

PP2V5_NAND_SSD0

1

C9086

20UF

20%

2

10V
X5R
0402

1

R9080

475K

0.1%
1/16W
MF
0402

2

1

R9081

200K

0.1%
1/20W
TF

2

0201

NO_XNET_CONNECTION=1

C9094

1

CRITICAL

150UF

20%

6.3V

2

TANT
CASE-B-SM

1

C9087

20UF

20%

2

10V
X5R
0402

C9095

1

CRITICAL

150UF

20%

6.3V

2

TANT
CASE-B-SM

SSD:4L

85 83 82 81 80 79 78 77

C9096

1

CRITICAL

150UF

20%

6.3V

2

TANT
CASE-B-SM

SSD:4L

C9075

1

10UF

20%
10V
X5R-CERM

2

0402-1

OMIT_TABLE

R9081:200K->2.7V, 221K->2.519V NAND VCC

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

1

118S0738

103S00049

RES,THICKFILM,200KOHM,0.1%,1/20W,0201

1

RES,THICKFILM,221KOHM,0.1%,1/20W,0201

1

VOUT = 2.5V

(VOUT = 2.7V FOR LEGACY NANDS)

PP2V5_NAND_SSD0

C9076

1

10UF

20%
10V
X5R-CERM

2

0402-1

CRITICALR9081
CRITICALR9081

C9077

1

20%
10V
X5R-CERM

2

0402-1

BOM OPTIONCRITICAL

NAND_VCC:2.7V
NAND_VCC:2.5V

C9078

1

10UF10UF

20%
10V
X5R-CERM

2

0402-1

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

D

85 83 82 81 80 79 78 77

C

B

81 54

PP3V3_G3H_SSD0

1

R9010

100K

1%
1/20W
MF

2

201

SSD:4L

85 83 81 80 79 78 77

1

R9033

10K

1%
1/20W
MF
201

2

SSD:4L

PP1V8_IO_SSD0

PP3V3_G3H_SSD0

81 54

1

C9000

10UF

20%

2

6.3V
CERM-X6S
0402

SSD:4L

PLACE_NEAR=U9000.E7:15MM

PLACE_NEAR=U9000.E7:15MM

PLACE_NEAR=U9000.E7:10MM

NOSTUFF

R9051

0

21

5%

1/20W

MF

0201

R9052

0

5%

1/20W

MF

0201

OCARINA I2C BASE ADDRESS
STG0: F2
STG1: F0

PLACE_NEAR=U9000.B4:20MM

81

100K-1%-0.001A

1

C9001

10UF

20%

2

6.3V
CERM-X6S
0402

SSD:4L SSD:4L

1

C9002

0.1UF

20%

2

16V
X6S
0201

1

C9003

4.7UF

20%

2

6.3V
CER
0402

SSD:4L

PLACE_NEAR=U9000.A7:15MM

PLACE_NEAR=U9000.A7:15MM

PLACE_NEAR=U9000.A7:10MM

1

C9004

4.7UF

20%

2

6.3V
CER
0402

SSD:4L

1

C9005

0.1UF

20%

2

16V
X6S
0201

SSD:4L

SSD0_STG01_ADDR
OCARINA_FORCE_EN

1

R9011

100K

1%
1/20W
MF
201

2

SSD:4L

47 35

47 35

82

80 79 78 77

83 82

IN

BI

OUT

OUT

I2C_SSD_SCL
I2C_SSD_SDA

SSD0_OCARINA_LPB_L
SSD0_OCARINA_PFN_L
OCARINA_PGOOD

83 43 34

IN

81 72

SSD_PMU_RESET_L
SSD0_VR_P2V5_PGOOD

OCARINA_POK2

83 82

85 83 82 72 35 34

1

2

82 81

OUT

IN

OUT

SSD0_OCARINA_RESET_L
PMU_SYS_ALIVE
SSD0_VR_P2V5_EN

1V8_SWCH_EN

81

SSD0_OCARINA_WP_L

82

1

C9006

150UF

20%

6.3V

2

TANT
CASE-B-SM

128S00038

SSD:4L

F3

ATM

D2

ADDR

FORCE_EN

E1

G2

I2C_SCL
I2C_SDA

G3

LPBN

F4

PFN*

G5

PGOOD

G6

D1

PMIC_RESET*

D3

POK1

F1

POK2

E5

RESET*

SYS_ALIVE

F2

VEN1

F5
E4

VEN2

WP*

G4

A8

E7

E8

VDD_BUCK0

VDD_BUCK0

VDD_BUCK1

B4

A7

VDD_BUCK1

B5

VDD_LDO

VDD_MAIN

U9000

D2499A0

WLCSP

OMIT_TABLE

G1

C1

VCC_DET

V_BUF_1.8V

OCARINA_VDD_LDO
OCARINA_NAND_VCC_DET

PP1V8_IO_SSD0

1

C9009

0.1UF

10%
16V

2

X5R-CERM
0201

SSD:4L

OCARINA_TCAL

TCAL

VREF
IREF

TDEV1
TDEV2

VR1_DISCHG
VR2_DISCHG

BUCK0_FB_DIS
BUCK1_FB_DIS

BUCK0_LX0
BUCK0_LX0

BUCK0_LX1
BUCK0_LX1

BUCK1_LX0
BUCK1_LX0

A4

OCARINA_VREF

B3

OCARINA_IREF

B2

OCARINA_TDEV1

B1

OCARINA_TDEV2

C2

PP2V5_NAND_SSD0

A3

PP1V8_DIS

A1

PVDD_SSD_FB_DIS

D5

PVCCQ_SSD_FB_DIS

C5

PVDD_LX0

F8
F7

D8
D7

B8
B7

DIDT=TRUE

PVDD_LX1

DIDT=TRUE

PVCCQ_LX0

DIDT=TRUE

PP9001

1

PP

SM-SP

85 83 81 80 79 78 77

81

81

1

R9005

200K

0.1%
1/20W
TF
0201

2

1

C9007

0.22UF

20%

2

6.3V
X6S-CERM
0201

SSD:4L

SSD:4LSSD:4L

1

C9008

0.1UF

20%

2

16V
X6S
0201

SSD:4L

1

R9000

8.06K

0.1%
1/20W
TK
0201

2

SSD:4L

SSD:4L

SSD:4L

1UH-20%-4.8A-0.032OHM

0.47UH-20%-6.7A-0.023OHM

0.47UH-20%-6.7A-0.023OHM

OCARINA_TDEV1

1

R9002

0201

2

SSD:4L

R9040

0

21

NOSTUFF

5%

1/20W

MF

0201

R9020

0

21

5%

1/20W

MF

0201

R9030

0

21

5%

1/20W

MF

0201

L9021

1210

152S00386

21

L9020

21

1210

152S00384

L9030

21

1210

152S00384

100K-1%-0.001A

1

R9001

18.2K

0.1%
1/20W
TK
0201

2

SSD:4L

PP1V8_IO_SSD0

PP0V9_SSD0

SSD:4L

PPVCCQ_ANI_SSD0

SSD:4L

1

C9030

20UF

20%

2

10V
X5R
0402

SSD:4L

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS(VSS_BUCK0)

VSS(VSS_BUCK0)

VSS

VSS(VSS_BUCK01)

VSS(VSS_BUCK01)

VSS(VSS_BUCK01)

81

1

C9031

2

SSD:4L

OCARINA_TDEV2

1

R9004

0201

2

SSD:4L

79

1

C9022

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C9032

20UF

10V
X5R
0402

20UF

2

10V
X5R
0402

SSD:4L

C

1

R9003

18.2K

0.1%
1/20W
TK
0201

2

SSD:4L

85 83 81 80 79 78 77

NOSTUFF

R9021

0

5%

85 83 82 81 80 79 78 77 70

1/20W

MF

0201

85 83 82 81 80 78 77 70

PVDD_SSD_FB_R

21

NOSTUFF

XW9020

SM

21

PP0V9_SSD0

78

80

85 83 82 81 79 77 70

VOUT = 0.9V

(VOUT = 0.835V FOR S5E)

1

C9023

20UF 20UF

20%

2

10V
X5R X5R
0402

SSD:4L

1

C9024

20%

2

10V
0402

SSD:4L

PPVCCQ_ANI_SSD0

1

C9033

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C9034

20UF

20%

2

10V
X5R
0402

SSD:4L

1

C9025

20UF 20UF

20%

2

10V
X5R
0402

SSD:4L

77 79

1

C9035

20UF

20%20%20%

2

10V
X5R
0402

1

2

SSD:4L

SSD:4L

C9026

20%
10V
X5R
0402

1

C9027

20UF

20%

2

10V
0402

SSD:4L

85 83 82 81 80 78 70

PP0V9_SSD0

1

C9028

20UF

20%

2

10V
X5RX5R
0402

SSD:4L

1

C9029

20UF

20%

2

10V
X5R
0402

SSD:4L

85 83 82 81 80 79 78 77 70

B

A

81 54

1V8_SWCH_SLEW
1V8_SWCH_EN

81

TON DELAY = ~1MS

PP3V3_G3H_SSD0

1

C9010

0.1UF

20%

2

16V
X6S
0201

NOSTUFF

SLG5AP1445V

CAP

ON S

NOSTUFF

C9011

1

4700PF

10%
25V
CER-X5R

2

0201

1

VDD

U9001

TDFN8

NOSTUFF

GND

8

C6

C7

C8

G7

G8

E3

F6

E2

E6

D4

D6

C4

C3

A2

B6

A5

A6

VOUT = 1.8V

NOSTUFF

R9048

PP1V8_IO_SSD0_R2

81

37

D

PP1V8_SLPS2R

52

PP1V8_IO_SSD0_R2

81

60 47 44 43 42 40 34 29 28 27

89 86 83 74 72 71 70 64 63

85 83 82 81 80 79 78 77 70

PPVCCQ_ANI_SSD0

0.005

R9015

0.001

NOSTUFF

1%

1/3

MF

0402

1%
1W
MF

1206

21

PP1V8_IO_SSD0

21

PP1V8_IO_SSD0

85 83 81 80 79 78 77

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

85 83 81 80 79 78 77

R9047

PP1V8_IO_SSD0_R

70

0.005

1%

1/3

MF

0402

21

PP1V8_IO_SSD0

BOM_COST_GROUP=SSD

NOTICE OF PROPRIETARY PROPERTY:

85 83 81 80 79 78 77

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

(VOUT = 1.2V FOR S5E)

OCARINA PMIC & NAND VCC VR & VDDIO1 SWCH

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

BRANCH

PAGE

90 OF 500

SHEET

81 OF 98

A

SIZE

D

pvt

8

67

35 4

2

1

D

85 83 81 80 79 78 77 70

85 83 82 81 80 79 78 77 70

PMU BUCK 9 & 10 REMOTE SENSE OPTIONS

PP0V9_SSD0

PPVCCQ_ANI_SSD0

PLACE_NEAR=U8600.P9:5MM

XW9650

SM

2 1

PLACE_NEAR=U8600:5MM

XW9651

SM

2 1

PLACE_NEAR=XW9650:1MM

XW9652

SM

P0V9SSD_FB_R_P

P0V9SSD_FB_R_N

21

PVCCQSSD_FB_R

NOSTUFF

R9655

PLACE_NEAR=R7822:1MM

0

21

P0V9SSD_FB_P

5% MF1/20W0201

NOSTUFF

R9656

2 1

PLACE_NEAR=R7823:5MM

0

P0V9SSD_FB_N

5% MF1/20W0201

NOSTUFF

R9657

2 1

PLACE_NEAR=R7824.1:1MM

0

PVCCQSSD_FB

0201 MF1/20W5%

678

3 245

1

SSD0

70

OUT

SM

PP

1

P2MM

SM

PP

P2MM

SM

PP

P2MM

SM

PP

1

1

1

SSD0_S4E3_JTAG_TDO

SSD_BFH

SSD0_S4E_BOOT2

SSD0_S4E_UART_TX

82 80

80 79 78 77 34

80 79 78 77

R9651

0

1

5%

1/20W

MF

0201

R9652

0

5%

1/20W

MF

0201

2

NOSTUFF

21

SSD0_S4E0_UART_TX

SSD0_S4E1_UART_TX

77

D

78

OUT

OUT

70

70

77

80 79 78 77 35

82 80 79 78 77 35

80 79 78 77

80 79 78 77

SSD0_S4E0_JTAG_TDI
SSD0_SWDIO

SSD0_SWCLK

SSD0_S4E_JTAG_SEL

SSD0_S4E_UART_RX

P2MM

1

1

SM

PP

P2MM

SM

PP

P2MM

SM

1

PP

PP9601

PP9603

PP9605

P2MM

1

P2MM

1

SM

PP

SM

PP

PP9602

PP9604

PP9606

PP9608

P2MM

PP9609

PP9610

C

SSD0_S4E1_JTAG_TDO

79 78

R9674

SSD:2L

0

NOSTUFF

2

NOSTUFF

2

SSD0_S4E2_UART_TX

SSD0_S4E3_UART_TX

79

80

SSD0_SWCLK

R9653

0

1

5%

1/20W

MF

0201

PP9611

P2MM

SM

PP

1

SSD0_OCARINA_LPB_L

82 81

R9654

0

1

5%

1/20W

MF

82 80 79 78 77 35

0201

NOSTUFF

1

R9679

49.9

1%
1/20W
MF
201

2

21

0201

MF1/20W5%

SSD0_S4E3_JTAG_TDO

82 80

SSD0_SWCLK_R

NOSTUFF

1

C9679

100PF

5%
25V

2

C0G
0201

C

85 83 82 81 80 79 78 77 70

81

PPVCCQ_ANI_SSD0

SSD0_OCARINA_WP_L

R9612

SSD:4L

0

85 83 81 80 79 78 77

PP2V5_NAND_SSD0

SSD:2L

1

R9620

24.9

1%
1/10W
MF-LF
603

2

SSD:2L

1

R9621

24.9

1%
1/10W
MF-LF
603

2

SSD:2L

1

R9622

24.9

1%
1/10W
MF-LF
603

2

SSD:2L

1

R9623

24.9

1%
1/10W
MF-LF
603

2

SSD:2L

1

R9624

24.9

1%
1/10W
MF-LF
603

2

SSD:2L

1

R9625

24.9

1%
1/10W
MF-LF
603

2

SSD:2L

1

R9610

100

5%
1/20W
MF
201

2

21

MF1/20W5%

0201

SSD0_WP_L

83 80 79 78 77

G

1

P2V5_SSD_DISCHARGE

4

D

SSD:2L

Q9620

DMN2044UCB4

BGA

S

4

D

SSD:2L

Q9621

G

1

S

DMN2044UCB4

BGA

B

82 81

72

83 81

85 83 81 72 35 34

SSD0_OCARINA_LPB_L

SSD0_PMIC_RESET_L

SSD0_OCARINA_RESET_L

PMU_SYS_ALIVE

R9614

R9615

5% 1/20W MF00201

R9616

R9617

5% 1/20W MF 0201

SSD:4L

0

MF1/20W5% 0201

SSD:2L

SSD:4L

0

SSD:2L

0

32

32

B

21

21

21

0201MF1/20W5%

21

SSD0_LPB_L

SSD0_RESET_L

SSD0_OCARINA_PFN_L

80 79 78 77

SSD:2L

R9605

10K

5%
MF

201

21

SSD:2L

1

C9605

33000PF

10%

6.3V

2

X5R
201

SSD0_PMIC_DISCHARGE_EN PMIC_DISCHARGE_EN_RC

72

1/20W

SSD:2L

1

R9606

10K

5%

80 79 78 77

83 81 80 79 78 77

1/20W
MF
201

2

A

SSD:2L

72 81

IN OUT

SSD0_PMIC_VR_P2V5_EN

R9618

8

0

21

SSD0_VR_P2V5_EN

0201MF1/20W5%

67

A

SYNC_DATE=SYNC_MASTER=

PAGE TITLE

SSD SUPPORT

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=SSD

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

96 OF 500

SHEET

82 OF 98

1

SIZE

D

678

3 245

1

D

C

B

A

46

46 36

46 34

46 36

46

46

46

46

46

87 48 46

48 46

48 46

46

46 36

46 34

46

46

46 36

46 43

46 43

46 43

46 35

46 36

46

46

85 75 52

86 75

75

75

75 34

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

62 61

62 61

62 61

72 63 61

89
75

61

61

61

61

62

62

62 51

62

62

85 62

62

62

62

62

62

62

62 35

Functional Test Points

J5110 - DFR Display Connector

DFR_DISP_VSYNC

IN

DFR_DISP_TE

IN

DFR_DISP_INT

IN

DFR_DISP_RESET_L

IN

PP3V3_G3HSW_DFR

IN

MIPI_DFR_CLK_FILT_CONN_P

IN

MIPI_DFR_CLK_FILT_CONN_N

IN

MIPI_DFR_DATA_FILT_CONN_P

IN

MIPI_DFR_DATA_FILT_CONN_N

IN

PP1V8_DFR

IN

I2C_DFR_SCL_R

IN

I2C_DFR_SDA_R

IN

GND

6 TPS

J5100 - DFR Touch Connector

DFR_TOUCH_LID_OPEN_L

IN

DFR_TOUCH_RESET_L

IN

DFR_PWR_EN

IN

TP_DFR_TOUCH_GPIO2

IN

PP5V_G3S_DFR_FILT

IN

SPI_DFR_CS_L

IN

SPI_DFR_MOSI

IN

SPI_DFR_MISO_R

IN

SPI_DFR_CLK

IN

DFR_TOUCH_INT_L

IN

DFR_TOUCH_CLK32K_RESET_L

IN

TP_DFR_TOUCH_PANEL_DETECT

IN

TP_DFR_TOUCH_ROM_WC

IN

GND

6 TPs

J6700 - Keyboard Connector

PP5V_G3S_KBD

IN

PPVOUT_S0_KBDLED

IN

PP_KBDLED_CATHODE1

IN

PP_KBDLED_CATHODE2

IN

SOC_KBD_BKLT_PWM_R

IN

KBD_ID1

IN

KBD_DRIVE_Y0

IN

KBD_DRIVE_Y1

IN

KBD_DRIVE_Y2

IN

KBD_DRIVE_Y3

IN

KBD_DRIVE_Y4

IN

KBD_DRIVE_Y5

IN

KBD_DRIVE_Y6

IN

KBD_DRIVE_Y7

IN

KBD_SENSE_X0

IN

KBD_SENSE_X1

IN

KBD_SENSE_X2

IN

KBD_SENSE_X3

IN

KBD_SENSE_X4

IN

KBD_SENSE_X5

IN

KBD_SENSE_X6

IN

KBD_SENSE_X7

IN

KBD_SENSE_X8

IN

KBD_SENSE_X9

IN

KBD_SENSE_X10

IN

KBD_SENSE_X11

IN

KBD_SENSE_X12

IN

KBD_CAP_CATHODE

IN

PP3V3_G3H_RSLOC

IN

KBD_RIGHT_SHIFT_KEY

IN

KBD_LEFT_OPTION_KEY

IN

KBD_CONTROL_KEY

IN

I2C_KBD_SDA

IN

I2C_KBD_SCL

IN

KBD_INT_L

IN

PMU_RSLOC_RST_L

IN

PPVOUT_S0_KBDLED_R

IN

KBD_CAPSLOCK_LED

IN

IOXP_I2C_SCL

IN

IOXP2_INT_L

IN

IOXP_I2C_SDA

IN

GND

6 TPS

J6801 - TRACKPAD CONNECTOR

ACT_GND

IN

PP5V_G3S_TPAD_CONN

IN

PP3V3_G3S_TPAD

IN

I2C_TPAD_3V3_SDA

IN

I2C_TPAD_3V3_SCL

IN

SPI_TPAD_3V3_CLK

IN

SPI_TPAD_3V3_MISO

IN

SPI_TPAD_3V3_CS_L

IN

SPI_TPAD_3V3_MOSI

IN

TPAD_3V3_SPI_EN

IN

TPAD_3V3_SPI_INT_L

IN

TPAD_3V3_ACTUATOR_DISABLE_L

IN

TPAD_KBD_WAKE_L

IN

GND

6 TPS

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

3 TPs

4 TPS

1 TPS

4 TPS
2 TPS
3 TPS

60 43

60

60 43

60

58

58

58 36

58

59

59

59 36

59

59

64 63

86 63

63

63

63

74 72 50 49

55

55

55

55

60 44

44
60

60 44

60 44

60 44

60 44

60 44

60 44

89 60 44

60

60

60

60

60

60

60

60

60

60

IN
IN
IN
IN
IN

IN
IN
IN

IN
IN

IN
IN
IN

IN
IN

J6640 - MIC Connector

PDM_DMIC_CLK0
AUD_DMIC0_DATA_CONN
PP1V8_DMIC
PDM_DMIC_CLK1
AUD_DMIC1_DATA_CONN
GND

FUNC_TEST=TRUE

J6410 - REAR LEFT CONNECTOR

SPKRCONN_RL_OUTP
SPKRCONN_RL_OUTN

SPKR_ID0

GND

2 TPs

FUNC_TEST=TRUE

J6410 - FRONT LEFT CONNECTOR

SPKRCONN_FL_OUTP
SPKRCONN_FL_OUTN
GND

2 TPs

FUNC_TEST=TRUE

J6510 - REAR RIGHT CONNECTOR

SPKRCONN_RR_OUTP
SPKRCONN_RR_OUTN

SPKR_ID1

GND

2 TPs

FUNC_TEST=TRUE

J6550 - FRONT RIGHT CONNECTOR

SPKRCONN_FR_OUTP
SPKRCONN_FR_OUTN
GND

2 TPs

FUNC_TEST=TRUE

J6600 - Audio Jack Connector

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

AUD_CONN_HP_LEFT
AUD_CONN_HP_RIGHT
AUD_CONN_RING2
AUD_CONN_SLEEVE
AUD_CONN_HP_SENSE_L
AUD_CONN_HP_SENSE_R
AUD_CONN_TIP_SENSE
AUD_CONN_RING_SENSE
AUD_CONN_SLEEVE_XW
AUD_CONN_RING2_XW

GND

2 TPS

J6950 - Battery Connector

IN

PPVBAT_G3H_CONN
GND

8 TPs

J6951 - BATTERY SENSE CONNECTOR

IN
IN
IN
IN
IN

SYS_DETECT_L
SYS_DETECT
SMBUS_3V3_BATT_SCL
SMBUS_3V3_BATT_SDA
SENSOR_PWR_EN

GND

1 TPs

J6001 FAN CONNECTOR

IN
IN
IN
IN

GND_FAN
PP5V_G3S_FAN
FAN_RT_TACH
FAN_RT_PWM

J4900 - Mesa Connector

IN
IN
IN
IN
IN
IN
IN
IN

IN

PP3V0_MESA_FILT_CONN
PP16V0_MESA_FILT_CONN
PP1V8_MESA_FILT_CONN
SPI_MESA_MISO_CONN
SPI_MESA_MOSI_CONN
SPI_MESA_CLK_CONN
MESA_INT_CONN
MESA_BOOST_EN_CONN

PMU_ONOFF_R_L_CONN
GND

6 TPS

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

0

FUNC_TEST=TRUE

5

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE

86 75

86 76 75

1 TPs

76 4

75 4

76 4

76

76 43

76

88 76

86 76 74 73 69 67 66 65 51

75

87 30 28 27

30 28

30 28

30 28

87 30 29

30 29

30 29

30 29

30 29

30

30

89 28

89 28

29 27

29 27

29 27

8 TPS

14

14

14

2 TPs
2 TPs

2 TPs
1 TPs
1 TPs

1 TPs

43 35

43 35

62 46 43

14

14

14

14

14

14

14

14

14

IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

IN

IN

IN
IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN

IN
IN
IN

IN

IN

IN

IN
IN
IN

IN

IN

IN

IN
IN
IN

J8500 - eDP Connector

PPVOUT_S0_LCDBKLT_F
PPVOUT_S0_LCDBKLT

EDP_BKLT_PWM
EDP_BKLT_EN
EDP_PANEL_PWR_EN
TP_LCD_IRQ_L
DP_INT_HPD
EDP_PANEL_PWR_BUF_EN
PP3V3_S0SW_LCD
PP5V_S0SW_LCD

PP5V_G3S_CPUREG_MISC

PPVIN_S0SW_LCDBKLT
GND

12 TPS

FUNC_TEST=TRUE

J3300 - Left USB-C Connector

PP20V_USBC_XA_VBUS
USBC_XA_CC1
USBC_XA_CC2
USBC_XA_SBU1
USBC_XA_SBU2

PP20V_USBC_XB_VBUS
USBC_XB_CC1
USBC_XB_CC2
USBC_XB_SBU1
USBC_XB_SBU2
TP_USBC_PP20V_XA
TP_USBC_PP20V_XB
USB_SOC_TYPEC_P
USB_SOC_TYPEC_N
GND

48 TPS

FUNC_TEST=TRUE

USB3_BSSB_D2R_R_P
USB3_BSSB_D2R_R_N
USB3_BSSB_R2D_P
USB3_BSSB_R2D_N

GND

12 TPS

FUNC_TEST=TRUE

PROBE BLOCK GRID - DFU/SOC/DCI

TP_USB3_EXTC_R2D_C_N
TP_USB_FIXT1_N
TP_USB3_EXTC_D2R_N

TP_USB3_EXTC_D2R_P

TP_USB_FIXT1_P

TP_USB3_EXTC_R2D_C_P
GND

USB3_EXTD_R2D_C_N
TP_USB_FIXT2_N
USB3_EXTD_D2R_N

USB3_EXTD_D2R_P

TP_USB_FIXT2_P

USB3_EXTD_R2D_C_P

GND

Hall Effect

SMC_LID_LEFT
SMC_LID_RIGHT
IPD_LID_OPEN
GND

1 TPs

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

DFU/SOC/FCT DEBUG

FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

7 TPs
1 TPs

4 TPs

88 51 23 22 21 20

4 TPs

23 22 21 20 19

34 27

89 72 34 28

34 28

35

29 28

89

13

35

89 34

89 34

27 12

27 12

29 27

29 27

35

35

35

89 35

89 35

36

36

72 47 35

72 47 35

47 35 29 27

47 35 29 27

64

64

Memory Power

88 74 73 50

73 72

89 73 72

88 50 9 7 6

88 73 24

50 32

51 32

Wireless/BT Power

JC400

SWDL

OMIT

1

USB3_D2R_P
GND

5 6

USB2_D_P
GND

9 10

USB3_R2D_P

SM-TP-0.5MM

USB3_D2R_N

GND

USB2_D_N

GND

USB3_R2D_N

JC410

SWDL

OMIT

1

USB3_D2R_P
GND

5 6

USB2_D_P
GND

9 10

USB3_R2D_P

SM-TP-0.5MM

USB3_D2R_N

GND

USB2_D_N

GND

USB3_R2D_N

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

SOC_USB_VBUS
SOC_FORCE_DFU
SOC_DFU_STATUS
SOC_DOCK_CONNECT
DFUMUX_SEL
SOC_SWD_MUX_SEL_PCH
SOC_COLD_RESET_L
USB_SOC_N
USB_SOC_P
PCH_UART_DEBUG_R2D
PCH_UART_DEBUG_D2R
SWD_SOC_SWCLK_XB
SWD_SOC_SWDIO_XB
DEBUG_JTAG_SOC_TDI
DEBUG_JTAG_SOC_TDO
TP_JTAG_SOC_TRST_L
SMC_DEBUGPRT_TX
SMC_DEBUGPRT_RX
SOC_DEBUGPRT_TX
SOC_DEBUGPRT_RX
I2C_PWR_SCL
I2C_PWR_SDA
I2C_UPC_SCL
I2C_UPC_SDA

GND

10 TPS

FUNC_TEST=TRUE

DFU/SOC/FCT DISCHARGE

IN
IN

IN
IN
IN
IN
IN
IN

IN
IN

2
43

87

PPDCIN_G3H_CHGR
PPVBAT_G3H_CHGR_REG

PP1V2_S3
PVDDQ_PGOOD
PVDDQ_EN
PP1V8_S3_MEM
PP1V2_S3_CPUDDR
PP0V6_S0_DDRVTT
GND

5 TPS

FUNC_TEST=TRUE

PP3V3_G3S_WLANBT
PP1V8_G3S_WLANBT
GND

2 TPS

2
43

87

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE

87 64 49 27

86 74 68 63 54 52

70 69 65 42 18 17 9 7 5

86 73 70 54 16 11 7

89 25 15 13 12

85 72 63 29 28

72 71 63 61 57 54 50 29 28 27

76 75 74 62 57 51 50 45

85 81 80 79 78 77

85 82 81 80 79 78 77 70

85 82 81 80 79 78 77 70

85 82 81 80 79 78 77

82 80 79 78 77

82 81 80 79 78 77

60 47 44 43 42 40 34 29 28 27

89 86 81 74 72 71 70 64 63

32 18 17 16 15 14 13 12 11 7
74 73 72 70 69 65 53 47 42

58 57 55 51 48 47 45 44 43 18

47 43 42 18 14 13 12 11 7 5 4

75 68 55 54 52 51 50 46 29 28

87 86 75 72 64 62 49

76 74 68 62 61 60 59

89 74 73 71 69

86 71 70 40 39

72 70 62 43 42 40 37 27

85 82 81 72 35 34

6 TPs

87 66 50 9 7

87 67 50 10 7

87 66 52 9 7

87 73 9 7 4

86 69 9 7

6 TPs

71 16 9 7

74 9 7

86 70 54 11 7

71 13 11 7

72 18

72 14

42 13

42 13

42 16 13

89 72 35 18

18 17 15 13

85 72 17 5

72 16 13

72 5

72 65

72 68

89 86 76 74

64 63

74 72

89 74 72

82 81

81 43 34

71 40

85 72 60 35

89 13

89 13

35

85 72 34

71 40

86 70 43 38

86 70 43 38

89 72 34 28

73 72

74 73 71 12

86 70 43 39

71 40 39 34

70

89 72 71

72 32

85 72 35

72 35

72 68

71 39

86 70 38

72 68

42 16 13

42 35

86
77

77

78

78

79

79

80

80

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DFU/SOC/FCT DMM/Power Sequence

IN
IN
IN
IN
IN
IN
IN

5

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

5

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN

PPDCIN_G3H
PP3V3_G3H
PPVCC_S0_CPU
PPVCCGT_S0_CPU
PPVCCSA_S0_CPU
PPVCCIO_S0_CPU
PPVCCEDRAM_S0_CPU
PP1V_S0SW
PP1V2_S0SW
PP1V_S3
PP1V_PRIM
PPVPCORE_S5
PP3V_G3H_RTC
ALL_SYS_PWRGD
PCH_RTC_RESET_L
PM_PCH_PWROK
PM_PCH_SYS_PWROK
PM_RSMRST_L
PM_SLP_S3_L
PM_SLP_S0_L
PLT_RST_L
PM_THRMTRIP_L
PCH_PWRBTN_L
CPU_PROCHOT_R_L
CPU_CATERR_L
CPU_VR_READY
PMU_PVDDMAIN_EN
UPC_PMU_RESET
PP3V3_G3H_RTC
CHGR_EN_MVR
P3V3G3S_EN
PP3V3_G3S
P1V8G3S_EN
PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
PP0V9_SSD0
PP2V5_NAND_SSD0
SSD0_WP_L
SSD0_OCARINA_PFN_L
SSD0_OCARINA_RESET_L
SSD_PMU_RESET_L
PP3V3_AWAKE
PMU_COLD_RESET_L
PM_SLP_S4_L
PM_SLP_S5_L
TP_SMC_FIXTURE_MODE_L
PP1V8_SLPS2R
SOC_SOCHOT_L
PP1V2_AWAKE
PP0V82_SLPDDR
PPVDDCPU_AWAKE
PP1V8_S5
PPBUS_G3H
PP1V8_G3S
PMU_ACTIVE_READY
PP3V3_S5
PVCCIO_EN
CPU_C10_GATE_L
PP0V9_SLPDDR
PP1V1_SLPDDR
PP1V1_SLPS2R
PP1V8_AWAKE
PP1V8_SLPS2R_PMUVDDGPIO
P1V1_SLPDDR_SOCFET_EN
PMU_CLK32K_WLANBT
SOC_WDOG
PMU_CLK32K_SOC
PMU_SYS_ALIVE
P5VG3S_EN
PP0V8_SLPS2R
PPVDDCPUSRAM_AWAKE
P5VG3S_PGOOD
PM_SYSRST_L
SMC_SYSRST_L
PP5V_G3S
SSD0_S4E0_ANI0_VREF
SSD0_S4E0_ANI1_VREF
SSD0_S4E1_ANI0_VREF
SSD0_S4E1_ANI1_VREF

SSD0_S4E2_ANI0_VREF
SSD0_S4E2_ANI1_VREF
SSD0_S4E3_ANI0_VREF
SSD0_S4E3_ANI1_VREF
GND

8 TPS

FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE

D

C

B

A

SYNC_DATE=SYNC_MASTER=

FCT

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

124 OF 500

SHEET

83 OF 98

8

67

35 4

2

1

678

3 245

1

SAR Fusion Sensor Debug PMIC Switch Nodes

D

77 37

77 37

37 14

37 14

OUT

OUT

OUT

OUT

PCIE_SSD0_D2R_N<0>

PCIE_SSD0_D2R_P<0>

PCIE_CLK100M_SOC_N

PCIE_CLK100M_SOC_P

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC510

PPC511

PPC539

PPC540

76 36

76 36

76 36

76 36

MIPI_FTCAM_DATA_P<0>

MIPI_FTCAM_DATA_N<0>

MIPI_FTCAM_CLK_P

MIPI_FTCAM_CLK_N

PPC549

P5MM-SP

SM-SP

1

PP

PPC550

P5MM-SP

SM-SP

1

PP

PPC551

P2MM

SM

1

PP

PPC552

P2MM

SM

1

PP

43 35

43 35

43 35

OUT

OUT

OUT

SPI_ACCEL_CS_L

SPI_AOP_SENSOR_MISO

ACCEL_INT1

SOC SENSE

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC561

PPC564

PPC565

70

70

70

70

70

70

70

70

70

70

70

70

70

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

PVDDCPUAWAKE_SW0

PVDDCPUAWAKE_SW1

PVDDCPUAWAKE_SW2

PVDDCPUAWAKE_SW3

PVDDCPUSRAMAWAKE_SW0

P0V8SLPDDR_SW0

P0V8SLPDDR_SW1

P1V8SLPS2R_SW0

P1V1SLPS2R_SW0

P1V1SLPS2R_SW1

P0V9SLPDDR_SW0

P0V9SLPDDR_SW1

PVPCORES5_SW0

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC509

PPC512

PPC513

PPC514

PPC515

PPC516

PPC517

PPC518

PPC521

PPC522

PPC523

PPC524

PPC527

D

C

78 77 37

78 77 37

80 79 37

80 79 37

25 14

25 14

OUT

OUT

OUT

OUT

OUT

OUT

PCIE_CLK100M_SSD0_01_N

PCIE_CLK100M_SSD0_01_P

PCIE_CLK100M_SSD0_23_N

PCIE_CLK100M_SSD0_23_P

PCIE_CLK100M_TBT_X_N

PCIE_CLK100M_TBT_X_P

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC541

PPC542

PPC553

PPC554

PPC543

PPC544

72 38

28 25

28 25

29 25

29 25

SOC_VDDCPU_SENSE

ACE-TR AUX/LS

USBC_XA_AUXLSX1

USBC_XA_AUXLSX2

USBC_XB_AUXLSX1

USBC_XB_AUXLSX2

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC530

PPC570

PPC571

PPC572

PPC573

70

70

OUT

OUT

PVPCORES5_SW1

P1VPRIM_SW1

P2MM

SM

1

PP

P2MM

SM

1

PP

PPC525

PPC528

C

B

ACE GPIO PPs

P2MM

SM

28 27

29 27

5

OUT

XDP_BPM_L<0>

TPC520

A

TP-P5

UPC_XA_SER_DBG

UPC_XB_SER_DBG

1

PP

P2MM

SM

1

PP

PPC578

PPC579

B

A

8

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

PROBE POINTS

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

pvt

PAGE

125 OF 500

SHEET

84 OF 98

1

SIZE

D

678

3 245

1

D

83 75 52

83 62

KEYBOARD CONNECTOR 5V

PP5V_G3S_KBD

1

CD500

12PF

5%
25V

2

NP0-C0G
0201

TRACKPAD SPI CLK

SPI_TPAD_3V3_CLK

1

CD510

12PF

5%
25V

2

NP0-C0G
0201

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77

S4E U8600 VDD

PP0V9_SSD0

1

CD560

2

S4E U8600 VCC

PP2V5_NAND_SSD0

1

CD570

2

1

CD561

12PF

5%
25V
NP0-C0G
0201

12PF

5%
25V 25V
NP0-C0G
0201

12PF

5%
25V

2

NP0-C0G
0201

1

CD571

12PF

5%

2

NP0-C0G
0201

1

CD562

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD572

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD563

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD573

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD564

12PF

5%
25V

2

NP0-C0G
0201

85 83 82 81 80 79 78 77 70

1

CD565

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 82 81 80 79 78 77

S4E U8800 VDD

PP0V9_SSD0

1

CD5E0

2

S4E U8800 VCC

PP2V5_NAND_SSD0

1

CD5F0

2

12PF

5%
25V
NP0-C0G
0201

12PF

5%
25V
NP0-C0G
0201

1

CD5E1

12PF

5%
25V

2

NP0-C0G
0201

1

CD5F1

12PF

5%
25V

2

NP0-C0G
0201

1

CD5E2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5F2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5E3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5F3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5E4

12PF

5%
25V

2

NP0-C0G
0201

1

CD5E5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

D

C

87 73 69 67 66 65 49 43

85 83 82 81 80 79 78 77

EOPIO EDRAM VR HIGH SIDE

PPBUS_HS_CPU

1

CD520

12PF

5%
25V

2

NP0-C0G
0201

1

CD521

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

NAND VCC

PP2V5_NAND_SSD0

1

CD550

12PF

5%
25V

2

NP0-C0G
0201

1

CD551

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

S4E U8600 VDDIO1

PP1V8_IO_SSD0

1

CD580

12PF

5%
25V

2

NP0-C0G
0201

S4E U8600 VDDIO2

PPVCCQ_ANI_SSD0

1

CD590

12PF

5%
25V

2

NP0-C0G
0201

1

CD591

12PF

5%
25V

2

NP0-C0G
0201

1

CD582

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD592

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD593

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

S4E U8800 VDDIO1

PP1V8_IO_SSD0

1

CD5G0

12PF

5%
25V

2

NP0-C0G
0201

S4E U8800 VDDIO2

PPVCCQ_ANI_SSD0

1

CD5H0

12PF

5%
25V

2

NP0-C0G
0201

1

CD5G2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5H2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

C

85 83 82 81 80 79 78 77 70

85 83 82 81 80 79 78 77 70

CALPE BUCK 9

PP0V9_SSD0

1

2

CALPE BUCK 10

PPVCCQ_ANI_SSD0

1

2

CD532

12PF

5%
25V
NP0-C0G
0201

CD542

12PF

5%
25V
NP0-C0G
0201

1

CD533

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD543

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 82

81 80 79 78 77 70

85 83 82 81 80 79 78 77

S4E U8700 VDD

PP0V9_SSD0

1

CD5A0

2

S4E U8700 VCC

PP2V5_NAND_SSD0

1

CD5B0

2

12PF

5%
25V
NP0-C0G
0201

12PF

5%
25V
NP0-C0G
0201

1

CD5A1

12PF

5%
25V

2

NP0-C0G
0201

1

CD5B1

12PF

5%
25V

2

NP0-C0G
0201

1

CD5A2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5B2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5A3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5B3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5A4

12PF

5%
25V

2

NP0-C0G
0201

85 83 82 81 80 79 78 77 70

1

CD5A5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 82 81 80 79 78 77

S4E U8900 VDD

PP0V9_SSD0

1

CD5J0

2

S4E U8900 VCC

PP2V5_NAND_SSD0

1

CD5K0

2

12PF

5%
25V
NP0-C0G
0201

12PF

5%
25V
NP0-C0G
0201

1

CD5J1

12PF

5%
25V

2

NP0-C0G
0201

1

CD5K1

12PF

5%
25V

2

NP0-C0G
0201

1

CD5J2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5K2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5J3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5K3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

B

81 49

85 83 82 81 80 79 78 77 70

S4E

PPBUS_G3H_SSD0

OCARINA VDD

PP0V9_SSD0

1

CD5N0

12PF

5%
25V

2

NP0-C0G
0201

1

CD530

12PF

5%
25V

2

NP0-C0G
0201

1

CD5N1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD531

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

S4E U8700 VDDIO1

PP1V8_IO_SSD0

1

CD5C0

12PF

5%
25V

2

NP0-C0G
0201

S4E U8700 VDDIO2

PPVCCQ_ANI_SSD0

1

CD5D0

12PF

5%
25V

2

NP0-C0G
0201

1

CD5C2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5D2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 83 81 80 79 78 77

85 83 82 81 80 79 78 77 70

S4E U8900 VDDIO1

PP1V8_IO_SSD0

1

CD5L0

12PF

5%
25V

2

NP0-C0G
0201

S4E U8900 VDDIO2

PPVCCQ_ANI_SSD0

1

CD5M0

12PF

5%
25V

2

NP0-C0G
0201

1

CD5L2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD5M2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

B

A

85 83 82 81 80 79 78 77 70

8

OCARINA VDDIO2

PPVCCQ_ANI_SSD0

1

CD540

12PF

5%
25V

2

NP0-C0G
0201

1

CD541

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD545

12PF

5%
25V

2

NP0-C0G
0201

83 82 81 72 35 34

1

CD546

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 72 34

PMU_SYS_ALIVE

SOC_SOCHOT_L

67

CD5DP0

100PF

25V
C0G

0201

CD5DP4

100PF

5%
25V
C0G

0201

83 72 60 35

1

2

1

2

PMU_COLD_RESET_L

SOC_PERST_L

35 15

CD5DP1

100PF

5%5%
25V
C0G

0201

CD5DP5

100PF

5%
25V
C0G

0201

83 72 35

1

2

83 72 63 29 28

1

2

SOC_WDOG

UPC_PMU_RESET

CD5DP2

100PF

5%
25V
C0G

0201

CD5DP6

100PF

5%
25V
C0G

0201

83 72 17 5

1

2

PM_THRMTRIP_L

CD5DP3

100PF

5%
25V
C0G

0201

1

SYNC_DATE=SYNC_MASTER=

2

PAGE TITLE

A

DESENSE 1

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

6.0.0

1

2

BOM_COST_GROUP=DESENSE

35 4

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

135 OF 500

SHEET

85 OF 98

1

678

3 245

1

D

71 70 52

CALPE VDD MAIN HIGH SIDE INPUT

PP3V3_G3H_PMU_VDDMAIN

1

CD670

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G0

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD671

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD672

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD673

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD674

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD675

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD676

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G6

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD677

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G7

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD678

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G8

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD679

12PF

5%
25V

2

NP0-C0G
0201

1

CD6G9

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 70 54 11 7

83 75

CALPE PCH VCORE

PPVPCORE_S5

1

CD6F0

12PF

5%
25V

2

NP0-C0G
0201

1

CD6F1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

LCD BACKLIGHT DRIVER VOUT

PPVOUT_S0_LCDBKLT_F

1

CD600

3PF

+/-0.1PF
100V

2

C0G
0201

1

CD601

3PF

+/-0.1PF
100V

2

C0G
0201

D

C

75 68 55 54 52 51 50 46 29 28

83 74 68 63 54 52

83

VR 5V G3S

PP5V_G3S

VR 3V3 G3H

3.3

PP3V3_G3H

1

CD620

12PF

5%
25V

2

NP0-C0G
0201

1

CD623

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD621

12PF

5%
25V

2

NP0-C0G
0201

1

CD624

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD622

12PF

5%
25V

2

NP0-C0G
0201

1

CD625

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 73 70 54 16 11 7

83 70 43 38

CALPE PCH 1V1 PRIM

PP1V_PRIM

1

CD680

12PF

5%
25V

2

NP0-C0G
0201

CALPE 0V82 SLPDDR

PP0V82_SLPDDR

1

CD690

12PF

5%
25V

2

NP0-C0G
0201

1

CD681

12PF

5%
25V

2

NP0-C0G
0201

1

CD691

12PF

5%
25V

2

NP0-C0G
0201

83 76 75

83 69 9 7

PPVOUT_S0_LCDBKLT

EDRAM

PPVCCEDRAM_S0_CPU

1

CD6J0

3PF

+/-0.1PF
100V

2

C0G
0201

1

CD6L0

12PF

5%
25V

2

NP0-C0G
0201

1

CD6J1

3PF

+/-0.1PF
100V

2

C0G
0201

1

CD6L1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD6L2

12PF

5%
25V

2

NP0-C0G
0201

1

CD6L3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

C

B

68 49

1

CD630

12PF

5%
25V

2

NP0-C0G
0201

1

CD633

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

2

1

2

VR 3V3 G3H HIGH SIDE

PPVIN_G3H_P3V3G3H

1

CD640

12PF

5%
25V

2

NP0-C0G
0201

1

CD641

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

CD631

12PF

5%
25V
NP0-C0G
0201

CD634

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

1

CD632

12PF

5%
25V

2

NP0-C0G
0201

1

CD635

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 70 43 38

83 70 38

CALPE CPU AWAKE

PPVDDCPU_AWAKE

1

CD6A0

12PF

5%
25V

2

NP0-C0G
0201

1

2

CALPE CPU SRAM AWAKE

PPVDDCPUSRAM_AWAKE

1

CD6B0

12PF

5%
25V

2

NP0-C0G
0201

1

2

CD6A1

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

CD6B1

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

72 71 63 61 57 54 50 29 28 27

89 83 76 74

63

PP3V3_G3H_RTC

PPVIN_G3H_P3V3G3HRTC_R

1

CD6M0

12PF

5%
25V

2

NP0-C0G
0201

1

CD6N0

12PF

5%
25V

2

NP0-C0G
0201

1

CD6M1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD6N1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

B

68 49

83 63

VR 5V G3S HIGH SIDE

PPVIN_G3H_P5VG3S

1

CD650

12PF

5%
25V

2

NP0-C0G
0201

1

CD651

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

BATTERY CONNECTOR SYS DETECT

SYS_DETECT_L

1

CD660

12PF

5%
25V

2

NP0-C0G
0201

1

CD661

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

60 47 44 43 42 40 34 29 28 27

89 83 81 74 72 71 70 64 63

83 71 70 40 39

CALPE 1V8 SLPS2R

PP1V8_SLPS2R

1

CD6C0

12PF

5%
25V

2

NP0-C0G
0201

CALPE 1V1 SLPS2R

PP1V1_SLPS2R

1

CD6D0

12PF

5%
25V

2

NP0-C0G
0201

CALPE 0V9 SLPDDR

1

CD6C1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD6D1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

87 83 75 72 64 62 49

83 75

PPVOUT_S0_KBDLED

PPBUS_G3H

1

CD6S0

12PF

5%
100V

2

C0G
0201

1

CD6P2

12PF

5%
25V

2

NP0-C0G
0201

1

CD6S1

12PF

5%
100V

2

C0G
0201

1

CD6P0

12PF

5%
25V

2

NP0-C0G
0201

1

CD6S2

12PF

5%
100V

2

C0G

1

CD6P1

2

1

CD6S3

12PF

5%
100V

2

C0G
02010201

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

A

83 76 74 73 69 67 66 65 51

8

VR 5V ALS

PP5V_G3S_CPUREG_MISC

1

CD6R1

12PF

5%
25V

2

NP0-C0G
0201

1

CD6R2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 70 43 39

PP0V9_SLPDDR

1

CD6E0

12PF

5%
25V

2

NP0-C0G
0201

1

CD6E1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

DESENSE 2

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

A

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DESENSE

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

136 OF 500

SHEET

86 OF 98

1

678

3 245

1

D

63 49

63

3V3 G3H RTC VR HIGH SIDE PBUS TRACKPAD

PPVIN_G3H_P3V3G3HRTC

1

CD700

12PF

5%
25V

2

NP0-C0G
0201

3V3 G3H RTC VR

PP3V3_G3H_RTC_REG_R

1

CD710

12PF

5%
25V

2

NP0-C0G
0201

1

CD701

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD711

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

87 86 83 75 72 64 62 49 83 48 46

62 54

PPBUS_G3H PP1V8_DFR

1

CD7M0

12PF

5%
25V

2

NP0-C0G
0201

5V G3S TRACKPAD

PP5V_G3S_TPAD

1

CD7L0

12PF

5%
25V

2

NP0-C0G
0201

1

CD7M1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7L1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

85 73 69 67 66 65 49 43

DFR 1V8 VR

1

CD790

3.0PF 3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD791

+/-0.1PF
25V

2

NP0-C0G
0201

CPU CORE/VCCSA/GT VR HIGH SIDE

PPBUS_HS_CPU

1

CD7A0

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A1

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A2

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A3

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A4

12PF

5%
25V

2

NP0-C0G
0201

D

C

83 64 49 27

28 27

DCIN CHARGER

PPDCIN_G3H

DCIN XA ACE2

PPDCIN_XA_G3H_F

1

CD720

12PF

5%
25V

2

NP0-C0G
0201

1

CD730

12PF

5%
25V

2

NP0-C0G
0201

1

CD721

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD731

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 66 50 9 7

CPU CORE VR LOAD SIDE

PPVCC_S0_CPU

1

CD7B0

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J0

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7B1

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

CPU VCCSA LOAD SIDE

1

CD7B2

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7B3

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7B4

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7B5

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7B6

12PF

5%
25V

2

NP0-C0G
0201

1

CD7J6

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7A5

12PF

5%
25V

2

NP0-C0G
0201

1

CD7G5

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A6

12PF

5%
25V

2

NP0-C0G
0201

1

CD7G1

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A7

12PF

5%
25V

2

NP0-C0G
0201

1

CD7G2

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A8

12PF

5%
25V

2

NP0-C0G
0201

1

CD7G3

12PF

5%
25V

2

NP0-C0G
0201

1

CD7A9

12PF

5%
25V

2

NP0-C0G
0201

1

CD7G4

12PF

5%
25V

2

NP0-C0G
0201

C

B

29 27

87 86 83 75 72 64 62 49

87 86 83 75 72 64 62 49

DCIN XB ACE2

PPDCIN_XB_G3H_F

1

CD740

12PF

5%
25V

2

NP0-C0G
0201

1

CD741

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PBUS CHARGER

PPBUS_G3H

1

CD750

12PF

5%
25V

2

NP0-C0G
0201

1

CD751

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PBUS CPU HIGH SIDE SENSOR

PPBUS_G3H

83 66 52 9 7

83 67 50 10 7

PPVCCSA_S0_CPU

1

CD7C0

12PF

5%
25V

2

NP0-C0G
0201

CPU VCCGT LOAD SIDE

PPVCCGT_S0_CPU

1

CD7D0

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V0

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7C2

12PF

5%
25V

2

NP0-C0G
0201

1

CD7D1

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7C3

12PF

5%
25V

2

NP0-C0G
0201

1

CD7D2

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7C1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7D3

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7C4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7D4

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7C5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7D5

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7D8

12PF

5%
25V

2

NP0-C0G
0201

1

CD7V8

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7H0

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7H5

3.0PF

+/-0.1PF
25V 25V

2

NP0-C0G
0201

1

CD7H1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7H6

3.0PF

+/-0.1PF +/-0.1PF

2

NP0-C0G
0201

1

CD7I1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7H2

3.0PF

+/-0.1PF
25V 25V

2

NP0-C0G
0201

1

CD7H7

3.0PF

25V 25V

2

NP0-C0G
0201

1

CD7I2

3.0PF

+/-0.1PF
25V 25V

2

NP0-C0G
0201

1

CD7H3

3.0PF

+/-0.1PF

2

NP0-C0G
0201

1

CD7H8

3.0PF

+/-0.1PF +/-0.1PF

2

NP0-C0G
0201

1

CD7I3

3.0PF

+/-0.1PF

2

NP0-C0G
0201

1

CD7H4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7H9

3.0PF

25V

2

NP0-C0G
0201

1

CD7I4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

B

87 86 83 75 72 64 62 49

87 86 83 75 72 64 62 49

1

CD760

12PF

5%
25V

2

NP0-C0G
0201

1

CD761

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PBUS RIGHT AMP SENSOR

PPBUS_G3H

1

CD770

12PF

5%
25V

2

NP0-C0G
0201

1

CD771

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

PBUS LEFT AMP SENSOR

PPBUS_G3H

83 73 9 7 4

83 30 29

CPU VCCIO LOAD SIDE

PPVCCIO_S0_CPU

1

CD780

12PF

5%
25V

2

NP0-C0G
0201

1

2

VBUS XB

PP20V_USBC_XB_VBUS

1

CD7E0

12PF

5%
25V

2

NP0-C0G
0201

1

2

CD781

3.0PF

+/-0.1PF
25V
NP0-C0G
0201

CD7E1

12PF

5%
25V
NP0-C0G
0201

1

CD7E2

12PF

5%
25V

2

NP0-C0G
0201

1

CD7E3

12PF

5%
25V

2

NP0-C0G
0201

1

CD7E4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7E5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD7I5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

A

8

1

CD7K0

12PF

5%
25V

2

NP0-C0G
0201

1

CD7K1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 30 28 27

VBUS XA

PP20V_USBC_XA_VBUS

67

1

CD7F0

12PF

5%
25V

2

NP0-C0G
0201

1

CD7F4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

DESENSE 3

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DESENSE

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

137 OF 500

SHEET

87 OF 98

1

SIZE

D

678

3 245

1

D

MEM 1V2 LOAD SIDE

73 50 23 22 21 20 19 83 73 24

83 74

PP1V2_S3 PP0V6_S0_DDRVTT

1

CD800

12PF

5%
25V

2

NP0-C0G
0201

1

CD808

12PF

5%
25V

2

NP0-C0G
0201

1

CD816

12PF

5%
25V

2

NP0-C0G
0201

1

CD801

12PF

5%
25V

2

NP0-C0G
0201

1

CD809

12PF

5%
25V

2

NP0-C0G
0201

1

CD817

12PF

5%
25V

2

NP0-C0G
0201

1

CD802

12PF

5%
25V

2

NP0-C0G
0201

1

CD810

12PF

5%
25V

2

NP0-C0G
0201

1

CD818

12PF

5%
25V

2

NP0-C0G
0201

1

CD803

12PF

5%
25V

2

NP0-C0G
0201

1

CD811

12PF

5%
25V

2

NP0-C0G
0201

1

CD819

12PF

5%
25V

2

NP0-C0G
0201

1

CD804

12PF

5%
25V

2

NP0-C0G

1

CD812

12PF

5%
25V

2

NP0-C0G
0201

1

CD820

12PF

5%
25V

2

NP0-C0G
0201

1

CD805

12PF

5%
25V

2

NP0-C0G
0201

1

CD813

12PF

5%
25V

2

NP0-C0G
0201

1

CD821

12PF

5%
25V

2

NP0-C0G
0201

1

CD806

12PF

5%
25V

2

NP0-C0G
0201

1

CD814

12PF

5%
25V

2

NP0-C0G
0201

1

CD822

12PF

5%
25V

2

NP0-C0G
0201

1

CD807

12PF

5%
25V

2

NP0-C0G
02010201

1

CD815

12PF

5%
25V

2

NP0-C0G
0201

1

CD823

12PF

5%
25V

2

NP0-C0G
0201

MEM 0V6 DDRVTT LOAD SIDE

1

CD890

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A0

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD891

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD892

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD893

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD894

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A4

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD895

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A5

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD896

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A6

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD897

12PF

5%
25V

2

NP0-C0G
0201

1

CD8A7

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

D

C

1

CD824

12PF

5%
25V

2

NP0-C0G
0201

1

CD832

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD840

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD825

12PF

5%
25V

2

NP0-C0G
0201

1

CD833

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD841

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD834

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD842

3.0PF

+/-0.1PF
25V 25V

2

NP0-C0G
0201

1

CD827

12PF

5%
25V

2

NP0-C0G
0201

1

CD835

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD843

3.0PF

+/-0.1PF

2

NP0-C0G
0201

1

CD828

12PF

5%
25V

2

NP0-C0G
0201

1

CD836

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD844

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD837

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD845

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD838

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD846

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD839

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD847

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

83 50 9 7 6

26

CPU 1V2 LOAD SIDE

PP1V2_S3_CPUDDR

1

CD8B0

12PF

5%
25V

2

NP0-C0G
0201

1

CD8C0

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

TBT X SVR

PP0V9_TBT_X_SVR

1

CD8B1

12PF

5%
25V

2

NP0-C0G
0201

1

CD8C1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD8B2

12PF

5%
25V

2

NP0-C0G
0201

1

CD8C2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD8B3

12PF

5%
25V

2

NP0-C0G
0201

1

CD8C3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

C

B

1

CD848

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD856

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD864

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD849

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD857

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD865

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD850

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD866

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD851

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD859

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD867

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD852

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD860

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD853

3.0PF

+/-0.1PF
25V 25V

2

NP0-C0G
0201

1

CD861

3.0PF

+/-0.1PF +/-0.1PF
25V

2

NP0-C0G
0201

1

CD854

3.0PF

+/-0.1PF

2

NP0-C0G
0201

1

CD862

3.0PF 3.0PF

25V

2

NP0-C0G
0201

1

CD855

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD863

+/-0.1PF
25V

2

NP0-C0G
0201

51 27 26

83 76

1

CD8H0

12PF

5%
25V

2

NP0-C0G
0201

1

CD8H1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

TBT X S0

PP3V3_TBT_X_S0

1

CD8D0

12PF

5%
25V

2

NP0-C0G
0201

1

CD8D1

12PF

5%
25V

2

NP0-C0G
0201

EDP CONNECTOR 5V LCD

PP5V_S0SW_LCD

1

CD8E0

12PF

5%
25V

2

NP0-C0G
0201

1

CD8E1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD8D2

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD8D3

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

B

A

83 51 23 22 21 20

MEM 1V8 LOAD SIDE

PP1V8_S3_MEM

1

CD870

12PF

5%
25V

2

NP0-C0G
0201

1

CD880

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD871

12PF

5%
25V

2

NP0-C0G
0201

1

CD881

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD872

12PF

5%
25V

2

NP0-C0G
0201

1

CD882

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD873

12PF

5%
25V

2

NP0-C0G
0201

1

CD883

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD874

12PF

5%
25V

2

NP0-C0G
0201

1

CD884

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD875

12PF

5%
25V

2

NP0-C0G
0201

1

CD885

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD876

12PF

5%
25V

2

NP0-C0G
0201

1

CD886

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

1

CD877

12PF

5%
25V

2

NP0-C0G
0201

1

CD887

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

76

83 76 47

EDP CONNECTOR 5V ALS

PP5V_G3S_ALSCAM

1

CD8F0

12PF

5%
25V

2

NP0-C0G
0201

1

CD8F1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

EDP CONNECTOR 3V3 LCD

PP3V3_S0SW_LCD

1

CD8G0

12PF

5%
25V

2

NP0-C0G
0201

1

CD8G1

3.0PF

+/-0.1PF
25V

2

NP0-C0G
0201

BOM_COST_GROUP=DESENSE

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

DESENSE 4

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

138 OF 500

SHEET

88 OF 98

A

8

67

35 4

2

1

D

DEBUG_BUTTON

PLACE_SIDE=TOP

SILK_PART=PWR_BTN

CRITICAL

SE031

SKSFABE010

SM

1

2

3

4

PMU_ONOFF_R_L_CONN

Debug Power "Buttons"

44 60 83 89

OUT

DEBUG_BUTTON

PLACE_SIDE=BOTTOM

SILK_PART=PWR_BTN

CRITICAL

SE030

SKSGPCE010

SM

1
3

GND

5

2

PMU_ONOFF_R_L_CONN PMU_RSLOC_RST_L

4

6

DEBUG_BUTTON

PLACE_SIDE=TOP

SILK_PART=RSLOC

CRITICAL

SE029

SKSFABE010

SM

1

2

3

4

44 60 83 89 61 63 72 83 89

PMU_RSLOC_RST_L

678

61 63 72 83 89

OUT

DEBUG_BUTTON

PLACE_SIDE=BOTTOM

SILK_PART=RSLOC

CRITICAL

SE028

SKSGPCE010

SM

1
3

GND

5

2
4

6

DEBUG_BUTTON

SILK_PART=FORCE_DFU

CRITICAL

SE032

SKSFABE010

SM

1

2

3

4

SOC_FORCE_DFU

PP1V8_SLPS2R

OUTOUT

Power State Debug LEDs

(For development only)

28 34 72 83

OUT

27 28 29 34 40 42 43 44 47 60
63 64 70 71 72 74 81 83 86

SOC DEBUG CONNECTOR TPS

3 245

PP3V3_S5

4 5 7 11 12 13 14 18 42 43 47
69 71 73 74 83

DBGLED

20K

5%

1/20W

MF

201

1

2

RE091

DBGLED_S4 DBGLED_S3 DBGLED_S0I3 DBGLED_S0

DBGLED

A

DSE006

GRN-90MCD-5MA-2.85V

0402

K

PLACE_SIDE=BOTTOM

SILK_PART=STBY_ON

DBGLED_S4_D

CRITICAL CRITICAL

QE090

SSM6N15AFEAP

SOT563

DBGLED

VER-1

2

G S

6

D

1

DBGLED

A

DSE003

GRN-90MCD-5MA-2.85V

0402

K

PLACE_SIDE=BOTTOM

SILK_PART=S3_ON

DBGLED_S3_D

QE090

SSM6N15AFEAP

DBGLED

DBGLED

RE092

VER-1

SOT563

5

1

20K

5%

1/20W

MF

201

2

G S

DBGLED

A

DSE004

GRN-90MCD-5MA-2.85V

0402

K

PLACE_SIDE=BOTTOM

SILK_PART=S0I3_ON

DBGLED

RE093

20K

5%

1/20W

MF

201

1

2

DBGLED

A

DSE005

0402

K

PLACE_SIDE=BOTTOM

SILK_PART=S0_ON

DBGLED

RE095

GRN-90MCD-5MA-2.85V

DBGLED_S0_DDBGLED_S0I3_D

3

D

CRITICAL

QE091

SSM6N15AFEAP

DBGLED

4

VER-1

SOT563

2

G S

6

D

SSM6N15AFEAP

1

1

20K

5%

1/20W

MF

201

2

CRITICAL

QE091

DBGLED

VER-1

SOT563

5

1

G S

D

3

D

4

C

SoC USB DFU Mux

20K limits USB Mini-B
from back powering MLB

DEBUG CONN

28 83 89

BI

28 83 89

BI

X ACE2

PP3V3_G3H_RTC

27 28 29 50 54 57 61 63 71 72
74 76 83 86

BYPASS=UE010::5mm

SOC_DBG

USB_SOC_DEBUG_P
USB_SOC_DEBUG_N

USB_SOC_TYPEC_P
USB_SOC_TYPEC_N

SEL OUTPUT

L Mini-B (M)
H Type-C (D)

CE010

0.1UF

10%
10V

X5R-CERM

0201

SOC_DBG

1

RE012

20K

5%
1/20W
MF
201

2

1

2

8

PP3V3_G3H_DFUMUX

VOLTAGE=3.449

MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000

9

2uA Max IDD

VCC

M+
M-

SOC_DBG

UE010

5
4

PI3USB102EZLE

7

D+

6

D-

OE* SEL

TQFN

CRITICAL

GND
3

Y+
Y-

1

USB_SOC_P

2

USB_SOC_N

10

DFUMUX_SEL

SOC

BI
BI

34 83 89

34 83 89

1

RE010

100K

5%
1/20W
MF
201

2

83

SOC AUSB

PCH EXTA USB2

PCH EXTA USB3

13 83

IN

13 83

IN

12 13 15 25 83

IN

18 35 72 83 89

IN

PM_SLP_S5_L
PM_SLP_S4_L
PM_SLP_S3_L
PM_SLP_S0_L

RE096
RE097

201 MF 5%

33

21

1/20W5%20133MF

21

1/20W

SWD_SOC_DEBUG_SWDIO

SWD_SOC_DEBUG_SWCLK

27 28

27 28

C

SWD_SOC_SWDIO

SWD_SOC_SWCLK

1/20W

0

21

0

0201MF5%

21

MF 02015% 1/20W

35 83

IN

35 83

OUT

SMC_DEBUGPRT_TX

SMC_DEBUGPRT_RX

RE099
RE098

OUT

KANZI

35

BI

35

SMC_DEBUGPRT_R_TX

SMC_DEBUGPRT_R_RX

UARTs

29

29

B

RE013

0

5%
MF

0201

21

SOC_DFU_BYPASS

USB_SOC_TYPEC_P USB_SOC_P

28 83 89 34 83 89

1/20W

PLACE_NEAR=UE010:10MM

RE014

0

USB_SOC_TYPEC_N

28 83 89

21

5%

1/20W

MF

PLACE_NEAR=UE010:10MM

0201

SOC_DFU_BYPASS

USB_SOC_N

34 83 89

B

A

P2MM

SM

1

28 34 72 83

IN

71 72 83

IN

18 35 72 83 89

IN

72 73 83

IN

72 74 83

IN

PMU_ACTIVE_READY

P1V1_SLPDDR_SOCFET_EN

PM_SLP_S0_L

PVDDQ_EN

P1V8G3S_EN

P2MM

1

P2MM

1

P2MM

1

P2MM

1

PP

SM

PP

SM

PP

SM

PP

SM

PP

PPE022

PPE023

PPE024

PPE025

PPE026

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

DEV SUPPORT 1

SIZE

D

Apple Inc.

DRAWING NUMBER

051-05309

REVISION

A

6.0.0

BOM_COST_GROUP=DEBUG

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

BRANCH

pvt

PAGE

140 OF 500

SHEET

89 OF 98

8

67

35 4

2

1

UE020 SAK Truth Table:

678

3 245

1

D

C

PMU_ACT_RDY SLP_SCFET_EN

0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0 0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

INPUTS

SLP_S0_L

0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0

0
0
1
1
1
1
0
0
0
0
1
1
1
1

VDDQ_EN

0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

1V8G3S_EN

0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

R

BLINK

0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

BLINK

0
0
1
0
0
0
1

OUTPUTS (OD)

G
1

1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
0

B COLOR
1

1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1

Blinking Red
Red
Magenta
White
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Blinking Green & Yellow
Yellow
Magenta
Blue
Magenta
Magenta
Magenta
Green

D

C

B

B

A

8

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

DEV SUPPORT 2

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BOM_COST_GROUP=DEBUG

67

35 4

IV ALL RIGHTS RESERVED

2

BRANCH

pvt

PAGE

141 OF 500

SHEET

90 OF 98

1

SIZE

D

678

3 245

1

D

CPU

SOC

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

1337S00574
337S00572 1 CRITICALU0500
337S00693

1 CRITICALU0500337S00692
337S00717

1 U0500
337S00716 U05001

1 CRITICALU3900339S00388
339S00601 1 U3900 CRITICAL

CPU,CFLU,SRCUU,QS,D0,2.3,28W,1.05,BGA1528

CPU,CFLU,SRCK5,QS,D0,2.7,28W,1.2,BGA1528

CPU,CFLU,QRH7,QS,D0,1.4,1.05,BGA1528

CPU,CFLU,QRH6,QS,D0,1.7,1.15,BGA1528

CPU,CFLU,SREZ2,PRQ,D0,1.4,4C,1.05,BGA1528

CPU,CFLU,SREZ1,PRQ,D0,1.7,4C,1.15,BGA1528

POP,GIBRALTAR+1GB 20NM,M,DEV,SCK,CSP1122

POP,GIBRALTAR+2GB 20NM,M,DEV,SCK,CSP1122

POP,GIBRALTAR_L+1GB 16NM,M,B0,SCK,C1122

U0500 CRITICAL1

U3900

CRITICALU0500

CRITICAL
CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL339S00386 1

CPU:28W_2P3G_SRCUU

CPU:28W_2P7G_SRCK5

CPU:15W_1P4G_QRH7

CPU:15W_1P7G_QRH6

CPU:15W_1P4G_SREZ2

CPU:15W_1P7G_SREZ1

SOC:DEV_1G
SOC:DEV_2G

SOC:PROD_B0_1G

TBT ROM

341S01553

341S01632

BT ROM

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

1 TBT_ROM:P1B
1
1

ROM,BBR/ACE(V48.2) PROTO-1-B,X1782

ROM,BBR/ACE(V41.13) EVT,X1782

ROM,BBR/ACE(V51.2) PVT,X1782

IC,SPI SERIAL FLASH,4M BIT,1.8V,USON8

IC,SPI SERIAL FLASH,4M BIT,1.8V,USON8

BT SFLASH ROM (V2) PROTO-0,X1536

ROM,BT SFLASH (VXX) PROTO-1,X1536

U2890
U2890
U2890

U3750
U3750

U3750341S01260 1 CRITICAL BT_ROM:P1

CRITICAL
CRITICAL341S01591
CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL1 BT_ROM:BLANK_WINBOND335S00348

TBT_ROM:EVT
TBT_ROM:PVT

BT_ROM:BLANK_MACRONIXCRITICAL1335S00400

BT_ROM:P0U3750 CRITICAL1341S01184

D

C

339S00605 1 CRITICALU3900

AMR ASSEMBLY

677-19902 J48001 AMR:POC

TBT

338S00441

UPC

353S02158

WIRELESS

POP,GIBRALTAR_L+2GB 16NM,M,B0,SCK,C1122

SOC:PROD_B0_2G

341S01638 CRITICAL1 U3750

ROM,BT SFLASH (V3.17.43) PVT,X1783

BT_ROM:PVT

WIFI ROM

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

SUBASSY (T&R) PCBA,AMR INTERPOSER,X941

1

IC,TBT,TITAN RIDGE DP,SLMHS,PRQ,C1,CSP337

U2800 TBT:TR_C1_PRQ

CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL

341S01637 1 U3710 CRITICAL

1 CRITICAL WIFI_ROM:BLANK_ON335S00214 U3710

IC,EEPROM,SER,UWIRE,16K,1.8V,DFN8

IC,EEPROM,SER,UWIRE,16K,1.8V,DFN8

IC,WIFI ROM (V1) WW1,X1536

ROM,WIFI (VXX) (NEW FOR DVT) WW1,X1536

ROM,WIFI (V1.1) WW1,X1783

U37101 CRITICAL WIFI_ROM:BLANK_ROHM335S00216

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

WIFI_ROM:V00U3710341S01087 1 CRITICAL
WIFI_ROM:DVTCRITICALU37101341S01394
WIFI_ROM:PVT

SPEAKER AMP

IC,CD3217,ACE2,B2,USB PWR SW W/HV,BGA123

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

U3100,U3200 UPC:ACE2_B2CRITICAL4

4353S01629 CRITICAL SPEAKER_AMP:B2

IC,TAS5770L,B2,CLASS D AMP,CSP30

IC,TAS5770L,C0,CLASS D AMP,CSP30

U6400,U6450,U6500,U6550

U6400,U6450,U6500,U6550

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

C

SPEAKER_AMP:C04 CRITICAL353S01871

339S00586 U3701 CRITICAL

339S00616 U3701
339S00628 CRITICAL
339S00632
339S00750

PMU

CHARGER IC

1

1 U3701

1

1 CRITICALU3701

MODULE,WIFI/BT,SAPPORO,ES2.1,M,LGA451

MODULE,WIFI/BT,SAPPORO,ES23,M,LGA451

MODULE,WIFI/BT,SAPPORO,ES3.1,M,LGA451

MODULE,WIFI/BT,SAPPORO,ES2.3,U,LGA451

MODULE,WIFI/BT,SAPPORO,ES3.1,U,LGA451

MODULE,WIFI/BT,SAPPORO,ES3.3,U,LGA451

IC,PMU,CALPE-L,D2249A0,OTP-BC,CSP324

U37011

U3701 CRITICAL1

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL339S00599
CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL338S00466 U78001

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

MODULE:MUR__ES_2P1

MODULE:MUR_ES_2P3

MODULE:MUR_ES_3P1

MODULE:USI_ES_2P3

MODULE:USI_ES_3P1

MODULE:USI_ES_3P1

CALPE_L:OTP_BC

VR DRIVER CPU CORE

353S00519

IC,SIC621,DR MOS,IMVP-8,60A,PQFN31,5X5MM

VR DRIVER CPU VCCSA

353S00525

1 DR_MOS_VCCSA:VISHAYCRITICAL

IC,SIC532,DR MOS,IMVP-8,30A,PQFN22,45X35

VR DRIVER CPU GT

353S00519

IC,SIC621,DR MOS,IMVP-8,60A,PQFN31,5X5MM

U7210,U7220

U7270

U7410,U7420

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL2

DR_MOS_CORE:VISHAY2

DR_MOS_GT:VISHAY

B

353S01525

DRAM

333S00125
333S00246
333S00126
333S00247

SE

998-15216
338S00445

OCARINA

1

4
4
4
4

1 CRITICAL

IC,ISL9240HIB0Z,PMU,SUONA,WCSP40,2.1X3.3

IC,SDRAM,LPDDR3-2133,16GBIT,21NM,H,BGA178

IC,SDRAM,LPDDR3-2133,16GBIT,18NM,BGA178

IC,SDRAM,LPDDR3-2133,32GBIT,21NM,H,BGA178

IC,SDRAM,LPDDR3-2133,32GBIT,18NM,BGA178

IC,SN100V,VENUS,DEV KEY,B2,S/W-M,WLCSP72

IC,SN100V,VENUS,PROD KEY,B2,SW-N,WLCSP72

U2300,U2400,U2500,U2600

U2300,U2400,U2500,U2600

U2300,U2400,U2500,U2600

U2300,U2400,U2500,U2600

U7000

U5001
U5001

CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL
CRITICAL
CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL1

CHARGER_IC:POC

B

DRAM:08GB_HYCRITICAL

DRAM:08GB_SS_D

DRAM:16GB_HY

DRAM:16GB_SS_D

SE:DEV_2019

SE:PROD_2019

A

1338S00410 U9000 SSD:4L

IC,PMU,OCARINA,D2499A0,OTP-AG,WLCSP56

VR INDUCTOR VCCSA

1 IND_VCCSA:CYNTECCRITICAL152S00689

IND,MLD,0.47UH,4.7MO,17.5A,5.6X5.2X2.4MM

BACKLIGHT VOUT FILTER

116S00006 1 CRITICAL

RES,MTL FILM,0 OHM,TIGHT TOL,3A,0402

USBC AARDVARKANOID

1

CONN,PLUG,B2B,12+2P,P=0.35MM,H=0.6MM

L7270

L8420

J3002

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

CRITICAL USBC_AARDVARKANOID516S00115

BKLT_FILT:ZERO_OHM

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

BOM CONFIGURATION

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

400 OF 500

SHEET

91 OF 98

A

8

67

35 4

2

1

678

3 245

1

NAND U8700NAND U8600

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTIONCRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

D

335S00377 CRITICAL
335S00393 CRITICAL
335S00388
335S00416 CRITICAL
335T00001 CRITICAL
335T00017 CRITICAL
335T00008
335S00394
335S00378
335S00424
335T00002
335T00018 CRITICAL
335T00009
335S00398

1

1

1
1
1
1
1 U8600
1
1

NAND,3DV4,64GBT,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV5,64GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV5,64GBT,S4E,256G,H,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

U8600
U86001
U8600
U86001
U86001
U86001
U86001
U8600
U8600
U8600
U8600

U8600
U8600

CRITICAL

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

CRITICAL
CRITICAL

NAND_U8600:2DP_HY

NAND_U8600:2DP_TS

NAND_U8600:2DP_WD

NAND_U8600:2DP_SS

NAND_U8600:2DP_TS_SLT

NAND_U8600:2DP_HY_SLT

NAND_U8600:2DP_SS_SLT

NAND_U8600:4DP_TS

NAND_U8600:4DP_HY

NAND_U8600:4DP_SS

NAND_U8600:4DP_TS_SLT

NAND_U8600:4DP_HY_SLT

NAND_U8600:4DP_SS_SLT

NAND_U8600:6DP_HY

335S00377
335S00393
335S00388
335S00416
335T00001
335T00017
335T00008
335S00394
335S00378
335S00424
335T00002
335T00018
335T00009
335S00398

1
1
1
1
1
1
1
1
1
1
1
1
1
1

NAND,3DV4,64GBT,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV5,64GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV5,64GBT,S4E,256G,H,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8700:2DP_HY

NAND_U8700:2DP_TS

NAND_U8700:2DP_WD

NAND_U8700:2DP_SS

NAND_U8700:2DP_TS_SLT

D

NAND_U8700:2DP_HY_SLT

NAND_U8700:2DP_SS_SLT

NAND_U8700:4DP_TS

NAND_U8700:4DP_HY

NAND_U8700:4DP_SS

NAND_U8700:4DP_TS_SLT

NAND_U8700:4DP_HY_SLT

NAND_U8700:4DP_SS_SLT

NAND_U8700:6DP_HY

C

335S00395
335T00005 CRITICAL
335T00019

1
1

335S00327 CRITICAL
335S00396
335T00006 CRITICAL
335T00020 CRITICAL
335S00399
335S00397
335T00021
335T00007
335S00380
335S00391

1

1
1
1
1
1

1 U8600

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV3,256GBP,133,S4E,170G,SD,ULGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

U86001
U86001
U8600
U8600
U8600
U86001
U86001
U8600
U8600
U8600
U8600
U8600
U86001

CRITICAL

CRITICAL
CRITICAL335S00379

CRITICAL

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8600:6DP_TS

NAND_U8600:6DP_TS_SLT

NAND_U8600:6DP_HY_SLT

NAND_U8600:8DP_HY

NAND_U8600:8DP_WD

NAND_U8600:8DP_TS

NAND_U8600:8DP_TS_SLT

NAND_U8600:8DP_HY_SLT

NAND_U8600:10DP_HY

NAND_U8600:10DP_TS

NAND_U8600:10DP_HY_SLT

NAND_U8600:10DP_TS_SLT

NAND_U8600:16DP_HY

NAND_U8600:16DP_WD

335S00395
335T00005
335T00019
335S00379
335S00327
335S00396
335T00006
335T00020
335S00399
335S00397
335T00021
335T00007
335S00380
335S00391

1
1
1
1
1
1
1
1
1
1
1
1
1
1

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV3,256GBP,133,S4E,170G,SD,ULGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8700:6DP_TS

NAND_U8700:6DP_TS_SLT

NAND_U8700:6DP_HY_SLT

NAND_U8700:8DP_HY

NAND_U8700:8DP_WD

NAND_U8700:8DP_TS

NAND_U8700:8DP_TS_SLT

NAND_U8700:8DP_HY_SLT

NAND_U8700:10DP_HY

C

NAND_U8700:10DP_TS

NAND_U8700:10DP_HY_SLT

NAND_U8700:10DP_TS_SLT

NAND_U8700:16DP_HY

NAND_U8700:16DP_WD

B

335T00022
335T00016

335S00377
335S00393
335S00388
335S00416
335T00001
335T00017
335T00008
335S00394
335S00378

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

1 U8600

1
1
1
1
1
1
1
1
1

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV4,64GBT,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV5,64GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV5,64GBT,S4E,256G,H,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

U86001

U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800

CRITICAL
CRITICAL

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8600:16DP_HY_SLT

NAND_U8600:16DP_WD_SLT

NAND_U8800:2DP_HY

NAND_U8800:2DP_TS

NAND_U8800:2DP_WD

NAND_U8800:2DP_SS

NAND_U8800:2DP_TS_SLT

NAND_U8800:2DP_HY_SLT

NAND_U8800:2DP_SS_SLT

NAND_U8800:4DP_TS

NAND_U8800:4DP_HY

335T00022
335T00016

1
1

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

U8700
U8700

CRITICAL
CRITICAL

NAND_U8700:16DP_HY_SLT

NAND_U8700:16DP_WD_SLT

NAND U8900NAND U8800

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTIONCRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

335S00377
335S00393
335S00388
335S00416
335T00001
335T00017
335T00008

1
1
1
1
1
1
1

NAND,3DV4,64GBT,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,64GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

NAND,3DV5,64GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV5,64GBT,S4E,256G,H,SLGA110

NAND,3DV5,64GBT,S4E,256G,SS,SLGA110

U8900
U8900
U8900
U8900
U8900
U8900
U8900

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8900:2DP_HY

NAND_U8900:2DP_TS

NAND_U8900:2DP_WD

NAND_U8900:2DP_SS

NAND_U8900:2DP_TS_SLT

NAND_U8900:2DP_HY_SLT

NAND_U8900:2DP_SS_SLT

B

335S00394
335S00378

1
1

NAND,3DV4,128GBT,XXX,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

U8900
U8900

CRITICAL
CRITICAL

NAND_U8900:4DP_TS

NAND_U8900:4DP_HY

335S00424
335T00002
335T00018
335T00009
335S00398
335S00395
335T00005
335T00019
335S00379
335S00327
335S00396
335T00006
335T00020
335S00399

1
1
1
1
1
1
1
1
1
1
1
1
1
1

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV3,256GBP,133,S4E,170G,SD,ULGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800
U8800

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8800:4DP_SS

NAND_U8800:4DP_TS_SLT

NAND_U8800:4DP_HY_SLT

NAND_U8800:4DP_SS_SLT

NAND_U8800:6DP_HY

NAND_U8800:6DP_TS

NAND_U8800:6DP_TS_SLT

NAND_U8800:6DP_HY_SLT

NAND_U8800:8DP_HY

NAND_U8800:8DP_WD

NAND_U8800:8DP_TS

NAND_U8800:8DP_TS_SLT

NAND_U8800:8DP_HY_SLT

NAND_U8800:10DP_HY

335S00424
335T00002
335T00018
335T00009
335S00398
335S00395
335T00005
335T00019
335S00379
335S00327
335S00396
335T00006
335T00020
335S00399

1
1
1
1
1
1
1
1
1
1
1
1
1
1

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,128GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,128GBT,S4E,256G,H,SLGA110

NAND,3DV5,128GBT,S4E,256G,SS,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV3,256GBP,133,S4E,170G,SD,ULGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,256GBT,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900
U8900

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8900:4DP_SS

NAND_U8900:4DP_TS_SLT

NAND_U8900:4DP_HY_SLT

NAND_U8900:4DP_SS_SLT

NAND_U8900:6DP_HY

NAND_U8900:6DP_TS

NAND_U8900:6DP_TS_SLT

NAND_U8900:6DP_HY_SLT

NAND_U8900:8DP_HY

NAND_U8900:8DP_WD

NAND_U8900:8DP_TS

NAND_U8900:8DP_TS_SLT

NAND_U8900:8DP_HY_SLT

NAND_U8900:10DP_HY

A

335S00397
335T00021
335T00007
335S00380
335S00391
335T00022
335T00016

8

1
1
1
1
1
1
1

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

U8800
U8800
U8800
U8800
U8800
U8800
U8800

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8800:10DP_TS

NAND_U8800:10DP_HY_SLT

NAND_U8800:10DP_TS_SLT

NAND_U8800:16DP_HY

NAND_U8800:16DP_WD

NAND_U8800:16DP_HY_SLT

NAND_U8800:16DP_WD_SLT

67

335S00397
335T00021
335T00007
335S00380
335S00391
335T00022
335T00016

1
1
1
1
1
1
1

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110

NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

NAND,3DV4,512GBT,S4E,256G,H,SLGA110

NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110

U8900
U8900
U8900
U8900
U8900
U8900
U8900

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

NAND_U8900:10DP_TS

NAND_U8900:10DP_HY_SLT

NAND_U8900:10DP_TS_SLT

NAND_U8900:16DP_HY

NAND_U8900:16DP_WD

NAND_U8900:16DP_HY_SLT

NAND_U8900:16DP_WD_SLT

35 4

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

BOM CONFIGURATION

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

2

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

401 OF 500

SHEET

92 OF 98

1

A

678

3 245

1

D

COMMON BOM GROUPS

BOM GROUP BOM OPTIONS

X1782_COMMON_PARTS

X1782_USB

X1782_WIFI_MISC

X1782_X86
X1782_T290
X1782_MISC

SCH,PCB,ALT_CMN,COMMON,ALTERNATE:PART,X1782_USB,X1782_WIFI_MISC,X1782_X86,X1782_MISC,X1782_T290,SENSE_PROD

TBT:TR_C1_PRQ,UPC:ACE2_B2,TBT_ROM:PVT,USBC_SHLD

MODULE:MUR_ES_3P1,WIFI_ROM:PVT,BT_ROM:PVT,STANDOFFS_TOP,STANDOFFS_BOT,CPU_SLEDS

EDP_ENABLE,DR_MOS_CORE:VISHAY,DR_MOS_VCCSA:VISHAY,DR_MOS_GT:VISHAY,IND_VCCSA:CYNTEC,DRAM_TOP_FENC,DRAM_BOT_CAN

BOARDID0,BOARDID1,BOARDID3,BOARDID4,BOARDID5,BOARDREV2,CALPE_L:OTP_BC,SE:PROD_2019,NAND_VCC:2.5V,MEGA_SHLD

CHARGER_IC:POC,AMR:POC,SPEAKER_AMP:C0,SOC_DFU_BYPASS,BKLT_FILT:ZERO_OHM,XDP:YES,WASHER_DFR,LOADRC:NO

DEBUG BOM PARTS

BOM GROUP BOM OPTIONS

X1782_DEV_1
X1782_DEV_2

XDP_CONN:YES

USBC_AARDVARKANOID,USBC_ARKANOID

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

SYSTEM PARTS

1 CRITICALSCH051-05309
1
1 CRITICALCOMMON_PARTS685-00331

COMMON PARTS,MLB,X1782

DEV,COMMON PARTS,MLB,X1782

TOP LEVEL BOM

639-XXXX (POR) OR 939-XXXX (DEV)

COMMON PARTS BOM

685-00331

SCHEM,MLB,X1782

PCBF,MLB,X1782

CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION

SCH

PCB CRITICAL820-01987

PCB

X1782_COMMON_BOM

DEV_PARTS CRITICAL1985-01184

X1782_DEV_BOM

D

C

DRAM AND SPD

BOM GROUP BOM OPTIONS

X1782_08GB_HY
X1782_08GB_SS
X1782_16GB_HY
X1782_16GB_SS
X1782_NO_DRAM

DRAM:08GB_HY,RAMCFG4_L,RAMCFG3_L,RAMCFG2_L,RAMCFG1_L,RAMCFG0_L

DRAM:08GB_SS_D,RAMCFG2_L,RAMCFG0_L

DRAM:16GB_HY,RAMCFG4_L,RAMCFG3_L,RAMCFG1_L,RAMCFG0_L

DRAM:16GB_SS_D,RAMCFG0_L

DRAM:OFF

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

DEBUG PARTS BOM

985-01184

COMMON PARTS BOM

BOM NUMBER BOM NAME BOM OPTIONS

COMMON_PARTS,MLB,X1782685-00331

X1782_COMMON_PARTS

DEBUG PARTS

BOM NUMBER BOM NAME BOM OPTIONS

985-01184

DEV,COMMON_PARTS,MLB,X1782

X1782_DEV_1,X1782_DEV_2

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

C

B

CPU

BOM GROUP BOM OPTIONS

X1782_CPU_1P4GHZ
X1782_CPU_1P7GHZ
X1782_CPU_NO_CPU

SOC AND NAND

BOM GROUP BOM OPTIONS

X1782_TLC_128GB_HY
X1782_TLC_128GB_TS
X1782_TLC_256GB_HY
X1782_TLC_256GB_TS
X1782_TLC_256GB_SS
X1782_TLC_512GB_HY
X1782_TLC_512GB_TS
X1782_TLC_001TB_HY
X1782_TLC_001TB_TS
X1782_TLC_002TB_HY
X1782_TLC_002TB_WD
X1782_NO_NAND_2_LD
X1782_NO_NAND_4_LD

CPU:15W_1P4G_SREZ2

CPU:15W_1P7G_SREZ1

CPU:OFF

SOC:PROD_B0_1G,SSD:2L,NAND_U8600:2DP_HY_SLT,NAND_U8700:2DP_HY_SLT

SOC:PROD_B0_1G,SSD:2L,NAND_U8600:2DP_TS_SLT,NAND_U8700:2DP_TS_SLT

SOC:PROD_B0_1G,SSD:4L,NAND_U8600:4DP_HY_SLT,NAND_U8700:2DP_HY_SLT,NAND_U8800:2DP_HY_SLT,NAND_U8900:2DP_HY_SLT

SOC:PROD_B0_1G,SSD:4L,NAND_U8600:4DP_TS_SLT,NAND_U8700:2DP_TS_SLT,NAND_U8800:2DP_TS_SLT,NAND_U8900:2DP_TS_SLT

SOC:PROD_B0_1G,SSD:4L,NAND_U8600:4DP_SS_SLT,NAND_U8700:2DP_SS_SLT,NAND_U8800:2DP_SS_SLT,NAND_U8900:2DP_SS_SLT

SOC:PROD_B0_1G,SSD:4L,NAND_U8600:6DP_HY_SLT,NAND_U8700:6DP_HY_SLT,NAND_U8800:4DP_HY_SLT,NAND_U8900:4DP_HY_SLT

SOC:PROD_B0_1G,SSD:4L,NAND_U8600:6DP_TS_SLT,NAND_U8700:6DP_TS_SLT,NAND_U8800:4DP_TS_SLT,NAND_U8900:4DP_TS_SLT

SOC:PROD_B0_2G,SSD:4L,NAND_U8600:10DP_HY_SLT,NAND_U8700:10DP_HY_SLT,NAND_U8800:8DP_HY_SLT,NAND_U8900:8DP_HY_SLT

SOC:PROD_B0_2G,SSD:4L,NAND_U8600:10DP_TS_SLT,NAND_U8700:10DP_TS_SLT,NAND_U8800:8DP_TS_SLT,NAND_U8900:8DP_TS_SLT

SOC:PROD_B0_2G,SSD:4L,NAND_U8600:16DP_HY_SLT,NAND_U8700:16DP_HY_SLT,NAND_U8800:16DP_HY_SLT,NAND_U8900:16DP_HY_SLT

SOC:PROD_B0_2G,SSD:4L,NAND_U8600:16DP_WD_SLT,NAND_U8700:16DP_WD_SLT,NAND_U8800:16DP_WD_SLT,NAND_U8900:16DP_WD_SLT

SOC:OFF,SSD:2L,NAND_U8600:OFF,NAND_U8700:OFF,NAND_U8800:OFF,NAND_U8900:OFF

SOC:OFF,SSD:4L,NAND_U8600:OFF,NAND_U8700:OFF,NAND_U8800:OFF,NAND_U8900:OFF

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

NOTES:

"SENSOR:DEV" IS FOR SENSE RESISTORS. WHEN CURRENT SENSING IS REMOVED AT DVT, THESE RESISTORS WILL
BE REPLACED WITH A SPECIAL SYMBOL, A COPPER SHAPE SHORTING THE TWO TERMINALS

"LOADISNS" ARE CIRCUITS ONLY REQURIED UNTIL DVT TO MEASURE/SENSE CURRENT. SENSE CIRCUITS REQUIRED
BY SMC WILL NOT HAVE THIS OPTION SINCE THEY WILL STAY TILL PVT

"LOADRC:YES/NO" RC FILTERS INTO ADC WILL BE REPLACED BY 100K PD ONCE THE SENSE CIRCUITS GO
AWAY

B

A

CPU DRAM CFG[4:0] CHART

DIE REV

A

B

SPEED

2133

1866

CAPACITY

8GB

16GB

CFG 4

0

1

CFG 3

0

1

CFG 2

0

1

HYNIX

MICRON

SAMSUNG

N/A

CFG 1VENDOR

0

0

1

1

CFG 0

0

1

0

1

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

BOM GROUPS

SIZE

D

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER

051-05309

REVISION

6.0.0

BRANCH

pvt

PAGE

403 OF 500

SHEET

93 OF 98

8

67

35 4

2

1

D

C

B

678

POR BOMS - MLB-1 (1.4 GHZ CPU)

BOM NUMBER BOM NAME BOM OPTIONS

MLB-1,SS-8GB,TS-128GB,X1782639-09103
MLB-1,HY-8GB,TS-128GB,X1782639-09102
MLB-1,SS-8GB,HY-128GB,X1782639-10001

MLB-1,HY-8GB,HY-128GB,X1782639-10002
MLB-1,SS-16GB,HY-128GB,X1782639-10003
MLB-1,SS-16GB,TS-128GB,X1782639-10004
MLB-1,HY-16GB,HY-128GB,X1782639-10005
MLB-1,HY-16GB,TS-128GB,X1782639-10006

639-10007
639-10008

MLB-1,SS-8GB,HY-256GB,X1782

MLB-1,SS-8GB,SS-256GB,X1782

MLB-1,SS-8GB,TS-256GB,X1782639-10009

MLB-1,HY-8GB,HY-256GB,X1782639-10010

639-10011
639-10012

MLB-1,HY-8GB,SS-256GB,X1782

MLB-1,HY-8GB,TS-256GB,X1782
MLB-1,SS-16GB,HY-256GB,X1782639-10013
MLB-1,SS-16GB,SS-256GB,X1782639-10014
MLB-1,SS-16GB,TS-256GB,X1782639-10015
MLB-1,HY-16GB,HY-256GB,X1782639-10016
MLB-1,HY-16GB,SS-256GB,X1782639-10017
MLB-1,HY-16GB,TS-256GB,X1782639-10018

MLB-1,SS-8GB,TS-512GB,X1782639-10019

MLB-1,HY-8GB,HY-512GB,X1782639-10020

MLB-1,HY-8GB,TS-512GB,X1782639-10021
MLB-1,SS-16GB,HY-512GB,X1782639-10022
MLB-1,SS-16GB,TS-512GB,X1782639-10023
MLB-1,HY-16GB,HY-512GB,X1782639-10024
MLB-1,HY-16GB,TS-512GB,X1782639-10025

MLB-1,SS-8GB,HY-1TB,X1782639-10026
MLB-1,SS-8GB,TS-1TB,X1782639-10027
MLB-1,HY-8GB,HY-1TB,X1782639-10028
MLB-1,HY-8GB,TS-1TB,X1782639-10029

639-10030 MLB-1,SS-16GB,HY-1TB,X1782

MLB-1,SS-16GB,TS-1TB,X1782639-10031
MLB-1,HY-16GB,HY-1TB,X1782639-10032
MLB-1,HY-16GB,TS-1TB,X1782639-10033

MLB-1,SS-8GB,HY-2TB,X1782639-10034

MLB-1,SS-8GB,HY-512GB,X1782639-10035

MLB-1,HY-8GB,HY-2TB,X1782639-10036

MLB-1,HY-8GB,WD-2TB,X1782639-10037
MLB-1,SS-16GB,HY-2TB,X1782639-10038
MLB-1,SS-16GB,WD-2TB,X1782639-10039
MLB-1,HY-16GB,HY-2TB,X1782639-10040
MLB-1,HY-16GB,WD-2TB,X1782639-10041

MLB-1,SS-8GB,WD-2TB,X1782639-10084

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_HY,X1782_TLC_002TB_WD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_SS,X1782_TLC_002TB_WD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_16GB_HY,X1782_TLC_002TB_WD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P4GHZ,X1782_08GB_SS,X1782_TLC_002TB_WD

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

3 245

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PAGE TITLE

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BOM VARIANT TABLES

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

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POR BOMS - MLB-2 (1.7 GHZ CPU)

BOM NUMBER BOM NAME BOM OPTIONS

MLB-2,SS-16GB,TS-256GB,X1782639-09104

MLB-2,HY-16GB,TS-1TB,X1782639-09105
MLB-2,SS-8GB,HY-128GB,X1782639-10042
MLB-2,SS-8GB,TS-128GB,X1782639-10043
MLB-2,HY-8GB,HY-128GB,X1782639-10044
MLB-2,HY-8GB,TS-128GB,X1782639-10045

MLB-2,SS-16GB,HY-128GB,X1782639-10046
639-10047 MLB-2,SS-16GB,TS-128GB,X1782
639-10048 MLB-2,HY-16GB,HY-128GB,X1782
639-10049 MLB-2,HY-16GB,TS-128GB,X1782
639-10050 MLB-2,SS-8GB,HY-256GB,X1782
639-10051 MLB-2,SS-8GB,SS-256GB,X1782
639-10052 MLB-2,SS-8GB,TS-256GB,X1782
639-10053 MLB-2,HY-8GB,HY-256GB,X1782
639-10054 MLB-2,HY-8GB,SS-256GB,X1782
639-10055 MLB-2,HY-8GB,TS-256GB,X1782
639-10056 MLB-2,SS-16GB,HY-256GB,X1782
639-10057 MLB-2,SS-16GB,SS-256GB,X1782
639-10058 MLB-2,HY-16GB,HY-256GB,X1782
639-10059 MLB-2,HY-16GB,SS-256GB,X1782
639-10060 MLB-2,HY-16GB,TS-256GB,X1782
639-10061 MLB-2,SS-8GB,HY-512GB,X1782
639-10062 MLB-2,SS-8GB,TS-512GB,X1782
639-10063 MLB-2,HY-8GB,HY-512GB,X1782
639-10064 MLB-2,HY-8GB,TS-512GB,X1782
639-10065 MLB-2,SS-16GB,HY-512GB,X1782
639-10066
639-10067

MLB-2,SS-16GB,TS-512GB,X1782

MLB-2,HY-16GB,HY-512GB,X1782

MLB-2,HY-16GB,TS-512GB,X1782639-10068
639-10069 MLB-2,SS-8GB,HY-1TB,X1782
639-10070 MLB-2,SS-8GB,TS-1TB,X1782
639-10071 MLB-2,HY-8GB,HY-1TB,X1782
639-10072 MLB-2,HY-8GB,TS-1TB,X1782
639-10073 MLB-2,SS-16GB,HY-1TB,X1782
639-10074 MLB-2,SS-16GB,TS-1TB,X1782
639-10075 MLB-2,HY-16GB,HY-1TB,X1782
639-10076 MLB-2,SS-8GB,HY-2TB,X1782
639-10077 MLB-2,SS-8GB,WD-2TB,X1782
639-10078 MLB-2,HY-8GB,HY-2TB,X1782
639-10079 MLB-2,HY-8GB,WD-2TB,X1782
639-10080 MLB-2,SS-16GB,HY-2TB,X1782

MLB-2,SS-16GB,WD-2TB,X1782639-10081
MLB-2,HY-16GB,HY-2TB,X1782639-10082

639-10083 MLB-2,HY-16GB,WD-2TB,X1782

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_128GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_128GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_256GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_256GB_SS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_256GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_512GB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_512GB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_001TB_TS

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_001TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_SS,X1782_TLC_002TB_WD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_08GB_HY,X1782_TLC_002TB_WD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_SS,X1782_TLC_002TB_WD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_002TB_HY

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_1P7GHZ,X1782_16GB_HY,X1782_TLC_002TB_WD

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

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SYNC_DATE=SYNC_MASTER=

PAGE TITLE

A

BOM VARIANT TABLES

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

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POR BOMS - MLB-2 (1.7 GHZ CPU)

BOM NUMBER BOM NAME BOM OPTIONS

939-09001
939-09002

DEV,MLB-1,NO-CPU-MEM-NAND,2-LAND,X1782
DEV,MLB-1,NO-CPU-MEM-NAND,4-LAND,X1782

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_NO_CPU,X1782_NO_DRAM,X1782_NO_NAND_2_LD

ALT_CMN,ALTERNATE:PART,X1782_COMMON_BOM,X1782_CPU_NO_CPU,X1782_NO_DRAM,X1782_NO_NAND_4_LD

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

3 245

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PAGE TITLE

A

BOM VARIANT TABLES

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

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2 1

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DC-DC

PART NUMBER

152S00403 ALL <RDAR://39801983>

152S00322

ALT_CMN 376S0820

128S0311 ALT_CMN <RDAR://40172980>ALL128S00042

128S0311

128S0364

ALT_CMN <RDAR://44394151>ALL128S0264

152S00592

152S00724 <RDAR://40221450>ALLALT_CMN

152S00311

ALT_CMN <RDAR://40221612>ALL152S00204152S00398

152S00725 <RDAR://40223132>ALT_CMN ALL

376S00204

152S00590

152S00048

376S00203

376S00203

ALLALT_CMN152S00363 <RDAR://40040471>

ALLALT_CMN376S00227 <RDAR://40169831>

376S00203

152S00786

376S00007

376S00228

107S00015

128S0392

152S00344

376S1038

376S1179

376S1179

107S00011

ALT_CMN ALL <RDAR://40169331>

ALLALT_CMN <RDAR://40169426>376S00373

ALT_CMN

ALT_CMN <RDAR://40170031>

ALL <RDAR://40170031>

ALL

ALT_CMN ALL

ALLALT_CMN128S0445

353S00519353S00831

128S00038

ALL <RDAR://40173276>ALT_CMN128S00039

ALT_CMN

ALT_CMN

ALT_CMN

376S00012 <RDAR://43066124>376S00303 ALL

ALT_CMN

ALT_CMN

128S0351 ALLALT_CMN128S00050

152S00841

152S00238 ALLALT_CMN

ALT_CMN <RDAR://44155454>ALL152S00765 152S00239

ALT_CMN

131S00037

107S00087

ALT_CMN

128S00087 <RDAR://44202728>ALLALT_CMN

128S00011

128S00031 <RDAR://44202728>ALLALT_CMN128S00011

107S00076 ALLALT_CMN107S00044

ALL152S00368 <RDAR://44243170>ALT_CMN152S00269

ALT_CMN

138S0789 ALLALT_CMN138S0941 <RDAR://44323944>

138S00104 138S0978 ALT_CMN ALL <RDAR://44325053>

152S00383 <RDAR://44325096>ALLALT_CMN152S00198

138S0863 <RDAR://44326703>ALLALT_CMN138S0853

138S00229 <RDAR://44362824>ALL138S00107 ALT_CMN

138S0786 ALT_CMN ALL <RDAR://44321492>138S0705

138S0746 ALT_CMN138S0705 ALL <RDAR://44321492>

107S0249 <RDAR://44364242>ALLALT_CMN107S0251

132S00012

138S00077

ALT_CMN

ALL132S0401

ALL138S00035 ALT_CMN

138S00035

ALT_CMN

371S00181 <RDAR://44622207>ALL371S00220

152S01023

152S00384 ALLALT_CMN

138S0777138S00015

103S0321

107S00139

353S02017 <RDAR://52858660>ALL

107S0178

353S00525

ALT_CMN

ALT_CMN

ALT_CMN

ALL

ALL103S0276 <RDAR://44660673>

ALT_CMN ALL <RDAR://44693560>

ALT_CMN

353S02065 <RDAR://52858660>ALL353S00525 ALT_CMN

353S02064

353S02192 353S00519

ALT_CMN

ALL

ALL

128S00041128S00109 ALT_CMN ALL

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://40172980>128S00043 ALT_CMN ALL

<RDAR://40221857>152S00726 ALLALT_CMN

<RDAR://40169831>ALLALT_CMN

<RDAR://40169831>ALT_CMN376S00226 ALL

<RDAR://40039575>

<RDAR://40172491>

<RDAR://43065874>ALLALT_CMN

<RDAR://40173276>128S00038 ALT_CMN ALL128S0302

<RDAR://43067934>ALL353S00525353S00832

<RDAR://42185308>ALL152S00386152S01024

<RDAR://43666396>ALL152S00689152S00707

<RDAR://43067686>ALL376S1128376S00282

<RDAR://44187449>ALLALT_CMN376S1128376S00224

<RDAR://43396612>ALL128S0351128S0578 ALT_CMN

<RDAR://43396612>

<RDAR://44152899>

<RDAR://44159571>ALL138S00073138S00047

<RDAR://44160572>ALLALT_CMN131S00308

<RDAR://44206108>ALLALT_CMN107S00029

<RDAR://44202728>ALL128S00011128S00026

<RDAR://44205141>

<RDAR://44244361>152S00800 ALL152S00268

<RDAR://44325096>ALLALT_CMN152S00198152S00680

<RDAR://44325754>

<RDAR://44363047>

<RDAR://44363047>138S00093 ALLALT_CMN

<RDAR://44325817>132S00064 ALL132S0409

<RDAR://44622443>

<RDAR://44658436>

<RDAR://52858660>ALT_CMN353S00525

<RDAR://52921454>

<RDAR://54142831>ALLALT_CMN128S0445128S0436

TABLE_ALT_HEAD

TABLE_ALT_ITEM

MURATA PRIMARY, CHILISIN ALT
IND,PWR,0.68UH,20%,6.3A,26MOHM,3225

TABLE_ALT_ITEM

NEC PRIMARY, KEMET ALTERNATE
CAP,TANT,POLY,220UF,6.3V,25MOHM,82

TABLE_ALT_ITEM

NEC PRIMARY, PANASONIC ALTERNATE
CAP,TANT,POLY,220UF,6.3V,25MOHM,82

TABLE_ALT_ITEM

KEMET PRIMARY, PANASONIC ALTERNATE
CAP,AL,POLY,68UF,20%,16V,40MOHM,D2

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALTERNATE
IND,MLD,1UH,2.6A,95MOHM,2012

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALTERNATE
IND,MLD,1UH,20%,3.8A,55MOHM,2016X1.2MM

TABLE_ALT_ITEM

CYNTEC PRIMARY, TAIYO ALTERNATE
IND,PWR,SHLD,0.22UH,6.7A,0.023 OHM,2012

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALTERNATE
IND,MLD,0.47UH,4.8A,34MOHM,2016

TABLE_ALT_ITEM

CYNTEC PRIMARY, NEC ALTERNATE
IND,MLD,0.22UH,1.9MO,44,8.6X8.0X2.4MM

TABLE_ALT_ITEM

VISHAY PRIMARY, FAIRCHILD ALTERNATE
MOSFET,DL-N,30V,15.6A,13.8MOHM@4.5V,DFN8

TABLE_ALT_ITEM

VISHAY PRIMARY, DIODES ALTERNATE
MOSFET,DL-N,30V,15.6A,13.8MOHM@4.5V,DFN8

TABLE_ALT_ITEM

VISHAY PRIMARY, VISHAY ALTERNATE
MOSFET,DL-N,30V,15.6A,13.8MOHM@4.5V,DFN8

TABLE_ALT_ITEM

MURATA PRIMARY, CYNTEC ALTERNATE
IND,MLD,1UH,20%,4.7A,40MOHM,2520

TABLE_ALT_ITEM

TI PRIMARY, DIODES ALTERNATE
MOFET DUAL-N,30V,20A,9.45/3.6MOHN,3X3DFN

TABLE_ALT_ITEM

VISHAY PRIMARY, AOS ALTERNATE
MOSFET,P-CH,20V,40A,0.0039 OHM,8P,PWRPAK

TABLE_ALT_ITEM

VISHAY PRIMARY, FAIRCHILD ALTERNATE
MOSFET,P-CH,20V,40A,0.0039 OHM,8P,PWRPAK

TABLE_ALT_ITEM

CYNTEC PRIMARY, TFT ALTERNATE
RES,MTL FLM,0.00075OHM,1%,4-L,0612,BLK

TABLE_ALT_ITEM

PANASONIC PRIMARY, PANASONIC ALTERNATE
CAP,TANT,POLY,33UF,20%,16V,40MOHM,D12

TABLE_ALT_ITEM

VISHAY PRIMARY, FAIRCHILD ALTERNATE
IC,SIC621,DR MOS,IMVP-8,60A,PQFN31,5X5MM

TABLE_ALT_ITEM

KEMET PRIMARY, NEC ALT
CAP,TA,POLY,150UF,20%,6.3V,18MO,2A,B2

TABLE_ALT_ITEM

KEMET PRIMARY, PANASONIC ALT
CAP,TA,POLY,150UF,20%,6.3V,18MO,2A,B2

TABLE_ALT_ITEM

VISHAY PRIMARY, FAIRCHILD ALT
IC,SIC532,DR MOS,IMVP-8,30A,PQFN22,45X35

TABLE_ALT_ITEM

MURATA PRIMARY, CHILISIN ALT
IND,MLD,1.0UH,20%,32MOHM,4.8A,3225

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALT
IND,MLD,0.47UH,4.7MO,17.5A,5.6X5.2X2.4MM

TABLE_ALT_ITEM

TI PRIMARY, DIODES ALT
MOSFET DUAL-N,30V,15A,18/5.5MOHM,3X3DFN

TABLE_ALT_ITEM

DIODES PRIMARY, ON SEMI ALT
XSTR,FET,N-CH,30V,300MA,3P DFN

TABLE_ALT_ITEM

DIODES PRIMARY, NEXPERIA ALT
XSTR,FET,N-CH,30V,300MA,3P DFN

TABLE_ALT_ITEM

SANYO PRIMARY, KEMET ALT
CAP,TANT,POLY,330UF,2V,13MOHM,B2

TABLE_ALT_ITEM

SANYO PRIMARY, NEC ALT
CAP,TANT,POLY,330UF,2V,13MOHM,B2

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALT
IND,MLD,0.56UH,7.2MO,16A,5.4X5.2X2.4MM

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALT
IND,MLD,0.68UH,9.0MO,14.5A,5.4X5.2X2.4MM

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,X6S,10UF,20%,6.3V,HZTL,MUR,0402

TABLE_ALT_ITEM

MURATA PRIMARY, YAGEO ALT
CAP,CER,C0G,3300PF,5%,50V,0603

TABLE_ALT_ITEM

TFT PRIMARY, YAGEO ALT
RES,MTL FLM,0.005OHM,1%,4-L,0612,BLK

TABLE_ALT_ITEM

KEMET PRIMARY, NEC ALT
CAP,TANT,POLY,6.8UF,20%,35V,90MOHM,B1.2

TABLE_ALT_ITEM

KEMET PRIMARY, PANASONIC ALT
CAP,TANT,POLY,6.8UF,20%,35V,90MOHM,B1.2

TABLE_ALT_ITEM

KEMET PRIMARY, ROHM ALT
CAP,TANT,POLY,6.8UF,20%,35V,90MOHM,B1.2

TABLE_ALT_ITEM

CYNTEC PRIMARY, YAGEO ALT
RES,MF,0.010 OHM,0.5%,0612-4T,BLK

TABLE_ALT_ITEM

CYNTEC PRIMARY, TOKIN ALT
IND,MLD,1.0UH,20%,14A,10.7MO,6.6X6.6X2.4

TABLE_ALT_ITEM

CYNTEC PRIMARY, NEC-TOKIN ALT
IND,MLD,1.5UH,20%,12.5A,17.0MO,7.0X6.6MM

138S00060 PRIMARY, 138S00084 ALT
CAP,CER,47UF,20%,6.3V,X5R,0603

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,2.2UF,20%,25V,X5R,HRZTL,0402,MUR

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,CER,2.2UF,20%,25V,X5R,0402,H=0.55MM

TABLE_ALT_ITEM

CYNTEC PRIMARY, VISHAY ALT
IND,MLD,2.7UH,19.6MO,12.5A,10.9X10X2.4MM

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALT
IND,MLD,2.7UH,19.6MO,12.5A,10.9X10X2.4MM

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO YUDEN ALT
CAP,CER,15UF,20%,2V,X6S,0402,MURATA

TABLE_ALT_ITEM

MURATA PRIMARY, KYOCERA ALT
CAP,X5R,20UF,20%,10V,0402,H=0.8MM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,X5R,10UF,20%,10V,0402

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO YUDEN ALT
CAP,CER,X5R,10UF,20%,10V,0402

CYNTEC PRIMARY,TFT ALT
RES,SENSE,0.002OHM,1W,4-TERM,1%,0612,CYN

TABLE_ALT_ITEM

TAIYO YUDEN PRIMARY,MURATA ALT
CAP,CER,0.22UF,10%,25V,X7R,0402

TABLE_ALT_ITEM

MURATA PRIMARY,TAIYO ALT
CAP,CER,20UF,20%,2.5V,X6S,HRZTL,0402

TABLE_ALT_ITEM

MURATA PRIMARY,KYOCERA ALT
CAP,CER,20UF,20%,2.5V,X6S,HRZTL,0402

TABLE_ALT_ITEM

TAIYO PRIMARY,MURATA ALT
CAP,CER,X6S,0.1UF,20%,16V,0201

TABLE_ALT_ITEM

DIODES PRIMARY,ON SEMI ALT
DIODE,ZENER,5.6V,250MW,DFN0201

TABLE_ALT_ITEM

MURATA PRIMARY, CHILISIN ALT
IND,MLD,0.48UH,20%,23MOHM,6.7A,3225

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO YUDEN AND SAMSUNG ALT
CAP,CER,10UF,20%,16V,X6S,0603

TABLE_ALT_ITEM

CYNTEC PRIMARY, YAGEO ALT
RES,MF,4.42K OHM,1/20W,0.1%,0201,SMD

TABLE_ALT_ITEM

MURATA PRIMARY, PANASONIC ALT
THERMISTOR,NTC,220K OHM,4485K,3%,0201

TABLE_ALT_ITEM

VISHAY PRIMARY, AOS ALT
IC,SIC532,DR MOS,IMVP-8,30A,PQFN22,45X35

TABLE_ALT_ITEM

VISHAY, LOWER COST AS ALT
IC,SIC532,DR MOS,IMVP-8,30A,PQFN22,45X35

TABLE_ALT_ITEM

VISHAY, LOWER COST AS ALT
IC,SIC532,DR MOS,IMVP-8,30A,PQFN22,45X35

TABLE_ALT_ITEM

VISHAY, LOWER COST AS ALT
IC,SIC621,DR MOS,IMVP-8,60A,PQFN31,5X5MM

TABLE_ALT_ITEM

PANASONIC PRIMARY,KEMET AS ALT
CAP, TANT,POLY,33UF,20%,16V,40MOHM,D12

TABLE_ALT_ITEM

JAPAN ONLY PRIMARY, DUAL FLOW AS ALT
CAP,AL,POLY,220UF,20%,2V,2.5MOHM,6A,D1

SYSTEM EE

PART NUMBER

376S1080

353S01505

353S01041

353S01042 <RDAR://42672116>ALLALT_CMN

ALL <RDAR://42641759>ALT_CMN353S01389

376S1061

371S00085

353S00750

353S00877

353S01404

335S00213

335S0888

ALT_CMN

353S4037 ALT_CMN ALL353S00636

377S0183377S00060 ALLALT_CMN

353S00878 353S00599

311S00138

311S0436

311S00060

353S4376

311S0426

311S00192

ALT_CMN

311S00007 ALT_CMN ALL <RDAR://43955202>

311S00191

ALT_CMN

107S0210

ALL353S3384

ALL

ALLALT_CMN107S0211

335S00203 ALLALT_CMN335S00270

138S00086 138S0884 ALT_CMN

ALL

ALL

138S0732138S0715 ALT_CMN <RDAR://44325464>

138S00036 ALT_CMN138S00111

132S00176 132S0640

311S0593311S0596 ALL <RDAR://44345963>

311S00156 ALL

311S00013

311S00129

311S0508 ALL

152S1829152S00434 ALL

155S0391155S00166 <RDAR://44364823>

155S0660

155S00018

155S0513

155S0664

ALT_CMN

ALT_CMN

ALT_CMN

ALT_CMN

ALT_CMN

ALT_CMN

ALT_CMN ALL

ALT_CMN ALL

ALL

ALL

ALL

ALL

ALLALT_CMN

138S00117 ALT_CMN ALL <RDAR://44325102>138S00071

155S0897 ALLALT_CMN155S0914

155S00190 155S0897

197S00053 ALL <RDAR://44391613>

197S00050

197S00054 197S00050 <RDAR://44391613>ALL

ALT_CMN

ALT_CMN

ALT_CMN

377S00079 ALLALT_CMN377S00077 <RDAR://44391888>

ALT_CMN <RDAR://44392851>ALL377S0077 377S0183

311S0271 <RDAR://43955521>ALLALT_CMN311S00008

ALT_CMN <RDAR://44363691>ALL155S0387155S0694138S00084 138S00060 <RDAR://44320030>ALLALT_CMN

138S0719138S1103 <RDAR://44325533>ALLALT_CMN

311S00104 ALL <RDAR://44346512>ALT_CMN311S00091

107S00016 ALT_CMN ALL107S0118 <RDAR://44358912>

138S0914 ALLALT_CMN138S00109 <RDAR://44363107>

138S0831138S00049 ALLALT_CMN <RDAR://44621837>

103S00248 <RDAR://44623345>103S00247 ALLALT_CMN

376S1137 376S00019 ALT_CMN <RDAR://44620634>ALL

ALL138S00097 ALT_CMN138S0750 <RDAR://44622531>

ALT_CMN353S01346 353S01320 <RDAR://43953321>ALL

197S00036197S00048 ALT_CMN <RDAR://44391564>ALL

376S00332

740S00028

138S00056

155S0665 ALT_CMN

311S00133

376S00074 ALT_CMN ALL <RDAR://44620855>

ALT_CMN740S0118 ALL <RDAR://44393058>

ALT_CMN ALL138S1100

155S00232

197S00118

311S00130 ALL

ALT_CMN

ALT_CMN

107S00056107S00086 ALT_CMN

ALL

ALL197S00120

ALL

311S0398 ALT_CMN ALL311S00121

107S00057107S00100 ALT_CMN ALL

107S00034107S00033 ALT_CMN ALL

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://42561814>ALLALT_CMN

<RDAR://42560905>ALLALT_CMN376S00146

<RDAR://42639806>ALLALT_CMN371S00190

<RDAR://42677730>ALLALT_CMN

<RDAR://42641429>ALLALT_CMN353S01506

<RDAR://43152541>ALL

<RDAR://42639994>

<RDAR://56761205>

<RDAR://43151782>ALLALT_CMN

<RDAR://43152801>ALLALT_CMN

<RDAR://43153429>ALL311S0273 ALT_CMN

<RDAR://43953240>

<RDAR://43955903>

<RDAR://44198222>

<RDAR://43152675>

<RDAR://44320169>

<RDAR://44325434>ALT_CMN138S0714 138S0713

<RDAR://44325659>

<RDAR://44325857>

<RDAR://44347874>

<RDAR://44348000>

<RDAR://44363291>

<RDAR://44364960>

<RDAR://44365105>

<RDAR://44365462>155S0667155S00007

<RDAR://43153066>311S0372 ALLALT_CMN311S0562

<RDAR://44391467>

<RDAR://44391467>ALL

<RDAR://44325201>ALLALT_CMN138S0684138S0660

<RDAR://44623255>103S00250 103S00249 ALLALT_CMN

<RDAR://44319895>

<RDAR://44363532>

<RDAR://44391668>

<RDAR://44396487>

<RDAR://44358149>

<RDAR://43152868>

<RDAR://44358232>

<RDAR://44349741>

TABLE_ALT_HEAD

TABLE_ALT_ITEM

ON SEMI PRIMARY, DIODES ALT
XSTR,FET,DUAL COMP,20V,220/200MA,SOT963

TABLE_ALT_ITEM

TI PRIMARY, ON SEMI ALT
IC INA210A,CURRENT SENSE,200V/V,QFN10

TABLE_ALT_ITEM

TI PRIMARY, ST MICRO ALT
IC,REF3312,V-REF,1.25V,0.15%,5MA,QFN8

TABLE_ALT_ITEM

DIODES PRIMARY, ROHM ALT
XSTR,FET,P-CH,30V,400MA,ENH MODE,SOT883

TABLE_ALT_ITEM

ON SEMI PRIMARY, DIODES ALT
DIODE SCHOTTKY,40V,2A,LOW VF,0603

TABLE_ALT_ITEM

ON SEMI PRIMARY, TI ALT
IC,NCP160,LDO REG,1.8V,0.25A,XDFN5

TABLE_ALT_ITEM

TI PRIMARY, ON SEMI ALT
IC,INA214A,CURRENT SENSE,100V/V,QFN10

TABLE_ALT_ITEM

ST PRIMARY, ON SEMI ALT
IC,SERIAL I2C EEPROM,128KBIT,8P,MLP8

TABLE_ALT_ITEM

DIODES PRIMARY, NXP ALT
IC,PI3USB102E,DIFF.USB SW,SPDT,TQFN-10

TABLE_ALT_ITEM

INFINEON PRIMARY, STM ALT
TVS,DIODE,BIDIR,1LINE,22V,11.5PF,0201

TABLE_ALT_ITEM

ON SEMI PRIMARY, TI ALT
IC,NCP160,LDO REG,3.0V,0.25A,DFN4

TABLE_ALT_ITEM

TI PRIMARY, NXP ALT
IC,74AVC4T245,4BIT VOLT TRANSLATOR,QFP16

TABLE_ALT_ITEM

PHILLIPS PRIMARY, DIODES ALT
IC,74LVC1G32,SNGL 2-INPT OR GATE,SOT891

TABLE_ALT_ITEM

TI PRIMARY, ON SEMI ALT
IC,LMV331,COMP,OPEN COL,2.7V,60UA,SC70

TABLE_ALT_ITEM

DIODES PRIMARY, NXP ALT
IC,74LVC1G07,SNGL BFR W/OD OUT,DFN,6P

TABLE_ALT_ITEM

DIODES PRIMARY, NEXPERIA ALT
IC,74LVC1G07,SNGL BFR W/OD OUT,DFN,6P

TABLE_ALT_ITEM

ROHM PRIMARY, VISHAY ALT
RES,MTL,.005 OHM,1%,1W,1206

TABLE_ALT_ITEM

MACRONIX PRIMARY, ADESTO ALT
IC,FLASH,SERIAL,SPI,4MX8,1.8V,4X3MM,DFN8

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,CER,X5R,20UF,20%,6.3V,0402,H=0.7MM

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,10UF,6.3V,X5R,0.7MM,0402,SAMSUNG

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,X5R,1UF,10%,10V,0402,MURATA

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO YUDEN ALT
CAP,CER,20UF,20%,2.5V,X6S,LOW NOISE,0402

TABLE_ALT_ITEM

MURATA PRIMARY, YAGEO ALT
CAP,CER,0.047UH,10%,50V,X7R,0402

TABLE_ALT_ITEM

NXP PRIMARY, TI ALT
IC,VOLT-LEVEL TRANS,W/CONFIG GATE,SOT886

TABLE_ALT_ITEM

TI PRIMARY, NEXPERIA ALT
IC,XCVR,BUS,4-BIT,DL SPPLY,3-OUT,UQFN16

TABLE_ALT_ITEM

NEXPERIA PRIMARY, DIODES ALT
IC,74AUP1G07,SNGL BUFFER W/OD OUT,SOT891

TABLE_ALT_ITEM

TDK PRIMARY, CYNTEC ALT
IND,PWR,MULT,1UH,20%,0.4A,0.636 OHM,0402

TABLE_ALT_ITEM

MURATA PRIMARY, TDK ALT
FERR BD,220 OHM,25%,700MA,0.28 DCR,0402

TABLE_ALT_ITEM

TDK PRIMARY, MURATA ALT
FERR BD,22 OHM,25%,1A,55 MOHM DCR,0201

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
FERR BD,80 OHM,25%,500MA,0.18 DCR,0201

TABLE_ALT_ITEM

PANASONIC PRIMARY, TAIYO ALT
FLTR,COMMON MODE,90 OHM,100MA,0202

TABLE_ALT_ITEM

NXP PRIMARY, TI ALT
IC,VOLT-LEVEL TRANS,W/CONFIG GATE,SOT891

TABLE_ALT_ITEM

MURATA PRIMARY, KYOCERA ALT
CAP,CER,X5R,4UF,20%,6.3V,0201,T=0.55MM

TABLE_ALT_ITEM

TDK PRIMARY, PANASONIC ALT
FLTR,NOISE,2.4GHZ,0.1A,0.65X0.5MM,SMD4

TABLE_ALT_ITEM

TDK PRIMARY, TAIYO YUDEN ALT
FLTR,NOISE,2.4GHZ,0.1A,0.65X0.5MM,SMD4

TABLE_ALT_ITEM

TXC PRIMARY, KYOCERA ALT
XTAL,24MHZ,10PPM,8PF,40 OHM,2520

TABLE_ALT_ITEM

TXC PRIMARY, NDK ALT
XTAL,24MHZ,10PPM,8PF,40 OHM,2520

TABLE_ALT_ITEM

ST MICRO PRIMARY, DIODES ALT
TVS,DIODE,UNIDIR,22V,35A,1.6X1.0

TABLE_ALT_ITEM

INFINEON PRIMARY, ST ALT
SUPPR,TRANS,BIDIR,5.5V,6.2PF,0201

TABLE_ALT_ITEM

DIODES PRIMARY, NXP ALT
IC,74LVC1G08,SNGL 2-INPT AND GATE,DFN,6P

TABLE_ALT_ITEMTABLE_ALT_ITEM

TDK PRIMARY, MURATA ALT
FERRITE BEAD,470OHM,0.1A,1.5MOHM DCR,060

TABLE_ALT_ITEM

MURATA PRIMARY, TY ALT
CAP,CER,X5R,4.7UF,20%,10V,0402,MURATA

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,CER,10UF,20%,10V,X5R,0603,MURATA

TABLE_ALT_ITEM

ON SEMI PRIMARY, TI ALT
IC,NLSX4402,2BIT DUAL LEVEL XLATOR,DFN8

TABLE_ALT_ITEM

VISHAY PRIMARY, ROHM ALT
RES,FILM,0.001 OHM,1W,1%,1206

TABLE_ALT_ITEM

KYOCERA PRIMARY, MURATA ALT
CAP,X5R,2.2UF,20%,6.3V,0201,0.35MM,KYO

TABLE_ALT_ITEM

MURATA PRIMARY, KYOCERA ALT
CAP,CER,X5R,2.2UF,20%,6.3V,0201

TABLE_ALT_ITEMTABLE_ALT_ITEM

MURATA PRIMARY, YAGEO ALT
RES,TK,18.2 KOHM,0.1%,TOPPM,1/20W,0201

TABLE_ALT_ITEM

CYNTEC PRIMARY, YAGEO ALT
RES,TK,8.06 KOHM,0.1%,50PPM,1/20W,0201

TABLE_ALT_ITEMTABLE_ALT_ITEM

DIODES PRIMARY, VISHAY ALT
XSTR,FET,N-CH,20V,4.5A,40MOHM,BGA4

TABLE_ALT_ITEM

TAYIO YUDEN PRIMARY, MURATA ALT
CAP,CER,4.7UF,20%,6.3V,X6S,TY,0402

TABLE_ALT_ITEM

NXP PRIMARY, ONSEMI ALT
IC,NX3DV642,3-LANE HS SW,TPDT,XQFN24

TABLE_ALT_ITEM

TXC PRIMARY, KYOCERA ALT
XTAL,25MHZ,25PPM,20PF,50OHM,500UW,2016

TABLE_ALT_ITEM

TOSHIBA PRIMARY, NEXPERIA ALT
MOSFET,DUAL N-CH30V,100MA,6P SOT563

TABLE_ALT_ITEM

POLYTRONICS PRIMARY, BUSSMAN ALT
FUSE,12A,32V,1206,FAST ACTING,SMD

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,CER,3-TERM,9.1UF,20%,4V,H0.7MM,0402

TABLE_ALT_ITEM

TDK PRIMARY, MURATA ALT
FERR BD,120 OHMZ,25%,480MA,0.21 OHM,0201

TABLE_ALT_ITEM

TXC PRIMARY, EPSON ALT
XTAL,24MHZ,30PPM,9.5PF,60 OHM MAX,1612

TABLE_ALT_ITEM

NXP PRIMARY, DIODES ALT
IC,74AVC1T45,XCVR,DL SUPPLY,1BIT,SON-6

TABLE_ALT_ITEM

CYNTEC PRIMARY, TFT ALT
RES,SENSE,0.003 OHM,1%,1/2W,0306-4T

TABLE_ALT_ITEM

NXP PRIMARY, DIODES ALT
IC,74AUP1G08,2-INPUT AND GATE,SOT891

TABLE_ALT_ITEM

CYNTEC PRIMARY, TFT ALT
RES,MF,0.002 OHM,1%,1/2W,0306-4T

TABLE_ALT_ITEM

CYNTEC PRIMARY, TFT ALT
RES,MF,0.025 OHM,1%,0612-4T,BLK

SYSTEM EE

PART NUMBER

138S00181

371S00193371S00185 <RDAR://44610883>ALT_CMN

ALL

ALT_CMN377S00123 ALL <RDAR://44391823>377S00031

ALL <RDAR://46676880>107S00346 ALT_CMN107S00116

311S0525 ALLALT_CMN311S0532 <RDAR://48407305>

116S00006116S00007 ALT_CMN ALL <RDAR://48412393>

107S00021107S0284

ALT_CMN ALL <RDAR://48411982>

132S00229 ALT_CMN <RDAR://53023881>ALL132S00010

107S00101 <RDAR://53024863>ALLALT_CMN107S00005

138S0852 138S0818 ALLALT_CMN <RDAR://53109945>

152S1701152S00812

138S1086138S00087 ALL

353S01615

107S00297 <RDAR://56910244>

353S4160 ALLALT_CMN

107S00344

ALT_CMN ALL <RDAR://53229916>

ALT_CMN

ALT_CMN

ALL

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://44653410>ALLALT_CMN155S00401155S00067

<RDAR://44621676>ALLALT_CMN138S0739138S0706

<RDAR://44621676>ALLALT_CMN138S0739138S0945

<RDAR://44652690>ALLALT_CMN152S00851152S00864

<RDAR://44621938>ALLALT_CMN138S0835

<RDAR://46735900>ALLALT_CMN311S00195311S00196

<RDAR://43910260>376S00294376S00292 ALLALT_CMN

<RDAR://48407669>ALT_CMN ALL107S00020107S0276

<RDAR://53024719>ALLALT_CMN377S00106377S00166

<RDAR://53229099>

<RDAR://53453766>

H9M

PART NUMBER

339S00387

339S00390

339S00391

339S00386

339S00386 ALL

339S00389

339S00392

339S00393

339S00602

339S00388

339S00388

339S00601

339S00601339S00603

339S00604 ALT_CMN ALL <RDAR://41988491>339S00601

339S00605 ALT_CMN <RDAR://41988491>ALL339S00606

339S00607 ALT_CMN339S00605

339S00608

ALT_CMN339S00386 ALL

ALL

ALT_CMN

ALT_CMN

ALL <RDAR://41988491>ALT_CMN

ALL

ALT_CMN

ALT_CMN

ALL

ALL <RDAR://41988491>

ALL

ALL339S00605 ALT_CMN

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://41988491>

<RDAR://41988491>ALT_CMN

<RDAR://41988491>

<RDAR://41988491>ALL339S00388

<RDAR://41988491>ALT_CMN

<RDAR://41988491>

<RDAR://41988491>

<RDAR://41988491>

BACKLIGHT

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://42360480>

<RDAR://42360480>

<RDAR://42360480>

<RDAR://42360480>ALL152S00253 ALT_CMN

<RDAR://42360480>ALL740S0159 ALT_CMN

<RDAR://42360480>ALL

<RDAR://53230880>ALLALT_CMN

138S0738

138S0846

376S1053

152S00359

740S00041

376S1106

371S00217

PART NUMBER

138S1101 ALT_CMN ALL

138S0811 ALLALT_CMN

376S0604

ALT_CMN

ALL

ALT_CMN371S00180371S00077

ALT_CMN ALL <RDAR://42360480>376S0678

371S00079

WIFI

PART NUMBER

339S00632 ALLALT_CMN

339S00616

339S00616339S00750

ALT_CMN ALL

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://58091255>

<RDAR://58091255>

AUDIO

PART NUMBER

ALLALT_CMN128S00009 128S00093 <RDAR://53110517>

128S00103 ALLALT_CMN128S00093 <RDAR://53110517>

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

<RDAR://53110248>155S0706155S00034 ALT_CMN ALL

TABLE_ALT_HEAD

TABLE_ALT_ITEM

MURATA PRIMARY, TDK ALT
FERR BD,240 OHM,25%,350MA,0.38 DCR,0201

TABLE_ALT_ITEM

SAMSUNG PRIMARY, MURATA ALT
CAP,CER,X5R,1UF,20%,10V,0201,SAMSUNG

TABLE_ALT_ITEM

SAMSUNG PRIMARY, KYOCERA ALT
CAP,CER,X5R,1UF,20%,10V,0201,SAMSUNG

TABLE_ALT_ITEM

TDK PRIMARY, CYNTEC ALT
IND,MULT,1.2UH,20%,120MA,1.17 OHM,0402

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,3-TERM,4.3UF,20%,4V,0402

TABLE_ALT_ITEM

ROHM PRIMARY, TOSHIBA ALT
DIODE,SCHOTTKY,30V,100MA,0201

TABLE_ALT_ITEM

DIODES PRIMARY, NEXPERIA ALT
IC,74LVC1G08,SNGL 2-INPT AND G,DFN1410-6

TABLE_ALT_ITEM

ON SEMI PRIMARY, SEMTECH ALT
DIODE,TVS,5.5V,7.3VBR,0.2PF,0201

TABLE_ALT_ITEM

DIODES PRIMARY, NEXPERIA ALT
NFET,20V,1.35A,0.18 OHM,DFN3

TABLE_ALT_ITEM

CYNTEC PRIMARY, YAGEO ALT
RES,MF,0.10 OHM,1%,0.5W,150PPM,0603-4T

TABLE_ALT_ITEM

TI PRIMARY, NXP ALT
IC,SNGL 3-STATE BUFFER,6-PIN,DFN

TABLE_ALT_ITEM

YAGEO PRIMARY, VISHAY ALT
RES,MTL FILM,0 OHM,TIGHT TOL,3A,0402

TABLE_ALT_ITEM

CYNTEC PRIMARY, TFT ALT
RES,SENSE,0.020 OHM,1%,1/3W,0306-4T

TABLE_ALT_ITEM

TAGEO PRIMARY, TFT ALT
RES,SENSE,0.010 OHM,1/3W,4-TERM,1%,0306

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,CER,X5R,0.1UF,10%,35V,0201

TABLE_ALT_ITEM

ONSIME PRIMARY, SEMTECH ALT
TVS,DIODE,1VRWM,2.3VBR,0.2PF,0201

TABLE_ALT_ITEM

YAGEO PRIMARY, CYNTEC ALT
RES,SENSE,0.005OHM,1/3W,1%,100PPM,0306

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP;CER,0.68UF,5%,6.3V,X6S,0402

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALT
IND;PWR,10UH,20%,1.6A,150MOHM,4040X1.8MM

TABLE_ALT_ITEM

MURATA PRIMARY, TAIYO ALT
CAP,X5R,2.2UF,10%,50V,0603

TABLE_ALT_ITEM

TI-MAINE PRIMARY, TI-AIZU ALT
IC,LP8548B1-04,DC/DC CVTR,BOOST,QFN24

TABLE_ALT_ITEM

MURATA PRIMARY, MURATA ALT
THERMISTOR,NTC,100KOHM,1%,0.10MA,0201

TABLE_ALT_HEAD

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX SCK ALT
POP,GIBRALTAR+1GB,20NM,M,DEV,SCK,CSP1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, MICRON ATK ALT
POP,GIBRALTAR+1GB,20NM,M,DEV,SCK,CSP1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX ATK ALT
POP,GIBRALTAR+1GB,20NM,M,DEV,SCK,CSP1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX SCK ALT
POP,GIBRALTAR+2GB,20NM,M,DEV,SCK,CSP1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, MICRON ATK ALT
POP,GIBRALTAR+2GB,20NM,M,DEV,SCK,CSP1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX ATK ALT
POP,GIBRALTAR+2GB,20NM,M,DEV,SCK,CSP1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX SCK ALT
POP,GIBRALTAR_L+1GB,16NM,M,B0,SCK,C1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, MICRON ATK ALT
POP,GIBRALTAR_L+1GB,16NM,M,B0,SCK,C1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX ATK ALT
POP,GIBRALTAR_L+1GB,16NM,M,B0,SCK,C1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX SCK ALT
POP,GIBRALTAR_L+2GB,16NM,M,B0,SCK,C1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, MICRON ATK ALT
POP,GIBRALTAR_L+2GB,16NM,M,B0,SCK,C1122

TABLE_ALT_ITEM

MICRON SCK PRIMARY, HYNIX ATK ALT
POP,GIBRALTAR_L+2GB,16NM,M,B0,SCK,C1122

TABLE_ALT_HEAD

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,2.2UF,10%,100V,X5R,1206,T:0.95MM

TABLE_ALT_ITEM

MURATA PRIMARY, SAMSUNG ALT
CAP,CER,4.7UF,10%,25V,X6S,0603

TABLE_ALT_ITEM

FAIRCHILD PRIMARY, DIODES ALT
XSTR,FET,P-CH,20V,4.5A,0.043 OHM,SS0T6

TABLE_ALT_ITEM

CYNTEC PRIMARY, CHILISIN ALT
IND,PWR,MLD,15UH,20%,1.9A,240MO,7368X24M

TABLE_ALT_ITEM

LITTLEFUSE PRIMARY, BOURNS ALT
FUSE,HIGH INRUSH,32V,3A,0603

TABLE_ALT_ITEM

DIOES PRIMARY, NXP ALT
DIODE,SCHOTTKY,100V,2A,SOD123

TABLE_ALT_ITEM

VISHAY PRIMARY, FAIRCHILD ALT
XSTR,MSFT,N-CH,75V,16A,0.046 OHM

TABLE_ALT_ITEM

NXP PRIMARY, ROHM ALT
DIODE,SCHOTKY,60V,1A,SOD123

TABLE_ALT_HEAD

TABLE_ALT_ITEM

MUR PRIMARY, USI ALT
MODULE,WIFI/BT,SAPPORO,ES3.1,M,LGA451

TABLE_ALT_ITEM

MUR PRIMARY, USI ALT
MODULE,WIFI/BT,SAPPORO,ES3.3,M,LGA451

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TOKIN PRIMARY, KEMET ALT
CAP TANT POLY,33UF,20%,16V,55MO,1.6A,B12

TABLE_ALT_ITEM

TOKIN PRIMARY, SEMCO ALT
CAP TANT POLY,33UF,20%,16V,55MO,1.6A,B12

TABLE_ALT_ITEM

TAIYO PRIMARY, MURATA ALT
FERR BD,120OHM,25%,1.3A,0.07DCR,0402

D

C

B

A

SYNC_DATE=

SYNC_MASTER=

3

1245678

678

3 245

1

D

1/3 OZ, PLATED TO 0.031 MM

1/3 OZ, PLATED TO 0.020 MM

1/3 OZ, PLATED TO 0.030 MM

1/2 OZ, 0.016 MM

1/2 OZ, 0.016 MM

1/2 OZ, 0.016 MM

1 OZ, 0.031 MM

SIGNAL

GND PLANE

SIGNAL

GND PLANE

SIGNAL

GND PLANE

POWER PLANE

RULER_RULE_SET=RIGID_2016

MULTIPLES

MANUFACTURING CONFIGURATION

DIELECTRIC BASED SPACING RULES

SMDPIN2SMDPIN MAX(UM)MVIA MAX(UM)SMDPIN MAX(UM)

120 11,2,3,4,5,6,7,8,9,10,11,12,13,14

LAYERS

TOP,BOTTOM 2.0 1.22.36842

ISL2,ISL13 2.25 2.5 1.2

ISL3,ISL12 2.0 2.25806 1.2

ISL4,ISL11 2.5 2.5 1.2

ISL5,ISL10 2.52.5 1.2

100120 2

MINIMUM CU SPACING RATIO MINIMUM TO DEFAULT RATIOMINIMUM CU WIDTH RATIO

2.52.5ISL6,ISL9 1.2

2.258062.0ISL7,ISL8 1.2

DEFAULT SPACING

MULTIPLES

TABLE_REV_NUMBER=1

VOID SPACE

D

RATIO

C

MANUAL EDITS AFTER AUTOGENERATION:
OVERWROTE THROUGH VIA, BB VIA, AND UVIA SPACINGS TO DEFAULT VALUE, THE AUTOGEN ONES ARE TOO HIGH
UPDATE SAME NET SPACING FOR VIA TO HOLE, UVIA TO SMD PIN, FOR DEFAULT AND MIN, TO -1
CHANGED LINE TO SMD SAME NET SPACING FROM 0.1 TO 0.07 ON TOP/BOTTOM LAYERS
CHANGED MAX NECK LENGTH FOR THE DEFAULT PHYSICAL RULE TO 20MM
CHANGED UVIA TO LINE SAME NET SPACING TO 0.05
CHANGED BB VIA TO LINE, ABD BB VIA TO BB VIA SAME NET SPACING TO 0.0
CHANGED BB VIA TO UVIA SAME NET SPACING TO -1
CHANGED LINE TO SHAPE SAME NET SPACING TO 0.05
SET BB VIA STAGGER IN PHYSICAL RULES TO 0.2500 FOR MIN, 0.275 FOR ALL OTHER, FOR LAYERS 3 AND 12
COPIED THE RULES FROM 85 OHM DIFF TO 85 MIN STAGGER
SET ENABLE DRC BY LAYER IN SAME NET SPACING TO TRUE FOR ALL LAYERS
KEEP DEFAULT AS DEFAULT, GENERIC DP AS GENERIC DP
REPLACING ALL SPACINGS EXCEPT LINE TO LINE WITH DEFAULT VALUES
DECREASED NECK GAP FOR DIFF PAIRS TO VALUE FOR GENERIC DP
REASSIGN SPACING AND PHYSICAL REGION RULES AND NET CLASS ASSIGNMENTS
SET UVIA TO SHAPE SAME NET SPACING TO 0.1MM ON TOP/BOTTOM

C

B

B

A

8

SYNC_MASTER= SYNC_DATE=

PAGE TITLE

A

BOARD RULES

DRAWING NUMBER

051-05309

Apple Inc.

REVISION

6.0.0

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

67

35 4

2

BRANCH

pvt

PAGE

500 OF 500

SHEET

98 OF 98

1

SIZE

D

J4800

TP3 704

TP3 710

R3713

C8463

XW8 410

R84 45

R8453

R8452

PPC8 43

C84 41

C8442

R8442

R8454

R8440

PPC8 47

PPC8 41

R8431R8432

L5111 L5110

Q58 71

C5853 C5852C5854

R2892

R2893

C2890

U2890

R2890

U2002

R30 94
R30 86

C20 06

R30 88

R30 89
R30 87

ZT0442

R5221

R5220

C9053

R6771

C6714

R6719

U6700

U6701

C6713

R6711

R6710

R6712

R6713

C6485

R64 02

R6480
C64 10

C64 09

R64 00

C7670

C6404

C64 11

C64 14 C6 413 C6464 C64 63

C6406

TP5 911

TP5 912

C8200

U8200

C8201

XW5 852

C5851

XW5 853

XW5 851

C8410

R2003

Q30 01

R2000

R3065

R2004

U8290

C82 94

C8290

U8291

R82 90

C30 10

C30 11

R30 13

R30 12

C67 21

R67 23

C9080

R67 22

C9087

C67 20

C67 23

C9078

R67 20

C9076

C6710

C6712

C6711

R6715

R6714

R64 01

C6407

C6408

R6481

C64 60

C64 00

C64 01

U6400 U6450

C64 02

C6454

C6403

C64 12

TP5 914 TP59 13

C54A0

C6486

C8430

XW8400

PPC8 49

PPC8 4A

R8200

U5850

R58 51

R8295

C8292

R82 93

R82 92

R82 91

R6730

C6484

R5300

R5301

C6459

C64 61 C 6462

U54A0

R54A5

PP5 4A0

R6721

R6482

R6731

R6483

C64 50

C64 51

C64 53

C64 52

R84 33

C5850

R58 50

U6702

R6733

R6732

R6742

R6734

R6451

C6458

R6490

no_re fdes+4

R51 05

R51 06

R51 04

Q5100

R51 03

CD7 E0
CD7 E1

CD7 E4

ZT0 446

CD7 E3
CD7 E2

CD7 E5

CD8 D2

CD8 D1

TP5 938 TP5 937

R51 11

R48 66

R51 02

R5640

PP5 601

R5645

D3398

D3399

PPC5 78

R30 34

R30 32

R30 39

CD7 20

D3300

CD7 21

F3000

C30 20

D3301

CD731

CD730

R5110

C51 04

C5103

CD791

CD790

C5101

C5100

C2976

C2975

C2977

C2994
C2995

U5640

C5640

C3102

R3047

R3023

R2834

R3021

U3100

C3101

C5102

C5111

R5520

U5100

C2978

CD8 D3

CD8 D0

R3109

R3080

D3001

U5111

C5105

R5107

R5101

C5110

TP5 929

R2862

R2860

TP5 930

R55 25

U5520

L5100

C2984C2985

R28 36

R3108

C3113

C55 20

XW3001

C2952

C2991

R28 55

C29 92

C29 93

C2982

C29 35

C2954

C2955

C2936

C2930

C2981

C2967

C2921

R2853

R2854

R3105

C3108
C3105

C3114

TP5 965

R2830

C2951

C2990

C2912

C2920

C2968

L3100

C31 09

R31 03

R28 31

C2950

L2950

C29 33

R2891

C29 80

C2983

C2917

CD8H0

C2915

C29 31

C2913

C2914

C2932

C2916

CD8H1

C2910

C29 34

C2964

R2851

C2911

C29 65

R30 95

PPC5 43

PPC5 44

C2966

R30 97

R30 98
R30 96

R30 16

R30 17

R30 15

R30 33

R30 14

C32 11

C9073

CD5N1

CD5N0

Q6770

C67 71

C67 70

R67 70

TP5 966

R67 17

R6718

no_re fdes+3

C6483

C8461

R8451

R8450

U8400

R8444

TP5 932 TP5 931

R5322

R5323

ZT0 441

R48 95

R47 00

R47 02

R4701

R42 32

R48 88

R48 87

R48 83

R48 85

PP9 610

R6741

R67 40

R67 39

R67 38

C67 22

R67 37

R67 36

R6735

C6457

C6455

C8471

C8450

C8460

C84 83

C8456

C8451

R8480

R84 55

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R84 46

R84 81

PPC8 46

XW8 450

PPC8 45

C8440

D8450

C8495

R5530

R55 31

U5530

R55 32

R5320

R5321

Q5530

R5534

C45 01

R39 34

C44 72

C4462

R39 71

C44 53

C4522

R47 22

R39 39

R47 15

C45 81

R48 52

C4530

C4536

C44 73

R47 20

C44 57

R47 21

C4524C4527

C45 02

R39 75

C44 54

C44 71

C4521

R39 73

C44 56

C45 82

C8816

C88 15

C88 11

C88 83

PP9 605

PP9 604

PP9 609

C8936

PP9 602

PP9 603

R96 79

PP9 606

ZT0 422 ZT0 421 ZT0 420

C9679

TP5 903

TP5 904

C6487
C6488

CD6 J0

R37 12

CD6 J1

L8420

C8469

C8470

CD6 01
CD6 00

C8458

C8494

C8457

C84 55

R5533R5536

C5530

R3081

R4102

R4101

C4526
C4436
C4370
C4405

C4425
C4373
C4402
C4386
C4431

C4460

C4566C4451

C89 53 C 8910

PP3717

C8467

PP3718

R37 51

C3710

TP5 947

C8491

TP5 948

C8490

D55 30

R80 22

R4100

C4411
C4400
C4381
C4430

C4372C43 85

C4406

C4371
C4410

XW4822

C4445

R4201

L4590

R4590

C3940

CD5K3

R3960

R45 70
C45 71

C45 70

C45 60

R39 40

Y3940

CD5K1

R55 35

C4595

C4590

C45 50

C8950

Q5531

R48 64

R48 70

R4560

R39 41

R4218

Q4830

R48 30

R4846

C45 23

C45 35

C4320

XW4821

C4304 C43 22 C4302
C4306

C4308

C4352

C45 55
R45 55

C4330

C45 72

R45 30

C4353

C4561

C4303

C4332

C4305
C4334

C4331

XW4820

C4401

R4445

R42 51

C39 41

R8909

R8908

R8905

R4845

C4567

C8985

C4525
C4441

C2021

R4565

R8904

U2021

C4802

U4802

R3937

C4568

C4426
C4440

C4307
C4351 C 4309

C4356

C4562

R4250

CD5 M2

C8981

C8982

C37 12

R2022
PPC5 64

R2023

R48 04R48 05

C4350

C4360C4354

C4333
C4355C4300
C4301C4380
C4324C 4323
C4420C4435

C4565

C4545

CD5 M0

R8981

R8982

U8900

C89 32

C8945

C8944

C8946

R8910

R8911

C8937

C8951

C8984

C8987

C8947

CD5L 2

CD5L0

C7666

C7669

C76 61

C7665

CD651

CD650

R76 55

R76 00

U7650

R76 50

C7673

R7673

R7672

R7678R7677

R7679

C7678

R7675

R7671

C76 79

R8435 R8436

U3710

TP3 703

TP3 712

R3705R3702

TP3 706

C3711

U3750

R48 72

R48 73

R4874

R48 71

R48 69

R4876

TP6 603

R4200

C4461

C4511

C4512

C45 13

FL4 400
R44 60

C44 63

R4545

C4540

R8980

C8952

R8906

R8930

R76 10

R76 13

R7665

C76 52

R7676

C7664

R7660

R37 17

TP3 708

R3718

R38 05

R38 03

TP3 707

TP3 705

R38 04

TP3 711

R38 01

R37 11

C37 09

TP5 908

C37 08

TP5 943

C37 07

TP5 907

C6902

C37 06

C6905

TP5 944

R37 52

R37 14

R5680

R37 15

PP3719

R37 54

PP3716

R37 53

C5680

U4870

C48 71

PPC5 61P PC5 65

C48 70

L4870

PP3714

PP3715

U20 20

C2020

R4875

R20 20

C44 50

PP6606

R39 70

TP6 602

C45 83

R4860R4859

C44 70

C4423

R40 51

R39 74

R40 50

R40 53

C44 55

R40 52

C45 10

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R13 61

C8134

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ZT0 400

R8153

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R8155

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C8131

C8137

C81 33

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TP5 925T P5926

R81 30

C81 30

C81 15

C81 16
R81 12

R8141

R81 11

R81 17

C8104

CD7I1

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C6302

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R63 01

R63 00

Z04 04

C6583

L6607

C6308

C6307

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FL6606
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FL6 602

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C65 09

C65 10

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R60 00

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C49 54 C4955

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C49 56

R49 53

C49 53

R49 12

R49 24

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TP5 959

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R65 01

C65 60

C65 59

C65 54

C65 08

U6500

C65 07

C65 61C65 12

C6513

C6514

C6584

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no_re fdes+5

C58 73

C58 74

ZT0 430

R49 23

C49 26

U49 20

C4912

FL4 900

C49 27

C49 18

FL4 920

R4922

C49 29

C49 17

C49 14

C49 28

FL4 910

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C49 51

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R5306

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R65 51

C65 58

C65 57

R65 82

R65 83

U6550

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C6563

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no_ refd es+8

RE095

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no_ refd es+2

FL6609

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J6600

TP6 506

TP6 503

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TP6 507

C6552

C6551

C6553

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C6555

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PP0430

TP6 301

TP6 309

TP6 306

TP6 308

FL 6610

C66 97

C66 96

R6600

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TP6 508

TP6 500

TP6 505

TP6 501

C6500

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TP6 305TP6 304

C81 20

R8116

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CD7A 6

CD7 H6

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CD770

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C81 A3

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C72 19

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R1382

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CD8 07

CD8 39

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C25 41

CD8 08

CD8 40
C25 05

C25 23

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C25 21

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C37 22

TP3 709

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C69 14

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C78 30

C78 33

C78 34

CD690

C78 38

R5270

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C78 37

C78 32

C78 12

C78 24

C78 27

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C78 25

C78 13

C78 26

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TP6 406

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R2828

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C28 20
C28 21

C28 23

C28 22
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C28 25

C28 27

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DZ3 352

D3 358

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