ANALOG DEVICES UG-392 Service Manual

Evaluation Board User Guide

10620-001

One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: [phone] • Fax: [phone] • www.analog.com

UG-392

Evaluation Board for the AD5259 Digital Potentiometer

FEATURES

Full-featured in conjunction with low voltage digiPOT

motherboard (EVAL-MB-LV-SDZ)
Various test circuits
Various ac/dc input signals
PC control via a separately purchased system demonstration

platform (SDP-B or SDP-S)
PC software for control

PACKAGE CONTENTS

EVAL-AD5259DBZ board

EVAL-MB-LV-SDZ motherboard
CD that includes

Self-installing software that allows users to control the

board and exercise all functions of the device
Electronic version of the AD5259 data sheet
Electronic version of the UG-392 user guide

GENERAL DESCRIPTION

This user guide describes the evaluation board for evaluating the

AD5259, a single-channel, 256-position, nonvolatile memory

digital potentiometer in conjunction with the low voltage
digiPOT motherboard.

The AD5259 supports single-supply 2.7 V to 5.5 V operation,
making the device suited for battery-powered applications and
many other applications with superior low temperature
coefficient performance.

In addition, the AD5259 uses a versatile I
operates in fast mode, allowing speeds of up to 400 kHz. This
interface can be used to read back the wiper register and
EEPROM content.

The E VA L -MB-LV-SDZ can operate in single-supply mode and
incorporates an internal power supply from the USB.

Complete specifications for the AD5259 part can be found in
the AD5259 data sheet, which is available from Analog Devices,
Inc., and should be consulted in conjunction with this user
guide when using the evaluation board.

2

C serial interface that

EVAL-AD5259DBZ WITH MOTHERBOARD AND SDP-B

Figure 1. Digital Picture of Evaluation Board with Low Voltage DigiPOT Motherboard and System Demonstration Platform

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.

Rev. 0 | Page 1 of 16

UG-392 Evaluation Board User Guide

TABLE OF CONTENTS

Features .............................................................................................. 1

Package Contents .............................................................................. 1

General Description ......................................................................... 1

EVAL-AD5259DBZ with Motherboard and SDP ........................ 1

Revision History ............................................................................... 2

Evaluation Board Hardware ............................................................ 3

Power Supplies .............................................................................. 3

Test Circuits ................................................................................... 4

Evaluation Board Software .............................................................. 6

REVISION HISTORY

5/12—Revision 0: Initial Version

Installing the Software ..................................................................6

Running the Software ...................................................................6

Software Operation .......................................................................7

Evaluation Board Schematics and Artwork ...................................8

Motherboard ..................................................................................8

Daughter Board .......................................................................... 12

Ordering Information .................................................................... 14

Bill of Materials ........................................................................... 14

Rev. 0 | Page 2 of 16

Evaluation Board User Guide UG-392

EVALUATION BOARD HARDWARE

POWER SUPPLIES

The EVAL-MB-LV-SDZ supports using single power supplies.

The evaluation board can be powered either from the SDP port
or externally by the J1 and J2 connectors, as described in Table 1.

All supplies are decoupled to ground using 10 µF tantalum and

0.1 µF ceramic capacitors.

Table 1. Maximum and Minimum Voltages of the Connectors

Connector
No.

J1-1 EXT VDD Analog positive power supply, VDD,
from 2.7 V to 5.5 V
J1-2 GND Analog ground
J2-1 VLOGIC Digital supply, from 2.7 V to VDD
J2-2 DGND Digital ground

Table 3. Link Functions

Link No. Power Supply Options

A11 VDD This link selects one of the following as the positive power supply:
5 V (from SDP).

3.3 V (from SDP).
EXT VDD (external supply from the J1 connector).
A5 V

A12 GND AGND.

Label Voltage

This link selects one of the following as the digital supply:

LOGIC

3.3 V (from SDP).
VLOGIC (external supply from the J2 connector).

Link Options

Several link and switch options are incorporated in the EVAL­MB-LV-SDZ board and should be set up before using the board.
Table 2 describes the positions of the links to control the
evaluation board by a PC, via the SDP board. The functions of
these link options are described in detail in Ta ble 3 through
Table 6.

Table 2. Link Options Setup for SDP Control (Default)

Link No. Option
A11 3.3 V
A12 AGND
A5 3.3 V

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UG-392 Evaluation Board User Guide

VOUT1

R34

R35

A1

W1

RDAC

A

B

W

VDD

V

DD

AC+

V

DD

2

V

DD

2

AGND

BIAS

B1

BUF-W1

10620-002

VOUT1

R34

R35

A1

W1

RDAC

A

B

W

AC

AC+

AGND

BIAS

B1

BUF-W1

AC_INPUT

1kHz

HPF

10620-003

V

DD

2

V

DD

2















+

×=

−− ENDTOEND

WWB

R

RR

nAttenuatio log20)dB(

TEST CIRCUITS

The E VA L -AD5259DBZ and E VAL-MB-LV-SDZ incorporate
several test circuits to evaluate the performance of the AD5259.

DAC

The RDAC can be operated as a digital-to-analog converter
(DAC), as shown in Figure 2.

Figure 2. DAC

Table 5 shows the options available for the voltage references.

The output voltage is defined in Equation 1.

RDAC

OUT

×−=

)(

VVV

B

A

(1)

256

where:

RDAC is the code loaded in the RDAC register.
V

is the voltage applied to the A terminal (A9 link).

A

V

is the voltage applied to the B terminal (A10 link).

B

Howeve r, by using the R34 and R35 external resistors, the user
can reduce the voltage of the voltage references. In this case, use
the A1 and B1 test points to measure the voltage applied to the
A and B terminals and recalculate V

and VB in Equation 1.

A

AC Signal Attenuation

The RDAC can be used to attenuate an ac signal, which must be
provided externally using the AC_INPUT connector, as shown
in Figure 3.

Figure 3. AC Signal Attenuator

Depending on the voltage supply rails and the dc offset voltage
of the ac signal, various configurations can be used as described
in Table 4.

Table 4. AC Signal Attenuation Link Options

Link Options Conditions

A9 AC+ No dc offset voltage.
AC signal is outside the voltage supply rails

due to the dc offset voltage.
DC offset voltage ≠ VDD/21.
AC All other conditions.
A10 BIAS Use in conjunction with AC+ link1.
AGND All other conditions.

1

Recommended to ensure optimal total harmonic distortion (THD) performance.

The signal attenuation is defined in Equation 2.

(2)

where:

R

is the resistor between the W and B terminals.

WB

R

is the wiper resistance.

W

R

END-TO-END

is the end-to-end resistance value.

Table 5. DAC Voltage References

Term inal Link (Daughter Board) Link (Motherboard) Options Description

A1 Switch B of A4 A9 AC+ Connects Terminal A1 to VDD /2
VDD Connects Terminal A1 to VDD
W1 Switch B of A3 BUF-W1 Connects Terminal W1 to an output buffer
B1 Switch B of A2 A10 BIAS Connects Terminal B1 to VDD/2
AGND Connects Terminal B1 to analog ground
A1 inserted Closes feedback loop of second op amp in the AD8618

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Evaluation Board User Guide UG-392

R38

R

G

WB

+= 1

VOUT2

V

IN

RDAC

R42

C1

10nF

W2

B2

W B

R41

1.7kΩ

R38

2.7kΩ

10620-004

AW

WB

R

R

G +=1

VOUT2

V

IN

RDAC

R42

C1

10nF

W2

B2

A B

W

R41

1.7kΩ

A2

R43

10620-005

R38

R

G

WB

−=

VOUT2

V

IN

RDAC

R42

C1

10nF

W2

B2

W B

R41

1.7kΩ

R38

2.7kΩ

10620-006

Signal Amplifier

The RDAC can be operated as an inverting or noninverting
signal amplifier supporting linear or pseudologarithmic gains.
Table 6 shows the available configurations.

The noninverting amplifier with linear gain is shown in Figure 4,
and the gain is defined in Equation 3.

where R

(3)

is the resistor between the W and B terminals.

WB

Figure 5. Pseudologarithmic Noninverting Amplifier

R43 and R42 can be used to set the maximum and minimum
gain limits.

The inverting amplifier with linear gain is shown in Figure 6,
and the gain is defined in Equation 5.

Note that the input signal, V

, must be negative.

IN

(5)

where R

is the resistor between the W and B terminals.

WB

Figure 4. Linear Noninverting Amplifier

The noninverting amplifier with pseudologarithmic gain is
shown in Figure 5, and the gain is defined in Equation 4.

(4)

where:

RWB is the resistor between the W and B terminals.
R

is the resistor between the A and W terminals.

AW

Figure 6. Linear Inverting Amplifier

Table 6. Amplifier Selection Link Options

Amplifier Gain Link (Daughter Board) Link (Motherboard) Label V

Range

IN

Noninverting Linear Switch A of A2, A3, and A4 A7 LIN 0 V to VDD
A6 N-INV
A1 not inserted A8 N-INV
Pseudologarithmic Switch A of A2, A3, and A4 A7 LOC 0 V to VDD
A6 N-INV
A1 not inserted A8 N-INV
Inverting Linear Switch A of A2, A3, and A4 A7 LIN −VDD to 0 V
A6 INV
A1 not inserted

A8 INV

Rev. 0 | Page 5 of 16