ANALOG DEVICES UG-391 Service Manual

Evaluation Board User Guide
One Technology Way P. O . Box 9106 Norwood, MA 02062-9106, U.S.A. Tel : 781.329.4700 Fax : 781.461.3113 www.analog.com
UG-391
Evaluation Board for the AD5258 Digital Potentiometer

FEATURES

Full-featured in conjunction with low voltage digiPOT
motherboard (EVAL-MB-LV-SDZ) Various test circuits Various ac/dc input signals PC control via a separately purchased system demonstration
platform (SDP-B or SDP-S) PC software for control

PACKAGE CONTENTS

EVAL-AD5258DBZ board
EVAL-MB-LV-SDZ motherboard CD that includes
Self-installing software that allows users to control the
board and exercise all functions of the device Electronic version of the AD5258 data sheet Electronic version of the UG-391 user guide

GENERAL DESCRIPTION

This user guide describes the evaluation board for evaluating the
AD5258, a single-channel, 64-position, nonvolatile memory
digital potentiometer in conjunction with the low voltage digiPOT motherboard.
The AD5258 supports single-supply 2.7 V to 5.5 V operation, making the device suited for battery-powered applications and many other applications with superior low temperature coefficient performance.
In addition, the AD5258 uses a versatile I operates in fast mode, allowing speeds of up to 400 kHz. This interface can be used to read back the wiper register and EEPROM content.
The EVAL-MB-LV-SDZ can operate in single-supply mode and incorporates an internal power supply from the USB.
Complete specifications for the AD5258 part can be found in the AD5258 data sheet, which is available from Analog Devices, Inc., and should be consulted in conjunction with this user guide when using the evaluation board.
2
C serial interface that

EVAL-AD5258DBZ WITH MOTHERBOARD AND SDP-B

Figure 1. Digital Picture of Evaluation Board with Low Voltage DigiPOT Motherboard and System Demonstration Platform
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS.
10619-001
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UG-391 Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Package Contents .............................................................................. 1
General Description ......................................................................... 1
EVAL-AD5258DBZ with Motherboard and SDP-B .................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Power Supplies .............................................................................. 3
Test Circuits ................................................................................... 4
Signal Amplifier ............................................................................ 5

REVISION HISTORY

5/12—Revision 0: Initial Version
Evaluation Board Software ...............................................................6
Installing the Software ..................................................................6
Running the Software ...................................................................6
Software Operation .......................................................................7
Evaluation Board Schematics and Artwork ...................................8
Motherboard ..................................................................................8
Daughter Board .......................................................................... 12
Ordering Information .................................................................... 14
Bill of Materials ........................................................................... 14
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Evaluation Board User Guide UG-391

EVALUATION BOARD HARDWARE

POWER SUPPLIES

The EVAL-MB-LV-SDZ supports using single power supplies.
The evaluation board can be powered either from the SDP port or externally by the J1 and J2 connectors, as described in Table 1.
All supplies are decoupled to ground using 10 μF tantalum and
0.1 μF ceramic capacitors.

Link Options

Several link and switch options are incorporated in the EVAL­MB-LV-SDZ board and should be set up before using the board. Table 2 describes the positions of the links to control the evaluation board by a PC, via the SDP board. The functions of these link options are described in detail in Table 3 through Tabl e 6.
Table 1. Maximum and Minimum Voltages of the Connectors
Connector No. Label Voltage
J1-1 EXT VDD Analog positive power supply, VDD, from 2.7 V to 5.5 V J1-2 GND Analog ground J2-1 VLOGIC Digital supply, from 2.7 V to VDD J2-2 DGND Digital ground
Table 2. Link Options Setup for SDP Control (Default)
Link No. Option A11 3.3 V A12 AGND A5 3.3 V
Table 3. Link Functions
Link No. Power Supply Options
A11 VDD This link selects one of the following as the positive power supply: 5 V (from SDP).
3.3 V (from SDP). EXT VDD (external supply from the J1 connector). A5 V
A12 GND AGND.
This link selects one of the following as the digital supply:
LOGI C
3.3 V (from SDP). VLOGIC (external supply from the J2 connector).
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UG-391 Evaluation Board User Guide
V
V
V
V

TEST CIRCUITS

The EVAL-AD5258DBZ and EVAL-MB-LV-SDZ incorporate several test circuits to evaluate the performance of the AD5258.
DAC
The RDAC can be operated as a digital-to-analog converter (DAC), as shown in Figure 2.
2
– V
2
AC+
SS
VDD
V
DD
SS
RDAC
BIAS
AGND
R34
A1
A
B
W
R35
W1
B1
BUF-W1
VOUT1
10619-002
Figure 2. DAC
RDAC
)(
VVV
B
A
(1)
64
and VB in Equation 1.
A
DD
V
DD
Table 5 shows the options available for the voltage references.
The output voltage is defined in Equation 1.
OUT
where:
RDAC is the code loaded in the RDAC register. V
is the voltage applied to the A terminal (A9 link).
A
V
is the voltage applied to the B terminal (A10 link).
B
However, by using the R34 and R35 external resistors, the user can reduce the voltage of the voltage references. In this case, use the A1 and B1 test points to measure the voltage applied to the A and B terminals and recalculate V

AC Signal Attenuation

The RDAC can be used to attenuate an ac signal, which must be provided externally using the AC_INPUT connector, as shown in Figure 3.
DD
1kHz
HPF
AC_INPUT
SS
2
AC+
AC
R34
A1
RDAC
A
B
V
– V
DD
BIAS
SS
2
AGND
W
R35
W1
B1
VOUT1
BUF-W1
Figure 3. AC Signal Attenuator
Depending on the voltage supply rails and the dc offset voltage of the ac signal, various configurations can be used as described in Table 4.
Table 4. AC Signal Attenuation Link Options
Link Options Conditions
A9 AC+ No dc offset voltage.
AC signal is outside the voltage supply rails
due to the dc offset voltage. DC offset voltage ≠ VDD/21. AC All other conditions. A10 BIAS Use in conjunction with AC+ link1. AGND All other conditions.
1
Recommended to ensure optimal total harmonic distortion (THD) performance.
The signal attenuation is defined in Equation 2.
nAttenuatio log20)dB( (2)
R
RR
WWB
 
ENDTOEND
where:
R
is the resistor between the W and B terminals.
WB
is the wiper resistance.
R
W
R
END-TO-END
is the end-to-end resistance value.
10619-003
Table 5. DAC Voltage References
Terminal Link (Daughter Board) Link (Motherboard) Options Description
A1 Switch B of A4 A9 AC+ Connects Terminal A1 to VDD /2 VDD Connects Terminal A1 to VDD W1 Switch B of A3 BUF-W1 Connects Terminal W1 to an output buffer B1 Switch B of A2 A10 BIAS Connects Terminal B1 to VDD/2 AGND Connects Terminal B1 to analog ground A1 inserted Closes feedback loop of second op amp in the AD8618
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Evaluation Board User Guide UG-391

SIGNAL AMPLIFIER

The RDAC can be operated as an inverting or noninverting signal amplifier supporting linear or pseudologarithmic gains. Table 6 shows the available configurations.
The noninverting amplifier with linear gain is shown in Figure 4, and the gain is defined in Equation 3.
R
WB
G
where R
WB
The noninverting amplifier with pseudologarithmic gain is shown in Figure 5, and the gain is defined in Equation 4.
G 1 (4)
where:
is the resistor between the W and B terminals.
R
WB
R
is the resistor between the A and W terminals.
AW
(3)
1
R38
is the resistor between the W and B terminals.
R41
W2
1.7k
R38
2.7k
WB
RDAC
10nF
B2
C1
VOUT2
R42
Figure 4. Linear Noninverting Amplifier
10619-004
V
IN
R
WB
R
AW
R41
1.7k
V
R43
IN
W2
A2
AB
RDAC
C1
10nF
B2
W
R42
VOUT2
10619-005
Figure 5. Pseudologarithmic Noninverting Amplifier
R43 and R42 can be used to set the maximum and minimum gain limits.
The inverting amplifier with linear gain is shown in Figure 6, and the gain is defined in Equation 5.
Note that the input signal, V
R
WB
G
where R
WB
(5)
R38
is the resistor between the W and B terminals.
R38
2.7k
V
IN
W2
RDAC
Figure 6. Linear Inverting Amplifier
, must be negative.
IN
R41
1.7k
C1
10nF
WB
B2
R42
VOUT2
10619-006
Table 6. Amplifier Selection Link Options
Amplifier Gain Link (Daughter Board) Link (Motherboard) Label V
Range
IN
Noninverting Linear Switch A of A2, A3, and A4 A7 LIN 0 V to VDD A6 N-INV A1 not inserted A8 N-INV Pseudologarithmic Switch A of A2, A3, and A4 A7 LOC 0 V to VDD A6 N-INV A1 not inserted A8 N-INV Inverting Linear Switch A of A2, A3, and A4 A7 LIN −VDD to 0 V A6 INV A1 not inserted
A8 INV
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