ANALOG DEVICES SSM2375 Service Manual

Filterless, High Efficiency,

FEATURES

Filterless Class-D amplifier with spread-spectrum
Σ-Δ modulation
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion (THD + N) 93% efficiency at 5.0 V, 1.4 W into 8 Ω speaker >100 dB signal-to-noise ratio (SNR) High PSSR at 217 Hz: 80 dB Flexible gain adjustment pin: 0 dB to 12 dB in 3 dB steps Fixed input impedance: 80 kΩ User-selectable ultralow EMI emissions mode Single-supply operation from 2.5 V to 5.5 V 20 nA shutdown current Short-circuit and thermal protection with autorecovery Available in 9-ball, 1.5 mm × 1.5 mm WLCSP Pop-and-click suppression

APPLICATIONS

Mobile phones MP3 players Portable electronics

GENERAL DESCRIPTION

The SSM2375 is a fully integrated, high efficiency, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous output power with <1% THD + N driving a 3 Ω load from a 5.0 V supply.
The SSM2375 features a high efficiency, low noise modulation scheme that requires no external LC output filters. The modulation continues to provide high efficiency even at low output power. The SSM2375 operates with 93% efficiency at 1.4 W into 8 Ω or with 85% efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR of >100 dB.

FUNCTIONAL BLOCK DIAGRAM

10µF
SSM2375
22nF
IN+ IN–
SHUTDOWN
GAIN SELECT
Rev. 0
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IN+ IN–
22nF
SD
R
GAIN = 0dB, 3dB, 6dB, 9dB, O R 12dB
GAIN
GAIN
CONTROL
GAIN
BIAS
Mono 3 W Class-D Audio Amplifier
SSM2375
Spread-spectrum pulse density modulation (PDM) is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The inherent randomized nature of spread-spectrum PDM eliminates the clock intermodulation (beating effect) of several amplifiers in close proximity.
The SSM2375 includes an optional modulation select pin (ultralow EMI emissions mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. In ultralow EMI emissions mode, the SSM2375 can pass FCC Class B radiated emission testing with 50 cm, unshielded speaker cable without any external filtering.
The device also includes a highly flexible gain select pin that allows the user to select a gain of 0 dB, 3 dB, 6 dB, 9 dB, or 12 dB. The gain selection feature improves gain matching between multiple SSM2375 devices within a single application as compared to using external resistors to set the gain.
The SSM2375 has a micropower shutdown mode with a typical shutdown current of 20 nA. Shutdown is enabled by applying
EDGE
SD
pin.
OUT+ OUT–
EDGE
GND
EMISSION CONTROL
09011-001
0.1µF
MODULATOR
(Σ-Δ)
INTERNAL
OSCILLATOR
Figure 1.
a logic low to the
The device also includes pop-and-click suppression circuitry. This suppression circuitry minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise on activation and deactivation.
Other features that simplify system-level integration of the SSM2375 include input low-pass filtering to suppress out-of-band DAC noise interference to the PDM modulator and fixed-input impedance to simplify component selection across multiple platform production builds.
The SSM2375 is specified over the industrial temperature range of −40°C to +85°C. It has built-in thermal shutdown and output short-circuit protection. It is available in a halide-free, 9-ball,
1.5 mm × 1.5 mm wafer level chip scale package (WLCSP).
POWER SUPPLY
2.5V TO 5.5V
VDD
FET
DRIVER
CONTROL
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.
SSM2375

TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Typical Application Circuits .......................................................... 12

REVISION HISTORY

9/10—Revision 0: Initial Version
Theory of Operation ...................................................................... 13
Overview ..................................................................................... 13
Gain Selection ............................................................................. 13
Pop-and-Click Suppression ...................................................... 13
EMI Noise .................................................................................... 13
Output Modulation Description .............................................. 13
Layout .......................................................................................... 14
Input Capacitor Selection .......................................................... 14
Power Supply Decoupling ......................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
Rev. 0 | Page 2 of 16
SSM2375

SPECIFICATIONS

VDD = 5.0 V, TA = 25°C, RL = 8 Ω +33 μH, EDGE = GND, unless otherwise noted.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
DEVICE CHARACTERISTICS
Output Power P
O
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Efficiency η PO = 1.4 W into 8 Ω, VDD = 5.0 V 93 %
Total Harmonic Distortion + Noise THD + N PO = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V 0.01 %
P
1.0 VDD − 1 V
Input Common-Mode Voltage
V
CM
Range Common-Mode Rejection Ratio CMRR Average Switching Frequency fSW 250 kHz Differential Output Offset Voltage V
OOS
POWER SUPPLY
Supply Voltage Range V
DD
Power Supply Rejection Ratio PSRR Inputs are ac-grounded, CIN = 0.1 μF V V Supply Current I
SY
V V V V V Shutdown Current ISD
GAIN CONTROL
Closed-Loop Gain Gain 0 12 dB Input Impedance Z
IN
SHUTDOWN CONTROL
Input Voltage High V Input Voltage Low V Turn-On Time t
Turn-Off Time t Output Impedance Z
IH
IL
WU
SD
OUT
f = 1 kHz, 20 kHz BW
= 8 Ω, THD = 1%, VDD = 5.0 V 1.42 W
L
= 8 Ω, THD = 1%, VDD = 3.6 V 0.72 W
L
= 8 Ω, THD = 1%, VDD = 2.5 V 0.33 W
L
= 8 Ω, THD = 10%, VDD = 5.0 V 1.77 W
L
= 8 Ω, THD = 10%, VDD = 3.6 V 0.91 W
L
= 8 Ω, THD = 10%, VDD = 2.5 V 0.42 W
L
= 4 Ω, THD = 1%, VDD = 5.0 V 2.52 W
L
= 4 Ω, THD = 1%, VDD = 3.6 V 1.28 W
L
= 4 Ω, THD = 1%, VDD = 2.5 V 0.56 W
L
= 4 Ω, THD = 10%, VDD = 5.0 V 3.171 W
L
= 4 Ω, THD = 10%, VDD = 3.6 V 1.6 W
L
= 4 Ω, THD = 10%, VDD = 2.5 V 0.72 W
L
= 3 Ω, THD = 1%, VDD = 5.0 V 3.21 W
L
= 3 Ω, THD = 1%, VDD = 3.6 V 1.52 W
L
= 3 Ω, THD = 1%, VDD = 2.5 V 0.68 W
L
= 3 Ω, THD = 10%, VDD = 5.0 V 3.71 W
L
= 3 Ω, THD = 10%, VDD = 3.6 V 1.9 W
L
= 3 Ω, THD = 10%, VDD = 2.5 V 0.85 W
L
= 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V 0.01 %
O
GSM VCM
= 2.5 V ± 100 mV, f = 217 Hz, output referred 55 dB
Gain = 6 dB 0.1 2.0 mV
Guaranteed from PSRR test 2.5 5.5 V
= 100 mV at 217 Hz 80 dB
RIPPLE
= 100 mV at 1 kHz 80 dB
RIPPLE
VIN = 0 V, no load, VDD = 5.0 V 3.0 mA
= 0 V, no load, VDD = 3.6 V 2.7 mA
IN
= 0 V, no load, VDD = 2.5 V 2.5 mA
IN
= 0 V, RL = 8 Ω + 33 μH, VDD = 5.0 V 3.1 mA
IN
= 0 V, RL = 8 Ω + 33 μH, VDD = 3.6 V 2.8 mA
IN
= 0 V, RL = 8 Ω + 33 μH, VDD = 2.5 V 2.6 mA
IN
= GND
SD
SD = VDD, fixed input impedance (0 dB to 12 dB)
20 nA
80 kΩ
1.35 V
0.35 V SD rising edge from GND to VDD SD falling edge from VDD to GND
= GND
SD
Rev. 0 | Page 3 of 16
12.5 ms 5 μs >100
SSM2375
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
NOISE PERFORMANCE
Output Voltage Noise en
= 5.0 V, f = 20 Hz to 20 kHz, inputs are
V
DD
ac-grounded, gain = 6 dB, A-weighted
Signal-to-Noise Ratio SNR PO = 1.4 W, RL = 8 Ω 100 dB
1
Although the SSM2375 has good audio quality above 3 W, continuous output power beyond 3 W without a heat sink must be avoided due to device packaging limitations.
30 μV rms
Rev. 0 | Page 4 of 16
SSM2375

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter Rating
Supply Voltage 6 V Input Voltage V Common-Mode Input Voltage V Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C Junction Temperature Range −65°C to +165°C Lead Temperature (Soldering, 60 sec) 300°C ESD Susceptibility 4 kV
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DD
DD

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type PCB θJA θJB Unit
9-Ball, 1.5 mm × 1.5 mm WLCSP 1S0P 162 39 °C/W 2S0P 76 21 °C/W

ESD CAUTION

Rev. 0 | Page 5 of 16
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