2 × 2W Filterless Class-D
FEATURES
Filterless stereo Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Class-D amplifiers
from Analog Devices, Inc.
2 × 2W into 4 Ω load and 2x1.4 W into 8 Ω load at 5.0 V
supply with <1% total harmonic distortion (THD + N)
92% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
>103 dB signal-to-noise ratio (SNR)
Single-supply operation from 2.5 V to 5.5 V
20 nA shutdown current; left/right channel control
Short-circuit and thermal protection
Available in a 16-ball, 1.66 mm × 1.66 mm WLCSP
Pop-and-click suppression
Built-in resistors that reduce board component count
User-selectable 6 dB or 18 dB gain setting
User-selectable ultralow EMI emission mode
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
GENERAL DESCRIPTION
The SSM2356 is a fully integrated, high efficiency, stereo Class-D
audio amplifier. It is designed to maximize performance for
mobile phone applications. The application circuit requires
a minimum of external components and operates from a single
2.5 V to 5.5 V supply. It is capable of delivering 2 × 2W of continuous output power with <1% THD + N driving a 4 Ω load from a
5.0 V supply.
Stereo Audio Amplifier
SSM2356
The SSM2356 features a high efficiency, low noise modulation
scheme that requires no external LC output filters. The modulation
continues to provide high efficiency even at low output power.
It operates with 92% efficiency at 1.4 W into 8 Ω or 85% efficiency
at 2.0 W into 4 Ω from a 5.0 V supply and has an SNR of >103 dB.
Spread-spectrum pulse density modulation is used to provide
lower EMI-radiated emissions compared with other Class-D
architectures. The SSM2356 includes an optional modulation
select pin (ultralow EMI emission mode) that significantly
reduces the radiated emissions at the Class-D outputs, particularly
above 100 MHz.
The SSM2356 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying
a logic low to the
includes pop-and-click suppression circuitry that minimizes
voltage glitches at the output during turn-on and turn-off,
reducing audible noise on activation and deactivation.
The fully differential input of the SSM2356 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately V
selected between 6 dB and 18 dB with no external components
and no change to the input impedance. Gain can be further
reduced to a user-defined setting by inserting series external
resistors at the inputs.
The SSM2356 is specified over the commercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 16-ball, 1.66 mm ×
1.66 mm wafer level chip scale package (WLCSP).
and
SDNR
/2. The preset gain of SSM2356 can be
DD
pins. The device also
SDNL
FUNCTIONAL BLOCK DIAGRAM
10µF
SSM2356
1
RIGHT IN+
RIGHT IN–
SHUTDOWN–R
SHUTDOWN–L
LEFT IN+
LEFT IN–
1
INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY V
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
22nF
22nF
22nF
22nF
GAIN
80kΩ
INR+
INR–
80kΩ
1
SDNR
SDNL
1
80kΩ
INL+
INL–
80kΩ
1
GAIN
CONTROL
GAIN
CONTROL
GAIN
GAIN = 6dB OR 18dB
/2.
DD
VBATT
2.5V TO 5.5V
VDDVDD
FET
DRIVER
CONTROL
FET
DRIVER
GNDGND
EDGE
OUTR+
OUTR–
EDGE
OUTL+
OUTL–
EMISSION
CTRL
8084-001
MODULATOR
BIAS
BIAS
MODULATOR
0.1µF
(Σ-Δ)
INTERNAL
OSCILLATOR
(Σ-Δ)
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.
SSM2356
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
Typical Application Circuits .......................................................... 12
REVISION HISTORY
5/09—Revision 0: Initial Version
Applications Information .............................................................. 13
Overview ..................................................................................... 13
Gain Selection ............................................................................. 13
Pop-and-Click Suppression ...................................................... 13
EMI Noise .................................................................................... 13
Output Modulation Description .............................................. 14
Layout .......................................................................................... 14
Input Capacitor Selection .......................................................... 14
Proper Power Supply Decoupling ............................................ 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
Rev. 0 | Page 2 of 16
SSM2356
SPECIFICATIONS
VDD = 5.0 V, TA = 25oC, RL = 8 Ω +33 H, EDGE = GND, Gain = 6 dB, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
DEVICE CHARACTERISTICS
Output Power/Channel P
O
R
R
R
R
R
R
R
Efficiency η PO = 1.4 W, 8 Ω, VDD = 5.0 V, EDGE = GND
P
Total Harmonic Distortion + Noise THD + N PO = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V 0.004 %
P
Input Common-Mode Voltage Range VCM 1.0 VDD − 1 V
Common-Mode Rejection Ratio CMRR
Channel Separation X
TAL K
Average Switching Frequency fSW 300 kHz
Differential Output Offset Voltage V
OOS
POWER SUPPLY
Supply Voltage Range V
Power Supply Rejection Ratio
DD
PSRR
(DC)
PSRR
Supply Current (stereo) I
SY
V
V
Shutdown Current ISD
GAIN CONTROL
Closed-Loop Gain Gain GAIN = VDD 18 dB
Gain GAIN = GND 6 dB
Input Impedance Z
IN
SHUTDOWN CONTROL
Input Voltage High V
Input Voltage Low V
Turn-On Time t
Turn-Off Time t
Output Impedance Z
IH
IL
WU
SD
OUT
NOISE PERFORMANCE
Output Voltage Noise en
Signal-to-Noise Ratio SNR PO = 1.4 W, RL = 8 Ω 100 dB
1
Note that, although the SSM2356 has good audio quality above 2 W per channel, continuous output power beyond 2 W per channel must be avoided due to device
packaging limitations.
RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.42 W
= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.75 W
L
= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.8 W
L
= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.94 W
L
= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 2.0 W
L
= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.3 W
L
= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V
L
= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.7 W
L
2.5
1
92 %
(normal, low EMI mode)
= 1.4 W, 8 Ω, VDD = 5.0 V, EDGE = V
O
DD
90 %
(ultralow EMI mode)
= 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V 0.004 %
O
GSM VCM
= 2.5 V ± 100 mV at 217 Hz, output referred 55 dB
PO = 100 mW, f = 1 kHz 78 dB
Gain = 6 dB 2.0 mV
Guaranteed from PSRR test 2.5 5.5 V
VDD = 2.5 V to 5.0 V, dc input floating 70 85 dB
GSM VRIPPLE
= 100 mV at 217 Hz, inputs ac GND, CIN = 0.1 μF 60 dB
VIN = 0 V, no load, VDD = 5.0 V 5.75 mA
= 0 V, no load, VDD = 3.6 V 4.9 mA
IN
= 0 V, no load, VDD = 2.5 V 4.7 mA
IN
VIN = 0 V, load = 8 Ω+ 33 μH, VDD = 5.0 V
VIN = 0 V, load = 8 Ω+ 33 μH, VDD = 3.6 V
= 0 V, load = 8 Ω+ 33 μH, VDD = 2.5 V
V
IN
= SDNL= GND
SDNR
SDNR = SDNL = VDD; GAIN = GND or VDD
5.5 mA
5.1 mA
4.5 mA
20 nA
80 kΩ
1.35 V
0.35 V
SDNR/SDNL rising edge from GND to VDD
SDNR/SDNL falling edge from VDD to GND
/SDNL = GND
SDNR
= 3.6 V, f = 20 Hz to 20 kHz, inputs are ac grounded,
V
DD
7 ms
5 μs
>100 kΩ
29 μVrms
Gain = 6 dB, A-weighted
W
Rev. 0 | Page 3 of 16
SSM2356
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter Rating
Supply Voltage 6 V
Input Voltage V
Common-Mode Input Voltage V
ESD Susceptibility 4 kV
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature Range
(Soldering, 60 sec)
DD
DD
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA (junction to air) is specified for the worst-case conditions,
that is, a device soldered in a circuit board for surface-mount
packages. θ
according to JESD51-9 on a 4-layer printed circuit board (PCB)
with natural convection cooling.
Table 3. Thermal Resistance
Package Type θJA θJB Unit
16-ball, 1.66 mm × 1.66 mm WLCSP 66 19 °C/W
ESD CAUTION
and θJB (junction to board) are determined
JA
Rev. 0 | Page 4 of 16
SSM2356
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1
INDICATOR
A
B
C
D
Figure 2. Pin Configuration (Top Side View)
Table 4. Pin Function Descriptions
Bump Mnemonic Description
A1 OUTL+ Noninverting Output for Left Channel.
B1 OUTL− Inverting Output for Left Channel.
C1
SDNL
Shutdown, Left Channel. Active low digital input.
D1 INL+ Noninverting Input for Left Channel.
D2 INL− Inverting Input for Left Channel.
C4
SDNR
Shutdown, Right Channel. Active low digital input.
C3 GAIN Gain select between 6 dB and 18 dB.
D3 INR− Inverting Input for Right Channel.
D4 INR+ Noninverting Input for Right Channel.
B2 GND Ground.
B4 OUTR− Inverting Output for Right Channel.
A4 OUTR+
Noninverting Output for Right Channel.
B3 GND Ground.
A2 VDD Power Supply.
A3 VDD Power Supply.
C2 EDGE Edge Control (Low Emission Mode); active high digital input.
234
1
OUTL+
VDD
OUTL–
GND
SDNL
EDGE
INL+
INL–
TOP VIEW
(BALL SIDE DO WN)
Not to Scal e
VDD
GND
GAIN
INR–
OUTR+
OUTR–
SDNR
INR+
08084-002
Rev. 0 | Page 5 of 16