ANALOG DEVICES SSM2315 Service Manual
Filterless, High Efficiency,
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FEATURES
Filterless Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Class-D amplifiers
from Analog Devices, Inc.
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion (THD + N)
93% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
>103 dB signal-to-noise ratio (SNR)
Single-supply operation from 2.5 V to 5.5 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 9-ball, 1.5 mm × 1.5 mm WLCSP
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 6 dB or user adjustable gain setting
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2315 is a fully integrated, high efficiency, Class-D audio
amplifier. It is designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.5 V
supply. It is capable of delivering 3 W of continuous output power
with <1% THD + N driving a 3 Ω load from a 5.0 V supply.
FUNCTIONAL BLOCK DIAGRAM
Mono 3 W Class-D Audio Amplifier
SSM2315
The SSM2315 features a high efficiency, low noise modulation
scheme that requires no external LC output filters. The modulation
continues to provide high efficiency even at low output power.
It operates with 93% efficiency at 1.4 W into 8 Ω or 85% efficiency
at 3 W into 3 Ω from a 5.0 V supply and has an SNR of >103 dB.
Spread-spectrum pulse density modulation is used to provide
lower EMI-radiated emissions compared with other Class-D
architectures.
The SSM2315 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying
SD
pin.
/2.
DD
VBATT
2.5V TO 5.5V
10µF
a logic low to the
The device also includes pop-and-click suppression circuitry.
This suppression circuitry minimizes voltage glitches at the
output during turn-on and turn-off, reducing audible noise
on activation and deactivation.
The fully differential input of the SSM2315 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately V
The default gain of the SSM2315 is 6 dB, but users can reduce the
gain by using a pair of external resistors (see the Gain section).
The SSM2315 is specified over the industrial temperature range of
−40°C to +85°C. It has built-in thermal shutdown and output
short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm
wafer level chip scale package (WLCSP).
0.1µF
SSM2315
AUDIO IN+
AUDIO IN–
SHUTDOWN
*INPUT CAPS ARE OPTI ONAL IF I NPUT DC COMMO N-MODE
VOLTAGE IS APPROXIMATELY V
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
47nF*
47nF*
IN+
IN–
SD
80kΩ
80kΩ
/2.
DD
MODULATOR
BIAS
FET
DRIVER
GND
VDD
OUT+
OUT–
POP/CLICK
SUPPRESSION
6857-001
160kΩ
(Σ-Δ)
160kΩ
INTERNAL
OSCILLATOR
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
SSM2315
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TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Application Circuits ......................................................... 11
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
8/08—Rev. 0 to Rev. A
Changes to Efficiency and Total Harmonic
Distortion + Noise Parameters ....................................................... 3
Changes to Ordering Guide .......................................................... 14
2/08—Revision 0: Initial Version
Theory of Operation ...................................................................... 12
Overview ..................................................................................... 12
Gain .............................................................................................. 12
Pop-and-Click Suppression ...................................................... 12
Output Modulation Description .............................................. 12
Layout .......................................................................................... 13
Input Capacitor Selection .......................................................... 13
Proper Power Supply Decoupling ............................................ 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Rev. A | Page 2 of 16
SSM2315
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SPECIFICATIONS
VDD = 5.0 V, TA = 25oC, RL = 8 Ω + 33 μH, unless otherwise noted.
Table 1.
Parameter Symbol Conditions1 Min Typ Max Unit
DEVICE CHARACTERISTICS
Output Power P
O
R
R
R
R
R
R
R
R
R
R
R
Efficiency η PO = 1.4 W, RL = 8 Ω + 33 μH, VDD = 5.0 V 93 %
Total Harmonic Distortion + Noise THD + N PO = 1 W, RL = 8 Ω + 33 μH, f = 1 kHz, VDD = 5.0 V 0.004 %
P
Input Common-Mode Voltage Range VCM 1.0 VDD − 1.0 V
Common-Mode Rejection Ratio CMRR
Average Switching Frequency fSW 280 kHz
Differential Output Offset Voltage V
OOS
POWER SUPPLY
Supply Voltage Range V
DD
Power Supply Rejection Ratio PSRR VDD = 2.5 V to 5.0 V, dc input floating 70 85 dB
PSRR
Supply Current I
SY
V
V
Shutdown Current ISD
GAIN CONTROL
Closed-Loop Gain Gain 6 dB
Differential Input Impedance Z
IN
SHUTDOWN CONTROL
Input Voltage High V
Input Voltage Low V
Turn-On Time t
Turn-Off Time t
Output Impedance Z
WU
SD
IH
IL
OUT
NOISE PERFORMANCE
Output Voltage Noise en V
Signal-to-Noise Ratio SNR PO = 1.4 W, RL = 8 Ω 103 dB
1
Note that although the SSM2315 has good audio quality above 3 W, continuous output power beyond 3 W must be avoided due to device packaging limitations.
2
This value represents measured performance; packaging limitations must not be exceeded.
RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.48 W
= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.75 W
L
= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.84 W
L
= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.94 W
L
= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 2.72 W
L
= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.38 W
L
= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 3.402 W
L
= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.72 W
L
= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 3.43 W
L
= 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 1.72 W
GSM VCM
L
= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V
L
= 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 2.14 W
L
= 0.5 W, RL = 8 Ω + 33 μH, f = 1 kHz, VDD = 3.6 V 0.004 %
O
= 2.5 V ± 100 mV at 217 Hz, output referred 55 dB
4.28
2
Gain = 6 dB 2.0 mV
Guaranteed from PSRR test 2.5 5.5 V
GSM VRIPPLE
= 100 mV at 217 Hz, inputs ac GND, CIN = 0.1 μF 60 dB
VIN = 0 V, no load, VDD = 5.0 V 3.2 mA
= 0 V, no load, VDD = 3.6 V 2.8 mA
IN
= 0 V, no load, VDD = 2.5 V 2.4 mA
IN
V
= 0 V, load = 8 Ω+ 33 μH, VDD = 5.0 V
IN
V
= 0 V, load = 8 Ω+ 33 μH, VDD = 3.6 V
IN
V
= 0 V, load = 8 Ω+ 33 μH, VDD = 2.5 V
IN
SD
= GND
SD
= VDD
3.3 mA
2.9 mA
2.4 mA
20 nA
80 kΩ
ISY ≥ 1 mA 1.2 V
ISY ≤ 300 nA 0.5 V
SD
rising edge from GND to VDD
SD
falling edge from VDD to GND
SD
= GND
= 3.6 V, f = 20 Hz to 20 kHz, inputs are ac-grounded,
DD
7 ms
5 μs
>100 kΩ
21 μV rms
gain = 6 dB, A-weighted
W
Rev. A | Page 3 of 16
SSM2315
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ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter Rating
Supply Voltage 6 V
Input Voltage V
Common-Mode Input Voltage V
Continuous Output Power 3 W
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
DD
DD
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type PCB θJA θJB Unit
9-ball, 1.5 mm × 1.5 mm WLCSP 1S0P 162 39 °C/W
2S0P 76 21 °C/W
ESD CAUTION
Rev. A | Page 4 of 16
SSM2315
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1
CORNER
A
B
C
SSM2315
TOP VIEW
BALL SIDE DOW N
(Not to Scale)
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
2C
2A GND Ground.
1A IN+ Noninverting Input.
1C IN− Inverting Input.
3C OUT+ Noninverting Output.
1B VDD Power Supply.
3B GND Ground.
3A OUT− Inverting Output.
2B PVDD Power Supply.
SD
Shutdown Input. Active low digital input.
321
06857-002
Rev. A | Page 5 of 16
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