Rail-to-rail output swing
Single-supply operation: 3 V to 36 V
Low offset voltage: 300 μV
Gain bandwidth product: 75 kHz
High open-loop gain: 1000 V/mV
Unity-gain stable
Low supply current/per amplifier: 150 μA maximum
APPLICATIONS
Battery-operated instrumentation
Servo amplifiers
Actuator drives
Sensor conditioners
Power supply control
GENERAL DESCRIPTION
Rail-to-rail output swing combined with dc accuracy are the
key features of the OP495 quad and OP295 dual CBCMOS
operational amplifiers. By using a bipolar front end, lower noise
and higher accuracy than those of CMOS designs have been
achieved. Both input and output ranges include the negative
supply, providing the user with zero-in/zero-out capability. For
users of 3.3 V systems such as lithium batteries, the OP295/OP495
are specified for 3 V operation.
Maximum offset voltage is specified at 300 µV for 5 V operation,
and the open-loop gain is a minimum of 1000 V/mV. This yields
performance that can be used to implement high accuracy systems,
even in single-supply designs.
The ability to swing rail-to-rail and supply 15 mA to the load
makes the OP295/OP495 ideal drivers for power transistors and
H bridges. This allows designs to achieve higher efficiencies and
to transfer more power to the load than previously possible
without the use of discrete components.
For applications such as transformers that require driving
inductive loads, increases in efficiency are also possible.
Stability while driving capacitive loads is another benefit of this
design over CMOS rail-to-rail amplifiers. This is useful for
driving coax cable or large FET transistors. The OP295/OP495
are stable with loads in excess of 300 pF.
Operational Amplifiers
OP295/OP495
PIN CONFIGURATIONS
OUT A 1
–IN A 2
+IN A
V–
OP295
TOP VIEW
3
(Not to Scale)
4
Figure 1. 8-Lead Narrow-Body SOIC_N
S Suffix (R-8)
1
OUT A
–IN A
+IN A
V–
OP295
2
3
4
Figure 2. 8-Lead PDIP
P Suffix (N-8)
1
OUT A
2
–IN A
+IN A
3
V+
4
OP495
+IN B
5
6
–IN B
7
OUT B
Figure 3. 14-Lead PDIP
P Suffix (N-14)
1
OUT A
–IN A
2
+IN A
3
OP495
4
V+
TOP VIEW
+IN B
–IN B
OUT B
(Not to Scale)
5
6
7
NC
8
NC = NO CONNECT
Figure 4. 16-Lead SOIC_W
S Suffix (RW-16)
The OP295 and OP495 are specified over the extended industrial (−40°C to +125°C) temperature range. The OP295 is
available in 8-lead PDIP and 8-lead SOIC_N surface-mount
packages. The OP495 is available in 14-lead PDIP and 16-lead
SOIC_W surface-mount packages.
16
15
14
13
12
11
10
6
5
14
13
12
11
10
9
8
7
6
5
9
8
V+8
OUT B7
–IN B
+IN B
V+
OUT B
–IN B
+IN B
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
NC
00331-001
0331-002
00331-003
00331-004
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 30 300 µV
−40°C ≤ TA ≤ +125°C 800 µV
Input Bias Current IB 8 20 nA
−40°C ≤ TA ≤ +125°C 30 nA
Input Offset Current IOS ±1 ±3 nA
−40°C ≤ TA ≤ +125°C ±5 nA
Input Voltage Range VCM 0 4.0 V
Common-Mode Rejection Ratio CMRR 0 V ≤ VCM ≤ 4.0 V, −40°C ≤ TA ≤ +125°C 90 110 dB
Large Signal Voltage Gain AVO R
R
Offset Voltage Drift ∆VOS/∆T 1 5 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High VOH R
R
I
Output Voltage Swing Low VOL R
R
I
Output Current I
±11 ±18 mA
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR ±1.5 V ≤ VS ≤ ±15 V 90 110 dB
±1.5 V ≤ VS ≤ ±15 V, –40°C ≤ TA ≤ +125°C 85 dB
Supply Current per Amplifier ISY V
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ 0.03 V/µs
Gain Bandwidth Product GBP 75 kHz
Phase Margin θO 86 Degrees
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1.5 µV p-p
Voltage Noise Density en f = 1 kHz 51 nV/√Hz
Current Noise Density in f = 1 kHz <0.1 pA/√Hz
Offset Voltage VOS 100 500 µV
Input Bias Current IB 8 20 nA
Input Offset Current IOS ±1 ±3 nA
Input Voltage Range VCM 0 2.0 V
Common-Mode Rejection Ration CMRR 0 V ≤ VCM ≤ 2.0 V, −40°C ≤ TA ≤ +125°C 90 110 dB
Large Signal Voltage Gain AVO R
= 10 kΩ 750 V/mV
L
Offset Voltage Drift VOS/T 1 µV/°C
Rev. G | Page 3 of 16
OP295/OP495
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT CHARACTERISTICS
Output Voltage Swing High VOH R
Output Voltage Swing Low VOL R
POWER SUPPLY
Power Supply Rejection Ratio PSRR ±1.5 V ≤ VS ≤ ±15 V 90 110 dB
±1.5 V ≤ VS ≤ ±15 V, −40°C ≤ TA ≤ +125°C 85 dB
Supply Current per Amplifier ISY V
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ 0.03 V/µs
Gain Bandwidth Product GBP 75 kHz
Phase Margin θO 85 Degrees
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1.6 µV p-p
Voltage Noise Density en f = 1 kHz 53 nV/√Hz
Current Noise Density in f = 1 kHz <0.1 pA/√Hz
V
= ±15.0 V, TA = 25°C, unless otherwise noted.
S
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 300 500 µV
−40°C ≤ TA ≤ +125°C 800 µV
Input Bias Current IB V
V
Input Offset Current IOS V
V
Input Voltage Range VCM −15 +13.5 V
Common-Mode Rejection Ratio CMRR −15.0 V ≤ VCM ≤ +13.5 V, −40°C ≤ TA ≤ +125°C 90 110 dB
Large Signal Voltage Gain AVO R
Offset Voltage Drift ∆VOS/∆T 1 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High VOH R
R
Output Voltage Swing Low VOL R
R
Output Current I
±15 ±25 mA
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±1.5 V to ±15 V 90 110 dB
V
Supply Current per Amplifier ISY V
Supply Voltage Range VS 3 (± 1.5) 36 (± 18) V
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ 0.03 V/µs
Gain Bandwidth Product GBP 85 kHz
Phase Margin θO 83 Degrees
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1.25 µV p-p
Voltage Noise Density en f = 1 kHz 45 nV/√Hz
Current Noise Density in f = 1 kHz <0.1 pA/√Hz
= 10 kΩ to GND 2.9 V
L
= 10 kΩ to GND 0.7 2 mV
L
= 1.5 V, RL = ∞, −40°C ≤ TA ≤ +125°C 150 µA
OUT
= 0 V 7 20 nA
CM
= 0 V, −40°C ≤ TA ≤ +125°C 30 nA
CM
= 0 V ±1 ±3 nA
CM
= 0 V, −40°C ≤ TA ≤ +125°C ±5 nA
CM
= 10 kΩ 1000 4000 V/mV
L
= 100 kΩ to GND 14.95 V
L
= 10 kΩ to GND 14.80 V
L
= 100 kΩ to GND −14.95 V
L
= 10 kΩ to GND −14.85 V
L
= ±1.5 V to ±15 V, −40°C ≤ TA ≤ +125°C 85 dB
S
= 0 V, RL = ∞, VS = ±18 V, −40°C ≤ TA ≤ +125°C 175 µA
O
Rev. G | Page 4 of 16
OP295/OP495
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter1 Rating
Supply Voltage ±18 V
Input Voltage ±18 V
Differential Input Voltage2 36 V
Output Short-Circuit Duration Indefinite
Storage Temperature Range
P, S Packages −65°C to +150°C
Operating Temperature Range
OP295G, OP495G –40°C to +125°C
Junction Temperature Range
P, S Packages –65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
1
Absolute maximum ratings apply to packaged parts, unless otherwise noted.
2
For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for worst case mounting conditions; that is, θJA
is specified for device in socket for PDIP; θ
is specified for
JA
device soldered to printed circuit board for SOIC package.