Analog Devices DAC8143 Datasheet

12-Bit Serial Daisy-Chain

a

FEATURES
Fast, Flexible, Microprocessor Interfacing in Serially

Controlled Systems

Buffered Digital Output Pin for Daisy-Chaining

Multiple DACs

Minimizes Address-Decoding in Multiple DAC

Systems—Three-Wire Interface for Any Number of DACs

One Data Line
One CLK Line

One Load Line
Improved Resistance to ESD
–40ⴗC to +85ⴗC for the Extended Industrial Temperature

Range

APPLICATIONS
Multiple-Channel Data Acquisition Systems
Process Control and Industrial Automation
Test Equipment
Remote Microprocessor-Controlled Systems

GENERAL INFORMATION

The DAC8143 is a 12-bit serial-input daisy-chain CMOS D/A
converter that features serial data input and buffered serial data
output. It was designed for multiple serial DAC systems, where
serially daisy-chaining one DAC after another is greatly simplified.

The DAC8143 also minimizes address decoding lines enabling
simpler logic interfacing. It allows three-wire interface for any
number of DACs: one data line, one CLK line and one load line.

Serial data in the input register (MSB first) is sequentially
clocked out to the SRO pin as the new data word (MSB first) is
simultaneously clocked in from the SRI pin. The strobe inputs
are used to clock in/out data on the rising or falling (user
selected) strobe edges (STB

When the shift register’s data has been updated, the new data
word is transferred to the DAC register with use of LD1 and
LD2 inputs.

Separate LOAD control inputs allow simultaneous output up­dating of multiple DACs. An asynchronous CLEAR input
resets the DAC register without altering data in the input
register.

Improved linearity and gain error performance permits reduced
circuit parts count through the elimination of trimming compo­nents. Fast interface timing reduces timing design considerations
while minimizing microprocessor wait states.

The DAC8143 is available in plastic packages that are compat­ible with autoinsertion equipment.

Plastic packaged devices come in the extended industrial tem-

perature range of –40°C to +85°C.

, STB2, STB3, STB4).

1

CMOS D/A Converter

DAC8143

FUNCTIONAL BLOCK DIAGRAM

V

DD

R

DAC8143

V

CLR

STB
STB
STB
STB

REF

LD

LD

SRI

1

2

1
4
3

2

DGND

ADDRESS BUS

WR

DB

X

mP

12-BIT

D/A CONVERTER

DAC REGISTER

LOAD

CLK

INPUT 12-BIT

SHIFT REGISTER

IN OUT

ADDRESS
DECODER

SRI
SRO

SRI
SRO

SRI
SRO

SRI
SRO

STROBE

DAC8143

LOAD

STROBE

DAC8143

LOAD

STROBE

DAC8143

LOAD

STROBE

DAC8143

LOAD

Figure 1. Multiple DAC8143s with Three-Wire Interface

FB

I

OUT1

I

OUT2

AGND

SRO

REV. C

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1999

DAC8143–SPECIFICATIONS

(@ VDD = +5 V; V

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Units

STATIC ACCURACY

Resolution N 12 Bits

Nonlinearity INL ±1 LSB

Differential Nonlinearity
Gain Error

2

Gain Tempco (∆Gain/∆Temp)

Power Supply Rejection Ratio

(∆Gain/∆V

) PSRR ∆VDD = ±5% ±0.0006 ±0.002 %/%

DD

Output Leakage Current

Zero Scale Error

Input Resistance

AC PERFORMANCE

Output Current Settling Time
AC Feedthrough Error

to I

(V

REF

OUT1

Digital-to-Analog Glitch Energy

Total Harmonic Distortion

Output Noise Voltage Density

DIGITAL INPUTS/OUTPUT

Digital Input HIGH V
Digital Input LOW V
Input Leakage Current
Input Capacitance C
Digital Output High V

Digital Output Low V

ANALOG OUTPUTS

Output Capacitance

Output Capacitance

TIMING CHARACTERISTICS

Serial Input to Strobe Setup Times t

(t

= 80 ns) t

STB

Serial Input to Strobe Hold Times

= 80 ns) t

(t

STB

5, 6

7

)

3, 9

1

4

3, 8

3, 10

3

3, 11

12

3

3

DNL ±1 LSB

G
TC

I

LKG

I

ZSE

R

t

S

FSE

GFS

IN

3

FT V
QV
THD V

e

n

IH

IL

I

IN

IN

OH

OL

C

OUT1

C

OUT2

C

OUT1

C

OUT2

3

DS1

DS2

t

DS3

t

DS4

t

DH1

t

DH2

DH3

t

DH4

Range specified under Absolute Maximum Ratings, unless otherwise noted.)

T

= +25°C ±5nA

A

T

= Full Temperature Range ±25 nA

A

T

= +25°C ±0.002 ±0.03 LSB

A

T

= Full Temperature Range ±0.01 ±0.15 LSB

A

V

Pin 7 11 15 kΩ

REF

= 20 V p-p @ f = 10 kHz, T

REF

= 0 V, I

REF

= 6 V rms @ 1 kHz

REF

DAC Register Loaded with All 1s –92 dB
10 Hz to 100 kHz Between RFB and I

V

= 0 V to +5 V ±1 µA

IN

VIN = 0 V 8 pF
I

= –200 µA4V

OH

IOL = 1.6 mA 0.4 V

Digital Inputs = All 1s 90 pF
Digital Inputs = All 0s 90 pF
Digital Inputs = All 0s 60 pF
Digital Inputs = All 1s 60 pF

STB1 Used as the Strobe 50 ns
STB2 Used as the Strobe 20 ns
STB3 Used as the Strobe T

STB4 Used as the Strobe 20 ns
STB1 Used as the Strobe T

STB2 Used as the Strobe T

STB3 Used as the Strobe 80 ns
STB4 Used as the Strobe 80 ns

= +10 V; V

REF

Load = 100 Ω, C

OUT

= V

= V

= V

OUT1

OUT2

AGND

= 0 V; TA = Full Temperature

DGND

±2 LSB
±5 ppm/°C

0.380 1 µs

= +25°C 2.0 mV p-p

A

= 13 pF 20 nVs

EXT

OUT

13 nV/√Hz

2.4 V

0.8 V

= +25°C10 ns

A

T

= Full Temperature Range 20 ns

A

= +25°C40 ns

A

= Full Temperature Range 50 ns

T

A

= +25°C50 ns

A

= Full Temperature Range 60 ns

T

A

–2–

REV. C

DAC8143

ELECTRICAL CHARACTERISTICS

(@ VDD = +5 V; V

= +10 V; V

REF

OUT1

= V

0UT2

= V

AGND

= V

DGND

= 0 V; TA = Full

Temperature Range specified under Absolute Maximum Ratings, unless otherwise noted.)

DAC8143

Parameter Symbol Conditions Min Typ Max Units

STB to SRO Propagation Delay

SRI Data Pulsewidth t

Pulsewidth (STB1 = 80 ns)

STB

1

STB

Pulsewidth (STB2 = 100 ns)

2

Pulsewidth (STB3 = 80 ns)

STB

3

STB

Pulsewidth (STB4 = 80 ns)

4

Load Pulsewidth t

LSB Strobe into Input Register

to Load DAC Register Time t

CLR Pulsewidth t

POWER SUPPLY

Supply Voltage V

Supply Current I

Power Dissipation P

NOTES

11

All grades are monotonic to 12 bits over temperature.

12

Using internal feedback resistor.

13

Guaranteed by design and not tested.

14

Applies to I

15

V

= +10 V, all digital inputs = 0 V.

REF

16

Calculated from worst case R

17

Absolute temperature coefficient is less than +300 ppm/°C.

18

I

, Load = 100 Ω. C

OUT

time constant of the final RC decay.

19

All digital inputs = 0 V.

10

V

= 0 V, all digital inputs = 0 V to VDD or VDD to 0 V.

REF

11

Calculations from e

K = Boltzmann constant, J/KR = resistance Ω
T = resistor temperature, K B = bandwidth, Hz

12

Digital inputs are CMOS gates; I

13

Measured from active strobe edge (STB) to new data output at SRO; CL = 50 pF.

14

Minimum low time pulsewidth for STB1, STB2, and STB4, and minimum high time pulsewidth for STB3.

Specifications subject to change without notice.

; all digital inputs = VIL, V

OUT1

EXT

= √4K TRB where:

n

13

14

14

14

14

t

PD

SRI

t

STB1

t

STB2

t

STB3

t

STB4

LD1

ASB

CLR

DD

DD

D

T

= +25°C 220 ns

A

= Full Temperature Range 300 ns

T

A

100 ns
80 ns
80 ns
80 ns
80 ns

, t

LD2

T

= +25°C 140 ns

A

T

= Full Temperature Range 180 ns

A

0ns
80 ns

4.75 5 5.25 V
All Digital Inputs = VIH or V
All Digital Inputs = 0 V or V
Digital Inputs = 0 V or V

IL

DD

DD

5 V × 0.1 mA

Digital Inputs = V

IH

or V

IL

5 V × 2 mA

= +10 V; specification also applies for I

REF

: I

REF

ZSE

(in LSBs) = (R

REF

× I

× 4096) /V

LKG

REF

.

= 13 pF, digital input = 0 V to VDD or VDD to 0 V. Extrapolated to 1/2 LSB: tS = propagation delay (t

typically 1 nA at +25°C.

IN

when all digital inputs = VIH.

OUT2

2mA

0.1 mA

0.5 mW

10 mW

) +9 τ, where τ equals measured

PD

REV. C

–3–

DAC8143

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(T

= +25°C, unless otherwise noted.)

A

VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V

to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V

V

REF

V

to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V

RFB

AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . V

DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . V

Digital Input Voltage Range . . . . . . . . . . . . . . . –0.3 V to V

Output Voltage (Pin 1, Pin 2) . . . . . . . . . . . . . . –0.3 V to V

+ 0.3 V

DD

+ 0.3 V

DD

DD

DD

Operating Temperature Range

FP/FS Versions . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . .+150°C

Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . .+300°C

Package Type ␪JA* ␪

JC

Units

16-Lead Plastic DIP 76 33 °C/W
16-Lead SOIC 92 27 °C/W

*θJA is specified for worst case mounting conditions, i.e., θ

device in socket for P-DIP package; θ
printed circuit board for SOIC package.

is specified for device soldered to

JA

is specified for

JA

CAUTION

1. Do not apply voltage higher than VDD or less than DGND po-

tential on any terminal except V

(Pin 15) and RFB (Pin 16).

REF

2. The digital control inputs are Zener-protected; however,

permanent damage may occur on unprotected units from
high energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.

3. Use proper antistatic handling procedures.

4. Absolute Maximum Ratings apply to packaged devices.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device.

PIN CONNECTIONS

16-Lead Epoxy Plastic DIP

16-Lead SOIC

I

OUT1

I

OUT2

AGND

STB

LD

SRO

SRI

STB

1

2

3

4

1

5

1

(Not to Scale)

6

7

8

2

DAC8143

TOP VIEW

16

R

FB

15

V

REF

14

V

DD

13

CLR

DGND

12

11

STB

4

10

STB

3

9

LD

2

ORDERING GUIDE

Gain Temperature Package Package

Model Nonlinearity Error Range Descriptions Options

DAC8143FP ±1 LSB ±2 LSB –40°C to +85°C 16-Lead Plastic DIP N-16
DAC8143FS ±1 LSB ±2 LSB –40°C to +85°C 16-Lead SOIC R-16W

Die Size: 99 × 107 mil, 10,543 sq. mils.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8143 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

–4–

REV. C