ANALOG DEVICES AD7298 Service Manual

8-Channel, 1 MSPS, 12-Bit SAR ADC

V

V

FEATURES

12-bit SAR ADC

8 single-ended inputs
Channel sequencer functionality
Fast throughput of 1 MSPS

Analog input range: 0 V to 2.5 V
12-bit temperature-to-digital converter
Temperature sensor accuracy of ±1°C
Temperature range: −40°C to +125°C
Specified for V
Logic voltage V
Power-down current: <10 μA
Internal 2.5 V reference
Internal power-on reset
High speed serial interface SPI
20-lead LFCSP

GENERAL DESCRIPTION

The AD7298 is a 12-bit, high speed, low power, 8-channel,
successive approximation ADC with an internal temperature
sensor. The part operates from a single 3.3 V power supply and
features throughput rates up to 1 MSPS. The device contains a
low noise, wide bandwidth track-and-hold amplifier that can
handle input frequencies in excess of 30 MHz.

The AD7298 offers a programmable sequencer, which enables
the selection of a preprogrammable sequence of channels for
conversion. The device has an on-chip, 2.5 V reference that can
be disabled to allow the use of an external reference.

The AD7298 includes a high accuracy band gap temperature
sensor, which is monitored and digitized by the 12-bit ADC to
give a resolution of 0.25°C. The device offers a 4-wire serial
interface compatible with SPI and DSP interface standards.

The AD7298 uses advanced design techniques to achieve very
low power dissipation at high throughput rates. The part also
offers flexible power/throughput rate management options.
The part is offered in a 20-lead LFCSP package.

: 2.8 V to 3.6 V

DD

: 1.65 V to 3.6 V

DRIVE

with Temperature Sensor

AD7298

FUNCTIONAL BLOCK DIAGRAM

DD

REF

BUFREF

V

IN0

V

INPUT

IN7

MUX

PD/RST

T/H

AD7298

TEMP

SENSOR

APPROXIMATION

Figure 1.

SUCCESSIVE

SEQUENCER

CONTROL

PRODUCT HIGHLIGHTS

1. Ideally Suited to Monitoring System Variables in a Variety

of Systems. This includes telecommunications, and process
and industrial control.

2. High Throughput Rate of 1 MSPS with Low Power

Consumption.

3. Eight Single-Ended Inputs with a Channel Sequencer.

A consecutive sequence of channels can be selected on
which the ADC cycles and converts.

4. Integrated Temperature Sensor with 0.25°C Resolution.

12-BIT

ADC

LOGIC

T

SENSE

GND

_BUSY

SCLK
DOUT
DIN

CS

V

DRIVE

08754-001

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: [phone] www.analog.com
Fax: [phone] ©2010–2011 Analog Devices, Inc. All rights reserved.

AD7298

TABLE OF CONTENTS

Features.............................................................................................. 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Specifications .................................................................. 5

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Thermal Resistance ...................................................................... 6

Pin Configuration and Function Description .............................. 7

Typical Performance Characteristics ............................................. 9

Terminology .................................................................................... 12

Circuit Information........................................................................ 13

Converter Operation.................................................................. 13

Analog Input............................................................................... 13

Temperature Sensor Operation ................................................14

Temperature Sensor Averaging ................................................ 14

V

............................................................................................ 15

DRIVE

The Internal or External Reference.......................................... 15

Control Register.............................................................................. 16

Modes of Operation ....................................................................... 17

Traditional Multichannel Mode of Operation........................ 17

Repeat Operation ....................................................................... 18

Power-Down Modes .................................................................. 19

Powering Up the AD7298 ......................................................... 20

Reset ............................................................................................. 20

Serial Interface ................................................................................ 21

Temperature Sensor Read ......................................................... 22

Layout and Configuration............................................................. 23

Power Supply Bypassing and Grounding................................ 23

Temperature Monitoring........................................................... 23

Outline Dimensions....................................................................... 24

Ordering Guide .......................................................................... 24

REVISION HISTORY

6/11—Rev. A to Rev. B

Changes to Internal Temperature Sensor, Accuracy Parameter

in Table 1............................................................................................ 3

1/11—Rev. 0 to Rev. A

Removed Input Impedance Parameter.......................................... 3

Added Input Capacitance Parameter of 8 pF................................ 3

Changes to Figure 11...................................................................... 10

Changed C1 Value to 8 pF in Analog Input Section.................. 13

Changes to Figure 23...................................................................... 14

Changes to Ordering Guide.......................................................... 24

9/10—Revision 0: Initial Version

Rev. B | Page 2 of 24

AD7298

SPECIFICATIONS

VDD = 2.8 V to 3.6 V; V
otherwise noted.

Table 1.

Parameter Min Typ Max Unit Test Conditions/Comments

DYNAMIC PERFORMANCE fIN = 50 kHz sine wave

Signal-to-Noise Ratio (SNR)

Signal-to-Noise (and Distortion) Ratio (SINAD)1 70 71 dB

Total Harmonic Distortion (THD)

Spurious-Free Dynamic Range (SFDR)

Intermodulation Distortion (IMD)

Second-Order Terms −84 dB
Third-Order Terms −93 dB

Channel-to-Channel Isolation −100 dB fIN = 50 kHz, f

SAMPLE AND HOLD

Aperture Delay3 12 ns

Aperture Jitter3 40 ps

Full Power Bandwidth 30 MHz @ 3 dB

10 MHz @ 0.1 dB
DC ACCURACY

Resolution 12 Bits

Integral Nonlinearity (INL)1 ±0.5 ±1 LSB

Differential Nonlinearity (DNL)1 ±0.5 ±0.99 LSB Guaranteed no missed codes to 12 bits

Offset Error1 ±2 ±4.5 LSB

Offset Error Matching1 ±2.5 ±4.5 LSB

Offset Temperature Drift 4 ppm/°C

Gain Error1 ±1 ±4 LSB

Gain Error Matching1 ±1 ±2.5 LSB

Gain Temperature Drift 0.5 ppm/°C

ANALOG INPUT

Input Voltage Ranges 0 V

DC Leakage Current ±0.01 ±1 µA

Input Capacitance 32 pF When in track

8 pF When in hold mode

REFERENCE INPUT/OUTPUT

Reference Output Voltage4 2.4925 2.5 2.5075 V ±0.3% maximum @ 25°C

Long-Term Stability 150 ppm For 1000 hours

Output Voltage Hysteresis 50 ppm

Reference Input Voltage Range5 1 2.5 V

DC Leakage Current ±0.01 ±1 µA External reference applied to Pin V

V

Output Impedance 1 Ω

REF

V

Temperature Coefficient 12 35 ppm/°C

REF

V

Noise 60 µV rms Bandwidth = 10 MHz

REF

= 1.65 V to 3.6 V; f

DRIVE

1, 2

70 72 dB

1

SAMPLE

= 1 MSPS, f

= 20 MHz, V

SCLK

= 2.5 V internal; TA = −40°C to +125°C, unless

REF

−82 −77 dB

−84 −77.5 dB
f

REF

V

= 40.1 kHz, fB = 41.5 kHz

A

NOISE

= 60 kHz

REF

Rev. B | Page 3 of 24

AD7298

Parameter Min Typ Max Unit Test Conditions/Comments

LOGIC INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C

INH

INL

IN

3

3 pF

IN

LOGIC OUTPUTS

Output High Voltage, V

OH

V
Output Low Voltage, V

OL

Floating State Leakage Current ±0.01 ±1 µA
Floating State Output Capacitance3 8 pF

INTERNAL TEMPERATURE SENSOR

Operating Range −40 +125
Accuracy ±1 ±2 °C TA = −40°C to +85°C
±1 ±3 °C TA = +85°C to +125°C
Resolution 0.25 °C LSB size

CONVERSION RATE

Conversion Time 1 t2 + 16 × t
100 s T
Track-and-Hold Acquisition Time3 100 ns Full-scale step input
Throughput Rate 1 MSPS

10 KSPS For the T

POWER REQUIREMENTS Digital inputs = 0 V or V

V

DD

V

DRIVE

6

I

V

TOTAL

Normal Mode (Operational) 5.8 6.3 mA
Normal Mode (Static) 4.1 4.6 mA
Partial Power-Down Mode 2.7 3.3 mA
Full Power-Down Mode 1 1.6 A TA = −40°C to +25°C
10 A TA = −40°C to +125°C

Power Dissipation

7

Normal Mode (Operational) 17.4 18.9 mW VDD = 3 V, V

22.7 mW
Normal Mode (Static) 14.8 16.6 mW
Partial Power-Down Mode 9.8 11.9 mW
Full Power-Down Mode 3.6 5.8 W TA = −40°C to +25°C
36 W TA = −40°C to +125°C

1

See the Terminology section.

2

All specifications expressed in decibels are referred to full-scale input, FSR, and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.

3

Sample tested during initial release to ensure compliance.

4

Refers to Pin V

5

A correction factor may be required on the temperature sensor results when using an external V

6

I

is the total current flowing in VDD and V

TOTAL

7

Power dissipation is specified with VDD = V

specified for 25

REF

o

C.

.

DRIVE

= 3.6 V, unless otherwise noted.

DRIVE

0.7 × V
+0.3 × V

V

DRIVE

V

DRIVE

±0.01 ±1 µA VIN = 0 V or V

V

− 0.3 V V

DRIVE

− 0.2 V V

DRIVE

DRIVE

DRIVE

< 1.8
≥ 1.8

0.4 V

s For V

SCLK

to V

IN0

temperature sensor channel

SENSE

= 20 MHz, for analog voltage

f

SCLK

conversions, one cycle latency

SENSE

2.8 3 3.6 V

1.65 3 3.6 V
= 3.6 V, V

DD

DRIVE

(see the Temperature Sensor Averaging section).

REF

DRIVE

, with one cycle latency

IN7

channel, one cycle latency

DRIVE

= 3.6 V

DRIVE

= 3 V

Rev. B | Page 4 of 24

AD7298

TIMING SPECIFICATIONS

VDD = 2.8 V to 3.6 V; V
initial release to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of V
of 1.6 V.

Table 2.

Parameter Limit at T

t

CONVER T

820 ns typ Each ADC channel V
100 µs max Temperature sensor channel

1

f

SCLK

20 MHz max Frequency of external serial clock
t

QUIET

t2 10 ns min

1

t

3

1

t

4

35 ns max V
28 ns max V
t5 0.4 × t
t6 0.4 × t

1

t

14 ns min SCLK to DOUT valid hold time

7

1

t

8

t9 5 ns min DIN setup time prior to SCLK falling edge
t10 4 ns min DIN hold time after SCLK falling edge
t11 100 ns min

1

t

12

t

POWER-UP_PARTIAL

t

POWER-UP

1

Measured with a load capacitance on DOUT of 15 pF.

DRIVE

t2 + (16 × t

50 kHz min Frequency of external serial clock

6 ns min

15 ns max Delay from CS (falling edge) until DOUT three-state disabled
Data access time after SCLK falling edge

SCLK

SCLK

16/34 ns min/max SCLK falling edge to DOUT high impedance

30 ns max
1 s max Power-up time from partial power-down
6 ms max Internal reference power-up time from full power-down

= 1.65 V to 3.6 V; V

, T

MIN

MAX

) µs max Conversion time

SCLK

Unit Test Conditions/Comments

= 2.5 V internal; TA = −40°C to + 125°C, unless otherwise noted. Sample tested during

REF

IN0

Minimum quiet time required between the end of serial read and the start
of the next voltage conversion in repeat and nonrepeat mode.

to SCLK setup time

CS

= 1.65 V to 3 V

DRIVE

= 3 V to 3.6 V

DRIVE

ns min SCLK low pulse width
ns min SCLK high pulse width

BUSY falling edge to CS falling edge

T

SENSE_

Delay from CS

rising edge to DOUT high impedance

to V

IN7

, f

SCLK

= 20 MHz

) and timed from a voltage level

DRIVE

Rev. B | Page 5 of 24

AD7298

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

VDD to GND, GND1
V

to GND, GND1

DRIVE

Analog Input Voltage to GND1
Digital Input Voltage to GND
Digital Output Voltage to GND
V

to GND1 −0.3 V to +3 V

REF

−0.3 V to +5 V

−0.3 V to + 5 V

−0.3 V to 3 V

−0.3 V to V

−0.3 V to V

DRIVE

DRIVE

+ 0.3 V

+ 0.3 V

GND1 to GND −0.3 V to +0.3 V
Input Current to Any Pin Except Supplies ±10 mA
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
Pb-Free Temperature, Soldering

Reflow 260(+0)°C

ESD 3.5 kV

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

THERMAL RESISTANCE

Table 4. Thermal Resistance

Package Type θJA θ

20-Lead LFCSP 52 6.5 °C/W

Unit

JC

Rev. B | Page 6 of 24

AD7298

T

PIN CONFIGURATION AND FUNCTION DESCRIPTION

IN1

IN2

IN0

V

V

19

20

1

V

IN3

2

V

IN4

3

V

IN5

4

V

IN6

5

V

IN7

NOTES

1. THE EXPOSED METAL PADDLE ON THE BOTTOM
OF THE LFCSP PACKAGE SHOULD BE SOLDERED
TO PCB GRO UND FOR PROPER F UNCTIONALI TY
AND HEAT DISSIP ATION.

AD7298

TOP VIEW

(Not to Scale)

6

7

REF

V

GND1

Figure 2. Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description

1 to 5,
18 to 20

6 GND1

V

, V

,

IN3

IN4

V

, V

IN5

IN6

, V

V

IN7

IN0

V

, V

IN1

IN2

Analog Inputs. The AD7298 has eight single-ended analog inputs that are multiplexed into the on-chip track­and-hold. Each input channel can accept analog inputs from 0 V to 2.5 V. Any unused input channels should be

,
,

connected to GND1 to avoid noise pickup.

Ground. Ground reference point for the internal reference circuitry on the AD7298. The external reference signals
and all analog input signals should be referred to this GND1 voltage. The GND1 pin should be connected to the
GND plane of a system. All ground pins should ideally be at the same potential and must not be more than 0.3 V
apart, even on a transient basis. The V
capacitor.

7 V

REF

Internal Reference/External Reference Supply. The nominal internal reference voltage of 2.5 V appears at this pin.
Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the
rest of a system. Decoupling capacitors should be connected to this pin to decouple the reference buffer. For
best performance, it is recommended to use a 10 F decoupling capacitor on this pin to GND1. The internal
reference can be disabled and an external reference supplied to this pin, if required. The input voltage range for
the external reference is 2.0 V to 2.5 V.

8 D

CAP

Decoupling Capacitor Pin. Decoupling capacitors (1 F recommended) are connected to this pin to decouple the
internal LDO.

9 GND

Ground. Ground reference point for all analog and digital circuitry on the AD7298. The GND pin should be
connected to the ground plane of the system. All ground pins should ideally be at the same potential and must
not be more than 0.3 V apart, even on a transient basis. Both D
GND pin.

10 V

DD

Supply Voltage, 2.8 V to 3.6 V. This supply should be decoupled to GND with 10 µF and 100 nF decoupling
capacitors.

11

Chip Select, Active Low Logic Input. This pin is edge triggered on the falling edge of this input, the track-and-

CS

hold goes into hold mode, and a conversion is initiated. This input also frames the serial data transfer. When CS
low, the output bus is enabled, and the conversion result becomes available on the DOUT output.

12 T

SENSE

_BUSY

Busy Output. This pin transitions high when a temperature sensor conversion starts and remains high until the
conversion completes.

13 DIN

Data In, Logic input. Data to be written to the AD7298 control register is provided on this input and is clocked
into the register on the falling edge of SCLK.

14 DOUT

Serial Data Output. The conversion result from the AD7298 is provided on this output as a serial data stream. The
bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7298 consists of four
address bits indicating which channel the conversion result corresponds to, followed by the 12 bits of conversion
data (MSB first). The output coding is straight binary for the voltage channels and twos complement for the
temperature sensor result.

15 SCLK Serial Clock, Logic Input. A serial clock input provides the SCLK for accessing the data from the AD7298.

DRIVE

V

PD/RS

V

16

18

17

15

SCLK

14

DOUT

13

DIN

T

_BUSY

12

SENSE

11

CS

9

8

10

DD

CAP

V

GND

D

08754-003

pin should be decoupled to this ground pin via a 10 F decoupling

REF

and VDD pins should be decoupled to this

CAP

is

Rev. B | Page 7 of 24

AD7298

Pin No. Mnemonic Description

16 V

17

DRIVE

/RST Power-Down Pin. This pin places the part into full power-down mode and enables power conservation when operation

PD

EPAD EPAD

Logic Power Supply Input. The voltage supplied at this pin determines at the voltage at which the interface
operates. This pin should be decoupled to GND. The voltage range on this pin is 1.65 V to 3.6 V and may be less
than the voltage at V

is not required. This pin can be used to reset the device by toggling the pin low for a minimum of 1 ns and a maximum
of 100 ns. If the maximum time is exceeded, the part enters power-down mode. When placing the AD7298 in full
power-down mode, the analog inputs must return to 0 V.

The exposed metal paddle on the bottom of the LFCSP package should be soldered to PCB ground for proper
functionality and heat dissipation.

, but should never exceed it by more than 0.3 V.

DD

Rev. B | Page 8 of 24