ANALOG DEVICES AD2S44 Service Manual
Low Cost, 14-Bit, Dual Channel
www.BDTIC.com/ADI
Synchro/Resolver-to-Digital Converter
FEATURES
Low per-channel cost
32-lead DIL hybrid package
2.6 arc minute accuracy
14-bit resolution
Built-in test
Independent reference inputs
High tracking rate
APPLICATIONS
Gimbal/gyro control systems
Robotics
Engine controllers
Coordinate conversion
Military servo control systems
Fire control systems
Avionic systems
Antenna monitoring
CNC machine tooling
GENERAL DESCRIPTION
The AD2S44 is a 14-bit dual channel, continuous tracking synchro/
resolver-to-digital converter. It has been designed specifically
for applications where space, weight, and cost are at a premium.
Each 32-lead hybrid device contains two independent Type II servo
loop tracking converters. The ratiometric conversion technique
employed provides excellent noise immunity and tolerance of
long lead lengths.
FUNCTIONAL BLOCK DIAGRAM
R
(A)
HI
R
(A)
LO
S1 (A)
S2 (A)
S3 (A)
S4 (A)
S1 (B)
S2 (B)
S3 (B)
S4 (B)
(B)
R
HI
R
(B)
LO
REFERENCE
CONDIT IONE R
SYNCHRO/
RESOLVER
CONDIT IONE R
SYNCHRO/
RESOLVER
CONDIT IONE R
REFERENCE
CONDIT IONE R
AD2S44
HIGH
SPEED
SIN/COS
MULTIPLIER
HIGH
SPEED
SIN/COS
MULTIPLIER
ERROR
AMP
ERROR
AMP
BUILT-IN
TEST
DETECT ION
PHASE-
SENSITIVE
DETECTOR
PHASE-
SENSITIVE
DETECTOR
Figure 1.
AD2S44
The core of each conversion is performed by state-of-the-art monolithic, integrated circuits manufactured by the Analog Devices, Inc.,
proprietary BiMOS II process, which combines the advantages of
low power CMOS digital logic with bipolar linear circuits. The
use of these ICs keeps the internal component count low and
ensures high reliability.
The built-in test (
provide an indication of whether the converter is tracking
accurately.
Each channel incorporates a high accuracy differential conditioning circuit for signal inputs providing more than 74 dB of
common-mode rejection. Options are available for both synchro
and resolver format inputs. The converter output is via a three-state
transparent latch allowing data to be read without interruption of
the converter operation. The A/
channel and present the digital position to the common data
outputs.
The AD2S44 also features independent reference inputs where
different reference frequencies can be used for each channel.
All components are 100% tested at −55°C, +25°C, and +125°C.
Devices are processed to high reliability screening standards
and receive further levels of testing and screening to ensure
high levels of reliability.
INTEGRATOR VCO
INTEGRATOR
BIT
) facility can be used in failsafe systems to
B
and OE control lines select the
+V
S
GND
–V
S
BIT
A/B
OE
DB1 (LSB)
TO
DB14 (MSB)
02947-001
VCO
UP-DOWN
COUNTER
THREE-
STATE
OUTPUT
LATCHES
UP-DOWN
COUNTER
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©1989–2008 Analog Devices, Inc. All rights reserved.
AD2S44
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TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Table of Contents .............................................................................. 2
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Theory of Operation ........................................................................ 7
Connecting the Converter ........................................................... 7
Channel Select (A/B) ................................................................... 7
REVISION HISTORY
08/08—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Specifications Section .................................................. 3
Changes to Absolute Maximum Ratings Section ......................... 5
Deleted Standard Processing Section ............................................. 7
Output Enable (OE) ......................................................................8
Built-In Test (
Scaling for Nonstandard Signals .................................................9
Dynamic Performance ..................................................................9
Acceleration Error .........................................................................9
Reliability ..................................................................................... 10
Processing for High Reliability (B Suffix) ............................... 10
Other Products ........................................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
Ordering Information ................................................................ 11
Changes to Processing for High Reliability Section and
Other Products Section ................................................................. 10
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 11
Changes to Ordering Information ............................................... 11
10/89—Revision 0: Initial Version
BIT
) .........................................................................8
Rev. A | Page 2 of 12
AD2S44
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SPECIFICATIONS
VS = ±15 V at TA = 25°C, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
PERFORMANCE
Accuracy
Tracking Rate 20 Rev/sec
Resolution (1 LSB = 1.3 Arc Minutes) 14 Bits Output coding parallel natural binary
Repeatability 1 LSB
Signal/Reference Frequency 400 2600 Hz
Bandwidth 100 Hz
SIGNAL INPUTS
Signal Voltage 11.8 or 90 V rms See the Ordering Information section
Input Impedance
Common-Mode Rejection 74 dB
Common-Mode Range
REFERENCE INPUTS
Reference Voltage 26 or 115 V rms See the Ordering Information section
Input Impedance
Common-Mode Range
ACCELERATION CONSTANT 62,000 sec
STEP RESPONSE
Large Step
Small Step
POWER LINES
+VS = +15 V
–VS = −15 V
Power Dissipation 1.7 1.9 W Quiescent condition
DIGITAL INPUTS
OE
A/B
DIGITAL OUTPUTS (DB1 to DB14)
V
V
Three-State Leakage Current ±40 μA
Drive Capability 3 LSTTL loads
1
AD2S44-UMB
2
−4.0 +4.0 Arc minutes −55°C to +125°C
−2.6 +2.6 Arc minutes −25°C to +85°C
AD2S44-TMB
2
−4.0 +4.0 Arc minutes −55°C to +125°C
90 V Signal 200 kΩ Resistive tolerance ±2%
11.8 V Signal 26 kΩ
90 V Signal ±250 V dc
11.8 V Signal ±60 V dc
115 V 270 kΩ Resistive tolerance ±5%
26 V 270 kΩ
115 V ±210 V dc
26 V ±210 V dc
–2
1, 2
1, 2
25 30 ms 2° to 1 LSB of error
1, 2
1, 2
63 75 ms 179° to 1 LSB of error
75 80 mA Quiescent condition
40 45 mA Quiescent condition
VIL 0.7 V dc IIL = 5 μA
VIH 2.0 V dc IIH = 5 μA
VIL 0.7 V dc IIL = 1.2 mA
VIH 2.0 V dc IIH = –60 μA
1, 2
OL
1, 2
OH
0.4 V dc IIL = 1.2 mA
2.4 V dc IOH = 60 μA
Rev. A | Page 3 of 12
AD2S44
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Parameter Min Typ Max Unit Test Conditions/Comments
DATA TRANSFER See Figure 6
Time to Data Stable (After Negative Edge of OE
or Change of Level of A/B)
Time to Data in High Impedance State
(After Positive Edge of OE
Time for Repetitive Strobing of Selected Channel 200 ns tP
BUILT-IN TEST OUTPUT (BIT)
Sense Active low Low = error condition
VOL 0.4 V dc IOL = 3.2 mA
VOH 2.4 V dc IOH = −160 μA
Drive Capability 8 LSTTL loads
Error Condition Set 55 LSB
Error Condition Cleared 45 LSB
1
Specified overtemperature range, −55°C to +125°C, and for: (a) ±10% signal and reference amplitude variation; (b) ±10% signal and reference harmonic distortion; (c)
±5% power supply variation; and (d) ±10% variation in reference frequency.
2
These parameters are 100% tested at nominal values of power supplies, input signal voltages, and operating frequency. All other parameters are guaranteed by
design, not tested.
)
640 ns t
200 ns t
S
R
Rev. A | Page 4 of 12
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