Analog Devices AD2S105AP Datasheet

Three-Phase
I
S1
Vds
Vqs
SECTOR
MULTIPLIER
SINE AND
COSINE
MULTIPLIER
INPUT DATA
STROBE
HOMOPOLAR
OUTPUT
HOMOPOLAR
REFERENCE
+5V GND –5V
φ
POSITION
PARALLEL
DATA
12 BITS
3
φ-2φ
Cos (θ + 120°)
Cos (θ + 240°)
SinθCosθ
Cosθ
Sinθ
Cos θ + φ
CONV1 CONV2
DECODE
BUSY
Vds'
Vqs'
Sin
θ + φ
SECTOR
MULTIPLIER
SINE AND
COSINE
MULTIPLIER
Ia + Ib + Ic
3
I
S2
I
S3
a
Transformation Three-Phase Balance Diagnostic–Homopolar Output DQ Manipulation Real-Time Filtering
APPLICATIONS AC Induction Motor Control Spindle Drive Control Pump Drive Control Compressor Drive Control and Diagnostics Harmonic Measurement Frequency Analysis Three-Phase Power Measurement
GENERAL DESCRIPTION
The AD2S105 performs the vector rotation of three-phase 120 degree or two-phase 90 degree sine and cosine signals by trans­ferring these inputs into a new reference frame which is controlled by the digital input angle φ. Two transforms are included in the AD2S105. The first is the Clarke transform which computes the sine and cosine orthogonal components of a three-phase in­put. These signals represent real and imaginary components which then form the input to the Park transform. The Park transform relates the angle of the input signals to a reference frame controlled by the digital input port. The digital input port on the AD2S105 is a 12-bit/parallel natural binary port.
If the input signals are represented by Vds and Vqs, respectively, where Vds and Vqs are the real and imaginary components, then the transformation can be described as follows:
Vds' = Vds Cosφ – Vqs Sinφ Vqs' = Vds Sinφ + Vqs Cosφ
Where Vds' and Vqs' are the output of the Park transform and Sinφ, and Cosφ are the trigonometric values internally cal­culated by the AD2S105 from the binary digital data φ.
The input section of the device can be configured to accept either three-phase inputs, two-phase inputs of a three-phase system, or two 90 degree input signals. The homopolar output indicates an imbalance of a three-phase input only at a user­specified level.
The digital input section will accept a resolution of up to 12 bits. An input data strobe signal is required to synchronize the position data and load this information into the device counters.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Current Conditioner
AD2S105

FUNCTIONAL BLOCK DIAGRAM

A two-phase rotated output facilitates the implementation of multiple rotation blocks.
The AD2S105 is fabricated on LC ±5 volt power supplies.

PRODUCT HIGHLIGHTS

Current Conditioning
The AD2S105 transforms the analog stator current signals (I I
, I
) using the digital angular signal (reference frame) into dc
2
3
s
s
values which represent direct current (I rent (I
). This transformation of the ac signals into dc values
qs
simplifies the design of the analog-to-digital (A/D) conversion scheme. The A/D conversion scheme is simplified as the band­width sampling issues inherent in ac signal processing are avoided and in most drive designs, simultaneous sampling of the stator currents may not be necessary.
Hardware Peripheral for Standard Microcontroller and DSP Systems
The AD2S105 off-loads the time consuming Cartesian transfor­mations from digital processors and benchmarks show a signifi­cant speed improvement over single processor designs. AD2S105 transformation time = 2 µs.
Field Oriented Control of AC Motors
The AD2S105 accommodates all the necessary functions to pro­vide a hardware solution for current conditioning in variable speed control of ac synchronous and asynchronous motors.
Three-Phase Imbalance Detection
The AD2S105 can be used to sense imbalances in a three-phase system via the homopolar output.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
2
MOS and operates on
) and quadrature cur-
ds
,
s1
(VDD = +5 V ± 5%; VSS = –5 V ± 5% AGND = DGND = O V;
AD2S105–SPECIFICATIONS
TA = –40°C to +85°C, unless otherwise noted)
Parameter Min Typ Max Units Conditions
SIGNAL INPUTS
PH/IP1, 2, 3, 4 Voltage Level ±2.8 ±3.3 V p-p DC to 50 kHz PH/IPH1, 2, 3 Voltage Level ±4.25 V p-p DC to 50 kHz Input Impedance
PH/IP1, 2, 3 7.5 10 k PH/IPH1, 2, 3 13.5 18 k PH/IP1, 4 1 M Mode 1 Only (2 Phase)
Sin & Cos
Gain
PH/IP1, 2, 3, 4 0.95 1 1.05 PH/IPH1, 2, 3 0.56
VECTOR PERFORMANCE
3-Phase Input-Output
Radius Error (Any Phase) ±0.4 ±1 % DC to 600 Hz Angular Error
1, 2
PH/IP 15 30 arc min DC to 600 Hz PH/IPH 30 arc min DC to 600 Hz
Differential Nonlinearity ±1 LSB Full Power Bandwidth 50 kHz Small Signal Bandwidth 200 kHz
ANALOG SIGNAL OUTPUTS
PH/OP1, 4 PH/IP, PH/IPH INPUTS
Output Voltage
3
±2.8 ±3.3 V p-p DC to 50 kHz
Offset Voltage 2 10 mV Inputs = 0 V Slew Rate 2 V/µs Small Signal Step Response 1 µs1° Input to Settle to
±1 LSB (Input to Output)
Output Impedance 15 Output Drive Current 3.0 4.0 mA Outputs to AGND Resistive Load 2 k Capacitive Load 50 pF
STROBE
Write 100 ns Positive Pulse Max Update Rate 366 kHz
BUSY
Pulse Width 1.7 2.5 µs Conversion in Process V
OH
V
OL
4V dcI
1V dcI
= 0.5 mA
OH
= 0.5 mA
OL
DIGITAL INPUTS
DB1–DB12
V
IH
V
IL
Input Current, I
IN
Input Capacitance, C
IN
3.5 V dc
1.5 V dc ±10 µA
10 pF
CONV MODE
(CONV1, CONV2)
V
IH
V
IL
3.5 V dc
1.5 V dc
Input Current 100 µA Internal 50 k Input Capacitance 10 pF Pull-Up Resistor
–2–
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AD2S105
WARNING!
ESD SENSITIVE DEVICE
Parameter Min Typ Max Units Conditions
HOMOPOLAR OUTPUT
HPOP–OUTPUT
V
OH
V
OL
HPREF–REFERENCE 0.5 V dc Homopolar Output-Internal
POWER SUPPLY
V
DD
V
SS
I
DD
I
SS
NOTES
1
Angular accuracy includes offset and gain errors, measured with a stationary digital input and maximum analog frequency inputs.
2
The angular error does not include the additional error caused by the phase delay as a function of input frequency. For example, if f
to the error due to phase delay is: 650 ns × f
3
Output subject to input voltage and gain.
Specifications subject to change without notice.
× 60 × 360 = 8.4 arc minutes.
INPUT
4V dcI
1V dcI
= 0.5 mA
OH
= 0.5 mA
OL
I
= 25 µA and 20 k to AGND
SOURCE
4.75 5 5.25 V dc –5.25 –5 –4.75 V dc
4 10 mA Quiescent Current 4 10 mA Quiescent Current
= 600 Hz, the contribution
INPUT

RECOMMENDED OPERATING CONDITIONS

Power Supply Voltage (+VDD, –V
) . . . . . . . . . ±5 V dc ± 5%
SS
Analog Input Voltage (PH/IP1, 2, 3, 4) . . . . . . 2 V rms ± 10%
Analog Input Voltage (PH/IPH1, 2, 3) . . . . . . 3 V rms ± 10%
Ambient Operating Temperature Range
Industrial (AP) . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C

ABSOLUTE MAXIMUM RATINGS (TA = +25°C)

VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V dc
V
to AGND . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V dc
SS
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V dc
Analog Input Voltage to AGND . . . . . . . . . . . . . . . V
Digital Input Voltage to DGND . . . . –0.3 V to V
Digital Output Voltage to DGND . . . . . . –0.3 V to V
to V
SS
+ 0.3 V dc
DD
DD
DD
+ V dc
Analog Output Voltage to AGND
. . . . . . . . . . . . . . . . . . . . . . V
– 0.3 V to VDD + 0.3 V dc
SS
Analog Output Load Condition (PH/OP1, 4
Sinθ, Cosθ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 k
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .140 mW
Operating Temperature
Industrial (AP) . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
CAUTION
1. Absolute Maximum Ratings are those values beyond which damage to the device will occur.
2. Correct polarity voltages must be maintained on the +V
DD
and –VSS pins

ORDERING GUIDE

Model Temperature Range Accuracy Option*
AD2S105AP –40°C to +85°C 30 arc min P-44A
*P = Plastic Leaded Chip Carrier.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD2S105 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
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–3–
AD2S105
6 5 4 3 2 1 44 43 42 41 40
18 19 20 21 22 23 24 25 26 27 28
29
30
31
32
33
34
35
36
37
38
39
V
SS
V
DD
STROBE
NC
NC
BUSY
DGND
V
DD
NC
NC
V
SS
HPREF
HPOP
CONV1
CONV2
COS
DB12
HPFILT
DB11
NC = NO CONNECT.
TOP VIEW
(NOT TO SCALE)
AD2S105
PH/OP4
NC
SIN
7
8
11
12
13
14
15
16
17
9
10
NC
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
PH/OP1
NC
NC
AGND
PH/IP4
PH/IPH3
PH/IP3
PH/IPH2
PH/IP2
PH/IPH1
PH/IP1
PIN DESIGNATIONS
1, 2, 3
Pin Mnemonic Description
3 STROBE Begin Conversion 4V 5V
DD SS
Positive Power Supply Negative Power Supply
6 PH/OP4 Sin (θ + φ) 7 PH/OP1 Cos (θ + φ) 10 AGND Analog Ground 11 PH/IP4 Sin θ Input 12 PH/IPH3 High Level Cos
(θ + 240°) Input
13 PH/IP3 Cos (θ + 240°) Input 14 PH/IPH2 High Level Cos
(θ + 120°) Input 15 PH/IP2 Cos (θ + 120°) Input 16 PH/IPH1 High Level Cos θ Input 17 PH/IP1 Cos (θ) Input 19 V
SS
Negative Power Supply 20 HPREF Homopolar Reference 21 HPOP Homopolar Output 22 HPFILT Homopolar Filter 23 CONV1 Select Analog Input
Format 24 CONV2 Select Analog Input
Format 25 COS Cos Output 26 SIN Sin Output 27–38 DB12 to DB1 (DB1 = MSB, DB12 =
LSB Parallel Input Data) 41 V
DD
Positive Power Supply 42 DGND Digital Ground 44 BUSY Internal Logic Setup
Time
NOTES
1
90° orthogonal signals = Sin θ, Cos θ (Resolver) = PH/IP4 and PH/IP1.
2
Three phase, 120°, three-wire signals = Cos θ, Cos (θ + 120°), Cos (θ + 240°).
= PH/IP1, PH/IP2, PH/IP3 High Level = PH/IPH1, PH/IPH2, PH/IPH3.
3
Three Phase, 120°, two-wire signals = Cos (θ + 120°), Cos (θ + 240°) =
PH/IP2, PH/IP3. In all cases where any of the input Pins 11 through 17 are not used, they must be left unconnected.
PIN CONFIGURATION
–4–
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