Altera EP2S180 User Manual
101 Innovation Drive
San Jose, CA 95134
(408) 544-7000
www.altera.com
Stratix II EP2S180
DSP Development Board
Reference Manual
Development Board Version: 1.0.0
Document Version: 1.0.0
Document Date: August 2005
Copyright © 2005 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants
performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make
changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera
Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
Part Number MNL-S20705-1.0
Development Board Version 1.0.0 Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual Preliminary August 2005
Contents
About This Manual
How to Contact Altera .............................................................................................................................. v
Typographic Conventions ........................................................................................................................ v
Chapter 1. Introduction
General Description ............................................................................................................................... 1–1
Stratix II EP2S180 DSP
Devlopment Board ................................................................................................................................ 1–1
Components ...................................................................................................................................... 1–1
Debugging Interfaces ....................................................................................................................... 1–2
Expansion Interfaces ........................................................................................................................ 1–2
Handling the Board ............................................................................................................................... 1–2
Chapter 2. Board Components & Interfaces
Components & Interfaces ..................................................................................................................... 2–1
Environmental Requirements ......................................................................................................... 2–3
Using the Board ..................................................................................................................................... 2–4
Apply Power ..................................................................................................................................... 2–4
Configure the Stratix II Device Directly ........................................................................................ 2–5
Nonvolatile Configuration ................................................................................................................... 2–5
Factory & User Configurations ...................................................................................................... 2–5
The Factory Design .......................................................................................................................... 2–7
Functional Description .......................................................................................................................... 2–8
Power ................................................................................................................................................. 2–8
Clocks & Clock Distribution ........................................................................................................... 2–9
Board Components .............................................................................................................................. 2–12
Stratix II Device (U18) .................................................................................................................... 2–12
Switch Inputs .................................................................................................................................. 2–13
Configuration Status LEDs ........................................................................................................... 2–14
Dual 7-Segment Display & LEDs ................................................................................................. 2–14
A/D Converters .............................................................................................................................. 2–16
D/A Converters .............................................................................................................................. 2–19
SRAM Memory (U43 & U44) ........................................................................................................ 2–22
Flash Memory (U17) ...................................................................................................................... 2–25
SDRAM Memory (U39 and U40) ................................................................................................. 2–27
Ethernet MAC/PHY (U16) ........................................................................................................... 2–31
CompactFlash Connector (CON1) ............................................................................................... 2–33
Mictor Connector (J20) ................................................................................................................... 2–36
VGA Interface (J35) ........................................................................................................................ 2–38
Audio CODEC (U5) ....................................................................................................................... 2–40
Altera Corporation iii
Contents
Expansion Interfaces ........................................................................................................................... 2–40
TI-EVM/FPDP Connector (J31, J33) ............................................................................................ 2–41
RS-232C Serial I/O Interface ......................................................................................................... 2–43
Analog Devices Corporation External A/D Support ............................................................... 2–45
Expansion Prototype Connector (J23, J24, J25) ........................................................................... 2–47
Expansion Prototype Connector (J26, J27, J28) ........................................................................... 2–49
iv Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
About This Manual
This manual provides comprehensive information about the Altera®
Stratix II EP2S180 Development Board.
How to Contact
Altera
For the most up-to-date information about Altera products, go to the
Altera world-wide web site at www.altera.com. For technical support on
this product, go to www.altera.com/mysupport. For additional
information about Altera products, consult the sources shown below.
Information Type USA & Canada All Other Locations
Technical support www.altera.com/mysupport/ www.altera.com/mysupport/
(800) 800-EPLD (3753)
(7:00 a.m. to 5:00 p.m. Pacific Time)
Product literature www.altera.com www.altera.com
Altera literature services literature@altera.com literature@altera.com
Non-technical customer
service
FTP site ftp.altera.com ftp.altera.com
Typographic
(800) 767-3753 + 1 408-544-7000
This document uses the typographic conventions shown below.
+1 408-544-8767
7:00 a.m. to 5:00 p.m. (GMT -8:00)
Pacific Time
7:00 a.m. to 5:00 p.m. (GMT -8:00)
Pacific Time
Conventions
Visual Cue Meaning
Bold Type with Initial
Capital Letters
bold type External timing parameters, directory names, project names, disk drive names,
Italic Type with Initial Capital
Letters
Command names, dialog box titles, check box options, and dialog box options are
shown in bold, initial capital letters. Example: Save As dialog box.
filenames, filename extensions, and software utility names are shown in bold
type. Examples: f
Document titles are shown in italic type with initial capital letters. Example: AN 75:
High-Speed Board Design.
, \qdesigns directory, d: drive, chiptrip.gdf file.
MAX
Altera Corporation v
August 2005 Preliminary
Typographic Conventions Stratix II EP2S180 Development Board Reference Manual
Visual Cue Meaning
Italic type Internal timing parameters and variables are shown in italic type.
Examples: t
Variable names are enclosed in angle brackets (< >) and shown in italic type.
Example: <file name>, <project name>.pof file.
Initial Capital Letters Keyboard keys and menu names are shown with initial capital letters. Examples:
Delete key, the Options menu.
“Subheading Title” References to sections within a document and titles of on-line help topics are
shown in quotation marks. Example: “Typographic Conventions.”
PIA
, n + 1.
Courier type Signal and port names are shown in lowercase Courier type. Examples: data1,
tdi, input. Active-low signals are denoted by suffix n, e.g., resetn.
Anything that must be typed exactly as it appears is shown in Courier type. For
example:
actual file, such as a Report File, references to parts of files (e.g., the AHDL
keyword
Courier.
1., 2., 3., and
a., b., c., etc.
● • Bullets are used in a list of items when the sequence of the items is not important.
■
v The checkmark indicates a procedure that consists of one step only.
1 The hand points to information that requires special attention.
c
w
r The angled arrow indicates you should press the Enter key.
f The feet direct you to more information on a particular topic.
Numbered steps are used in a list of items when the sequence of the items is
important, such as the steps listed in a procedure.
The caution indicates required information that needs special consideration and
understanding and should be read prior to starting or continuing with the
procedure or process.
The warning indicates information that should be read prior to starting or
continuing the procedure or processes
c:\qdesigns\tutorial\chiptrip.gdf. Also, sections of an
SUBDESIGN), as well as logic function names (e.g., TRI) are shown in
vi Altera Corporation
Preliminary August 2005
1. Introduction
General Description
Stratix II EP2S180 DSP Devlopment Board
The Stratix II EP2S180 DSP development board provides a hardware
platform that designers can use to develop DSP systems based on
Stratix II devices. Combined with DSP intellectual property (IP) from
Altera and partners in the Altera Megafunction Partners Program
SM
(AMPP
unique OpenCore
), users can quickly develop powerful DSP systems. Altera’s
®
Plus technology allows users to evaluate MegaCore®
functions in hardware prior to licensing them.
DSP Builder, version 5.0.1 includes a library for the Stratix II EP2S180 DSP
development board. This library allows algorithm development,
simulation, and verification on the board, all from within the MathWorks
MATLAB/Simulink system-level design tool. Additionally, the Stratix II
DSP development board includes a Texas Instrument EVM (crossplatform) daughter card connector, which enables development and
verification of FPGA co-processors for off loading and accelerating
compute-bound algorithms from programmable DSP processors.
The Stratix®II EP2S180 DSP development board is included with the DSP
Development Kit, Stratix II Professional Edition (ordering code DSPDEVKIT-2S180). This board is a development platform for
high-performance digital signal processing (DSP) designs, and features
the Stratix II EP2S180 device in a 1020-pin package.
Components
■ Analog I/O
● Two 12-bit 125-MHz A/D converters
● Two 14-bit 165-MHz D/A converters
● One 8-bit, 180 megapixels-per-second triple D/A converter for
VGA output
● One 96-KHz Stereo Audio coder/decoder (CODEC)
■ Memory subsystem
● 1 MByte of 10-ns asynchronous SRAM configured as a 32-bit bus
● 16 MBytes of flash memory configured as an 8-bit bus
● 32 MBytes of SDRAM memory configured as a 64-bit bus
● CompactFlash connector supporting ATA and IDE access modes
■ Configuration options
● On-board configuration using 16 MBytes of flash memory and
an Altera® EPM7256 MAX® device
Altera Corporation Core Version a.b.c variable 1–1
August 2005 Preliminary
Handling the Board
● Download configuration data using an USB Blaster
TM
download
cable
■ Single-ended or differential inputs and outputs accessed via a Mictor
connector
■ Dual 7-segment display
■ Four user-defined push-button switches
■ One female 9-pin RS-232 connector
■ 10/100 Ethernet MAC/PHY
■ Eight user-defined LEDs
■ Socketed 100-MHz oscillator
■ Single 16-V DC power supply (adapter included)
■ Active heat sink
Debugging Interfaces
■ One Mictor-type connector for Agilent and Tektronix logic analyzers
■ Several 0.1-inch headers
Expansion Interfaces
■ Two connectors for Analog Devices A/D converter daughter cards
■ Connector for Texas Instruments Evaluation Module (TI-EVM)
daughter cards
Two Expansion Prototype connectors
Handling the
When handling the board, it is important to observe the following
precaution:
Board
w Static discharge precaution—Without proper anti-static handling
the board can be damaged. Therefore, take anti-static
precautions while handling the board.
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Stratix II EP2S180 DSP Development Board Reference Manual August 2005
2. Board Components & Interfaces
Components &
This chapter describes the operational and connectivity information for
this board’s major components and interface.
Interfaces
Figure 2–1 shows a top view of the board components and interfaces.
Figure 2–1. Stratix II EP2S180 DSP Development Board Components nterfaces
Note to Figure 2–1:
(1) A TI-EVM/FPDP connector (J31, J33) is found on the reverse side of the board.
Altera Corporation Core Version a.b.c variable 2–1
Preliminary
Components & Interfaces
Table 2–1 describes the components on the board and the interfaces it
supports.
Table 2–1. Stratix II EP2S180 DSP Development Board Components & Interfaces (Part 1 of 2)
Component/
Interface
Typ e
Board
Designation
Description
Components
Stratix II device FPGA U18 EP2S180 Stratix II device
MAX Device PLD U10
A/D converters I/O U1, U2 Two 12-bit 125-MHz A/D converters
D/A converters I/O U14, U15 Two 14-bit 165-MHz D/A converters
1 MByte SRAM Memory U43, U44 1 MByte of 10-ns asynchronous SRAM configured as a
16 MBytes of flash
memory
32 MBytes of
SDRAM
SMA external clock
input connectors
Dual 7-segment
display
Push-button
switches
User-defined LEDs Display D1 - D8 Eight user-defined LEDs.
Power-on LED Display LED7 LED that illuminates when power is supplied to the
CONF_DONE LED Display LED5 LED that illuminates upon successful configuration of
RS-232 connector I/O J29 DB9 connector, configured as a DTE serial port. The
100-MHz oscillator Clock Y1 Socketed on-board 100-MHz oscillator.
Single 16-V DC
power supply
Stratix II device Joint
Test Action Group
(JTAG) Connector
Configuration
controller JTAG
Connector
Memory U17 16 Mbytes of flash memory configured as an 8-bit bus.
Memory U39, U40 32 MBytes of SDRAM memory configured as a 64-bit
Input J10, J11, J12 SMA connectors for inputs of external clock signals,
Display U12, U13 Dual 7-segment display.
I/O SW4, SW5,
SW6, SW7
Input J22 (adapter) Board adapter for included 16-V DC power supply
I/O J21 JTAG Connector used to configure the Stratix II device
I/O J13 JTAG connector used to configure the configuration
EPM7256ETC144 device
32-bit bus.
bus
terminated in 50 Ω.
Four push-button switches, which are user-defined as
logic inputs.
board.
the Stratix II device.
interface voltages are converted to 3.3-V signals and
brought to the Stratix II device, which must be
configured to generate and accept transmissions.
directly
controller
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Stratix II EP2S180 DSP Development Board Reference Manual
Board Components & Interfaces
Table 2–1. Stratix II EP2S180 DSP Development Board Components & Interfaces (Part 2 of 2)
Component/
Interface
VGA D/A Converter I/O U45 One 8-bit, 180 megapixels-per-second triple D/A
Audio CODEC I/O U5 96-KHz stereo audio CODEC
CompactFlash card
connector
Typ e
I/O CON1 CompactFlash card connector
Board
Designation
Description
converter for VGA output
Debugging Interfaces
Mictor connectors I/O J20 One Mictor header connected to 33 pins on the Stratix II
device (32 data signals, 1 clock signal) for use with an
external logic analyzer.
Expansion Interfaces
Analog Devices
connector (1)
TI-EVM connectors Expansion J31, J33 Interface to the TI-EVM. (The connectors are on the
Expansion Prototype
Connectors
Note to Ta b le 2 –1 :
(1) These headers can be used to interface to Analog Devices A/D converter evaluation boards. They are designated
as J5 and J6, and interface to Analog Devices AD6645/9433/9430 external A/D converters.
Expansion J5, J6 Interface to Analog Device’s A/D converters via two
40-pin connectors.
reverse side of the board.)
Expansion J23 - J25,
J26 - J28
The board provides two custom interfaces to daughter
cards via 74-pin headers. (These pins can also be used
for general I/O.)
These connectors are referred to on the board as
“Santa Cruz Daughter Card 1“ and “Santa Cruz
Daughter Card 2”
Environmental Requirements
The Stratix II EP2S180 DSP development board must be stored between
–40° C and 100° C. The recommended operating temperature is between
0° C and 55° C.
w The Stratix II EP2S180 DSP development board can be damaged
without proper anti-static handling.
f The DSP Development Kit, Stratix II Professional Edition includes a heat
sink and fan combination, also known as an active heat sink. Depending
on the specific requirements of your application, this level of cooling
may not be necessary.
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Stratix II EP2S180 DSP Development Board Reference Manual
Using the Board
Using the Board
When power is applied to the board and SW9 is in the "ON" position, the
Power-on LED (LED7) illuminates. At that time, the MAX device (U10)
programs the Stratix II device (U18) from one of 4 flash memory spaces
reserved for configuration information. If configuration is successful, the
CONF_DONE LED (LED5) illuminates.
1 If the Stratix II device is programmed with a design in one of the
user configuration memory spaces or using the JTAG connector
(J21), both the CONF_DONE LED (LED5) and the USER LED
(LED1) illuminate. For more information, refer to
“Configuration Status LEDs” on page 2–14.
To configure the board with a new design, the designer should perform
the following steps, explained in detail in this section.
3. Apply power to the board.
4. Reconfigure the Stratix II device.
Apply Power
Apply power to the board by connecting the 16-V DC power supply
adapter in the DSP Development Kit, Stratix II Professional Edition to the
on-board power adapter connector (J22), and then switch SW9 to the ON
position. All of the board components draw power either directly from
this 16-V supply or from the 3.3-V, 1.2-V, and 5-V regulators that are
powered by the 16-V supply.
1 The 3.3-V supply provides V
LVTTL board components. The 1.2-V supply provides V
to the Stratix II device and all
CCIO
CCINT
to
the Stratix II device.
When power is applied to the board, the Power On LED (LED7)
illuminates.
c The Stratix II EP2S180 device, the A/D and D/A converters, and
power regulator U22 become hot as the board is used. Because
their surface temperature may significantly increase, do not
touch these devices while power is applied to the board.
2–4 Core Version a.b.c variable Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
Configure the Stratix II Device Directly
Board Components & Interfaces
f
Nonvolatile Configuration
You can configure the Stratix II device directly, without turning off power,
using the Quartus
1. Attach the cable to J21, also labeled “JTAG Stratix II”.
2. Open a Quartus II SRAM Object File (.sof), which starts the
Quartus II Programmer.
3. Select USB Blaster as the hardware.
4. Set the mode to JTAG.
5. Click Start.
After successful configuration, the CONF_DONE LED (LED5)
illuminates.
Refer to Quartus II Help for instructions on how to use the USB Blaster
cable.
The designer must reconfigure the Stratix II device each time power is
applied to the Stratix II DSP development board. For designers who want
to power up the board and have a design immediately present in the
Stratix II device, the board has a nonvolatile configuration scheme. This
scheme consists of flash memory and a configuration controller (U10),
which is an Altera EPM7256 PLD. The configuration controller device is
non-volatile (i.e., it does not lose its configuration data when the board is
powered down) and it comes factory-programmed with logic that
configures the Stratix II EP2S180F1020C3 device (U18) from data stored in
flash (U17) on power-up. Upon power-up, the configuration controller
begins reading data from the flash memory. The flash memory, Stratix II
device, and configuration controller are connected so that data from the
flash configures the Stratix II device in fast passive-parallel mode.
®
II software and the USB Blaster cable, as follows.
Factory & User Configurations
The configuration controller can manage two separate Stratix II device
configurations stored in flash memory: one user design and a factory
design. On power-up, the configuration controller reads one of two (user
or factory) designs from the flash memory and programs the Stratix II
device accordingly. The user can select with which design the Stratix II
device is programmed by setting the DIP switches on SW2.
Altera Corporation Core Version a.b.c variable 2–5
Stratix II EP2S180 DSP Development Board Reference Manual
Nonvolatile Configuration
DIP switches 1 through 3 on SW2 select one of four possible Stratix II
configuration images upon power-up. When DIP switch 4 is in the
“OPEN” position the configuration controller is enabled. If DIP switch 4
is in the “OPEN” position and there are no valid user-defined images, the
Stratix II device is programmed with the factory configuration. Tab le 2– 2
shows the DIP switch combinations used to select the available images.
See “Nonvolatile Configuration” on page 2–5 for more details.
1 Switch 4 of the SW2 DIP switch must be set to “OPEN” to enable
the configuration controller.
Table 2–2. Configuration DIP Switch (SW2) Combinations
Image Switch 1 Switch 2 Switch 3 Switch 4
User0 Closed Closed Closed Open
Factory Open Open Open Open
1 An alternative method of configuring the device with the
factory design is to press push-button switch SW3.
You can load a customized user design or reload a factory design into the
on-board flash memory by using the Nios II Flash Programmer in the
Nios II SDK Shell.
Programming Example for the 2S180 DSP Development Board
The following example instructions illustrate how to program the 2S180
DSP Development Board.
1. Generate a flash file to load into the flash device.
a. Run the NIOS II SDK Shell.
b. Change directories to the project location.
c. Run the sof2flash utility:
$ sof2flash --input=<project_name>.sof -output=<project_name>.flash --offset=0x00900000
You can use the offset switch to specify which configuration area of the
flash will be loaded. Use 0x00900000 for User0 area, or 0x00200000 to
overwrite the Factory.
2. Copy the flash file into the on-board flash device.
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Stratix II EP2S180 DSP Development Board Reference Manual
Board Components & Interfaces
Move a copy of the flash programming SOF file to your project
directory. The flash programming SOF file is in the location:
<2S60_DevKit_Install_Directory>\Examples\HW\NiosII
\altera_dsp_dev_board_stratix_2s180
\altera_dsp_dev_board_stratix_2s180.sof
3. Run the Nios II Flash Programmer (nios2-flash-programmer) utility:
$ nios2-flash-programmer --base=0x01000000
--input=<project_name>.flash
--sof=altera_dsp_dev_board_stratix_2s180.sof
--device=1
f For more information on programming the flash memory or loading
SOF files into the on-board flash memory, refer to the Nios II Flash
Programmer User Guide.
The Factory Design
When the Stratix II device is programmed with the factory design, LEDs
D5 through D8 behave as a binary counter that counts down to zero. This
is a power-up indication that the board is functional and the device was
successfully programmed with the factory design.
Along with the LED counter, the factory design includes two blocks of IP
generated by the Altera NCO Compiler. One of these oscillators is
running at 10 times the frequency of the other, but both of them have the
same amplitude, covering 13 bits of dynamic range. Two sine waves
generated by these blocks are added together and the output is converted
from a 2's complement representation into unsigned integer format. This
combined sine wave signal with 14-bit dynamic range is sent to a 14-bit
D/A converter.
When the analog output of the D/A converter is connected, via the
included SMA cable, with the analog input of one of the 12-bit A/D
converters, the A/D converter’s digital output is looped back to the
Stratix II device. The design converts this loopback input from 2's
complement format to unsigned integer format. The converted loopback
®
data is captured by an instance of the SignalTap
II logic analyzer in the
design for display and analysis.
f For step-by-step instructions on how to use the factory design to test the
functionality of the board, refer to the DSP Development Kit, Stratix II
Professional Edition Getting Started User Guide.
Altera Corporation Core Version a.b.c variable 2–7
Stratix II EP2S180 DSP Development Board Reference Manual
Functional Description
Functional
Description
This section describes the elements of the Stratix II EP2S180 DSP
development board. Figure 2–2 shows a block diagram of the board.
Figure 2–2. Stratix II EP2S180 Development Board Block Diagram
Converter
Converter
Converter
Converter
Dual Seven-Segment Display
TI-EVM Connector
80-MHz Oscillator
JTAG Connector
Configuration Controller
32 Mbit Flash
SMA External Clock Input
SMA External Clock Output
A/D
A/D
D/A
D/A
12
12
14
Stratix II
EP2S180
Device
14
5.0 V
256K × 36 SRAM
256K × 36 SRAM
Mictor Connector
Analog Devices
A/D Converters
Connector
Prototyping Area
0.1-inch Digital
I/O Headers
RS-232
LEDs
Regulators
Vccint (1.5 V)
Vccio (3.3-V)
DIP
Switches
Pushbutton
Switches
Power
The 16-layer development board has 10 signal layers and 6 ground/VCC
planes. The board is powered from a single, well regulated 16-V supply.
Regulators on the board are used to develop the V
(3.3 V), and V
that indicates the presence of V
(5.0 V) voltages. The board includes a Power-on LED
CC5
.
CCIO
CCINT
(1.2 V), V
The following board elements are powered by the 3.3 V supply:
■ LEDs
■ Switches
■ Crystal oscillator
2–8 Core Version a.b.c variable Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
CCIO
Board Components & Interfaces
Table 2–3 lists the reference information for the 16-V power supply,
which connects from the wall socket to the DSP development board.
Table 2–3. Power Supply Specifications
Item
Board reference N/A (power supply adapter)
Part number TR9KT3750LCP-Y
Device description Switching power supply,
Manufacturer GlobTek Inc.
Manufacturer web site www.globtek.com
Description
Input: 100-240 V, ~1.2 A max., 50-60
Hz Output: +16 V, 3.75 A, 60 W max.
Clocks & Clock Distribution
Table 2–4 lists the clocks and their signal distribution throughout the
board.
Table 2–4. Clock Distribution Signals (Part 1 of 2)
Signal Name Comes From Goes To
dac_PLLCLK1 Stratix II device pin B15
(PLL5_OUT0p)
dac_PLLCLK1_n Stratix II device pin C15
(PLL5_OUT0n)
dac_PLLCLK2 Stratix II device pin C16
(PLL5_OUT1p)
dac_PLLCLK2_n Stratix II device pin D16
(PLL5_OUT1n)
sdram_CLK Stratix II device pin AK16
(PLL6_OUT0p)
adc_PLLCLK1 Stratix II device pin B18
(PLL11_OUT0p)
adc_PLLCLK2 Stratix II device pin
D18(PLL11_OUT0n)
audio_CLK Stratix II device pin
AL18(PLL12_OUT0p)
pld_MICTORCLK Stratix II device pin M25 Mictor Connector (J20 pin 5)
pld_CLKOUT Stratix II device pin J14 PROTO1 (J25 pin 11) and
Altera Corporation Core Version a.b.c variable 2–9
Stratix II EP2S180 DSP Development Board Reference Manual
DAC A (U14 pin 28)
DAC A (U14 pin 28)
DAC B (U15 pin 28) (2)
DAC B (U15 pin 28) (2)
SDRAM (U39 U40 pins 68)
ADC A (U1 pins 8, 7) (1)
ADC B (U2 pins 8, 7) (1)
Audio CODEC (U5 pin 25)
PROTO2 (J28 pin 11) via a
buffer (U7)
Functional Description
Table 2–4. Clock Distribution Signals (Part 2 of 2)
Signal Name Comes From Goes To
pld_CLKIN0,pld_CLK
IN1
pld_CLKIN0_n,pld_C
LKIN1_n
proto1_OSC,
proto2_OSC
cpld_CLKOSC 100-MHz oscillator CPLD (U10 pin 125)
adc_CLK_IN1,
adc_CLK_IN2
dac_CLKIN1,
dac_CLKIN2
pld_CLKFB pld_CLKOUT signal from
adc_CLK_IN1_n,
adc_CLK_IN2_n
dac_DACCLKIN1,
dac_DACCLKIN2
pld_DACCLKIN External DA_EXT_CLK
proto1_CLKOUT,
proto2_CLKOUT
Notes to Ta b l e 2 – 4 :
(1) J3 and J4 control which clock is routed to the A/D converters. See Table 2–10 for
details.
(2) J18 and J19 control which clock is routed to the D/A converters. See Ta bl e 2– 16
for details.
100-MHz oscillator Stratix II device pins AM17
and A16
External CLKIN_n input
(J11)
100-MHz oscillator PROTO1 (J25 pin 9) and
100-MHz oscillator ADC A (U1 pins 8, 7) and B
100-MHz oscillator DAC A (U14 pin 28) and B
the Stratix II pin J14
External CLKIN_n input
(J11)
External DA_EXT_CLK
input (J12)
input (J12)
PROTO1 (J25 pin 13)
PROTO2 (J28 pin 13) via
a buffer (U7)
Stratix II device pins AL17
and B16
PROTO2 (J28 pin 9) via a
buffer (U7)
(U2 pins 8, 7) (1)
(U15 pin 28) (2)
Stratix II device pin U1
ADC A (U1 pins 8, 7) and B
(U2 pins 8, 7) (1)
DAC A (U14 pin 28) and B
(U15 pin 28) (2)
Stratix II device pin E16
Stratix II device pins T32 and
T30
The Stratix II EP2S180 DSP development board can obtain a clock source
from one or more of the following sources:
■ The on-board crystal oscillator
■ An external clock (through an SMA connector or a Stratix II pin)
The board can provide independent clocks from both the enhanced and
fast PLLs to the A/D converters, the D/A converters, and the other
components that require stable clock sources.
To implement this concept, the enhanced PLL5-dedicated pins drive the
A/D converters and associated functions, and the enhanced
PLL6-dedicated pins drive the D/A converters and associated functions.
2–10 Core Version a.b.c variable Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
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